[PATCH v3 0/4] Add RISC-V V extension detection and LPM, FIB optimization

[uk7b@foxmail.com]

From: Sun Yuechi <sunyuechi@iscas.ac.cn>

This patch series adds support for the RISC-V Vector (V) extension and
provides an optimized implementation of `rte_lpm_lookupx4` using RVV.

The initialization of lpm/vtbl_entry is not fully vectorized here because
doing so would require __riscv_vluxei32_v_u32m1, which is slower
than the scalar approach in this small-scale scenario.

- Test: app/test/lpm_perf_autotest
- Platform: Banana Pi BPI-F3
- SoC: Spacemit X60 (8 cores with Vector extension)
- CPU Frequency: up to 1.6 GHz
- Cache: 256 KiB L1d x8, 256 KiB L1i x8, 1 MiB L2 x2
- Memory: 16 GiB
- Kernel: Linux 6.6.36
- Compiler: GCC 14.2.0 (with RVV intrinsic support)

LPM LookupX4:
    scalar: 5.7 cycles
    rvv:    4.6 cycles

FIB lookup_bulk:
    scalar: 5.9 cycles
    rvv:    5.4 cycles

v3:
- Move rte_cpuflags.h into lib/fib/dir24_8_rvv.h.
v2:
- Add RTE_RISCV_FEATURE_V check.

Sun Yuechi (4):
  config/riscv: detect V extension
  lib/lpm: R-V V rte_lpm_lookupx4
  lib/fib: R-V V rte_fib_lookup_bulk
  riscv: override machine_args only when default

 .mailmap                         |  1 +
 MAINTAINERS                      |  2 +
 config/riscv/meson.build         | 39 ++++++++++++++++---
 lib/eal/riscv/include/rte_vect.h |  4 ++
 lib/fib/dir24_8.c                | 20 ++++++++++
 lib/fib/dir24_8_rvv.c            | 64 ++++++++++++++++++++++++++++++++
 lib/fib/dir24_8_rvv.h            | 26 +++++++++++++
 lib/fib/meson.build              |  2 +
 lib/lpm/meson.build              |  1 +
 lib/lpm/rte_lpm.h                |  2 +
 lib/lpm/rte_lpm_rvv.h            | 59 +++++++++++++++++++++++++++++
 11 files changed, 214 insertions(+), 6 deletions(-)
 create mode 100644 lib/fib/dir24_8_rvv.c
 create mode 100644 lib/fib/dir24_8_rvv.h
 create mode 100644 lib/lpm/rte_lpm_rvv.h

-- 
2.51.0