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* [dts] [PATCH V1 0/2] memory_register: upstream test plan and automation script
@ 2018-06-06  5:32 yufengx.mo
  2018-06-06  5:32 ` [dts] [PATCH V1 1/2] memory_register: upstream test plan yufengx.mo
  2018-06-06  5:32 ` [dts] [PATCH V1 2/2] memory_register: upstream automation script yufengx.mo
  0 siblings, 2 replies; 4+ messages in thread
From: yufengx.mo @ 2018-06-06  5:32 UTC (permalink / raw)
  To: dts; +Cc: yufengmx

From: yufengmx <yufengx.mo@intel.com>

*. memory_register test plan 
*. memory_register automation script 

yufengmx (2):
  memory_register: upstream test plan
  memory_register: upstream automation script

 test_plans/memory_register_test_plan.rst | 204 +++++++++++++++
 tests/TestSuite_memory_register.py       | 423 +++++++++++++++++++++++++++++++
 2 files changed, 627 insertions(+)
 create mode 100644 test_plans/memory_register_test_plan.rst
 create mode 100644 tests/TestSuite_memory_register.py

-- 
1.9.3

^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2018-06-07  1:55 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-06-06  5:32 [dts] [PATCH V1 0/2] memory_register: upstream test plan and automation script yufengx.mo
2018-06-06  5:32 ` [dts] [PATCH V1 1/2] memory_register: upstream test plan yufengx.mo
2018-06-07  1:55   ` Tu, Lijuan
2018-06-06  5:32 ` [dts] [PATCH V1 2/2] memory_register: upstream automation script yufengx.mo

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