From: yaobing <bingx.y.yao@intel.com>
To: dts@dpdk.org
Cc: yaobing <bingx.y.yao@intel.com>
Subject: [dts] [PATCH V1 03/12] tests/unit_tests_dump:change hard coding for core numbers
Date: Wed, 24 Oct 2018 10:24:45 +0800 [thread overview]
Message-ID: <1540347894-9652-3-git-send-email-bingx.y.yao@intel.com> (raw)
In-Reply-To: <1540347894-9652-1-git-send-email-bingx.y.yao@intel.com>
Cores number is different on different platform,virtual machine maybe has not assigned cores more than 5 cores,change hard coding for core numbers in test app startup options
Signed-off-by: yaobing <bingx.y.yao@intel.com>
---
tests/TestSuite_unit_tests_dump.py | 17 ++++++++++-------
1 file changed, 10 insertions(+), 7 deletions(-)
diff --git a/tests/TestSuite_unit_tests_dump.py b/tests/TestSuite_unit_tests_dump.py
index 99fd7ff..84ecce7 100644
--- a/tests/TestSuite_unit_tests_dump.py
+++ b/tests/TestSuite_unit_tests_dump.py
@@ -39,6 +39,7 @@ Run Inter-VM share memory autotests
from test_case import TestCase
+import utils
#
#
@@ -60,6 +61,8 @@ class TestUnitTestsDump(TestCase):
Nothing to do here.
"""
# Based on h/w type, choose how many ports to use
+ cores = self.dut.get_core_list("all")
+ self.coremask = utils.create_mask(cores)
self.dut_ports = self.dut.get_ports(self.nic)
self.verify(len(self.dut_ports) >= 1, "Insufficient ports for testing")
self.start_test_time = 60
@@ -76,7 +79,7 @@ class TestUnitTestsDump(TestCase):
"""
Run history log dump test case.
"""
- self.dut.send_expect("./%s/app/test -n 1 -c f" % (self.target), "R.*T.*E.*>.*>", self.start_test_time)
+ self.dut.send_expect("./%s/app/test -n 1 -c %s" % (self.target, self.coremask), "R.*T.*E.*>.*>", self.start_test_time)
out = self.dut.send_expect("dump_log_history", "RTE>>", self.run_cmd_time * 2)
self.dut.send_expect("quit", "# ")
self.verify("EAL" in out, "Test failed")
@@ -123,7 +126,7 @@ class TestUnitTestsDump(TestCase):
"""
Run physical memory dump test case.
"""
- self.dut.send_expect("./%s/app/test -n 1 -c f" % (self.target), "R.*T.*E.*>.*>", self.start_test_time)
+ self.dut.send_expect("./%s/app/test -n 1 -c %s" % (self.target, self.coremask), "R.*T.*E.*>.*>", self.start_test_time)
out = self.dut.send_expect("dump_physmem", "RTE>>", self.run_cmd_time * 2)
self.dut.send_expect("quit", "# ")
elements = ['Segment', 'IOVA', 'len', 'virt', 'socket_id', 'hugepage_sz', 'nchannel', 'nrank']
@@ -169,7 +172,7 @@ class TestUnitTestsDump(TestCase):
"""
Run struct size dump test case.
"""
- self.dut.send_expect("./%s/app/test -n 1 -c f" % (self.target), "R.*T.*E.*>.*>", self.start_test_time)
+ self.dut.send_expect("./%s/app/test -n 1 -c %s" % (self.target, self.coremask), "R.*T.*E.*>.*>", self.start_test_time)
out = self.dut.send_expect("dump_struct_sizes", "RTE>>", self.run_cmd_time * 2)
self.dut.send_expect("quit", "# ")
@@ -189,15 +192,15 @@ class TestUnitTestsDump(TestCase):
"""
test_port = self.dut_ports[0]
pci_address = self.dut.ports_info[test_port]['pci'];
- self.dut.send_expect("./%s/app/test -n 1 -c f -b %s"
- % (self.target, pci_address), "R.*T.*E.*>.*>", self.start_test_time)
+ self.dut.send_expect("./%s/app/test -n 1 -c %s -b %s"
+ % (self.target, self.coremask, pci_address), "R.*T.*E.*>.*>", self.start_test_time)
out = self.dut.send_expect("dump_devargs", "RTE>>", self.run_cmd_time * 2)
self.dut.send_expect("quit", "# ")
black_str = " %s" % pci_address
self.verify(black_str in out, "Dump black list failed")
- self.dut.send_expect("./%s/app/test -n 1 -c f -w %s"
- % (self.target, pci_address), "R.*T.*E.*>.*>", self.start_test_time)
+ self.dut.send_expect("./%s/app/test -n 1 -c %s -w %s"
+ % (self.target, self.coremask, pci_address), "R.*T.*E.*>.*>", self.start_test_time)
out = self.dut.send_expect("dump_devargs", "RTE>>", self.run_cmd_time * 2)
self.dut.send_expect("quit", "# ")
--
2.17.2
next prev parent reply other threads:[~2018-10-24 2:21 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-24 2:24 [dts] [PATCH V1 01/12] tests/unit_tests_cmdline:change " yaobing
2018-10-24 2:24 ` [dts] [PATCH V1 02/12] tests/unit_tests_crc:change " yaobing
2018-10-24 2:24 ` yaobing [this message]
2018-10-24 2:24 ` [dts] [PATCH V1 04/12] tests/unit_tests_kni:change " yaobing
2018-10-24 2:24 ` [dts] [PATCH V1 05/12] tests/unit_tests_lpm:change " yaobing
2018-10-24 2:24 ` [dts] [PATCH V1 06/12] tests/unit_tests_mbuf:change " yaobing
2018-10-24 2:24 ` [dts] [PATCH V1 07/12] tests/unit_tests_mempool:change " yaobing
2018-10-24 2:24 ` [dts] [PATCH V1 08/12] tests/unit_tests_power:change " yaobing
2018-10-24 2:24 ` [dts] [PATCH V1 09/12] tests/unit_tests_qos:change " yaobing
2018-10-24 2:24 ` [dts] [PATCH V1 10/12] tests/unit_tests_ring:change " yaobing
2018-10-24 2:24 ` [dts] [PATCH V1 11/12] tests/unit_tests_ringpmd:change " yaobing
2018-10-24 2:24 ` [dts] [PATCH V1 12/12] tests/unit_tests_timer:change " yaobing
2018-10-24 8:19 ` [dts] [PATCH V1 01/12] tests/unit_tests_cmdline:change " Tu, Lijuan
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