* [dts] [PATCH V1 02/12] tests/unit_tests_crc:change hard coding for core numbers
2018-10-24 2:24 [dts] [PATCH V1 01/12] tests/unit_tests_cmdline:change hard coding for core numbers yaobing
@ 2018-10-24 2:24 ` yaobing
2018-10-24 2:24 ` [dts] [PATCH V1 03/12] tests/unit_tests_dump:change " yaobing
` (10 subsequent siblings)
11 siblings, 0 replies; 13+ messages in thread
From: yaobing @ 2018-10-24 2:24 UTC (permalink / raw)
To: dts; +Cc: yaobing
Cores number is different on different platform,virtual machine maybe has not assigned cores more than 5 cores,change hard coding for core numbers in test app startup options
Signed-off-by: yaobing <bingx.y.yao@intel.com>
---
tests/TestSuite_unit_tests_crc.py | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/tests/TestSuite_unit_tests_crc.py b/tests/TestSuite_unit_tests_crc.py
index e09729a..d37faf3 100644
--- a/tests/TestSuite_unit_tests_crc.py
+++ b/tests/TestSuite_unit_tests_crc.py
@@ -37,6 +37,7 @@ Cmdline autotest
"""
from test_case import TestCase
+import utils
#
#
@@ -55,7 +56,8 @@ class TestUnitTestsCrc(TestCase):
"""
Run at the start of each test suite.
"""
- pass
+ cores = self.dut.get_core_list("all")
+ self.coremask = utils.create_mask(cores)
def set_up(self):
"""
@@ -68,7 +70,7 @@ class TestUnitTestsCrc(TestCase):
Run cmdline autotests in RTE comand line.
"""
- self.dut.send_expect("./%s/app/test -n 1 -c f" % self.target, "R.*T.*E.*>.*>", 60)
+ self.dut.send_expect("./%s/app/test -n 1 -c %s" % (self.target, self.coremask), "R.*T.*E.*>.*>", 60)
out = self.dut.send_expect("crc_autotest", "RTE>>", 60)
self.dut.send_expect("quit", "# ")
self.verify("Test OK" in out, "Test failed")
--
2.17.2
^ permalink raw reply [flat|nested] 13+ messages in thread* [dts] [PATCH V1 03/12] tests/unit_tests_dump:change hard coding for core numbers
2018-10-24 2:24 [dts] [PATCH V1 01/12] tests/unit_tests_cmdline:change hard coding for core numbers yaobing
2018-10-24 2:24 ` [dts] [PATCH V1 02/12] tests/unit_tests_crc:change " yaobing
@ 2018-10-24 2:24 ` yaobing
2018-10-24 2:24 ` [dts] [PATCH V1 04/12] tests/unit_tests_kni:change " yaobing
` (9 subsequent siblings)
11 siblings, 0 replies; 13+ messages in thread
From: yaobing @ 2018-10-24 2:24 UTC (permalink / raw)
To: dts; +Cc: yaobing
Cores number is different on different platform,virtual machine maybe has not assigned cores more than 5 cores,change hard coding for core numbers in test app startup options
Signed-off-by: yaobing <bingx.y.yao@intel.com>
---
tests/TestSuite_unit_tests_dump.py | 17 ++++++++++-------
1 file changed, 10 insertions(+), 7 deletions(-)
diff --git a/tests/TestSuite_unit_tests_dump.py b/tests/TestSuite_unit_tests_dump.py
index 99fd7ff..84ecce7 100644
--- a/tests/TestSuite_unit_tests_dump.py
+++ b/tests/TestSuite_unit_tests_dump.py
@@ -39,6 +39,7 @@ Run Inter-VM share memory autotests
from test_case import TestCase
+import utils
#
#
@@ -60,6 +61,8 @@ class TestUnitTestsDump(TestCase):
Nothing to do here.
"""
# Based on h/w type, choose how many ports to use
+ cores = self.dut.get_core_list("all")
+ self.coremask = utils.create_mask(cores)
self.dut_ports = self.dut.get_ports(self.nic)
self.verify(len(self.dut_ports) >= 1, "Insufficient ports for testing")
self.start_test_time = 60
@@ -76,7 +79,7 @@ class TestUnitTestsDump(TestCase):
"""
Run history log dump test case.
"""
- self.dut.send_expect("./%s/app/test -n 1 -c f" % (self.target), "R.*T.*E.*>.*>", self.start_test_time)
+ self.dut.send_expect("./%s/app/test -n 1 -c %s" % (self.target, self.coremask), "R.*T.*E.*>.*>", self.start_test_time)
out = self.dut.send_expect("dump_log_history", "RTE>>", self.run_cmd_time * 2)
self.dut.send_expect("quit", "# ")
self.verify("EAL" in out, "Test failed")
@@ -123,7 +126,7 @@ class TestUnitTestsDump(TestCase):
"""
Run physical memory dump test case.
"""
- self.dut.send_expect("./%s/app/test -n 1 -c f" % (self.target), "R.*T.*E.*>.*>", self.start_test_time)
+ self.dut.send_expect("./%s/app/test -n 1 -c %s" % (self.target, self.coremask), "R.*T.*E.*>.*>", self.start_test_time)
out = self.dut.send_expect("dump_physmem", "RTE>>", self.run_cmd_time * 2)
self.dut.send_expect("quit", "# ")
elements = ['Segment', 'IOVA', 'len', 'virt', 'socket_id', 'hugepage_sz', 'nchannel', 'nrank']
@@ -169,7 +172,7 @@ class TestUnitTestsDump(TestCase):
"""
Run struct size dump test case.
"""
- self.dut.send_expect("./%s/app/test -n 1 -c f" % (self.target), "R.*T.*E.*>.*>", self.start_test_time)
+ self.dut.send_expect("./%s/app/test -n 1 -c %s" % (self.target, self.coremask), "R.*T.*E.*>.*>", self.start_test_time)
out = self.dut.send_expect("dump_struct_sizes", "RTE>>", self.run_cmd_time * 2)
self.dut.send_expect("quit", "# ")
@@ -189,15 +192,15 @@ class TestUnitTestsDump(TestCase):
"""
test_port = self.dut_ports[0]
pci_address = self.dut.ports_info[test_port]['pci'];
- self.dut.send_expect("./%s/app/test -n 1 -c f -b %s"
- % (self.target, pci_address), "R.*T.*E.*>.*>", self.start_test_time)
+ self.dut.send_expect("./%s/app/test -n 1 -c %s -b %s"
+ % (self.target, self.coremask, pci_address), "R.*T.*E.*>.*>", self.start_test_time)
out = self.dut.send_expect("dump_devargs", "RTE>>", self.run_cmd_time * 2)
self.dut.send_expect("quit", "# ")
black_str = " %s" % pci_address
self.verify(black_str in out, "Dump black list failed")
- self.dut.send_expect("./%s/app/test -n 1 -c f -w %s"
- % (self.target, pci_address), "R.*T.*E.*>.*>", self.start_test_time)
+ self.dut.send_expect("./%s/app/test -n 1 -c %s -w %s"
+ % (self.target, self.coremask, pci_address), "R.*T.*E.*>.*>", self.start_test_time)
out = self.dut.send_expect("dump_devargs", "RTE>>", self.run_cmd_time * 2)
self.dut.send_expect("quit", "# ")
--
2.17.2
^ permalink raw reply [flat|nested] 13+ messages in thread* [dts] [PATCH V1 04/12] tests/unit_tests_kni:change hard coding for core numbers
2018-10-24 2:24 [dts] [PATCH V1 01/12] tests/unit_tests_cmdline:change hard coding for core numbers yaobing
2018-10-24 2:24 ` [dts] [PATCH V1 02/12] tests/unit_tests_crc:change " yaobing
2018-10-24 2:24 ` [dts] [PATCH V1 03/12] tests/unit_tests_dump:change " yaobing
@ 2018-10-24 2:24 ` yaobing
2018-10-24 2:24 ` [dts] [PATCH V1 05/12] tests/unit_tests_lpm:change " yaobing
` (8 subsequent siblings)
11 siblings, 0 replies; 13+ messages in thread
From: yaobing @ 2018-10-24 2:24 UTC (permalink / raw)
To: dts; +Cc: yaobing
Cores number is different on different platform,virtual machine maybe has not assigned cores more than 5 cores,change hard coding for core numbers in test app startup options
Signed-off-by: yaobing <bingx.y.yao@intel.com>
---
tests/TestSuite_unit_tests_kni.py | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/tests/TestSuite_unit_tests_kni.py b/tests/TestSuite_unit_tests_kni.py
index ea8ef79..63153b6 100644
--- a/tests/TestSuite_unit_tests_kni.py
+++ b/tests/TestSuite_unit_tests_kni.py
@@ -36,6 +36,7 @@ This TestSuite runs the unit tests included in DPDK for KNI feature.
"""
from test_case import TestCase
+import utils
#
#
@@ -72,7 +73,9 @@ class TestUnitTestsKni(TestCase):
KNI Prerequisites
"""
-
+
+ cores = self.dut.get_core_list("all")
+ self.coremask = utils.create_mask(cores)
self.insmod_kni()
def set_up(self):
@@ -85,7 +88,7 @@ class TestUnitTestsKni(TestCase):
"""
Run kni autotest.
"""
- self.dut.send_expect("./%s/app/test -n 1 -c fffe" % self.target, "R.*T.*E.*>.*>", 60)
+ self.dut.send_expect("./%s/app/test -n 1 -c %s" % (self.target, self.coremask), "R.*T.*E.*>.*>", 60)
out = self.dut.send_expect("kni_autotest", "RTE>>", 60)
self.dut.send_expect("quit", "# ")
--
2.17.2
^ permalink raw reply [flat|nested] 13+ messages in thread* [dts] [PATCH V1 05/12] tests/unit_tests_lpm:change hard coding for core numbers
2018-10-24 2:24 [dts] [PATCH V1 01/12] tests/unit_tests_cmdline:change hard coding for core numbers yaobing
` (2 preceding siblings ...)
2018-10-24 2:24 ` [dts] [PATCH V1 04/12] tests/unit_tests_kni:change " yaobing
@ 2018-10-24 2:24 ` yaobing
2018-10-24 2:24 ` [dts] [PATCH V1 06/12] tests/unit_tests_mbuf:change " yaobing
` (7 subsequent siblings)
11 siblings, 0 replies; 13+ messages in thread
From: yaobing @ 2018-10-24 2:24 UTC (permalink / raw)
To: dts; +Cc: yaobing
Cores number is different on different platform,virtual machine maybe has not assigned cores more than 5 cores,change hard coding for core numbers in test app startup options
Signed-off-by: yaobing <bingx.y.yao@intel.com>
---
tests/TestSuite_unit_tests_lpm.py | 9 ++++++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/tests/TestSuite_unit_tests_lpm.py b/tests/TestSuite_unit_tests_lpm.py
index a8d5dd3..8a09ff2 100644
--- a/tests/TestSuite_unit_tests_lpm.py
+++ b/tests/TestSuite_unit_tests_lpm.py
@@ -37,6 +37,7 @@ This TestSuite runs the unit tests included in DPDK for LPM methods in l3fwd.
from test_case import TestCase
+import utils
#
#
@@ -59,7 +60,9 @@ class TestUnitTestsLpmIpv6(TestCase):
Qos Prerequisites
"""
- pass
+ cores = self.dut.get_core_list("all")
+ self.coremask = utils.create_mask(cores)
+
def set_up(self):
"""
Run before each test case.
@@ -70,7 +73,7 @@ class TestUnitTestsLpmIpv6(TestCase):
"""
Run lpm for IPv6 autotest.
"""
- self.dut.send_expect("./%s/app/test -n 1 -c f" % self.target, "R.*T.*E.*>.*>", 60)
+ self.dut.send_expect("./%s/app/test -n 1 -c %s" % (self.target, self.coremask), "R.*T.*E.*>.*>", 60)
out = self.dut.send_expect("lpm_autotest", "RTE>>", 120)
self.dut.send_expect("quit", "# ")
self.verify("Test OK" in out, "Test failed")
@@ -79,7 +82,7 @@ class TestUnitTestsLpmIpv6(TestCase):
"""
Run lpm for IPv6 autotest.
"""
- self.dut.send_expect("./%s/app/test -n 1 -c f" % self.target, "R.*T.*E.*>.*>", 60)
+ self.dut.send_expect("./%s/app/test -n 1 -c %s" % (self.target, self.coremask), "R.*T.*E.*>.*>", 60)
out = self.dut.send_expect("lpm6_autotest", "RTE>>", 120)
self.dut.send_expect("quit", "# ")
self.verify("Test OK" in out, "Test failed")
--
2.17.2
^ permalink raw reply [flat|nested] 13+ messages in thread* [dts] [PATCH V1 06/12] tests/unit_tests_mbuf:change hard coding for core numbers
2018-10-24 2:24 [dts] [PATCH V1 01/12] tests/unit_tests_cmdline:change hard coding for core numbers yaobing
` (3 preceding siblings ...)
2018-10-24 2:24 ` [dts] [PATCH V1 05/12] tests/unit_tests_lpm:change " yaobing
@ 2018-10-24 2:24 ` yaobing
2018-10-24 2:24 ` [dts] [PATCH V1 07/12] tests/unit_tests_mempool:change " yaobing
` (6 subsequent siblings)
11 siblings, 0 replies; 13+ messages in thread
From: yaobing @ 2018-10-24 2:24 UTC (permalink / raw)
To: dts; +Cc: yaobing
Cores number is different on different platform,virtual machine maybe has not assigned cores more than 5 cores,change hard coding for core numbers in test app startup options
Signed-off-by: yaobing <bingx.y.yao@intel.com>
---
tests/TestSuite_unit_tests_mbuf.py | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/tests/TestSuite_unit_tests_mbuf.py b/tests/TestSuite_unit_tests_mbuf.py
index f1fce78..bd4d47e 100644
--- a/tests/TestSuite_unit_tests_mbuf.py
+++ b/tests/TestSuite_unit_tests_mbuf.py
@@ -37,6 +37,7 @@ Run all mbuf autotests
from test_case import TestCase
+import utils
#
#
@@ -56,7 +57,9 @@ class TestUnitTestsMbuf(TestCase):
"""
Run at the start of each test suite.
"""
- pass
+ cores = self.dut.get_core_list("all")
+ self.coremask = utils.create_mask(cores)
+
def set_up(self):
"""
Run before each test case.
@@ -68,7 +71,7 @@ class TestUnitTestsMbuf(TestCase):
Run mbuf autotest.
"""
- self.dut.send_expect("./%s/app/test -n 1 -c f" % self.target, "R.*T.*E.*>.*>", 60)
+ self.dut.send_expect("./%s/app/test -n 1 -c %s" % (self.target, self.coremask), "R.*T.*E.*>.*>", 60)
out = self.dut.send_expect("mbuf_autotest", "RTE>>", 180)
self.dut.send_expect("quit", "# ")
self.verify("Test OK" in out, "Test failed")
--
2.17.2
^ permalink raw reply [flat|nested] 13+ messages in thread* [dts] [PATCH V1 07/12] tests/unit_tests_mempool:change hard coding for core numbers
2018-10-24 2:24 [dts] [PATCH V1 01/12] tests/unit_tests_cmdline:change hard coding for core numbers yaobing
` (4 preceding siblings ...)
2018-10-24 2:24 ` [dts] [PATCH V1 06/12] tests/unit_tests_mbuf:change " yaobing
@ 2018-10-24 2:24 ` yaobing
2018-10-24 2:24 ` [dts] [PATCH V1 08/12] tests/unit_tests_power:change " yaobing
` (5 subsequent siblings)
11 siblings, 0 replies; 13+ messages in thread
From: yaobing @ 2018-10-24 2:24 UTC (permalink / raw)
To: dts; +Cc: yaobing
Cores number is different on different platform,virtual machine maybe
has not assigned cores more than 5 cores,change hard coding for core
numbers in test app startup options
Signed-off-by: yaobing <bingx.y.yao@intel.com>
---
tests/TestSuite_unit_tests_mempool.py | 9 ++++++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/tests/TestSuite_unit_tests_mempool.py b/tests/TestSuite_unit_tests_mempool.py
index febf6b6..e4dc436 100644
--- a/tests/TestSuite_unit_tests_mempool.py
+++ b/tests/TestSuite_unit_tests_mempool.py
@@ -37,6 +37,7 @@ Run all Mempool autotests
from test_case import TestCase
+import utils
#
#
@@ -56,7 +57,9 @@ class TestUnitTestsMempool(TestCase):
"""
Run at the start of each test suite.
"""
- pass
+ cores = self.dut.get_core_list("all")
+ self.coremask = utils.create_mask(cores)
+
def set_up(self):
"""
Run before each test case.
@@ -68,7 +71,7 @@ class TestUnitTestsMempool(TestCase):
Run memory pool autotest.
"""
- self.dut.send_expect("./%s/app/test -n 1 -c f" % self.target, "R.*T.*E.*>.*>", 60)
+ self.dut.send_expect("./%s/app/test -n 1 -c %s" % (self.target, self.coremask), "R.*T.*E.*>.*>", 60)
out = self.dut.send_expect("mempool_autotest", "RTE>>", 120)
self.dut.send_expect("quit", "# ")
self.verify("Test OK" in out, "Test failed")
@@ -77,7 +80,7 @@ class TestUnitTestsMempool(TestCase):
"""
Run memory pool performance autotest.
"""
- self.dut.send_expect("./%s/app/test -n 1 -c e" % self.target, "R.*T.*E.*>.*>", 60)
+ self.dut.send_expect("./%s/app/test -n 1 -c %s" % (self.target, self.coremask), "R.*T.*E.*>.*>", 60)
out = self.dut.send_expect("mempool_perf_autotest", "RTE>>", 1200)
self.dut.send_expect("quit", "# ")
self.verify("Test OK" in out, "Test failed")
--
2.17.2
^ permalink raw reply [flat|nested] 13+ messages in thread* [dts] [PATCH V1 08/12] tests/unit_tests_power:change hard coding for core numbers
2018-10-24 2:24 [dts] [PATCH V1 01/12] tests/unit_tests_cmdline:change hard coding for core numbers yaobing
` (5 preceding siblings ...)
2018-10-24 2:24 ` [dts] [PATCH V1 07/12] tests/unit_tests_mempool:change " yaobing
@ 2018-10-24 2:24 ` yaobing
2018-10-24 2:24 ` [dts] [PATCH V1 09/12] tests/unit_tests_qos:change " yaobing
` (4 subsequent siblings)
11 siblings, 0 replies; 13+ messages in thread
From: yaobing @ 2018-10-24 2:24 UTC (permalink / raw)
To: dts; +Cc: yaobing
Cores number is different on different platform,virtual machine maybe has not assigned cores more than 5 cores,change hard coding for core numbers in test app startup options
Signed-off-by: yaobing <bingx.y.yao@intel.com>
---
tests/TestSuite_unit_tests_power.py | 9 ++++++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/tests/TestSuite_unit_tests_power.py b/tests/TestSuite_unit_tests_power.py
index 970e0a6..580683c 100644
--- a/tests/TestSuite_unit_tests_power.py
+++ b/tests/TestSuite_unit_tests_power.py
@@ -36,6 +36,7 @@ This TestSuite runs the unit tests included in DPDK for power feature.
"""
from test_case import TestCase
+import utils
#
#
@@ -57,7 +58,9 @@ class TestUnitTestsPower(TestCase):
Power Prerequisites
"""
- pass
+ cores = self.dut.get_core_list("all")
+ self.coremask = utils.create_mask(cores)
+
def set_up(self):
"""
Run before each test case.
@@ -69,7 +72,7 @@ class TestUnitTestsPower(TestCase):
Run power autotest.
"""
- self.dut.send_expect("./%s/app/test -n 1 -c ffff" % self.target, "R.*T.*E.*>.*>", 60)
+ self.dut.send_expect("./%s/app/test -n 1 -c %s" % (self.target, self.coremask), "R.*T.*E.*>.*>", 60)
out = self.dut.send_expect("power_autotest", "RTE>>", 60)
self.dut.send_expect("quit", "# ")
self.verify("Test OK" in out, "Test failed")
@@ -79,7 +82,7 @@ class TestUnitTestsPower(TestCase):
Run power acpi cpu frequency autotest.
"""
- self.dut.send_expect("./%s/app/test -n 1 -c ffff" % self.target, "R.*T.*E.*>.*>", 60)
+ self.dut.send_expect("./%s/app/test -n 1 -c %s" % (self.target, self.coremask), "R.*T.*E.*>.*>", 60)
out = self.dut.send_expect("power_acpi_cpufreq_autotest", "RTE>>", 60)
self.dut.send_expect("quit", "# ")
self.verify("Test OK" in out, "Test failed")
--
2.17.2
^ permalink raw reply [flat|nested] 13+ messages in thread* [dts] [PATCH V1 09/12] tests/unit_tests_qos:change hard coding for core numbers
2018-10-24 2:24 [dts] [PATCH V1 01/12] tests/unit_tests_cmdline:change hard coding for core numbers yaobing
` (6 preceding siblings ...)
2018-10-24 2:24 ` [dts] [PATCH V1 08/12] tests/unit_tests_power:change " yaobing
@ 2018-10-24 2:24 ` yaobing
2018-10-24 2:24 ` [dts] [PATCH V1 10/12] tests/unit_tests_ring:change " yaobing
` (3 subsequent siblings)
11 siblings, 0 replies; 13+ messages in thread
From: yaobing @ 2018-10-24 2:24 UTC (permalink / raw)
To: dts; +Cc: yaobing
Cores number is different on different platform,virtual machine maybe has not assigned cores more than 5 cores,change hard coding for core numbers in test app startup options
Signed-off-by: yaobing <bingx.y.yao@intel.com>
---
tests/TestSuite_unit_tests_qos.py | 12 ++++++++----
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/tests/TestSuite_unit_tests_qos.py b/tests/TestSuite_unit_tests_qos.py
index 2c29db6..8343757 100644
--- a/tests/TestSuite_unit_tests_qos.py
+++ b/tests/TestSuite_unit_tests_qos.py
@@ -37,6 +37,7 @@ Detection, Metering and Scheduling QoS features.
"""
from test_case import TestCase
+import utils
#
#
@@ -58,7 +59,10 @@ class TestUnitTestsQos(TestCase):
Qos Prerequisites
"""
- pass
+ cores = self.dut.get_core_list("all")
+ self.coremask = utils.create_mask(cores)
+
+
def set_up(self):
"""
Run before each test case.
@@ -70,7 +74,7 @@ class TestUnitTestsQos(TestCase):
Run RED autotest.
"""
- self.dut.send_expect("./%s/app/test -n 1 -c f" % self.target, "R.*T.*E.*>.*>", 30)
+ self.dut.send_expect("./%s/app/test -n 1 -c %s" % (self.target, self.coremask), "R.*T.*E.*>.*>", 30)
out = self.dut.send_expect("red_autotest", "RTE>>", 180)
self.dut.send_expect("quit", "# ")
self.verify("Test OK" in out, "Test failed")
@@ -80,7 +84,7 @@ class TestUnitTestsQos(TestCase):
Run meter autotest.
"""
- self.dut.send_expect("./%s/app/test -n 1 -c f" % self.target, "R.*T.*E.*>.*>", 30)
+ self.dut.send_expect("./%s/app/test -n 1 -c %s" % (self.target, self.coremask), "R.*T.*E.*>.*>", 30)
out = self.dut.send_expect("meter_autotest", "RTE>>", 5)
self.dut.send_expect("quit", "# ")
self.verify("Test OK" in out, "Test failed")
@@ -93,7 +97,7 @@ class TestUnitTestsQos(TestCase):
[arch, machine, env, toolchain] = self.target.split('-')
self.verify(arch in ["x86_64" ,"arm64"], "Sched auto_test only support in x86_64 or arm64")
- self.dut.send_expect("./%s/app/test -n 1 -c f" % self.target, "R.*T.*E.*>.*>", 30)
+ self.dut.send_expect("./%s/app/test -n 1 -c %s" % (self.target, self.coremask), "R.*T.*E.*>.*>", 30)
out = self.dut.send_expect("sched_autotest", "RTE>>", 5)
self.dut.send_expect("quit", "# ")
self.verify("Test OK" in out, "Test failed")
--
2.17.2
^ permalink raw reply [flat|nested] 13+ messages in thread* [dts] [PATCH V1 10/12] tests/unit_tests_ring:change hard coding for core numbers
2018-10-24 2:24 [dts] [PATCH V1 01/12] tests/unit_tests_cmdline:change hard coding for core numbers yaobing
` (7 preceding siblings ...)
2018-10-24 2:24 ` [dts] [PATCH V1 09/12] tests/unit_tests_qos:change " yaobing
@ 2018-10-24 2:24 ` yaobing
2018-10-24 2:24 ` [dts] [PATCH V1 11/12] tests/unit_tests_ringpmd:change " yaobing
` (2 subsequent siblings)
11 siblings, 0 replies; 13+ messages in thread
From: yaobing @ 2018-10-24 2:24 UTC (permalink / raw)
To: dts; +Cc: yaobing
Cores number is different on different platform,virtual machine maybe has not assigned cores more than 5 cores,change hard coding for core numbers in test app startup options
Signed-off-by: yaobing <bingx.y.yao@intel.com>
---
tests/TestSuite_unit_tests_ring.py | 9 ++++++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/tests/TestSuite_unit_tests_ring.py b/tests/TestSuite_unit_tests_ring.py
index 701ac53..a60adb2 100644
--- a/tests/TestSuite_unit_tests_ring.py
+++ b/tests/TestSuite_unit_tests_ring.py
@@ -37,6 +37,7 @@ Run all Ring autotests
from test_case import TestCase
+import utils
#
#
@@ -56,7 +57,9 @@ class TestUnitTestsRing(TestCase):
"""
Run at the start of each test suite.
"""
- pass
+ cores = self.dut.get_core_list("all")
+ self.coremask = utils.create_mask(cores)
+
def set_up(self):
"""
Run before each test case.
@@ -68,7 +71,7 @@ class TestUnitTestsRing(TestCase):
Run ring autotest.
"""
- self.dut.send_expect("./%s/app/test -n 1 -c f" % self.target, "R.*T.*E.*>.*>", 60)
+ self.dut.send_expect("./%s/app/test -n 1 -c %s" % (self.target, self.coremask), "R.*T.*E.*>.*>", 60)
out = self.dut.send_expect("ring_autotest", "RTE>>", 36000)
self.verify("Test OK" in out, "Test failed")
@@ -77,7 +80,7 @@ class TestUnitTestsRing(TestCase):
Run ring performance autotest.
"""
- self.dut.send_expect("./%s/app/test -n 1 -c e" % self.target, "R.*T.*E.*>.*>", 60)
+ self.dut.send_expect("./%s/app/test -n 1 -c %s" % (self.target ,self.coremask), "R.*T.*E.*>.*>", 60)
out = self.dut.send_expect("ring_perf_autotest", "RTE>>", 210)
self.dut.send_expect("quit", "# ")
self.verify("Test OK" in out, "Test failed")
--
2.17.2
^ permalink raw reply [flat|nested] 13+ messages in thread* [dts] [PATCH V1 11/12] tests/unit_tests_ringpmd:change hard coding for core numbers
2018-10-24 2:24 [dts] [PATCH V1 01/12] tests/unit_tests_cmdline:change hard coding for core numbers yaobing
` (8 preceding siblings ...)
2018-10-24 2:24 ` [dts] [PATCH V1 10/12] tests/unit_tests_ring:change " yaobing
@ 2018-10-24 2:24 ` yaobing
2018-10-24 2:24 ` [dts] [PATCH V1 12/12] tests/unit_tests_timer:change " yaobing
2018-10-24 8:19 ` [dts] [PATCH V1 01/12] tests/unit_tests_cmdline:change " Tu, Lijuan
11 siblings, 0 replies; 13+ messages in thread
From: yaobing @ 2018-10-24 2:24 UTC (permalink / raw)
To: dts; +Cc: yaobing
Cores number is different on different platform,virtual machine maybe has not assigned cores more than 5 cores,change hard coding for core numbers in test app startup options
Signed-off-by: yaobing <bingx.y.yao@intel.com>
---
tests/TestSuite_unit_tests_ringpmd.py | 9 ++++++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/tests/TestSuite_unit_tests_ringpmd.py b/tests/TestSuite_unit_tests_ringpmd.py
index e82bd1d..e7308ba 100644
--- a/tests/TestSuite_unit_tests_ringpmd.py
+++ b/tests/TestSuite_unit_tests_ringpmd.py
@@ -37,6 +37,7 @@ Run Inter-VM share memory autotests
from test_case import TestCase
+import utils
#
#
@@ -57,7 +58,9 @@ class TestUnitTestsRingPmd(TestCase):
Run at the start of each test suite.
Nothing to do here.
"""
- pass
+ cores = self.dut.get_core_list("all")
+ self.coremask = utils.create_mask(cores)
+
def set_up(self):
"""
Run before each test case.
@@ -71,12 +74,12 @@ class TestUnitTestsRingPmd(TestCase):
"""
dev_str = "--vdev=net_ring0 --vdev=net_ring1"
- self.dut.send_expect("./%s/app/test -n 1 -c f" % self.target, "R.*T.*E.*>.*>", 10)
+ self.dut.send_expect("./%s/app/test -n 1 -c %s" % (self.target, self.coremask), "R.*T.*E.*>.*>", 10)
out = self.dut.send_expect("ring_pmd_autotest", "RTE>>", 120)
self.dut.send_expect("quit", "# ")
self.verify("Test OK" in out, "Default no eth_ring devices Test failed")
- self.dut.send_expect("./%s/app/test -n 1 -c f %s" % (self.target, dev_str), "R.*T.*E.*>.*>", 10)
+ self.dut.send_expect("./%s/app/test -n 1 -c %s %s" % (self.target, self.coremask, dev_str), "R.*T.*E.*>.*>", 10)
out = self.dut.send_expect("ring_pmd_autotest", "RTE>>", 120)
self.dut.send_expect("quit", "# ")
self.verify("Test OK" in out, "Two eth_ring devices test failed")
--
2.17.2
^ permalink raw reply [flat|nested] 13+ messages in thread* [dts] [PATCH V1 12/12] tests/unit_tests_timer:change hard coding for core numbers
2018-10-24 2:24 [dts] [PATCH V1 01/12] tests/unit_tests_cmdline:change hard coding for core numbers yaobing
` (9 preceding siblings ...)
2018-10-24 2:24 ` [dts] [PATCH V1 11/12] tests/unit_tests_ringpmd:change " yaobing
@ 2018-10-24 2:24 ` yaobing
2018-10-24 8:19 ` [dts] [PATCH V1 01/12] tests/unit_tests_cmdline:change " Tu, Lijuan
11 siblings, 0 replies; 13+ messages in thread
From: yaobing @ 2018-10-24 2:24 UTC (permalink / raw)
To: dts; +Cc: yaobing
Cores number is different on different platform,virtual machine maybe has not assigned cores more than 5 cores,change hard coding for core numbers in test app startup options
Signed-off-by: yaobing <bingx.y.yao@intel.com>
---
tests/TestSuite_unit_tests_timer.py | 9 ++++++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/tests/TestSuite_unit_tests_timer.py b/tests/TestSuite_unit_tests_timer.py
index e3597b8..717dab8 100644
--- a/tests/TestSuite_unit_tests_timer.py
+++ b/tests/TestSuite_unit_tests_timer.py
@@ -37,6 +37,7 @@ Run all timer autotests
from test_case import TestCase
+import utils
#
#
@@ -56,7 +57,9 @@ class TestUnitTestsTimer(TestCase):
"""
Run at the start of each test suite.
"""
- pass
+ cores = self.dut.get_core_list("all")
+ self.coremask = utils.create_mask(cores)
+
def set_up(self):
"""
Run before each test case.
@@ -67,7 +70,7 @@ class TestUnitTestsTimer(TestCase):
"""
Run timer autotest.
"""
- self.dut.send_expect("./%s/app/test -n 1 -c f" % self.target, "R.*T.*E.*>.*>", 60)
+ self.dut.send_expect("./%s/app/test -n 1 -c %s" % (self.target, self.coremask), "R.*T.*E.*>.*>", 60)
out = self.dut.send_expect("timer_autotest", "RTE>>", 60)
self.dut.send_expect("quit", "# ")
self.verify("Test OK" in out, "Test failed")
@@ -76,7 +79,7 @@ class TestUnitTestsTimer(TestCase):
"""
Run timer autotest.
"""
- self.dut.send_expect("./%s/app/test -n 1 -c f" % self.target, "R.*T.*E.*>.*>", 60)
+ self.dut.send_expect("./%s/app/test -n 1 -c %s" % (self.target, self.coremask), "R.*T.*E.*>.*>", 60)
out = self.dut.send_expect("timer_perf_autotest", "RTE>>", 60)
self.dut.send_expect("quit", "# ")
self.verify("Test OK" in out, "Test failed")
--
2.17.2
^ permalink raw reply [flat|nested] 13+ messages in thread* Re: [dts] [PATCH V1 01/12] tests/unit_tests_cmdline:change hard coding for core numbers
2018-10-24 2:24 [dts] [PATCH V1 01/12] tests/unit_tests_cmdline:change hard coding for core numbers yaobing
` (10 preceding siblings ...)
2018-10-24 2:24 ` [dts] [PATCH V1 12/12] tests/unit_tests_timer:change " yaobing
@ 2018-10-24 8:19 ` Tu, Lijuan
11 siblings, 0 replies; 13+ messages in thread
From: Tu, Lijuan @ 2018-10-24 8:19 UTC (permalink / raw)
To: Yao, BingX Y, dts; +Cc: Yao, BingX Y
Applied, thanks
> -----Original Message-----
> From: dts [mailto:dts-bounces@dpdk.org] On Behalf Of yaobing
> Sent: Wednesday, October 24, 2018 10:25 AM
> To: dts@dpdk.org
> Cc: Yao, BingX Y <bingx.y.yao@intel.com>
> Subject: [dts] [PATCH V1 01/12] tests/unit_tests_cmdline:change hard
> coding for core numbers
>
> Cores number is different on different platform,virtual machine maybe has
> not assigned cores more than 5 cores,change hard coding for core numbers
> in test app startup options
>
> Signed-off-by: yaobing <bingx.y.yao@intel.com>
> ---
> tests/TestSuite_unit_tests_cmdline.py | 7 +++++--
> 1 file changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/tests/TestSuite_unit_tests_cmdline.py
> b/tests/TestSuite_unit_tests_cmdline.py
> index 57111e4..1ea228c 100644
> --- a/tests/TestSuite_unit_tests_cmdline.py
> +++ b/tests/TestSuite_unit_tests_cmdline.py
> @@ -37,6 +37,7 @@ Cmdline autotest
> """
>
> from test_case import TestCase
> +import utils
>
> #
> #
> @@ -57,7 +58,9 @@ class TestUnitTestsCmdline(TestCase):
> Run at the start of each test suite.
> """
> # icc compilation cost long long time.
> - pass
> + cores = self.dut.get_core_list("all")
> + self.coremask = utils.create_mask(cores)
> +
> def set_up(self):
> """
> Run before each test case.
> @@ -69,7 +72,7 @@ class TestUnitTestsCmdline(TestCase):
> Run cmdline autotests in RTE comand line.
> """
>
> - self.dut.send_expect("./%s/app/test -n 1 -c f" % self.target,
> "R.*T.*E.*>.*>", 60)
> + self.dut.send_expect("./%s/app/test -n 1 -c %s" % (self.target,
> + self.coremask), "R.*T.*E.*>.*>", 60)
> out = self.dut.send_expect("cmdline_autotest", "RTE>>", 60)
> self.dut.send_expect("quit", "# ")
> self.verify("Test OK" in out, "Test failed")
> --
> 2.17.2
^ permalink raw reply [flat|nested] 13+ messages in thread