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* [dts][PATCH V1 1/2] tests/l3fwdacl: modify code to apapt avx512
@ 2021-11-15  9:58 Xiang An
  2021-11-15  9:58 ` [dts][PATCH V1 2/2] tests/unit_tests_eal: modify code to adapt avx512 Xiang An
  0 siblings, 1 reply; 3+ messages in thread
From: Xiang An @ 2021-11-15  9:58 UTC (permalink / raw)
  To: dts; +Cc: xiangx.an

Whatever the rx_mode is, all use "force-max-simd-bitwidth=0" as default parameter.

Signed-off-by: Xiang An <xiangx.an@intel.com>
---
 tests/TestSuite_l3fwdacl.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tests/TestSuite_l3fwdacl.py b/tests/TestSuite_l3fwdacl.py
index 65c46b0c..4baae51e 100644
--- a/tests/TestSuite_l3fwdacl.py
+++ b/tests/TestSuite_l3fwdacl.py
@@ -638,7 +638,7 @@ class TestL3fwdacl(TestCase):
         cores = self.get_core_list()
         self.verify(cores is not None, "Insufficient cores for speed testing")
 
-        self.eal_para = self.dut.create_eal_parameters(cores=self.get_core_list())
+        self.eal_para = self.dut.create_eal_parameters(cores=self.get_core_list(), other_eal_param='force-max-simd-bitwidth')
         self.core_mask = utils.create_mask(cores)
         print("Core mask: %s" % self.core_mask)
 
-- 
2.17.1


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2021-11-15  9:58 [dts][PATCH V1 1/2] tests/l3fwdacl: modify code to apapt avx512 Xiang An
2021-11-15  9:58 ` [dts][PATCH V1 2/2] tests/unit_tests_eal: modify code to adapt avx512 Xiang An
2021-11-22 15:23   ` Tu, Lijuan

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