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* [dts]  [PATCH v1] test_plans/vdev_primary_secondary_test_plan.rst
@ 2020-08-20 16:17 Yinan Wang
  2020-08-27  2:01 ` Tu, Lijuan
  0 siblings, 1 reply; 2+ messages in thread
From: Yinan Wang @ 2020-08-20 16:17 UTC (permalink / raw)
  To: dts; +Cc: Yinan Wang

Add prerequisites l3fwd-power code change before test

Signed-off-by: Yinan Wang <yinan.wang@intel.com>
---
 test_plans/vdev_primary_secondary_test_plan.rst | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/test_plans/vdev_primary_secondary_test_plan.rst b/test_plans/vdev_primary_secondary_test_plan.rst
index 8cb1405..33d240e 100644
--- a/test_plans/vdev_primary_secondary_test_plan.rst
+++ b/test_plans/vdev_primary_secondary_test_plan.rst
@@ -53,6 +53,22 @@ Prerequisites
 Assuming that DPDK build has been set up and the multi-process sample
 applications have been built. It is also assumed that a traffic generator has
 been configured and plugged in to the NIC ports 0 and 1.
+Also need modify l3fwd-power example code and recompile::
+
+        --- a/examples/l3fwd-power/main.c
+        +++ b/examples/l3fwd-power/main.c
+        @@ -245,10 +245,9 @@ uint16_t nb_lcore_params = RTE_DIM(lcore_params_array_default);
+
+         static struct rte_eth_conf port_conf = {
+                .rxmode = {
+        -               .mq_mode        = ETH_MQ_RX_RSS,
+        +               .mq_mode        = ETH_MQ_RX_NONE,
+                        .max_rx_pkt_len = RTE_ETHER_MAX_LEN,
+                        .split_hdr_size = 0,
+        -               .offloads = DEV_RX_OFFLOAD_CHECKSUM,
+                },
+                .rx_adv_conf = {
+                        .rss_conf = {
 
 Test Methodology
 ----------------
-- 
2.17.1


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2020-08-20 16:17 [dts] [PATCH v1] test_plans/vdev_primary_secondary_test_plan.rst Yinan Wang
2020-08-27  2:01 ` Tu, Lijuan

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