From: Yingya Han <yingyax.han@intel.com>
To: dts@dpdk.org
Cc: Yingya Han <yingyax.han@intel.com>
Subject: [dts][PATCH V1]tests/perf_test_base: add the correct corelist
Date: Fri, 20 May 2022 09:52:15 +0800 [thread overview]
Message-ID: <20220520015215.3385269-1-yingyax.han@intel.com> (raw)
Signed-off-by: Yingya Han <yingyax.han@intel.com>
---
tests/perf_test_base.py | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tests/perf_test_base.py b/tests/perf_test_base.py
index d60572e0..74a2a37e 100644
--- a/tests/perf_test_base.py
+++ b/tests/perf_test_base.py
@@ -1366,7 +1366,7 @@ class PerfTestBase(object):
configs.append(
[
test_item,
- _corelist,
+ corelist,
",".join(
[
"({0},{1},{2})".format(port, queue, core)
--
2.25.1
next reply other threads:[~2022-05-20 1:52 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-20 1:52 Yingya Han [this message]
2022-05-25 10:27 ` Jiang, YuX
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