* [PATCH 1/3] dep: removed pipeline test suite tarball dependency
2022-11-16 16:59 [PATCH 0/3] pipeline test suite dependency updated Yogesh Jangra
@ 2022-11-16 16:59 ` Yogesh Jangra
2022-11-16 16:59 ` [PATCH 2/3] tests/pipeline: updated pipeline test suite Yogesh Jangra
2022-11-16 16:59 ` [PATCH 3/3] test_plan/pipeline: updated test suite documentation Yogesh Jangra
2 siblings, 0 replies; 4+ messages in thread
From: Yogesh Jangra @ 2022-11-16 16:59 UTC (permalink / raw)
To: dts
Cc: cristian.dumitrescu, kamalakannan.r, harshad.suresh.narayane,
Suresh, Narayane, R
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Updated the PIPELINE test suite to use dependencies from pipeline
folder. The pipeline folder is placed inside the dep folder. Now we
will not be using the tarball pipeline.tar.gz file for the dependencies.
Signed-off-by: Yogesh Jangra <yogesh.jangra@intel.com>
Signed-off-by: Suresh Narayane, Harshad <harshad.suresh.narayane@intel.com>
Signed-off-by: R, Kamalakannan <kamalakannan.r@intel.com>
---
dep/pipeline.tar.gz | Bin 114132 -> 0 bytes
dep/pipeline/add_001/add_001.cli | 19 +
dep/pipeline/add_001/add_001.spec | 33 ++
dep/pipeline/add_001/ethdev.io | 27 ++
dep/pipeline/add_001/pcap_files/in_1.txt | 12 +
dep/pipeline/add_001/pcap_files/out_1.txt | 12 +
dep/pipeline/add_001/readme.md | 11 +
dep/pipeline/add_002/add_002.cli | 20 +
dep/pipeline/add_002/add_002.spec | 51 +++
dep/pipeline/add_002/ethdev.io | 27 ++
dep/pipeline/add_002/pcap_files/in_1.txt | 12 +
dep/pipeline/add_002/pcap_files/out_1.txt | 12 +
dep/pipeline/add_002/readme.md | 10 +
dep/pipeline/add_003/add_003.cli | 20 +
dep/pipeline/add_003/add_003.spec | 20 +
dep/pipeline/add_003/ethdev.io | 27 ++
dep/pipeline/add_003/pcap_files/in_1.txt | 12 +
dep/pipeline/add_003/pcap_files/out_1.txt | 12 +
dep/pipeline/add_003/readme.md | 11 +
dep/pipeline/add_004/add_004.cli | 20 +
dep/pipeline/add_004/add_004.spec | 60 +++
dep/pipeline/add_004/ethdev.io | 27 ++
dep/pipeline/add_004/pcap_files/in_1.txt | 12 +
dep/pipeline/add_004/pcap_files/out_1.txt | 12 +
dep/pipeline/add_004/readme.md | 11 +
dep/pipeline/add_005/add_005.cli | 20 +
dep/pipeline/add_005/add_005.spec | 58 +++
dep/pipeline/add_005/ethdev.io | 27 ++
dep/pipeline/add_005/pcap_files/in_1.txt | 12 +
dep/pipeline/add_005/pcap_files/out_1.txt | 12 +
dep/pipeline/add_005/readme.md | 11 +
dep/pipeline/add_006/add_006.cli | 20 +
dep/pipeline/add_006/add_006.spec | 38 ++
dep/pipeline/add_006/ethdev.io | 27 ++
dep/pipeline/add_006/pcap_files/in_1.txt | 12 +
dep/pipeline/add_006/pcap_files/out_1.txt | 12 +
dep/pipeline/add_006/readme.md | 11 +
dep/pipeline/add_007/add_007.cli | 22 +
dep/pipeline/add_007/add_007.spec | 82 ++++
dep/pipeline/add_007/ethdev.io | 27 ++
dep/pipeline/add_007/pcap_files/in_1.txt | 12 +
dep/pipeline/add_007/pcap_files/out_1.txt | 12 +
dep/pipeline/add_007/readme.md | 12 +
dep/pipeline/add_007/table.txt | 1 +
dep/pipeline/add_008/add_008.cli | 22 +
dep/pipeline/add_008/add_008.spec | 69 +++
dep/pipeline/add_008/ethdev.io | 27 ++
dep/pipeline/add_008/pcap_files/in_1.txt | 11 +
dep/pipeline/add_008/pcap_files/out_1.txt | 11 +
dep/pipeline/add_008/readme.md | 11 +
dep/pipeline/add_008/table.txt | 1 +
dep/pipeline/and_001/and_001.cli | 20 +
dep/pipeline/and_001/and_001.spec | 52 +++
dep/pipeline/and_001/ethdev.io | 27 ++
dep/pipeline/and_001/pcap_files/in_1.txt | 12 +
dep/pipeline/and_001/pcap_files/out_1.txt | 12 +
dep/pipeline/and_001/readme.md | 15 +
dep/pipeline/and_002/and_002.cli | 22 +
dep/pipeline/and_002/and_002.spec | 66 +++
dep/pipeline/and_002/ethdev.io | 27 ++
dep/pipeline/and_002/pcap_files/in_1.txt | 12 +
dep/pipeline/and_002/pcap_files/out_1.txt | 12 +
dep/pipeline/and_002/readme.md | 11 +
dep/pipeline/and_002/table.txt | 1 +
dep/pipeline/and_003/and_003.cli | 20 +
dep/pipeline/and_003/and_003.spec | 38 ++
dep/pipeline/and_003/ethdev.io | 27 ++
dep/pipeline/and_003/pcap_files/in_1.txt | 12 +
dep/pipeline/and_003/pcap_files/out_1.txt | 12 +
dep/pipeline/and_003/readme.md | 13 +
dep/pipeline/and_004/and_004.cli | 20 +
dep/pipeline/and_004/and_004.spec | 36 ++
dep/pipeline/and_004/ethdev.io | 27 ++
dep/pipeline/and_004/pcap_files/in_1.txt | 12 +
dep/pipeline/and_004/pcap_files/out_1.txt | 12 +
dep/pipeline/and_004/readme.md | 13 +
dep/pipeline/and_005/and_005.cli | 20 +
dep/pipeline/and_005/and_005.spec | 57 +++
dep/pipeline/and_005/ethdev.io | 27 ++
dep/pipeline/and_005/pcap_files/in_1.txt | 12 +
dep/pipeline/and_005/pcap_files/out_1.txt | 12 +
dep/pipeline/and_005/readme.md | 14 +
dep/pipeline/and_006/and_006.cli | 20 +
dep/pipeline/and_006/and_006.spec | 51 +++
dep/pipeline/and_006/ethdev.io | 27 ++
dep/pipeline/and_006/pcap_files/in_1.txt | 12 +
dep/pipeline/and_006/pcap_files/out_1.txt | 12 +
dep/pipeline/and_006/readme.md | 11 +
dep/pipeline/and_007/and_007.cli | 20 +
dep/pipeline/and_007/and_007.spec | 57 +++
dep/pipeline/and_007/ethdev.io | 27 ++
dep/pipeline/and_007/pcap_files/in_1.txt | 12 +
dep/pipeline/and_007/pcap_files/out_1.txt | 12 +
dep/pipeline/and_007/readme.md | 13 +
dep/pipeline/and_008/and_008.cli | 22 +
dep/pipeline/and_008/and_008.spec | 82 ++++
dep/pipeline/and_008/ethdev.io | 27 ++
dep/pipeline/and_008/pcap_files/in_1.txt | 12 +
dep/pipeline/and_008/pcap_files/out_1.txt | 12 +
dep/pipeline/and_008/readme.md | 16 +
dep/pipeline/and_008/table.txt | 1 +
.../annotation_001/annotation_001.cli | 21 +
.../annotation_001/annotation_001.spec | 76 ++++
.../annotation_001/annotation_001_table.txt | 2 +
dep/pipeline/annotation_001/ethdev.io | 27 ++
.../annotation_001/pcap_files/in_1.txt | 17 +
.../annotation_001/pcap_files/out_1.txt | 12 +
dep/pipeline/annotation_001/readme.md | 11 +
.../annotation_002/annotation_002.cli | 21 +
.../annotation_002/annotation_002.spec | 77 ++++
.../annotation_002/annotation_002_table.txt | 2 +
dep/pipeline/annotation_002/ethdev.io | 27 ++
.../annotation_002/pcap_files/in_1.txt | 17 +
.../annotation_002/pcap_files/out_1.txt | 12 +
dep/pipeline/annotation_002/readme.md | 10 +
.../annotation_003/annotation_003.cli | 4 +
.../annotation_003/annotation_003.spec | 73 ++++
dep/pipeline/annotation_003/readme.md | 9 +
.../annotation_004/annotation_004.cli | 18 +
.../annotation_004/annotation_004.spec | 75 ++++
.../annotation_004/annotation_004_table.txt | 2 +
dep/pipeline/annotation_004/ethdev.io | 27 ++
dep/pipeline/annotation_004/readme.md | 9 +
.../annotation_005/annotation_005.cli | 7 +
.../annotation_005/annotation_005.spec | 73 ++++
dep/pipeline/annotation_005/readme.md | 9 +
dep/pipeline/ckadd_001/ckadd_001.cli | 20 +
dep/pipeline/ckadd_001/ckadd_001.spec | 53 +++
dep/pipeline/ckadd_001/ethdev.io | 27 ++
dep/pipeline/ckadd_001/pcap_files/in_1.txt | 12 +
dep/pipeline/ckadd_001/pcap_files/out_1.txt | 12 +
dep/pipeline/ckadd_001/readme.md | 36 ++
dep/pipeline/ckadd_009/ckadd_009.cli | 20 +
dep/pipeline/ckadd_009/ckadd_009.spec | 50 +++
dep/pipeline/ckadd_009/ethdev.io | 27 ++
dep/pipeline/ckadd_009/pcap_files/in_1.txt | 12 +
dep/pipeline/ckadd_009/pcap_files/out_1.txt | 12 +
dep/pipeline/ckadd_009/readme.md | 26 ++
dep/pipeline/ckadd_010/ckadd_010.cli | 20 +
dep/pipeline/ckadd_010/ckadd_010.spec | 51 +++
dep/pipeline/ckadd_010/ethdev.io | 27 ++
dep/pipeline/ckadd_010/pcap_files/in_1.txt | 12 +
dep/pipeline/ckadd_010/pcap_files/out_1.txt | 12 +
dep/pipeline/ckadd_010/readme.md | 36 ++
dep/pipeline/cksub_001/cksub_001.cli | 20 +
dep/pipeline/cksub_001/cksub_001.spec | 76 ++++
dep/pipeline/cksub_001/ethdev.io | 27 ++
dep/pipeline/cksub_001/pcap_files/in_1.txt | 17 +
dep/pipeline/cksub_001/pcap_files/out_1.txt | 12 +
dep/pipeline/cksub_001/readme.md | 36 ++
.../direct_counter_001/direct_counter_001.cli | 21 +
.../direct_counter_001.spec | 84 ++++
.../direct_counter_001/direct_counter_001.txt | 2 +
dep/pipeline/direct_counter_001/ethdev.io | 22 +
.../direct_counter_001/pcap_files/in_1.txt | 22 +
.../direct_counter_001/pcap_files/out_1.txt | 17 +
dep/pipeline/direct_counter_001/readme.md | 22 +
.../direct_counter_002/direct_counter_002.cli | 21 +
.../direct_counter_002.spec | 89 ++++
.../direct_counter_002/direct_counter_002.txt | 2 +
dep/pipeline/direct_counter_002/ethdev.io | 22 +
.../direct_counter_002/pcap_files/in_1.txt | 22 +
.../direct_counter_002/pcap_files/out_1.txt | 17 +
dep/pipeline/direct_counter_002/readme.md | 23 +
.../direct_counter_003/direct_counter_003.cli | 21 +
.../direct_counter_003.spec | 86 ++++
.../direct_counter_003/direct_counter_003.txt | 2 +
dep/pipeline/direct_counter_003/ethdev.io | 22 +
.../direct_counter_003/pcap_files/in_1.txt | 22 +
.../direct_counter_003/pcap_files/out_1.txt | 17 +
dep/pipeline/direct_counter_003/readme.md | 23 +
.../direct_counter_004/direct_counter_004.cli | 21 +
.../direct_counter_004.spec | 85 ++++
.../direct_counter_004/direct_counter_004.txt | 16 +
dep/pipeline/direct_counter_004/ethdev.io | 22 +
.../direct_counter_004/pcap_files/in_1.txt | 27 ++
.../direct_counter_004/pcap_files/in_2.txt | 27 ++
.../direct_counter_004/pcap_files/in_3.txt | 27 ++
.../direct_counter_004/pcap_files/in_4.txt | 27 ++
.../direct_counter_004/pcap_files/out_1.txt | 27 ++
.../direct_counter_004/pcap_files/out_2.txt | 27 ++
.../direct_counter_004/pcap_files/out_3.txt | 27 ++
.../direct_counter_004/pcap_files/out_4.txt | 27 ++
dep/pipeline/direct_counter_004/readme.md | 24 ++
.../direct_counter_005/direct_counter_005.cli | 20 +
.../direct_counter_005.spec | 100 +++++
dep/pipeline/direct_counter_005/ethdev.io | 22 +
.../direct_counter_005/pcap_files/in_1.txt | 12 +
.../direct_counter_005/pcap_files/out_1.txt | 6 +
.../direct_counter_005/pcap_files/out_2.txt | 12 +
dep/pipeline/direct_counter_005/readme.md | 24 ++
.../direct_meter_001/direct_meter_001.cli | 23 +
.../direct_meter_001/direct_meter_001.spec | 89 ++++
.../direct_meter_001/direct_meter_001.txt | 1 +
dep/pipeline/direct_meter_001/ethdev.io | 22 +
.../direct_meter_001/pcap_files/in_1.txt | 49 +++
dep/pipeline/direct_meter_001/readme.md | 23 +
.../direct_meter_002/direct_meter_002.cli | 23 +
.../direct_meter_002/direct_meter_002.spec | 94 ++++
.../direct_meter_002/direct_meter_002.txt | 1 +
dep/pipeline/direct_meter_002/ethdev.io | 22 +
.../direct_meter_002/pcap_files/in_1.txt | 47 ++
dep/pipeline/direct_meter_002/readme.md | 24 ++
.../direct_meter_003/direct_meter_003.cli | 22 +
.../direct_meter_003/direct_meter_003.spec | 105 +++++
dep/pipeline/direct_meter_003/ethdev.io | 22 +
.../direct_meter_003/pcap_files/in_1.txt | 32 ++
dep/pipeline/direct_meter_003/readme.md | 23 +
dep/pipeline/direction_001/direction_001.cli | 42 ++
dep/pipeline/direction_001/direction_001.spec | 81 ++++
dep/pipeline/direction_001/ethdev.io | 27 ++
.../direction_001/pcap_files/in_1.txt | 17 +
.../direction_001/pcap_files/out_1.txt | 17 +
.../direction_001/pcap_files/out_2.txt | 17 +
dep/pipeline/direction_001/readme.md | 12 +
dep/pipeline/dma_001/dma_001.cli | 22 +
dep/pipeline/dma_001/dma_001.spec | 71 +++
dep/pipeline/dma_001/ethdev.io | 27 ++
dep/pipeline/dma_001/pcap_files/in_1.txt | 12 +
dep/pipeline/dma_001/pcap_files/out_1.txt | 12 +
dep/pipeline/dma_001/readme.md | 15 +
dep/pipeline/dma_001/table.txt | 1 +
dep/pipeline/dma_002/dma_002.cli | 22 +
dep/pipeline/dma_002/dma_002.spec | 110 +++++
dep/pipeline/dma_002/ethdev.io | 27 ++
dep/pipeline/dma_002/pcap_files/in_1.txt | 12 +
dep/pipeline/dma_002/pcap_files/out_1.txt | 12 +
dep/pipeline/dma_002/readme.md | 15 +
dep/pipeline/dma_002/table.txt | 1 +
dep/pipeline/dma_003/dma_003.cli | 22 +
dep/pipeline/dma_003/dma_003.spec | 142 ++++++
dep/pipeline/dma_003/ethdev.io | 27 ++
dep/pipeline/dma_003/pcap_files/in_1.txt | 12 +
dep/pipeline/dma_003/pcap_files/out_1.txt | 12 +
dep/pipeline/dma_003/readme.md | 15 +
dep/pipeline/dma_003/table.txt | 1 +
dep/pipeline/dma_004/dma_004.cli | 22 +
dep/pipeline/dma_004/dma_004.spec | 156 +++++++
dep/pipeline/dma_004/ethdev.io | 27 ++
dep/pipeline/dma_004/pcap_files/in_1.txt | 12 +
dep/pipeline/dma_004/pcap_files/out_1.txt | 12 +
dep/pipeline/dma_004/readme.md | 15 +
dep/pipeline/dma_004/table.txt | 1 +
dep/pipeline/dma_005/dma_005.cli | 22 +
dep/pipeline/dma_005/dma_005.spec | 167 +++++++
dep/pipeline/dma_005/ethdev.io | 27 ++
dep/pipeline/dma_005/pcap_files/in_1.txt | 13 +
dep/pipeline/dma_005/pcap_files/out_1.txt | 13 +
dep/pipeline/dma_005/readme.md | 15 +
dep/pipeline/dma_005/table.txt | 1 +
dep/pipeline/dma_006/dma_006.cli | 22 +
dep/pipeline/dma_006/dma_006.spec | 186 ++++++++
dep/pipeline/dma_006/ethdev.io | 27 ++
dep/pipeline/dma_006/pcap_files/in_1.txt | 15 +
dep/pipeline/dma_006/pcap_files/out_1.txt | 15 +
dep/pipeline/dma_006/readme.md | 16 +
dep/pipeline/dma_006/table.txt | 1 +
dep/pipeline/dma_007/dma_007.cli | 22 +
dep/pipeline/dma_007/dma_007.spec | 218 ++++++++++
dep/pipeline/dma_007/ethdev.io | 27 ++
dep/pipeline/dma_007/pcap_files/in_1.txt | 15 +
dep/pipeline/dma_007/pcap_files/out_1.txt | 15 +
dep/pipeline/dma_007/readme.md | 17 +
dep/pipeline/dma_007/table.txt | 1 +
dep/pipeline/dma_008/dma_008.cli | 22 +
dep/pipeline/dma_008/dma_008.spec | 238 ++++++++++
dep/pipeline/dma_008/ethdev.io | 27 ++
dep/pipeline/dma_008/pcap_files/in_1.txt | 16 +
dep/pipeline/dma_008/pcap_files/out_1.txt | 16 +
dep/pipeline/dma_008/readme.md | 17 +
dep/pipeline/dma_008/table.txt | 1 +
| 27 ++
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dep/pipeline/hash_001/ethdev.io | 27 ++
dep/pipeline/hash_001/hash_001.cli | 20 +
dep/pipeline/hash_001/hash_001.spec | 79 ++++
dep/pipeline/hash_001/pcap_files/in_1.txt | 23 +
dep/pipeline/hash_001/pcap_files/out_1.txt | 11 +
dep/pipeline/hash_001/pcap_files/out_2.txt | 11 +
dep/pipeline/hash_001/pcap_files/out_3.txt | 11 +
dep/pipeline/hash_001/pcap_files/out_4.txt | 11 +
dep/pipeline/hash_001/readme.md | 12 +
dep/pipeline/hash_002/ethdev.io | 27 ++
dep/pipeline/hash_002/hash_002.cli | 20 +
dep/pipeline/hash_002/hash_002.spec | 79 ++++
dep/pipeline/hash_002/pcap_files/in_1.txt | 23 +
dep/pipeline/hash_002/pcap_files/out_1.txt | 11 +
dep/pipeline/hash_002/pcap_files/out_2.txt | 11 +
dep/pipeline/hash_002/pcap_files/out_3.txt | 11 +
dep/pipeline/hash_002/pcap_files/out_4.txt | 11 +
dep/pipeline/hash_002/readme.md | 11 +
dep/pipeline/hash_003/ethdev.io | 27 ++
dep/pipeline/hash_003/hash_003.cli | 20 +
dep/pipeline/hash_003/hash_003.spec | 73 ++++
dep/pipeline/hash_003/pcap_files/in_1.txt | 11 +
dep/pipeline/hash_003/pcap_files/out_1.txt | 11 +
dep/pipeline/hash_003/readme.md | 11 +
dep/pipeline/invalidate_001/ethdev.io | 27 ++
.../invalidate_001/invalidate_001.cli | 20 +
.../invalidate_001/invalidate_001.spec | 58 +++
.../invalidate_001/pcap_files/in_1.txt | 17 +
.../invalidate_001/pcap_files/out_1.txt | 12 +
dep/pipeline/invalidate_001/readme.md | 11 +
dep/pipeline/jump_001/ethdev.io | 27 ++
dep/pipeline/jump_001/jump_001.cli | 19 +
dep/pipeline/jump_001/jump_001.spec | 33 ++
dep/pipeline/jump_001/pcap_files/in_1.txt | 12 +
dep/pipeline/jump_001/pcap_files/out_1.txt | 12 +
dep/pipeline/jump_001/readme.md | 10 +
dep/pipeline/jump_002/ethdev.io | 27 ++
dep/pipeline/jump_002/jump_002.cli | 20 +
dep/pipeline/jump_002/jump_002.spec | 60 +++
dep/pipeline/jump_002/pcap_files/in_1.txt | 17 +
dep/pipeline/jump_002/pcap_files/out_1.txt | 12 +
dep/pipeline/jump_002/readme.md | 11 +
dep/pipeline/jump_003/ethdev.io | 27 ++
dep/pipeline/jump_003/jump_003.cli | 21 +
dep/pipeline/jump_003/jump_003.spec | 82 ++++
dep/pipeline/jump_003/pcap_files/in_1.txt | 17 +
dep/pipeline/jump_003/pcap_files/out_1.txt | 12 +
dep/pipeline/jump_003/readme.md | 13 +
dep/pipeline/jump_003/table.txt | 1 +
dep/pipeline/jump_004/ethdev.io | 27 ++
dep/pipeline/jump_004/jump_004.cli | 22 +
dep/pipeline/jump_004/jump_004.spec | 59 +++
dep/pipeline/jump_004/pcap_files/in_1.txt | 17 +
dep/pipeline/jump_004/pcap_files/out_1.txt | 12 +
dep/pipeline/jump_004/readme.md | 13 +
dep/pipeline/jump_004/table.txt | 1 +
dep/pipeline/jump_005/ethdev.io | 27 ++
dep/pipeline/jump_005/jump_005.cli | 22 +
dep/pipeline/jump_005/jump_005.spec | 58 +++
dep/pipeline/jump_005/pcap_files/in_1.txt | 17 +
dep/pipeline/jump_005/pcap_files/out_1.txt | 12 +
dep/pipeline/jump_005/readme.md | 13 +
dep/pipeline/jump_005/table.txt | 1 +
dep/pipeline/jump_006/ethdev.io | 27 ++
dep/pipeline/jump_006/jump_006.cli | 22 +
dep/pipeline/jump_006/jump_006.spec | 69 +++
dep/pipeline/jump_006/pcap_files/in_1.txt | 17 +
dep/pipeline/jump_006/pcap_files/out_1.txt | 12 +
dep/pipeline/jump_006/readme.md | 14 +
dep/pipeline/jump_006/table.txt | 2 +
dep/pipeline/jump_007/ethdev.io | 27 ++
dep/pipeline/jump_007/jump_007.cli | 22 +
dep/pipeline/jump_007/jump_007.spec | 69 +++
dep/pipeline/jump_007/pcap_files/in_1.txt | 17 +
dep/pipeline/jump_007/pcap_files/out_1.txt | 12 +
dep/pipeline/jump_007/readme.md | 14 +
dep/pipeline/jump_007/table.txt | 2 +
dep/pipeline/jump_008/ethdev.io | 27 ++
dep/pipeline/jump_008/jump_008.cli | 20 +
dep/pipeline/jump_008/jump_008.spec | 91 ++++
dep/pipeline/jump_008/pcap_files/in_1.txt | 17 +
dep/pipeline/jump_008/pcap_files/out_1.txt | 12 +
dep/pipeline/jump_008/readme.md | 12 +
dep/pipeline/jump_009/ethdev.io | 27 ++
dep/pipeline/jump_009/jump_009.cli | 20 +
dep/pipeline/jump_009/jump_009.spec | 81 ++++
dep/pipeline/jump_009/pcap_files/in_1.txt | 17 +
dep/pipeline/jump_009/pcap_files/out_1.txt | 12 +
dep/pipeline/jump_009/readme.md | 14 +
dep/pipeline/jump_010/ethdev.io | 27 ++
dep/pipeline/jump_010/jump_010.cli | 20 +
dep/pipeline/jump_010/jump_010.spec | 81 ++++
dep/pipeline/jump_010/pcap_files/in_1.txt | 17 +
dep/pipeline/jump_010/pcap_files/out_1.txt | 12 +
dep/pipeline/jump_010/readme.md | 14 +
dep/pipeline/jump_011/ethdev.io | 27 ++
dep/pipeline/jump_011/jump_011.cli | 20 +
dep/pipeline/jump_011/jump_011.spec | 75 ++++
dep/pipeline/jump_011/pcap_files/in_1.txt | 17 +
dep/pipeline/jump_011/pcap_files/out_1.txt | 12 +
dep/pipeline/jump_011/readme.md | 15 +
dep/pipeline/jump_012/ethdev.io | 27 ++
dep/pipeline/jump_012/jump_012.cli | 20 +
dep/pipeline/jump_012/jump_012.spec | 76 ++++
dep/pipeline/jump_012/pcap_files/in_1.txt | 17 +
dep/pipeline/jump_012/pcap_files/out_1.txt | 12 +
dep/pipeline/jump_012/readme.md | 13 +
dep/pipeline/jump_013/ethdev.io | 27 ++
dep/pipeline/jump_013/jump_013.cli | 20 +
dep/pipeline/jump_013/jump_013.spec | 73 ++++
dep/pipeline/jump_013/pcap_files/in_1.txt | 17 +
dep/pipeline/jump_013/pcap_files/out_1.txt | 12 +
dep/pipeline/jump_013/readme.md | 13 +
dep/pipeline/jump_014/ethdev.io | 27 ++
dep/pipeline/jump_014/jump_014.cli | 20 +
dep/pipeline/jump_014/jump_014.spec | 91 ++++
dep/pipeline/jump_014/pcap_files/in_1.txt | 17 +
dep/pipeline/jump_014/pcap_files/out_1.txt | 12 +
dep/pipeline/jump_014/readme.md | 12 +
dep/pipeline/jump_015/ethdev.io | 27 ++
dep/pipeline/jump_015/jump_015.cli | 20 +
dep/pipeline/jump_015/jump_015.spec | 97 +++++
dep/pipeline/jump_015/pcap_files/in_1.txt | 17 +
dep/pipeline/jump_015/pcap_files/out_1.txt | 12 +
dep/pipeline/jump_015/readme.md | 11 +
dep/pipeline/jump_016/ethdev.io | 27 ++
dep/pipeline/jump_016/jump_016.cli | 20 +
dep/pipeline/jump_016/jump_016.spec | 93 ++++
dep/pipeline/jump_016/pcap_files/in_1.txt | 17 +
dep/pipeline/jump_016/pcap_files/out_1.txt | 12 +
dep/pipeline/jump_016/readme.md | 10 +
dep/pipeline/jump_017/ethdev.io | 27 ++
dep/pipeline/jump_017/jump_017.cli | 20 +
dep/pipeline/jump_017/jump_017.spec | 75 ++++
dep/pipeline/jump_017/pcap_files/in_1.txt | 17 +
dep/pipeline/jump_017/pcap_files/out_1.txt | 12 +
dep/pipeline/jump_017/readme.md | 10 +
dep/pipeline/jump_018/ethdev.io | 27 ++
dep/pipeline/jump_018/jump_018.cli | 20 +
dep/pipeline/jump_018/jump_018.spec | 76 ++++
dep/pipeline/jump_018/pcap_files/in_1.txt | 17 +
dep/pipeline/jump_018/pcap_files/out_1.txt | 12 +
dep/pipeline/jump_018/readme.md | 13 +
dep/pipeline/jump_019/ethdev.io | 27 ++
dep/pipeline/jump_019/jump_019.cli | 20 +
dep/pipeline/jump_019/jump_019.spec | 73 ++++
dep/pipeline/jump_019/pcap_files/in_1.txt | 17 +
dep/pipeline/jump_019/pcap_files/out_1.txt | 12 +
dep/pipeline/jump_019/readme.md | 13 +
dep/pipeline/jump_020/ethdev.io | 27 ++
dep/pipeline/jump_020/jump_020.cli | 20 +
dep/pipeline/jump_020/jump_020.spec | 77 ++++
dep/pipeline/jump_020/pcap_files/in_1.txt | 17 +
dep/pipeline/jump_020/pcap_files/out_1.txt | 12 +
dep/pipeline/jump_020/readme.md | 14 +
dep/pipeline/jump_021/ethdev.io | 27 ++
dep/pipeline/jump_021/jump_021.cli | 20 +
dep/pipeline/jump_021/jump_021.spec | 81 ++++
dep/pipeline/jump_021/pcap_files/in_1.txt | 17 +
dep/pipeline/jump_021/pcap_files/out_1.txt | 12 +
dep/pipeline/jump_021/readme.md | 14 +
dep/pipeline/jump_022/ethdev.io | 27 ++
dep/pipeline/jump_022/jump_022.cli | 20 +
dep/pipeline/jump_022/jump_022.spec | 81 ++++
dep/pipeline/jump_022/pcap_files/in_1.txt | 17 +
dep/pipeline/jump_022/pcap_files/out_1.txt | 12 +
dep/pipeline/jump_022/readme.md | 14 +
dep/pipeline/jump_023/ethdev.io | 27 ++
dep/pipeline/jump_023/jump_023.cli | 20 +
dep/pipeline/jump_023/jump_023.spec | 76 ++++
dep/pipeline/jump_023/pcap_files/in_1.txt | 17 +
dep/pipeline/jump_023/pcap_files/out_1.txt | 12 +
dep/pipeline/jump_023/readme.md | 12 +
dep/pipeline/jump_024/ethdev.io | 27 ++
dep/pipeline/jump_024/jump_024.cli | 22 +
dep/pipeline/jump_024/jump_024.spec | 84 ++++
dep/pipeline/jump_024/pcap_files/in_1.txt | 22 +
dep/pipeline/jump_024/pcap_files/out_1.txt | 12 +
dep/pipeline/jump_024/readme.md | 16 +
dep/pipeline/jump_024/table.txt | 1 +
dep/pipeline/jump_025/ethdev.io | 27 ++
dep/pipeline/jump_025/jump_025.cli | 22 +
dep/pipeline/jump_025/jump_025.spec | 84 ++++
dep/pipeline/jump_025/pcap_files/in_1.txt | 17 +
dep/pipeline/jump_025/pcap_files/out_1.txt | 12 +
dep/pipeline/jump_025/readme.md | 13 +
dep/pipeline/jump_025/table.txt | 1 +
dep/pipeline/jump_026/ethdev.io | 27 ++
dep/pipeline/jump_026/jump_026.cli | 22 +
dep/pipeline/jump_026/jump_026.spec | 87 ++++
dep/pipeline/jump_026/pcap_files/in_1.txt | 22 +
dep/pipeline/jump_026/pcap_files/out_1.txt | 12 +
dep/pipeline/jump_026/readme.md | 13 +
dep/pipeline/jump_026/table.txt | 1 +
dep/pipeline/jump_027/ethdev.io | 27 ++
dep/pipeline/jump_027/jump_027.cli | 22 +
dep/pipeline/jump_027/jump_027.spec | 86 ++++
dep/pipeline/jump_027/pcap_files/in_1.txt | 16 +
dep/pipeline/jump_027/pcap_files/out_1.txt | 12 +
dep/pipeline/jump_027/readme.md | 11 +
dep/pipeline/jump_027/table.txt | 1 +
dep/pipeline/jump_028/ethdev.io | 27 ++
dep/pipeline/jump_028/jump_028.cli | 22 +
dep/pipeline/jump_028/jump_028.spec | 100 +++++
dep/pipeline/jump_028/pcap_files/in_1.txt | 17 +
dep/pipeline/jump_028/pcap_files/out_1.txt | 12 +
dep/pipeline/jump_028/readme.md | 11 +
dep/pipeline/jump_028/table.txt | 2 +
dep/pipeline/jump_029/ethdev.io | 27 ++
dep/pipeline/jump_029/jump_029.cli | 20 +
dep/pipeline/jump_029/jump_029.spec | 56 +++
dep/pipeline/jump_029/pcap_files/in_1.txt | 17 +
dep/pipeline/jump_029/pcap_files/out_1.txt | 12 +
dep/pipeline/jump_029/readme.md | 11 +
dep/pipeline/jump_030/ethdev.io | 27 ++
dep/pipeline/jump_030/jump_030.cli | 20 +
dep/pipeline/jump_030/jump_030.spec | 75 ++++
dep/pipeline/jump_030/pcap_files/in_1.txt | 17 +
dep/pipeline/jump_030/pcap_files/out_1.txt | 12 +
dep/pipeline/jump_030/readme.md | 12 +
dep/pipeline/jump_031/ethdev.io | 27 ++
dep/pipeline/jump_031/jump_031.cli | 22 +
dep/pipeline/jump_031/jump_031.spec | 98 +++++
dep/pipeline/jump_031/pcap_files/in_1.txt | 17 +
dep/pipeline/jump_031/pcap_files/out_1.txt | 12 +
dep/pipeline/jump_031/readme.md | 11 +
dep/pipeline/jump_031/table.txt | 2 +
dep/pipeline/jump_032/ethdev.io | 27 ++
dep/pipeline/jump_032/jump_032.cli | 20 +
dep/pipeline/jump_032/jump_032.spec | 75 ++++
dep/pipeline/jump_032/pcap_files/in_1.txt | 17 +
dep/pipeline/jump_032/pcap_files/out_1.txt | 12 +
dep/pipeline/jump_032/readme.md | 14 +
dep/pipeline/jump_033/ethdev.io | 27 ++
dep/pipeline/jump_033/jump_033.cli | 20 +
dep/pipeline/jump_033/jump_033.spec | 81 ++++
dep/pipeline/jump_033/pcap_files/in_1.txt | 17 +
dep/pipeline/jump_033/pcap_files/out_1.txt | 12 +
dep/pipeline/jump_033/readme.md | 14 +
dep/pipeline/jump_034/ethdev.io | 27 ++
dep/pipeline/jump_034/jump_034.cli | 20 +
dep/pipeline/jump_034/jump_034.spec | 81 ++++
dep/pipeline/jump_034/pcap_files/in_1.txt | 22 +
dep/pipeline/jump_034/pcap_files/out_1.txt | 12 +
dep/pipeline/jump_034/readme.md | 14 +
dep/pipeline/jump_035/ethdev.io | 27 ++
dep/pipeline/jump_035/jump_035.cli | 20 +
dep/pipeline/jump_035/jump_035.spec | 76 ++++
dep/pipeline/jump_035/pcap_files/in_1.txt | 17 +
dep/pipeline/jump_035/pcap_files/out_1.txt | 12 +
dep/pipeline/jump_035/readme.md | 12 +
dep/pipeline/jump_036/ethdev.io | 27 ++
dep/pipeline/jump_036/jump_036.cli | 22 +
dep/pipeline/jump_036/jump_036.spec | 85 ++++
dep/pipeline/jump_036/pcap_files/in_1.txt | 22 +
dep/pipeline/jump_036/pcap_files/out_1.txt | 12 +
dep/pipeline/jump_036/readme.md | 16 +
dep/pipeline/jump_036/table.txt | 1 +
dep/pipeline/jump_037/ethdev.io | 27 ++
dep/pipeline/jump_037/jump_037.cli | 22 +
dep/pipeline/jump_037/jump_037.spec | 84 ++++
dep/pipeline/jump_037/pcap_files/in_1.txt | 17 +
dep/pipeline/jump_037/pcap_files/out_1.txt | 12 +
dep/pipeline/jump_037/readme.md | 13 +
dep/pipeline/jump_037/table.txt | 1 +
dep/pipeline/jump_038/ethdev.io | 27 ++
dep/pipeline/jump_038/jump_038.cli | 22 +
dep/pipeline/jump_038/jump_038.spec | 88 ++++
dep/pipeline/jump_038/pcap_files/in_1.txt | 22 +
dep/pipeline/jump_038/pcap_files/out_1.txt | 12 +
dep/pipeline/jump_038/readme.md | 13 +
dep/pipeline/jump_038/table.txt | 1 +
dep/pipeline/jump_039/ethdev.io | 27 ++
dep/pipeline/jump_039/jump_039.cli | 22 +
dep/pipeline/jump_039/jump_039.spec | 86 ++++
dep/pipeline/jump_039/pcap_files/in_1.txt | 16 +
dep/pipeline/jump_039/pcap_files/out_1.txt | 11 +
dep/pipeline/jump_039/readme.md | 11 +
dep/pipeline/jump_039/table.txt | 1 +
dep/pipeline/jump_040/ethdev.io | 27 ++
dep/pipeline/jump_040/jump_040.cli | 22 +
dep/pipeline/jump_040/jump_040.spec | 100 +++++
dep/pipeline/jump_040/pcap_files/in_1.txt | 17 +
dep/pipeline/jump_040/pcap_files/out_1.txt | 12 +
dep/pipeline/jump_040/readme.md | 11 +
dep/pipeline/jump_040/table.txt | 2 +
dep/pipeline/jump_041/ethdev.io | 27 ++
dep/pipeline/jump_041/jump_041.cli | 20 +
dep/pipeline/jump_041/jump_041.spec | 71 +++
dep/pipeline/jump_041/pcap_files/in_1.txt | 17 +
dep/pipeline/jump_041/pcap_files/out_1.txt | 12 +
dep/pipeline/jump_041/readme.md | 12 +
dep/pipeline/jump_042/ethdev.io | 27 ++
dep/pipeline/jump_042/jump_042.cli | 20 +
dep/pipeline/jump_042/jump_042.spec | 75 ++++
dep/pipeline/jump_042/pcap_files/in_1.txt | 17 +
dep/pipeline/jump_042/pcap_files/out_1.txt | 12 +
dep/pipeline/jump_042/readme.md | 12 +
dep/pipeline/jump_043/ethdev.io | 27 ++
dep/pipeline/jump_043/jump_043.cli | 22 +
dep/pipeline/jump_043/jump_043.spec | 98 +++++
dep/pipeline/jump_043/pcap_files/in_1.txt | 17 +
dep/pipeline/jump_043/pcap_files/out_1.txt | 12 +
dep/pipeline/jump_043/readme.md | 11 +
dep/pipeline/jump_043/table.txt | 2 +
dep/pipeline/jump_044/ethdev.io | 27 ++
dep/pipeline/jump_044/jump_044.cli | 22 +
dep/pipeline/jump_044/jump_044.spec | 84 ++++
dep/pipeline/jump_044/pcap_files/in_1.txt | 17 +
dep/pipeline/jump_044/pcap_files/out_1.txt | 12 +
dep/pipeline/jump_044/readme.md | 12 +
dep/pipeline/jump_044/table.txt | 1 +
dep/pipeline/jump_045/ethdev.io | 27 ++
dep/pipeline/jump_045/jump_045.cli | 22 +
dep/pipeline/jump_045/jump_045.spec | 99 +++++
dep/pipeline/jump_045/pcap_files/in_1.txt | 17 +
dep/pipeline/jump_045/pcap_files/out_1.txt | 12 +
dep/pipeline/jump_045/readme.md | 11 +
dep/pipeline/jump_045/table.txt | 1 +
dep/pipeline/jump_046/ethdev.io | 27 ++
dep/pipeline/jump_046/jump_046.cli | 22 +
dep/pipeline/jump_046/jump_046.spec | 98 +++++
dep/pipeline/jump_046/pcap_files/in_1.txt | 17 +
dep/pipeline/jump_046/pcap_files/out_1.txt | 12 +
dep/pipeline/jump_046/readme.md | 12 +
dep/pipeline/jump_046/table.txt | 2 +
dep/pipeline/jump_047/ethdev.io | 27 ++
dep/pipeline/jump_047/jump_047.cli | 22 +
dep/pipeline/jump_047/jump_047.spec | 86 ++++
dep/pipeline/jump_047/pcap_files/in_1.txt | 16 +
dep/pipeline/jump_047/pcap_files/out_1.txt | 12 +
dep/pipeline/jump_047/readme.md | 11 +
dep/pipeline/jump_047/table.txt | 1 +
dep/pipeline/jump_048/ethdev.io | 27 ++
dep/pipeline/jump_048/jump_048.cli | 22 +
dep/pipeline/jump_048/jump_048.spec | 101 +++++
dep/pipeline/jump_048/pcap_files/in_1.txt | 17 +
dep/pipeline/jump_048/pcap_files/out_1.txt | 12 +
dep/pipeline/jump_048/readme.md | 11 +
dep/pipeline/jump_048/table.txt | 1 +
dep/pipeline/jump_049/ethdev.io | 27 ++
dep/pipeline/jump_049/jump_049.cli | 22 +
dep/pipeline/jump_049/jump_049.spec | 100 +++++
dep/pipeline/jump_049/pcap_files/in_1.txt | 17 +
dep/pipeline/jump_049/pcap_files/out_1.txt | 12 +
dep/pipeline/jump_049/readme.md | 11 +
dep/pipeline/jump_049/table.txt | 2 +
dep/pipeline/jump_050/ethdev.io | 27 ++
dep/pipeline/jump_050/jump_050.cli | 22 +
dep/pipeline/jump_050/jump_050.spec | 84 ++++
dep/pipeline/jump_050/pcap_files/in_1.txt | 17 +
dep/pipeline/jump_050/pcap_files/out_1.txt | 12 +
dep/pipeline/jump_050/readme.md | 11 +
dep/pipeline/jump_050/table.txt | 1 +
dep/pipeline/jump_051/ethdev.io | 27 ++
dep/pipeline/jump_051/jump_051.cli | 22 +
dep/pipeline/jump_051/jump_051.spec | 99 +++++
dep/pipeline/jump_051/pcap_files/in_1.txt | 17 +
dep/pipeline/jump_051/pcap_files/out_1.txt | 12 +
dep/pipeline/jump_051/readme.md | 11 +
dep/pipeline/jump_051/table.txt | 1 +
dep/pipeline/jump_052/ethdev.io | 27 ++
dep/pipeline/jump_052/jump_052.cli | 22 +
dep/pipeline/jump_052/jump_052.spec | 98 +++++
dep/pipeline/jump_052/pcap_files/in_1.txt | 17 +
dep/pipeline/jump_052/pcap_files/out_1.txt | 12 +
dep/pipeline/jump_052/readme.md | 11 +
dep/pipeline/jump_052/table.txt | 2 +
dep/pipeline/jump_053/ethdev.io | 27 ++
dep/pipeline/jump_053/jump_053.cli | 22 +
dep/pipeline/jump_053/jump_053.spec | 86 ++++
dep/pipeline/jump_053/pcap_files/in_1.txt | 16 +
dep/pipeline/jump_053/pcap_files/out_1.txt | 11 +
dep/pipeline/jump_053/readme.md | 11 +
dep/pipeline/jump_053/table.txt | 1 +
dep/pipeline/jump_054/ethdev.io | 27 ++
dep/pipeline/jump_054/jump_054.cli | 22 +
dep/pipeline/jump_054/jump_054.spec | 101 +++++
dep/pipeline/jump_054/pcap_files/in_1.txt | 17 +
dep/pipeline/jump_054/pcap_files/out_1.txt | 12 +
dep/pipeline/jump_054/readme.md | 11 +
dep/pipeline/jump_054/table.txt | 1 +
dep/pipeline/jump_055/ethdev.io | 27 ++
dep/pipeline/jump_055/jump_055.cli | 22 +
dep/pipeline/jump_055/jump_055.spec | 100 +++++
dep/pipeline/jump_055/pcap_files/in_1.txt | 17 +
dep/pipeline/jump_055/pcap_files/out_1.txt | 12 +
dep/pipeline/jump_055/readme.md | 11 +
dep/pipeline/jump_055/table.txt | 2 +
dep/pipeline/learner_001/ethdev.io | 27 ++
dep/pipeline/learner_001/learner_001.cli | 29 ++
dep/pipeline/learner_001/learner_001.spec | 97 +++++
dep/pipeline/learner_001/pcap_files/in_1.txt | 17 +
dep/pipeline/learner_001/pcap_files/in_2.txt | 17 +
dep/pipeline/learner_001/pcap_files/in_3.txt | 17 +
dep/pipeline/learner_001/pcap_files/in_4.txt | 17 +
dep/pipeline/learner_001/pcap_files/out_1.txt | 12 +
dep/pipeline/learner_001/pcap_files/out_2.txt | 12 +
dep/pipeline/learner_001/pcap_files/out_3.txt | 12 +
dep/pipeline/learner_001/pcap_files/out_4.txt | 12 +
dep/pipeline/learner_001/readme.md | 13 +
dep/pipeline/learner_002/ethdev.io | 27 ++
dep/pipeline/learner_002/learner_002.cli | 29 ++
dep/pipeline/learner_002/learner_002.spec | 99 +++++
dep/pipeline/learner_002/pcap_files/in_1.txt | 22 +
dep/pipeline/learner_002/pcap_files/in_2.txt | 22 +
dep/pipeline/learner_002/pcap_files/in_3.txt | 22 +
dep/pipeline/learner_002/pcap_files/in_4.txt | 22 +
dep/pipeline/learner_002/pcap_files/out_1.txt | 17 +
dep/pipeline/learner_002/pcap_files/out_2.txt | 17 +
dep/pipeline/learner_002/pcap_files/out_3.txt | 17 +
dep/pipeline/learner_002/pcap_files/out_4.txt | 17 +
dep/pipeline/learner_002/readme.md | 12 +
dep/pipeline/learner_003/ethdev.io | 27 ++
dep/pipeline/learner_003/learner_003.cli | 29 ++
dep/pipeline/learner_003/learner_003.spec | 101 +++++
dep/pipeline/learner_003/pcap_files/in_1.txt | 17 +
dep/pipeline/learner_003/pcap_files/in_2.txt | 17 +
dep/pipeline/learner_003/pcap_files/in_3.txt | 17 +
dep/pipeline/learner_003/pcap_files/in_4.txt | 17 +
dep/pipeline/learner_003/pcap_files/out_1.txt | 17 +
dep/pipeline/learner_003/pcap_files/out_2.txt | 17 +
dep/pipeline/learner_003/pcap_files/out_3.txt | 17 +
dep/pipeline/learner_003/pcap_files/out_4.txt | 17 +
dep/pipeline/learner_003/readme.md | 12 +
dep/pipeline/learner_004/ethdev.io | 27 ++
dep/pipeline/learner_004/learner_004.cli | 29 ++
dep/pipeline/learner_004/learner_004.spec | 187 ++++++++
dep/pipeline/learner_004/pcap_files/in_1.txt | 17 +
dep/pipeline/learner_004/pcap_files/out_1.txt | 15 +
dep/pipeline/learner_004/pcap_files/out_2.txt | 12 +
dep/pipeline/learner_004/readme.md | 16 +
dep/pipeline/learner_005/cmd_files/cmd_1.txt | 1 +
dep/pipeline/learner_005/ethdev.io | 27 ++
dep/pipeline/learner_005/learner_005.cli | 29 ++
dep/pipeline/learner_005/learner_005.spec | 199 +++++++++
dep/pipeline/learner_005/pcap_files/in_1.txt | 17 +
dep/pipeline/learner_005/pcap_files/in_2.txt | 17 +
dep/pipeline/learner_005/pcap_files/out_1.txt | 15 +
dep/pipeline/learner_005/pcap_files/out_2.txt | 12 +
dep/pipeline/learner_005/pcap_files/out_3.txt | 17 +
dep/pipeline/learner_005/readme.md | 12 +
dep/pipeline/learner_006/ethdev.io | 27 ++
dep/pipeline/learner_006/learner_006.cli | 7 +
dep/pipeline/learner_006/learner_006.spec | 101 +++++
dep/pipeline/learner_006/readme.md | 12 +
dep/pipeline/learner_007/ethdev.io | 27 ++
dep/pipeline/learner_007/learner_007.cli | 29 ++
dep/pipeline/learner_007/learner_007.spec | 98 +++++
dep/pipeline/learner_007/pcap_files/in_1.txt | 12 +
dep/pipeline/learner_007/pcap_files/out_1.txt | 12 +
dep/pipeline/learner_007/readme.md | 18 +
dep/pipeline/learner_008/ethdev.io | 27 ++
dep/pipeline/learner_008/learner_008.cli | 29 ++
dep/pipeline/learner_008/learner_008.spec | 99 +++++
dep/pipeline/learner_008/pcap_files/in_1.txt | 12 +
dep/pipeline/learner_008/pcap_files/in_2.txt | 17 +
dep/pipeline/learner_008/pcap_files/out_1.txt | 12 +
.../learner_008/pcap_files/out_21.txt | 12 +
.../learner_008/pcap_files/out_22.txt | 12 +
dep/pipeline/learner_008/readme.md | 23 +
dep/pipeline/learner_009/ethdev.io | 27 ++
dep/pipeline/learner_009/learner_009.cli | 29 ++
dep/pipeline/learner_009/learner_009.spec | 97 +++++
dep/pipeline/learner_009/pcap_files/in_1.txt | 12 +
dep/pipeline/learner_009/pcap_files/out_1.txt | 12 +
dep/pipeline/learner_009/readme.md | 21 +
dep/pipeline/learner_010/ethdev.io | 27 ++
dep/pipeline/learner_010/learner_010.cli | 29 ++
dep/pipeline/learner_010/learner_010.spec | 93 ++++
dep/pipeline/learner_010/pcap_files/in_1.txt | 12 +
dep/pipeline/learner_010/pcap_files/out_1.txt | 12 +
dep/pipeline/learner_010/readme.md | 19 +
dep/pipeline/learner_011/ethdev.io | 27 ++
dep/pipeline/learner_011/learner_011.cli | 30 ++
dep/pipeline/learner_011/learner_011.spec | 133 ++++++
dep/pipeline/learner_011/pcap_files/in_1.txt | 15 +
dep/pipeline/learner_011/pcap_files/in_2.txt | 23 +
dep/pipeline/learner_011/pcap_files/out_1.txt | 15 +
.../learner_011/pcap_files/out_21.txt | 15 +
.../learner_011/pcap_files/out_22.txt | 15 +
dep/pipeline/learner_011/readme.md | 23 +
dep/pipeline/learner_012/ethdev.io | 27 ++
dep/pipeline/learner_012/learner_012.cli | 18 +
dep/pipeline/learner_012/learner_012.spec | 164 +++++++
dep/pipeline/learner_012/pcap_files/in_1.txt | 15 +
dep/pipeline/learner_012/pcap_files/out_1.txt | 12 +
dep/pipeline/learner_012/pcap_files/out_2.txt | 15 +
dep/pipeline/learner_012/readme.md | 15 +
dep/pipeline/learner_013/ethdev.io | 27 ++
dep/pipeline/learner_013/learner_013.cli | 18 +
dep/pipeline/learner_013/learner_013.spec | 165 +++++++
dep/pipeline/learner_013/pcap_files/in_1.txt | 15 +
dep/pipeline/learner_013/pcap_files/out_1.txt | 12 +
dep/pipeline/learner_013/pcap_files/out_2.txt | 15 +
dep/pipeline/learner_013/readme.md | 15 +
dep/pipeline/learner_014/ethdev.io | 27 ++
dep/pipeline/learner_014/learner_014.cli | 18 +
dep/pipeline/learner_014/learner_014.spec | 160 +++++++
dep/pipeline/learner_014/pcap_files/in_1.txt | 17 +
dep/pipeline/learner_014/pcap_files/out_1.txt | 13 +
dep/pipeline/learner_014/pcap_files/out_2.txt | 17 +
dep/pipeline/learner_014/readme.md | 15 +
dep/pipeline/learner_015/ethdev.io | 27 ++
dep/pipeline/learner_015/learner_015.cli | 18 +
dep/pipeline/learner_015/learner_015.spec | 161 +++++++
dep/pipeline/learner_015/pcap_files/in_1.txt | 17 +
dep/pipeline/learner_015/pcap_files/out_1.txt | 13 +
dep/pipeline/learner_015/pcap_files/out_2.txt | 17 +
dep/pipeline/learner_015/readme.md | 15 +
dep/pipeline/learner_016/ethdev.io | 27 ++
dep/pipeline/learner_016/learner_016.cli | 4 +
dep/pipeline/learner_016/learner_016.spec | 160 +++++++
dep/pipeline/learner_016/readme.md | 14 +
dep/pipeline/learner_017/ethdev.io | 27 ++
dep/pipeline/learner_017/learner_017.cli | 4 +
dep/pipeline/learner_017/learner_017.spec | 163 +++++++
dep/pipeline/learner_017/readme.md | 14 +
dep/pipeline/learner_018/ethdev.io | 27 ++
dep/pipeline/learner_018/learner_018.cli | 4 +
dep/pipeline/learner_018/learner_018.spec | 156 +++++++
dep/pipeline/learner_018/readme.md | 14 +
dep/pipeline/learner_019/ethdev.io | 27 ++
dep/pipeline/learner_019/learner_019.cli | 4 +
dep/pipeline/learner_019/learner_019.spec | 157 +++++++
dep/pipeline/learner_019/readme.md | 14 +
dep/pipeline/lpm_001/cmd_files/cmd_2.txt | 1 +
dep/pipeline/lpm_001/cmd_files/cmd_3.txt | 1 +
dep/pipeline/lpm_001/cmd_files/cmd_4.txt | 2 +
dep/pipeline/lpm_001/cmd_files/cmd_5.txt | 1 +
dep/pipeline/lpm_001/cmd_files/cmd_6.txt | 1 +
dep/pipeline/lpm_001/ethdev.io | 27 ++
dep/pipeline/lpm_001/lpm_001.cli | 20 +
dep/pipeline/lpm_001/lpm_001.spec | 91 ++++
dep/pipeline/lpm_001/pcap_files/in_1.txt | 17 +
dep/pipeline/lpm_001/pcap_files/in_2.txt | 17 +
dep/pipeline/lpm_001/pcap_files/in_3.txt | 27 ++
dep/pipeline/lpm_001/pcap_files/in_4.txt | 27 ++
dep/pipeline/lpm_001/pcap_files/in_5.txt | 27 ++
dep/pipeline/lpm_001/pcap_files/in_6.txt | 27 ++
dep/pipeline/lpm_001/pcap_files/out_1.txt | 6 +
dep/pipeline/lpm_001/pcap_files/out_2.txt | 12 +
dep/pipeline/lpm_001/pcap_files/out_3.txt | 17 +
dep/pipeline/lpm_001/pcap_files/out_4.txt | 17 +
dep/pipeline/lpm_001/pcap_files/out_5.txt | 12 +
dep/pipeline/lpm_001/pcap_files/out_6.txt | 6 +
dep/pipeline/lpm_001/readme.md | 38 ++
dep/pipeline/lpm_002/cmd_files/cmd_1.txt | 4 +
dep/pipeline/lpm_002/cmd_files/cmd_2.txt | 4 +
dep/pipeline/lpm_002/ethdev.io | 27 ++
dep/pipeline/lpm_002/lpm_002.cli | 23 +
dep/pipeline/lpm_002/lpm_002.spec | 82 ++++
dep/pipeline/lpm_002/pcap_files/in_1.txt | 27 ++
dep/pipeline/lpm_002/pcap_files/in_2.txt | 27 ++
dep/pipeline/lpm_002/pcap_files/out_11.txt | 12 +
dep/pipeline/lpm_002/pcap_files/out_12.txt | 12 +
dep/pipeline/lpm_002/pcap_files/out_13.txt | 12 +
dep/pipeline/lpm_002/pcap_files/out_14.txt | 12 +
dep/pipeline/lpm_002/pcap_files/out_21.txt | 12 +
dep/pipeline/lpm_002/pcap_files/out_22.txt | 12 +
dep/pipeline/lpm_002/pcap_files/out_23.txt | 12 +
dep/pipeline/lpm_002/pcap_files/out_24.txt | 12 +
dep/pipeline/lpm_002/readme.md | 22 +
dep/pipeline/lpm_003/cmd_files/cmd_1.txt | 9 +
dep/pipeline/lpm_003/ethdev.io | 27 ++
dep/pipeline/lpm_003/lpm_003.cli | 23 +
dep/pipeline/lpm_003/lpm_003.spec | 87 ++++
dep/pipeline/lpm_003/pcap_files/in_1.txt | 47 ++
dep/pipeline/lpm_003/pcap_files/out_11.txt | 17 +
dep/pipeline/lpm_003/pcap_files/out_12.txt | 17 +
dep/pipeline/lpm_003/pcap_files/out_13.txt | 17 +
dep/pipeline/lpm_003/pcap_files/out_14.txt | 17 +
dep/pipeline/lpm_003/readme.md | 17 +
dep/pipeline/lpm_004/cmd_files/cmd_1.txt | 4 +
dep/pipeline/lpm_004/ethdev.io | 27 ++
dep/pipeline/lpm_004/lpm_004.cli | 23 +
dep/pipeline/lpm_004/lpm_004.spec | 87 ++++
dep/pipeline/lpm_004/pcap_files/in_1.txt | 27 ++
dep/pipeline/lpm_004/pcap_files/out_11.txt | 12 +
dep/pipeline/lpm_004/pcap_files/out_12.txt | 12 +
dep/pipeline/lpm_004/pcap_files/out_13.txt | 12 +
dep/pipeline/lpm_004/pcap_files/out_14.txt | 12 +
dep/pipeline/lpm_004/readme.md | 17 +
dep/pipeline/lpm_005/cmd_files/cmd_1.txt | 1 +
dep/pipeline/lpm_005/ethdev.io | 27 ++
dep/pipeline/lpm_005/lpm_005.cli | 20 +
dep/pipeline/lpm_005/lpm_005.spec | 75 ++++
dep/pipeline/lpm_005/pcap_files/in_1.txt | 19 +
dep/pipeline/lpm_005/pcap_files/out_1.txt | 19 +
dep/pipeline/lpm_005/readme.md | 14 +
dep/pipeline/met_001/ethdev.io | 27 ++
dep/pipeline/met_001/met_001.cli | 23 +
dep/pipeline/met_001/met_001.spec | 60 +++
dep/pipeline/met_001/pcap_files/in_1.txt | 32 ++
dep/pipeline/met_001/pcap_files/out_11.txt | 17 +
dep/pipeline/met_001/pcap_files/out_12.txt | 17 +
dep/pipeline/met_001/pcap_files/out_13.txt | 12 +
dep/pipeline/met_001/pcap_files/out_21.txt | 32 ++
dep/pipeline/met_001/pcap_files/out_22.txt | 6 +
dep/pipeline/met_001/pcap_files/out_23.txt | 6 +
dep/pipeline/met_001/pcap_files/out_31.txt | 17 +
dep/pipeline/met_001/pcap_files/out_32.txt | 12 +
dep/pipeline/met_001/pcap_files/out_33.txt | 17 +
dep/pipeline/met_001/pcap_files/out_41.txt | 32 ++
dep/pipeline/met_001/pcap_files/out_42.txt | 6 +
dep/pipeline/met_001/pcap_files/out_43.txt | 6 +
dep/pipeline/met_001/readme.md | 25 ++
dep/pipeline/met_002/ethdev.io | 27 ++
dep/pipeline/met_002/met_002.cli | 23 +
dep/pipeline/met_002/met_002.spec | 58 +++
dep/pipeline/met_002/pcap_files/in_1.txt | 32 ++
dep/pipeline/met_002/pcap_files/out_11.txt | 17 +
dep/pipeline/met_002/pcap_files/out_12.txt | 17 +
dep/pipeline/met_002/pcap_files/out_13.txt | 12 +
dep/pipeline/met_002/pcap_files/out_21.txt | 32 ++
dep/pipeline/met_002/pcap_files/out_22.txt | 6 +
dep/pipeline/met_002/pcap_files/out_23.txt | 6 +
dep/pipeline/met_002/readme.md | 18 +
dep/pipeline/met_003/ethdev.io | 27 ++
dep/pipeline/met_003/met_003.cli | 23 +
dep/pipeline/met_003/met_003.spec | 62 +++
dep/pipeline/met_003/pcap_files/in_1.txt | 32 ++
dep/pipeline/met_003/pcap_files/out_11.txt | 17 +
dep/pipeline/met_003/pcap_files/out_12.txt | 17 +
dep/pipeline/met_003/pcap_files/out_13.txt | 12 +
dep/pipeline/met_003/pcap_files/out_21.txt | 32 ++
dep/pipeline/met_003/pcap_files/out_22.txt | 6 +
dep/pipeline/met_003/pcap_files/out_23.txt | 6 +
dep/pipeline/met_003/readme.md | 18 +
dep/pipeline/met_004/ethdev.io | 27 ++
dep/pipeline/met_004/met_004.cli | 23 +
dep/pipeline/met_004/met_004.spec | 60 +++
dep/pipeline/met_004/pcap_files/in_1.txt | 32 ++
dep/pipeline/met_004/pcap_files/out_11.txt | 17 +
dep/pipeline/met_004/pcap_files/out_12.txt | 17 +
dep/pipeline/met_004/pcap_files/out_13.txt | 12 +
dep/pipeline/met_004/pcap_files/out_21.txt | 32 ++
dep/pipeline/met_004/pcap_files/out_22.txt | 6 +
dep/pipeline/met_004/pcap_files/out_23.txt | 6 +
dep/pipeline/met_004/readme.md | 18 +
dep/pipeline/met_005/ethdev.io | 27 ++
dep/pipeline/met_005/met_005.cli | 23 +
dep/pipeline/met_005/met_005.spec | 62 +++
dep/pipeline/met_005/pcap_files/in_1.txt | 32 ++
dep/pipeline/met_005/pcap_files/out_11.txt | 17 +
dep/pipeline/met_005/pcap_files/out_12.txt | 17 +
dep/pipeline/met_005/pcap_files/out_13.txt | 12 +
dep/pipeline/met_005/pcap_files/out_21.txt | 32 ++
dep/pipeline/met_005/pcap_files/out_22.txt | 6 +
dep/pipeline/met_005/pcap_files/out_23.txt | 6 +
dep/pipeline/met_005/readme.md | 18 +
dep/pipeline/met_006/ethdev.io | 27 ++
dep/pipeline/met_006/met_006.cli | 23 +
dep/pipeline/met_006/met_006.spec | 60 +++
dep/pipeline/met_006/pcap_files/in_1.txt | 32 ++
dep/pipeline/met_006/pcap_files/out_11.txt | 17 +
dep/pipeline/met_006/pcap_files/out_12.txt | 17 +
dep/pipeline/met_006/pcap_files/out_13.txt | 12 +
dep/pipeline/met_006/pcap_files/out_21.txt | 32 ++
dep/pipeline/met_006/pcap_files/out_22.txt | 6 +
dep/pipeline/met_006/pcap_files/out_23.txt | 6 +
dep/pipeline/met_006/readme.md | 18 +
dep/pipeline/met_007/ethdev.io | 27 ++
dep/pipeline/met_007/met_007.cli | 23 +
dep/pipeline/met_007/met_007.spec | 64 +++
dep/pipeline/met_007/pcap_files/in_1.txt | 32 ++
dep/pipeline/met_007/pcap_files/out_11.txt | 17 +
dep/pipeline/met_007/pcap_files/out_12.txt | 17 +
dep/pipeline/met_007/pcap_files/out_13.txt | 12 +
dep/pipeline/met_007/pcap_files/out_21.txt | 32 ++
dep/pipeline/met_007/pcap_files/out_22.txt | 6 +
dep/pipeline/met_007/pcap_files/out_23.txt | 6 +
dep/pipeline/met_007/readme.md | 18 +
dep/pipeline/met_008/ethdev.io | 27 ++
dep/pipeline/met_008/met_008.cli | 23 +
dep/pipeline/met_008/met_008.spec | 62 +++
dep/pipeline/met_008/pcap_files/in_1.txt | 32 ++
dep/pipeline/met_008/pcap_files/out_11.txt | 17 +
dep/pipeline/met_008/pcap_files/out_12.txt | 17 +
dep/pipeline/met_008/pcap_files/out_13.txt | 12 +
dep/pipeline/met_008/pcap_files/out_21.txt | 32 ++
dep/pipeline/met_008/pcap_files/out_22.txt | 6 +
dep/pipeline/met_008/pcap_files/out_23.txt | 6 +
dep/pipeline/met_008/readme.md | 18 +
dep/pipeline/met_009/ethdev.io | 27 ++
dep/pipeline/met_009/met_009.cli | 23 +
dep/pipeline/met_009/met_009.spec | 60 +++
dep/pipeline/met_009/pcap_files/in_1.txt | 32 ++
dep/pipeline/met_009/pcap_files/out_11.txt | 17 +
dep/pipeline/met_009/pcap_files/out_12.txt | 17 +
dep/pipeline/met_009/pcap_files/out_13.txt | 12 +
dep/pipeline/met_009/pcap_files/out_21.txt | 32 ++
dep/pipeline/met_009/pcap_files/out_22.txt | 6 +
dep/pipeline/met_009/pcap_files/out_23.txt | 6 +
dep/pipeline/met_009/readme.md | 18 +
dep/pipeline/met_010/ethdev.io | 27 ++
dep/pipeline/met_010/met_010.cli | 23 +
dep/pipeline/met_010/met_010.spec | 58 +++
dep/pipeline/met_010/pcap_files/in_1.txt | 32 ++
dep/pipeline/met_010/pcap_files/out_11.txt | 17 +
dep/pipeline/met_010/pcap_files/out_12.txt | 17 +
dep/pipeline/met_010/pcap_files/out_13.txt | 12 +
dep/pipeline/met_010/pcap_files/out_21.txt | 32 ++
dep/pipeline/met_010/pcap_files/out_22.txt | 6 +
dep/pipeline/met_010/pcap_files/out_23.txt | 6 +
dep/pipeline/met_010/readme.md | 18 +
dep/pipeline/met_011/ethdev.io | 27 ++
dep/pipeline/met_011/met_011.cli | 23 +
dep/pipeline/met_011/met_011.spec | 62 +++
dep/pipeline/met_011/pcap_files/in_1.txt | 32 ++
dep/pipeline/met_011/pcap_files/out_11.txt | 17 +
dep/pipeline/met_011/pcap_files/out_12.txt | 17 +
dep/pipeline/met_011/pcap_files/out_13.txt | 12 +
dep/pipeline/met_011/pcap_files/out_21.txt | 32 ++
dep/pipeline/met_011/pcap_files/out_22.txt | 6 +
dep/pipeline/met_011/pcap_files/out_23.txt | 6 +
dep/pipeline/met_011/readme.md | 18 +
dep/pipeline/met_012/ethdev.io | 27 ++
dep/pipeline/met_012/met_012.cli | 23 +
dep/pipeline/met_012/met_012.spec | 60 +++
dep/pipeline/met_012/pcap_files/in_1.txt | 32 ++
dep/pipeline/met_012/pcap_files/out_11.txt | 17 +
dep/pipeline/met_012/pcap_files/out_12.txt | 17 +
dep/pipeline/met_012/pcap_files/out_13.txt | 12 +
dep/pipeline/met_012/pcap_files/out_21.txt | 32 ++
dep/pipeline/met_012/pcap_files/out_22.txt | 6 +
dep/pipeline/met_012/pcap_files/out_23.txt | 6 +
dep/pipeline/met_012/readme.md | 18 +
dep/pipeline/met_013/ethdev.io | 27 ++
dep/pipeline/met_013/met_013.cli | 23 +
dep/pipeline/met_013/met_013.spec | 61 +++
dep/pipeline/met_013/pcap_files/in_1.txt | 32 ++
dep/pipeline/met_013/pcap_files/out_11.txt | 17 +
dep/pipeline/met_013/pcap_files/out_12.txt | 17 +
dep/pipeline/met_013/pcap_files/out_13.txt | 12 +
dep/pipeline/met_013/readme.md | 18 +
dep/pipeline/met_014/ethdev.io | 27 ++
dep/pipeline/met_014/met_014.cli | 23 +
dep/pipeline/met_014/met_014.spec | 63 +++
dep/pipeline/met_014/pcap_files/in_1.txt | 32 ++
dep/pipeline/met_014/pcap_files/out_11.txt | 17 +
dep/pipeline/met_014/pcap_files/out_12.txt | 17 +
dep/pipeline/met_014/pcap_files/out_13.txt | 12 +
dep/pipeline/met_014/readme.md | 18 +
dep/pipeline/met_015/ethdev.io | 27 ++
dep/pipeline/met_015/met_015.cli | 23 +
dep/pipeline/met_015/met_015.spec | 61 +++
dep/pipeline/met_015/pcap_files/in_1.txt | 32 ++
dep/pipeline/met_015/pcap_files/out_11.txt | 17 +
dep/pipeline/met_015/pcap_files/out_12.txt | 17 +
dep/pipeline/met_015/pcap_files/out_13.txt | 12 +
dep/pipeline/met_015/readme.md | 18 +
dep/pipeline/mirror_001/ethdev.io | 27 ++
dep/pipeline/mirror_001/mirror_001.cli | 35 ++
dep/pipeline/mirror_001/mirror_001.spec | 82 ++++
dep/pipeline/mirror_001/pcap_files/in_1.txt | 19 +
dep/pipeline/mirror_001/pcap_files/out_11.txt | 19 +
dep/pipeline/mirror_001/pcap_files/out_12.txt | 19 +
dep/pipeline/mirror_001/readme.md | 18 +
dep/pipeline/mirror_002/ethdev.io | 27 ++
dep/pipeline/mirror_002/mirror_002.cli | 35 ++
dep/pipeline/mirror_002/mirror_002.spec | 82 ++++
dep/pipeline/mirror_002/pcap_files/in_1.txt | 19 +
dep/pipeline/mirror_002/pcap_files/out_11.txt | 19 +
dep/pipeline/mirror_002/pcap_files/out_12.txt | 19 +
dep/pipeline/mirror_002/readme.md | 18 +
dep/pipeline/mirror_003/ethdev.io | 27 ++
dep/pipeline/mirror_003/mirror_003.cli | 34 ++
dep/pipeline/mirror_003/mirror_003.spec | 82 ++++
dep/pipeline/mirror_003/pcap_files/in_1.txt | 19 +
dep/pipeline/mirror_003/pcap_files/out_11.txt | 19 +
dep/pipeline/mirror_003/pcap_files/out_12.txt | 19 +
dep/pipeline/mirror_003/pcap_files/out_13.txt | 12 +
dep/pipeline/mirror_003/pcap_files/out_14.txt | 16 +
dep/pipeline/mirror_003/readme.md | 24 ++
dep/pipeline/mirror_004/ethdev.io | 27 ++
dep/pipeline/mirror_004/mirror_004.cli | 34 ++
dep/pipeline/mirror_004/mirror_004.spec | 82 ++++
dep/pipeline/mirror_004/pcap_files/in_1.txt | 19 +
dep/pipeline/mirror_004/pcap_files/out_11.txt | 19 +
dep/pipeline/mirror_004/pcap_files/out_12.txt | 19 +
dep/pipeline/mirror_004/readme.md | 21 +
dep/pipeline/mirror_005/ethdev.io | 27 ++
dep/pipeline/mirror_005/mirror_005.cli | 35 ++
dep/pipeline/mirror_005/mirror_005.spec | 84 ++++
dep/pipeline/mirror_005/pcap_files/in_1.txt | 19 +
dep/pipeline/mirror_005/pcap_files/out_11.txt | 19 +
dep/pipeline/mirror_005/pcap_files/out_12.txt | 19 +
dep/pipeline/mirror_005/pcap_files/out_13.txt | 19 +
dep/pipeline/mirror_005/readme.md | 17 +
dep/pipeline/mirror_006/ethdev.io | 27 ++
dep/pipeline/mirror_006/mirror_006.cli | 35 ++
dep/pipeline/mirror_006/mirror_006.spec | 84 ++++
dep/pipeline/mirror_006/pcap_files/in_1.txt | 19 +
dep/pipeline/mirror_006/pcap_files/out_11.txt | 19 +
dep/pipeline/mirror_006/pcap_files/out_12.txt | 6 +
dep/pipeline/mirror_006/pcap_files/out_13.txt | 19 +
dep/pipeline/mirror_006/readme.md | 17 +
dep/pipeline/mirror_007/ethdev.io | 27 ++
dep/pipeline/mirror_007/mirror_007.cli | 35 ++
dep/pipeline/mirror_007/mirror_007.spec | 80 ++++
dep/pipeline/mirror_007/pcap_files/in_1.txt | 19 +
dep/pipeline/mirror_007/pcap_files/out_11.txt | 19 +
dep/pipeline/mirror_007/pcap_files/out_12.txt | 6 +
dep/pipeline/mirror_007/readme.md | 16 +
dep/pipeline/mov_001/ethdev.io | 27 ++
dep/pipeline/mov_001/mov_001.cli | 20 +
dep/pipeline/mov_001/mov_001.spec | 51 +++
dep/pipeline/mov_001/pcap_files/in_1.txt | 12 +
dep/pipeline/mov_001/pcap_files/out_1.txt | 12 +
dep/pipeline/mov_001/readme.md | 19 +
dep/pipeline/mov_002/ethdev.io | 27 ++
dep/pipeline/mov_002/mov_002.cli | 20 +
dep/pipeline/mov_002/mov_002.spec | 67 +++
dep/pipeline/mov_002/pcap_files/in_1.txt | 12 +
dep/pipeline/mov_002/pcap_files/out_1.txt | 12 +
dep/pipeline/mov_002/readme.md | 14 +
dep/pipeline/mov_003/ethdev.io | 27 ++
dep/pipeline/mov_003/mov_003.cli | 20 +
dep/pipeline/mov_003/mov_003.spec | 58 +++
dep/pipeline/mov_003/pcap_files/in_1.txt | 12 +
dep/pipeline/mov_003/pcap_files/out_1.txt | 12 +
dep/pipeline/mov_003/readme.md | 11 +
dep/pipeline/mov_004/ethdev.io | 27 ++
dep/pipeline/mov_004/mov_004.cli | 22 +
dep/pipeline/mov_004/mov_004.spec | 82 ++++
dep/pipeline/mov_004/pcap_files/in_1.txt | 12 +
dep/pipeline/mov_004/pcap_files/out_1.txt | 12 +
dep/pipeline/mov_004/readme.md | 14 +
dep/pipeline/mov_004/table.txt | 1 +
dep/pipeline/mov_005/ethdev.io | 27 ++
dep/pipeline/mov_005/mov_005.cli | 22 +
dep/pipeline/mov_005/mov_005.spec | 66 +++
dep/pipeline/mov_005/pcap_files/in_1.txt | 12 +
dep/pipeline/mov_005/pcap_files/out_1.txt | 12 +
dep/pipeline/mov_005/readme.md | 11 +
dep/pipeline/mov_005/table.txt | 1 +
dep/pipeline/mov_007/ethdev.io | 27 ++
dep/pipeline/mov_007/mov_007.cli | 20 +
dep/pipeline/mov_007/mov_007.spec | 57 +++
dep/pipeline/mov_007/pcap_files/in_1.txt | 12 +
dep/pipeline/mov_007/pcap_files/out_1.txt | 12 +
dep/pipeline/mov_007/readme.md | 14 +
dep/pipeline/mov_008/ethdev.io | 27 ++
dep/pipeline/mov_008/mov_008.cli | 20 +
dep/pipeline/mov_008/mov_008.spec | 51 +++
dep/pipeline/mov_008/pcap_files/in_1.txt | 12 +
dep/pipeline/mov_008/pcap_files/out_1.txt | 12 +
dep/pipeline/mov_008/readme.md | 13 +
dep/pipeline/or_001/ethdev.io | 27 ++
dep/pipeline/or_001/or_001.cli | 22 +
dep/pipeline/or_001/or_001.spec | 82 ++++
dep/pipeline/or_001/pcap_files/in_1.txt | 12 +
dep/pipeline/or_001/pcap_files/out_1.txt | 12 +
dep/pipeline/or_001/readme.md | 15 +
dep/pipeline/or_001/table.txt | 1 +
dep/pipeline/or_002/ethdev.io | 27 ++
dep/pipeline/or_002/or_002.cli | 20 +
dep/pipeline/or_002/or_002.spec | 51 +++
dep/pipeline/or_002/pcap_files/in_1.txt | 12 +
dep/pipeline/or_002/pcap_files/out_1.txt | 12 +
dep/pipeline/or_002/readme.md | 17 +
dep/pipeline/or_003/ethdev.io | 27 ++
dep/pipeline/or_003/or_003.cli | 20 +
dep/pipeline/or_003/or_003.spec | 38 ++
dep/pipeline/or_003/pcap_files/in_1.txt | 12 +
dep/pipeline/or_003/pcap_files/out_1.txt | 12 +
dep/pipeline/or_003/readme.md | 13 +
dep/pipeline/or_004/ethdev.io | 27 ++
dep/pipeline/or_004/or_004.cli | 20 +
dep/pipeline/or_004/or_004.spec | 36 ++
dep/pipeline/or_004/pcap_files/in_1.txt | 12 +
dep/pipeline/or_004/pcap_files/out_1.txt | 12 +
dep/pipeline/or_004/readme.md | 13 +
dep/pipeline/or_005/ethdev.io | 27 ++
dep/pipeline/or_005/or_005.cli | 20 +
dep/pipeline/or_005/or_005.spec | 57 +++
dep/pipeline/or_005/pcap_files/in_1.txt | 12 +
dep/pipeline/or_005/pcap_files/out_1.txt | 12 +
dep/pipeline/or_005/readme.md | 14 +
dep/pipeline/or_006/ethdev.io | 27 ++
dep/pipeline/or_006/or_006.cli | 20 +
dep/pipeline/or_006/or_006.spec | 51 +++
dep/pipeline/or_006/pcap_files/in_1.txt | 12 +
dep/pipeline/or_006/pcap_files/out_1.txt | 12 +
dep/pipeline/or_006/readme.md | 13 +
dep/pipeline/or_007/ethdev.io | 27 ++
dep/pipeline/or_007/or_007.cli | 20 +
dep/pipeline/or_007/or_007.spec | 57 +++
dep/pipeline/or_007/pcap_files/in_1.txt | 12 +
dep/pipeline/or_007/pcap_files/out_1.txt | 12 +
dep/pipeline/or_007/readme.md | 13 +
dep/pipeline/or_008/ethdev.io | 27 ++
dep/pipeline/or_008/or_008.cli | 22 +
dep/pipeline/or_008/or_008.spec | 66 +++
dep/pipeline/or_008/pcap_files/in_1.txt | 12 +
dep/pipeline/or_008/pcap_files/out_1.txt | 12 +
dep/pipeline/or_008/readme.md | 11 +
dep/pipeline/or_008/table.txt | 1 +
dep/pipeline/profile_001/cmd_files/cmd_1.txt | 4 +
dep/pipeline/profile_001/cmd_files/cmd_2.txt | 4 +
dep/pipeline/profile_001/ethdev.io | 27 ++
dep/pipeline/profile_001/pcap_files/in_1.txt | 32 ++
dep/pipeline/profile_001/pcap_files/out_1.txt | 12 +
dep/pipeline/profile_001/pcap_files/out_2.txt | 12 +
dep/pipeline/profile_001/pcap_files/out_3.txt | 12 +
dep/pipeline/profile_001/pcap_files/out_4.txt | 12 +
dep/pipeline/profile_001/profile_001.cli | 24 ++
dep/pipeline/profile_001/profile_001.spec | 115 +++++
dep/pipeline/profile_001/readme.md | 6 +
dep/pipeline/recirculate_001/ethdev.io | 27 ++
.../recirculate_001/pcap_files/in_1.txt | 19 +
.../recirculate_001/pcap_files/out_1.txt | 19 +
dep/pipeline/recirculate_001/readme.md | 14 +
.../recirculate_001/recirculate_001.cli | 29 ++
.../recirculate_001/recirculate_001.spec | 81 ++++
dep/pipeline/reg_001/ethdev.io | 27 ++
dep/pipeline/reg_001/readme.md | 16 +
dep/pipeline/reg_001/reg_001.cli | 20 +
dep/pipeline/reg_001/reg_001.spec | 49 +++
dep/pipeline/reg_002/ethdev.io | 27 ++
dep/pipeline/reg_002/pcap_files/in_1.txt | 12 +
dep/pipeline/reg_002/pcap_files/out_1.txt | 12 +
dep/pipeline/reg_002/readme.md | 14 +
dep/pipeline/reg_002/reg_002.cli | 20 +
dep/pipeline/reg_002/reg_002.spec | 57 +++
dep/pipeline/reg_003/ethdev.io | 27 ++
dep/pipeline/reg_003/pcap_files/in_1.txt | 12 +
dep/pipeline/reg_003/pcap_files/out_1.txt | 12 +
dep/pipeline/reg_003/readme.md | 14 +
dep/pipeline/reg_003/reg_003.cli | 20 +
dep/pipeline/reg_003/reg_003.spec | 65 +++
dep/pipeline/reg_004/ethdev.io | 27 ++
dep/pipeline/reg_004/pcap_files/in_1.txt | 12 +
dep/pipeline/reg_004/pcap_files/out_1.txt | 12 +
dep/pipeline/reg_004/readme.md | 14 +
dep/pipeline/reg_004/reg_004.cli | 22 +
dep/pipeline/reg_004/reg_004.spec | 93 ++++
dep/pipeline/reg_004/table.txt | 1 +
dep/pipeline/reg_005/ethdev.io | 27 ++
dep/pipeline/reg_005/pcap_files/in_1.txt | 12 +
dep/pipeline/reg_005/pcap_files/out_1.txt | 12 +
dep/pipeline/reg_005/readme.md | 14 +
dep/pipeline/reg_005/reg_005.cli | 20 +
dep/pipeline/reg_005/reg_005.spec | 58 +++
dep/pipeline/reg_006/ethdev.io | 27 ++
dep/pipeline/reg_006/pcap_files/in_1.txt | 12 +
dep/pipeline/reg_006/readme.md | 16 +
dep/pipeline/reg_006/reg_006.cli | 20 +
dep/pipeline/reg_006/reg_006.spec | 66 +++
dep/pipeline/reg_007/ethdev.io | 27 ++
dep/pipeline/reg_007/pcap_files/in_1.txt | 12 +
dep/pipeline/reg_007/readme.md | 16 +
dep/pipeline/reg_007/reg_007.cli | 20 +
dep/pipeline/reg_007/reg_007.spec | 57 +++
dep/pipeline/reg_008/ethdev.io | 27 ++
dep/pipeline/reg_008/pcap_files/in_1.txt | 12 +
dep/pipeline/reg_008/readme.md | 16 +
dep/pipeline/reg_008/reg_008.cli | 22 +
dep/pipeline/reg_008/reg_008.spec | 85 ++++
dep/pipeline/reg_008/table.txt | 1 +
dep/pipeline/reg_009/ethdev.io | 27 ++
dep/pipeline/reg_009/pcap_files/in_1.txt | 12 +
dep/pipeline/reg_009/readme.md | 16 +
dep/pipeline/reg_009/reg_009.cli | 20 +
dep/pipeline/reg_009/reg_009.spec | 48 +++
dep/pipeline/reg_010/ethdev.io | 27 ++
dep/pipeline/reg_010/pcap_files/in_1.txt | 12 +
dep/pipeline/reg_010/readme.md | 15 +
dep/pipeline/reg_010/reg_010.cli | 20 +
dep/pipeline/reg_010/reg_010.spec | 57 +++
dep/pipeline/reg_011/ethdev.io | 27 ++
dep/pipeline/reg_011/pcap_files/in_1.txt | 12 +
dep/pipeline/reg_011/readme.md | 15 +
dep/pipeline/reg_011/reg_011.cli | 20 +
dep/pipeline/reg_011/reg_011.spec | 65 +++
dep/pipeline/reg_012/ethdev.io | 27 ++
dep/pipeline/reg_012/pcap_files/in_1.txt | 12 +
dep/pipeline/reg_012/readme.md | 15 +
dep/pipeline/reg_012/reg_012.cli | 22 +
dep/pipeline/reg_012/reg_012.spec | 93 ++++
dep/pipeline/reg_012/table.txt | 1 +
dep/pipeline/reg_013/ethdev.io | 27 ++
dep/pipeline/reg_013/pcap_files/in_1.txt | 12 +
dep/pipeline/reg_013/readme.md | 15 +
dep/pipeline/reg_013/reg_013.cli | 20 +
dep/pipeline/reg_013/reg_013.spec | 58 +++
dep/pipeline/reg_014/ethdev.io | 27 ++
dep/pipeline/reg_014/pcap_files/in_1.txt | 12 +
dep/pipeline/reg_014/readme.md | 15 +
dep/pipeline/reg_014/reg_014.cli | 20 +
dep/pipeline/reg_014/reg_014.spec | 66 +++
dep/pipeline/reg_015/ethdev.io | 27 ++
dep/pipeline/reg_015/pcap_files/in_1.txt | 12 +
dep/pipeline/reg_015/readme.md | 15 +
dep/pipeline/reg_015/reg_015.cli | 22 +
dep/pipeline/reg_015/reg_015.spec | 93 ++++
dep/pipeline/reg_015/table.txt | 1 +
dep/pipeline/reg_016/ethdev.io | 27 ++
dep/pipeline/reg_016/pcap_files/in_1.txt | 12 +
dep/pipeline/reg_016/readme.md | 15 +
dep/pipeline/reg_016/reg_016.cli | 20 +
dep/pipeline/reg_016/reg_016.spec | 63 +++
dep/pipeline/reg_017/ethdev.io | 27 ++
dep/pipeline/reg_017/pcap_files/in_1.txt | 12 +
dep/pipeline/reg_017/readme.md | 15 +
dep/pipeline/reg_017/reg_017.cli | 22 +
dep/pipeline/reg_017/reg_017.spec | 89 ++++
dep/pipeline/reg_017/table.txt | 1 +
dep/pipeline/reg_018/ethdev.io | 27 ++
dep/pipeline/reg_018/pcap_files/in_1.txt | 12 +
dep/pipeline/reg_018/readme.md | 15 +
dep/pipeline/reg_018/reg_018.cli | 22 +
dep/pipeline/reg_018/reg_018.spec | 89 ++++
dep/pipeline/reg_018/table.txt | 1 +
dep/pipeline/reg_019/ethdev.io | 27 ++
dep/pipeline/reg_019/pcap_files/in_1.txt | 12 +
dep/pipeline/reg_019/readme.md | 15 +
dep/pipeline/reg_019/reg_019.cli | 22 +
dep/pipeline/reg_019/reg_019.spec | 84 ++++
dep/pipeline/reg_019/table.txt | 1 +
dep/pipeline/reg_020/ethdev.io | 27 ++
dep/pipeline/reg_020/pcap_files/in_1.txt | 12 +
dep/pipeline/reg_020/readme.md | 15 +
dep/pipeline/reg_020/reg_020.cli | 20 +
dep/pipeline/reg_020/reg_020.spec | 50 +++
dep/pipeline/reg_021/ethdev.io | 27 ++
dep/pipeline/reg_021/pcap_files/in_1.txt | 12 +
dep/pipeline/reg_021/readme.md | 15 +
dep/pipeline/reg_021/reg_021.cli | 22 +
dep/pipeline/reg_021/reg_021.spec | 79 ++++
dep/pipeline/reg_021/table.txt | 1 +
dep/pipeline/reg_022/ethdev.io | 27 ++
dep/pipeline/reg_022/pcap_files/in_1.txt | 12 +
dep/pipeline/reg_022/readme.md | 15 +
dep/pipeline/reg_022/reg_022.cli | 20 +
dep/pipeline/reg_022/reg_022.spec | 58 +++
dep/pipeline/reg_023/ethdev.io | 27 ++
dep/pipeline/reg_023/pcap_files/in_1.txt | 12 +
dep/pipeline/reg_023/readme.md | 15 +
dep/pipeline/reg_023/reg_023.cli | 20 +
dep/pipeline/reg_023/reg_023.spec | 53 +++
dep/pipeline/reg_024/ethdev.io | 27 ++
dep/pipeline/reg_024/pcap_files/in_1.txt | 12 +
dep/pipeline/reg_024/readme.md | 15 +
dep/pipeline/reg_024/reg_024.cli | 22 +
dep/pipeline/reg_024/reg_024.spec | 79 ++++
dep/pipeline/reg_024/table.txt | 1 +
dep/pipeline/reg_025/ethdev.io | 27 ++
dep/pipeline/reg_025/pcap_files/in_1.txt | 12 +
dep/pipeline/reg_025/readme.md | 15 +
dep/pipeline/reg_025/reg_025.cli | 20 +
dep/pipeline/reg_025/reg_025.spec | 42 ++
dep/pipeline/reg_026/ethdev.io | 27 ++
dep/pipeline/reg_026/pcap_files/in_1.txt | 12 +
dep/pipeline/reg_026/readme.md | 17 +
dep/pipeline/reg_026/reg_026.cli | 20 +
dep/pipeline/reg_026/reg_026.spec | 57 +++
dep/pipeline/reg_027/ethdev.io | 27 ++
dep/pipeline/reg_027/pcap_files/in_1.txt | 12 +
dep/pipeline/reg_027/readme.md | 17 +
dep/pipeline/reg_027/reg_027.cli | 20 +
dep/pipeline/reg_027/reg_027.spec | 65 +++
dep/pipeline/reg_028/ethdev.io | 27 ++
dep/pipeline/reg_028/pcap_files/in_1.txt | 12 +
dep/pipeline/reg_028/readme.md | 17 +
dep/pipeline/reg_028/reg_028.cli | 22 +
dep/pipeline/reg_028/reg_028.spec | 93 ++++
dep/pipeline/reg_028/table.txt | 1 +
dep/pipeline/reg_029/ethdev.io | 27 ++
dep/pipeline/reg_029/pcap_files/in_1.txt | 12 +
dep/pipeline/reg_029/readme.md | 17 +
dep/pipeline/reg_029/reg_029.cli | 20 +
dep/pipeline/reg_029/reg_029.spec | 57 +++
dep/pipeline/reg_030/ethdev.io | 27 ++
dep/pipeline/reg_030/pcap_files/in_1.txt | 12 +
dep/pipeline/reg_030/readme.md | 17 +
dep/pipeline/reg_030/reg_030.cli | 20 +
dep/pipeline/reg_030/reg_030.spec | 66 +++
dep/pipeline/reg_031/ethdev.io | 27 ++
dep/pipeline/reg_031/pcap_files/in_1.txt | 12 +
dep/pipeline/reg_031/readme.md | 17 +
dep/pipeline/reg_031/reg_031.cli | 22 +
dep/pipeline/reg_031/reg_031.spec | 93 ++++
dep/pipeline/reg_031/table.txt | 1 +
dep/pipeline/reg_032/ethdev.io | 27 ++
dep/pipeline/reg_032/pcap_files/in_1.txt | 12 +
dep/pipeline/reg_032/readme.md | 17 +
dep/pipeline/reg_032/reg_032.cli | 20 +
dep/pipeline/reg_032/reg_032.spec | 63 +++
dep/pipeline/reg_033/ethdev.io | 27 ++
dep/pipeline/reg_033/pcap_files/in_1.txt | 12 +
dep/pipeline/reg_033/readme.md | 17 +
dep/pipeline/reg_033/reg_033.cli | 22 +
dep/pipeline/reg_033/reg_033.spec | 89 ++++
dep/pipeline/reg_033/table.txt | 1 +
dep/pipeline/reg_034/ethdev.io | 27 ++
dep/pipeline/reg_034/pcap_files/in_1.txt | 12 +
dep/pipeline/reg_034/readme.md | 17 +
dep/pipeline/reg_034/reg_034.cli | 22 +
dep/pipeline/reg_034/reg_034.spec | 89 ++++
dep/pipeline/reg_034/table.txt | 1 +
dep/pipeline/reg_035/ethdev.io | 27 ++
dep/pipeline/reg_035/pcap_files/in_1.txt | 12 +
dep/pipeline/reg_035/readme.md | 17 +
dep/pipeline/reg_035/reg_035.cli | 22 +
dep/pipeline/reg_035/reg_035.spec | 84 ++++
dep/pipeline/reg_035/table.txt | 1 +
dep/pipeline/reg_036/ethdev.io | 27 ++
dep/pipeline/reg_036/pcap_files/in_1.txt | 12 +
dep/pipeline/reg_036/readme.md | 17 +
dep/pipeline/reg_036/reg_036.cli | 20 +
dep/pipeline/reg_036/reg_036.spec | 53 +++
dep/pipeline/reg_037/ethdev.io | 27 ++
dep/pipeline/reg_037/pcap_files/in_1.txt | 12 +
dep/pipeline/reg_037/readme.md | 17 +
dep/pipeline/reg_037/reg_037.cli | 22 +
dep/pipeline/reg_037/reg_037.spec | 79 ++++
dep/pipeline/reg_037/table.txt | 1 +
dep/pipeline/reg_038/ethdev.io | 27 ++
dep/pipeline/reg_038/pcap_files/in_1.txt | 12 +
dep/pipeline/reg_038/readme.md | 17 +
dep/pipeline/reg_038/reg_038.cli | 20 +
dep/pipeline/reg_038/reg_038.spec | 58 +++
dep/pipeline/reg_039/ethdev.io | 27 ++
dep/pipeline/reg_039/pcap_files/in_1.txt | 12 +
dep/pipeline/reg_039/readme.md | 17 +
dep/pipeline/reg_039/reg_039.cli | 20 +
dep/pipeline/reg_039/reg_039.spec | 53 +++
dep/pipeline/reg_040/ethdev.io | 27 ++
dep/pipeline/reg_040/pcap_files/in_1.txt | 12 +
dep/pipeline/reg_040/readme.md | 17 +
dep/pipeline/reg_040/reg_040.cli | 22 +
dep/pipeline/reg_040/reg_040.spec | 79 ++++
dep/pipeline/reg_040/table.txt | 1 +
dep/pipeline/reg_041/ethdev.io | 27 ++
dep/pipeline/reg_041/pcap_files/in_1.txt | 12 +
dep/pipeline/reg_041/readme.md | 17 +
dep/pipeline/reg_041/reg_041.cli | 20 +
dep/pipeline/reg_041/reg_041.spec | 43 ++
dep/pipeline/reg_042/ethdev.io | 27 ++
dep/pipeline/reg_042/pcap_files/in_1.txt | 12 +
dep/pipeline/reg_042/readme.md | 17 +
dep/pipeline/reg_042/reg_042.cli | 20 +
dep/pipeline/reg_042/reg_042.spec | 62 +++
dep/pipeline/reg_043/ethdev.io | 27 ++
dep/pipeline/reg_043/pcap_files/in_1.txt | 12 +
dep/pipeline/reg_043/readme.md | 17 +
dep/pipeline/reg_043/reg_043.cli | 20 +
dep/pipeline/reg_043/reg_043.spec | 70 +++
dep/pipeline/reg_044/ethdev.io | 27 ++
dep/pipeline/reg_044/pcap_files/in_1.txt | 12 +
dep/pipeline/reg_044/readme.md | 17 +
dep/pipeline/reg_044/reg_044.cli | 22 +
dep/pipeline/reg_044/reg_044.spec | 97 +++++
dep/pipeline/reg_044/table.txt | 1 +
dep/pipeline/reg_045/ethdev.io | 27 ++
dep/pipeline/reg_045/pcap_files/in_1.txt | 12 +
dep/pipeline/reg_045/readme.md | 17 +
dep/pipeline/reg_045/reg_045.cli | 20 +
dep/pipeline/reg_045/reg_045.spec | 62 +++
.../ring_port_001/pcap_files/in_1.txt | 17 +
.../ring_port_001/pcap_files/out_1.txt | 15 +
dep/pipeline/ring_port_001/readme.md | 18 +
dep/pipeline/ring_port_001/ring_port_001.cli | 28 ++
dep/pipeline/ring_port_001/ring_port_001_a.io | 20 +
.../ring_port_001/ring_port_001_a.spec | 36 ++
dep/pipeline/ring_port_001/ring_port_001_b.io | 20 +
.../ring_port_001/ring_port_001_b.spec | 202 +++++++++
dep/pipeline/ring_port_001/table.txt | 1 +
.../ring_port_002/pcap_files/in_1.txt | 17 +
.../ring_port_002/pcap_files/out_1.txt | 17 +
dep/pipeline/ring_port_002/readme.md | 16 +
dep/pipeline/ring_port_002/ring_port_002.cli | 24 ++
dep/pipeline/ring_port_002/ring_port_002_a.io | 20 +
.../ring_port_002/ring_port_002_a.spec | 36 ++
dep/pipeline/ring_port_002/ring_port_002_b.io | 20 +
.../ring_port_002/ring_port_002_b.spec | 20 +
dep/pipeline/rx_tx_001/ethdev.io | 27 ++
dep/pipeline/rx_tx_001/pcap_files/in_1.txt | 12 +
dep/pipeline/rx_tx_001/pcap_files/out_1.txt | 12 +
dep/pipeline/rx_tx_001/readme.md | 12 +
dep/pipeline/rx_tx_001/rx_tx_001.cli | 20 +
dep/pipeline/rx_tx_001/rx_tx_001.spec | 19 +
dep/pipeline/selector_001/cmd_files/cmd_3.txt | 1 +
dep/pipeline/selector_001/cmd_files/cmd_4.txt | 1 +
dep/pipeline/selector_001/cmd_files/cmd_5.txt | 1 +
dep/pipeline/selector_001/cmd_files/cmd_6.txt | 4 +
dep/pipeline/selector_001/cmd_files/cmd_8.txt | 1 +
dep/pipeline/selector_001/ethdev.io | 27 ++
dep/pipeline/selector_001/pcap_files/in_1.txt | 47 ++
dep/pipeline/selector_001/pcap_files/in_2.txt | 47 ++
dep/pipeline/selector_001/pcap_files/in_3.txt | 12 +
dep/pipeline/selector_001/pcap_files/in_4.txt | 17 +
dep/pipeline/selector_001/pcap_files/in_5.txt | 22 +
dep/pipeline/selector_001/pcap_files/in_6.txt | 27 ++
dep/pipeline/selector_001/pcap_files/in_7.txt | 12 +
dep/pipeline/selector_001/pcap_files/in_8.txt | 22 +
.../selector_001/pcap_files/out_1.txt | 47 ++
.../selector_001/pcap_files/out_2.txt | 47 ++
.../selector_001/pcap_files/out_3.txt | 12 +
.../selector_001/pcap_files/out_41.txt | 12 +
.../selector_001/pcap_files/out_42.txt | 12 +
.../selector_001/pcap_files/out_51.txt | 12 +
.../selector_001/pcap_files/out_52.txt | 12 +
.../selector_001/pcap_files/out_53.txt | 12 +
.../selector_001/pcap_files/out_61.txt | 12 +
.../selector_001/pcap_files/out_62.txt | 12 +
.../selector_001/pcap_files/out_63.txt | 12 +
.../selector_001/pcap_files/out_64.txt | 12 +
.../selector_001/pcap_files/out_7.txt | 12 +
.../selector_001/pcap_files/out_81.txt | 12 +
.../selector_001/pcap_files/out_82.txt | 12 +
.../selector_001/pcap_files/out_83.txt | 12 +
dep/pipeline/selector_001/readme.md | 11 +
dep/pipeline/selector_001/selector_001.cli | 20 +
dep/pipeline/selector_001/selector_001.spec | 70 +++
dep/pipeline/selector_002/cmd_files/cmd_1.txt | 27 ++
dep/pipeline/selector_002/cmd_files/cmd_2.txt | 51 +++
dep/pipeline/selector_002/cmd_files/cmd_3.txt | 14 +
dep/pipeline/selector_002/ethdev.io | 27 ++
dep/pipeline/selector_002/pcap_files/in_1.txt | 153 +++++++
.../selector_002/pcap_files/out_1.txt | 42 ++
.../selector_002/pcap_files/out_2.txt | 42 ++
.../selector_002/pcap_files/out_3.txt | 42 ++
.../selector_002/pcap_files/out_4.txt | 42 ++
dep/pipeline/selector_002/readme.md | 22 +
dep/pipeline/selector_002/selector_002.cli | 37 ++
dep/pipeline/selector_002/selector_002.spec | 146 +++++++
dep/pipeline/shl_001/ethdev.io | 27 ++
dep/pipeline/shl_001/pcap_files/in_1.txt | 12 +
dep/pipeline/shl_001/pcap_files/out_1.txt | 12 +
dep/pipeline/shl_001/readme.md | 11 +
dep/pipeline/shl_001/shl_001.cli | 20 +
dep/pipeline/shl_001/shl_001.spec | 38 ++
dep/pipeline/shl_002/ethdev.io | 27 ++
dep/pipeline/shl_002/pcap_files/in_1.txt | 12 +
dep/pipeline/shl_002/pcap_files/out_1.txt | 12 +
dep/pipeline/shl_002/readme.md | 11 +
dep/pipeline/shl_002/shl_002.cli | 20 +
dep/pipeline/shl_002/shl_002.spec | 61 +++
dep/pipeline/shl_003/ethdev.io | 27 ++
dep/pipeline/shl_003/pcap_files/in_1.txt | 12 +
dep/pipeline/shl_003/pcap_files/out_1.txt | 12 +
dep/pipeline/shl_003/readme.md | 11 +
dep/pipeline/shl_003/shl_003.cli | 20 +
dep/pipeline/shl_003/shl_003.spec | 56 +++
dep/pipeline/shl_004/ethdev.io | 27 ++
dep/pipeline/shl_004/pcap_files/in_1.txt | 12 +
dep/pipeline/shl_004/pcap_files/out_1.txt | 12 +
dep/pipeline/shl_004/readme.md | 12 +
dep/pipeline/shl_004/shl_004.cli | 20 +
dep/pipeline/shl_004/shl_004.spec | 52 +++
dep/pipeline/shl_005/ethdev.io | 27 ++
dep/pipeline/shl_005/pcap_files/in_1.txt | 12 +
dep/pipeline/shl_005/pcap_files/out_1.txt | 12 +
dep/pipeline/shl_005/readme.md | 11 +
dep/pipeline/shl_005/shl_005.cli | 20 +
dep/pipeline/shl_005/shl_005.spec | 36 ++
dep/pipeline/shl_006/ethdev.io | 27 ++
dep/pipeline/shl_006/pcap_files/in_1.txt | 12 +
dep/pipeline/shl_006/pcap_files/out_1.txt | 12 +
dep/pipeline/shl_006/readme.md | 11 +
dep/pipeline/shl_006/shl_006.cli | 20 +
dep/pipeline/shl_006/shl_006.spec | 33 ++
dep/pipeline/shl_007/ethdev.io | 27 ++
dep/pipeline/shl_007/pcap_files/in_1.txt | 11 +
dep/pipeline/shl_007/pcap_files/out_1.txt | 11 +
dep/pipeline/shl_007/readme.md | 11 +
dep/pipeline/shl_007/shl_007.cli | 22 +
dep/pipeline/shl_007/shl_007.spec | 82 ++++
dep/pipeline/shl_007/table.txt | 1 +
dep/pipeline/shl_008/ethdev.io | 27 ++
dep/pipeline/shl_008/pcap_files/in_1.txt | 11 +
dep/pipeline/shl_008/pcap_files/out_1.txt | 11 +
dep/pipeline/shl_008/readme.md | 11 +
dep/pipeline/shl_008/shl_008.cli | 22 +
dep/pipeline/shl_008/shl_008.spec | 85 ++++
dep/pipeline/shl_008/table.txt | 1 +
dep/pipeline/shr_001/ethdev.io | 27 ++
dep/pipeline/shr_001/pcap_files/in_1.txt | 12 +
dep/pipeline/shr_001/pcap_files/out_1.txt | 12 +
dep/pipeline/shr_001/readme.md | 11 +
dep/pipeline/shr_001/shr_001.cli | 20 +
dep/pipeline/shr_001/shr_001.spec | 38 ++
dep/pipeline/shr_002/ethdev.io | 27 ++
dep/pipeline/shr_002/pcap_files/in_1.txt | 12 +
dep/pipeline/shr_002/pcap_files/out_1.txt | 12 +
dep/pipeline/shr_002/readme.md | 11 +
dep/pipeline/shr_002/shr_002.cli | 20 +
dep/pipeline/shr_002/shr_002.spec | 61 +++
dep/pipeline/shr_003/ethdev.io | 27 ++
dep/pipeline/shr_003/pcap_files/in_1.txt | 12 +
dep/pipeline/shr_003/pcap_files/out_1.txt | 12 +
dep/pipeline/shr_003/readme.md | 11 +
dep/pipeline/shr_003/shr_003.cli | 20 +
dep/pipeline/shr_003/shr_003.spec | 56 +++
dep/pipeline/shr_004/ethdev.io | 27 ++
dep/pipeline/shr_004/pcap_files/in_1.txt | 12 +
dep/pipeline/shr_004/pcap_files/out_1.txt | 12 +
dep/pipeline/shr_004/readme.md | 11 +
dep/pipeline/shr_004/shr_004.cli | 20 +
dep/pipeline/shr_004/shr_004.spec | 52 +++
dep/pipeline/shr_005/ethdev.io | 27 ++
dep/pipeline/shr_005/pcap_files/in_1.txt | 12 +
dep/pipeline/shr_005/pcap_files/out_1.txt | 12 +
dep/pipeline/shr_005/readme.md | 11 +
dep/pipeline/shr_005/shr_005.cli | 20 +
dep/pipeline/shr_005/shr_005.spec | 36 ++
dep/pipeline/shr_006/ethdev.io | 27 ++
dep/pipeline/shr_006/pcap_files/in_1.txt | 12 +
dep/pipeline/shr_006/pcap_files/out_1.txt | 12 +
dep/pipeline/shr_006/readme.md | 11 +
dep/pipeline/shr_006/shr_006.cli | 20 +
dep/pipeline/shr_006/shr_006.spec | 33 ++
dep/pipeline/shr_007/ethdev.io | 27 ++
dep/pipeline/shr_007/pcap_files/in_1.txt | 11 +
dep/pipeline/shr_007/pcap_files/out_1.txt | 11 +
dep/pipeline/shr_007/readme.md | 11 +
dep/pipeline/shr_007/shr_007.cli | 22 +
dep/pipeline/shr_007/shr_007.spec | 82 ++++
dep/pipeline/shr_007/table.txt | 1 +
dep/pipeline/shr_008/ethdev.io | 27 ++
dep/pipeline/shr_008/pcap_files/in_1.txt | 11 +
dep/pipeline/shr_008/pcap_files/out_1.txt | 11 +
dep/pipeline/shr_008/readme.md | 11 +
dep/pipeline/shr_008/shr_008.cli | 22 +
dep/pipeline/shr_008/shr_008.spec | 85 ++++
dep/pipeline/shr_008/table.txt | 1 +
dep/pipeline/sub_001/ethdev.io | 27 ++
dep/pipeline/sub_001/pcap_files/in_1.txt | 12 +
dep/pipeline/sub_001/pcap_files/out_1.txt | 12 +
dep/pipeline/sub_001/readme.md | 11 +
dep/pipeline/sub_001/sub_001.cli | 20 +
dep/pipeline/sub_001/sub_001.spec | 33 ++
dep/pipeline/sub_002/ethdev.io | 27 ++
dep/pipeline/sub_002/pcap_files/in_1.txt | 17 +
dep/pipeline/sub_002/pcap_files/out_1.txt | 17 +
dep/pipeline/sub_002/readme.md | 11 +
dep/pipeline/sub_002/sub_002.cli | 20 +
dep/pipeline/sub_002/sub_002.spec | 51 +++
dep/pipeline/sub_003/ethdev.io | 27 ++
dep/pipeline/sub_003/pcap_files/in_1.txt | 12 +
dep/pipeline/sub_003/pcap_files/out_1.txt | 12 +
dep/pipeline/sub_003/readme.md | 12 +
dep/pipeline/sub_003/sub_003.cli | 20 +
dep/pipeline/sub_003/sub_003.spec | 36 ++
dep/pipeline/sub_004/ethdev.io | 27 ++
dep/pipeline/sub_004/pcap_files/in_1.txt | 17 +
dep/pipeline/sub_004/pcap_files/out_1.txt | 17 +
dep/pipeline/sub_004/readme.md | 11 +
dep/pipeline/sub_004/sub_004.cli | 20 +
dep/pipeline/sub_004/sub_004.spec | 60 +++
dep/pipeline/sub_005/ethdev.io | 27 ++
dep/pipeline/sub_005/pcap_files/in_1.txt | 17 +
dep/pipeline/sub_005/pcap_files/out_1.txt | 17 +
dep/pipeline/sub_005/readme.md | 11 +
dep/pipeline/sub_005/sub_005.cli | 20 +
dep/pipeline/sub_005/sub_005.spec | 58 +++
dep/pipeline/sub_006/ethdev.io | 27 ++
dep/pipeline/sub_006/pcap_files/in_1.txt | 12 +
dep/pipeline/sub_006/pcap_files/out_1.txt | 12 +
dep/pipeline/sub_006/readme.md | 12 +
dep/pipeline/sub_006/sub_006.cli | 20 +
dep/pipeline/sub_006/sub_006.spec | 38 ++
dep/pipeline/sub_007/ethdev.io | 27 ++
dep/pipeline/sub_007/pcap_files/in_1.txt | 11 +
dep/pipeline/sub_007/pcap_files/out_1.txt | 11 +
dep/pipeline/sub_007/readme.md | 11 +
dep/pipeline/sub_007/sub_007.cli | 22 +
dep/pipeline/sub_007/sub_007.spec | 82 ++++
dep/pipeline/sub_007/table.txt | 1 +
dep/pipeline/sub_008/ethdev.io | 27 ++
dep/pipeline/sub_008/pcap_files/in_1.txt | 11 +
dep/pipeline/sub_008/pcap_files/out_1.txt | 11 +
dep/pipeline/sub_008/readme.md | 11 +
dep/pipeline/sub_008/sub_008.cli | 22 +
dep/pipeline/sub_008/sub_008.spec | 85 ++++
dep/pipeline/sub_008/table.txt | 1 +
dep/pipeline/table_001/ethdev.io | 27 ++
dep/pipeline/table_001/pcap_files/in_1.txt | 12 +
dep/pipeline/table_001/pcap_files/out_1.txt | 12 +
dep/pipeline/table_001/readme.md | 12 +
dep/pipeline/table_001/table_001.cli | 20 +
dep/pipeline/table_001/table_001.spec | 55 +++
dep/pipeline/table_002/cmd_files/cmd_2.txt | 1 +
dep/pipeline/table_002/cmd_files/cmd_3.txt | 1 +
dep/pipeline/table_002/cmd_files/cmd_4_1.txt | 1 +
dep/pipeline/table_002/cmd_files/cmd_4_2.txt | 1 +
dep/pipeline/table_002/cmd_files/cmd_5_1.txt | 1 +
dep/pipeline/table_002/cmd_files/cmd_5_2.txt | 1 +
dep/pipeline/table_002/cmd_files/cmd_6_1.txt | 1 +
dep/pipeline/table_002/cmd_files/cmd_6_2.txt | 1 +
dep/pipeline/table_002/ethdev.io | 27 ++
dep/pipeline/table_002/pcap_files/in_1.txt | 12 +
dep/pipeline/table_002/pcap_files/in_2.txt | 17 +
dep/pipeline/table_002/pcap_files/in_3.txt | 22 +
dep/pipeline/table_002/pcap_files/in_4_1.txt | 22 +
dep/pipeline/table_002/pcap_files/in_4_2.txt | 22 +
dep/pipeline/table_002/pcap_files/in_5_1.txt | 17 +
dep/pipeline/table_002/pcap_files/in_6_1.txt | 17 +
dep/pipeline/table_002/pcap_files/in_6_2.txt | 17 +
dep/pipeline/table_002/pcap_files/out_1.txt | 6 +
dep/pipeline/table_002/pcap_files/out_2.txt | 12 +
dep/pipeline/table_002/pcap_files/out_3.txt | 17 +
dep/pipeline/table_002/pcap_files/out_4_1.txt | 12 +
dep/pipeline/table_002/pcap_files/out_4_2.txt | 6 +
dep/pipeline/table_002/pcap_files/out_5_1.txt | 12 +
dep/pipeline/table_002/pcap_files/out_6_1.txt | 6 +
dep/pipeline/table_002/pcap_files/out_6_2.txt | 12 +
dep/pipeline/table_002/readme.md | 37 ++
dep/pipeline/table_002/table_002.cli | 20 +
dep/pipeline/table_002/table_002.spec | 80 ++++
dep/pipeline/table_003/cmd_files/cmd_2.txt | 1 +
dep/pipeline/table_003/cmd_files/cmd_3.txt | 1 +
dep/pipeline/table_003/cmd_files/cmd_4_1.txt | 1 +
dep/pipeline/table_003/cmd_files/cmd_4_2.txt | 1 +
dep/pipeline/table_003/cmd_files/cmd_5_1.txt | 1 +
dep/pipeline/table_003/cmd_files/cmd_5_2.txt | 1 +
.../table_003/cmd_files/cmd_6_1_1.txt | 1 +
.../table_003/cmd_files/cmd_6_1_2.txt | 1 +
dep/pipeline/table_003/cmd_files/cmd_6_2.txt | 1 +
dep/pipeline/table_003/ethdev.io | 27 ++
dep/pipeline/table_003/pcap_files/in_1.txt | 12 +
dep/pipeline/table_003/pcap_files/in_2.txt | 17 +
dep/pipeline/table_003/pcap_files/in_3.txt | 22 +
dep/pipeline/table_003/pcap_files/in_4_1.txt | 22 +
dep/pipeline/table_003/pcap_files/in_4_2.txt | 22 +
dep/pipeline/table_003/pcap_files/in_5_1.txt | 22 +
dep/pipeline/table_003/pcap_files/in_6_1.txt | 22 +
dep/pipeline/table_003/pcap_files/in_6_2.txt | 22 +
dep/pipeline/table_003/pcap_files/out_1.txt | 6 +
dep/pipeline/table_003/pcap_files/out_2.txt | 12 +
dep/pipeline/table_003/pcap_files/out_3.txt | 17 +
dep/pipeline/table_003/pcap_files/out_4_1.txt | 12 +
dep/pipeline/table_003/pcap_files/out_4_2.txt | 6 +
dep/pipeline/table_003/pcap_files/out_5_1.txt | 12 +
dep/pipeline/table_003/pcap_files/out_6_1.txt | 22 +
dep/pipeline/table_003/pcap_files/out_6_2.txt | 22 +
dep/pipeline/table_003/readme.md | 38 ++
dep/pipeline/table_003/table_003.cli | 20 +
dep/pipeline/table_003/table_003.spec | 80 ++++
dep/pipeline/table_004/ethdev.io | 27 ++
dep/pipeline/table_004/pcap_files/in_1.txt | 32 ++
dep/pipeline/table_004/pcap_files/out_1.txt | 12 +
dep/pipeline/table_004/readme.md | 14 +
dep/pipeline/table_004/table.txt | 1 +
dep/pipeline/table_004/table_004.cli | 22 +
dep/pipeline/table_004/table_004.spec | 90 ++++
dep/pipeline/table_005/cmd_files/cmd_1.txt | 1 +
dep/pipeline/table_005/ethdev.io | 27 ++
dep/pipeline/table_005/pcap_files/in_1.txt | 17 +
dep/pipeline/table_005/pcap_files/out_1.txt | 17 +
dep/pipeline/table_005/readme.md | 10 +
dep/pipeline/table_005/table_005.cli | 23 +
dep/pipeline/table_005/table_005.spec | 68 +++
dep/pipeline/table_006/cmd_files/cmd_1.txt | 1 +
dep/pipeline/table_006/ethdev.io | 27 ++
dep/pipeline/table_006/pcap_files/in_1.txt | 17 +
dep/pipeline/table_006/pcap_files/out_0.txt | 15 +
dep/pipeline/table_006/pcap_files/out_1.txt | 12 +
dep/pipeline/table_006/readme.md | 12 +
dep/pipeline/table_006/table_006.cli | 22 +
dep/pipeline/table_006/table_006.spec | 178 ++++++++
dep/pipeline/table_007/cmd_files/cmd_1.txt | 1 +
dep/pipeline/table_007/ethdev.io | 27 ++
dep/pipeline/table_007/pcap_files/in_1.txt | 17 +
dep/pipeline/table_007/pcap_files/out_1.txt | 17 +
dep/pipeline/table_007/readme.md | 11 +
dep/pipeline/table_007/table_007.cli | 23 +
dep/pipeline/table_007/table_007.spec | 74 ++++
dep/pipeline/table_008/cmd_files/cmd_1.txt | 1 +
dep/pipeline/table_008/cmd_files/cmd_2.txt | 1 +
dep/pipeline/table_008/ethdev.io | 27 ++
dep/pipeline/table_008/pcap_files/in_1.txt | 17 +
dep/pipeline/table_008/pcap_files/out_1.txt | 17 +
dep/pipeline/table_008/pcap_files/out_2.txt | 17 +
dep/pipeline/table_008/readme.md | 15 +
dep/pipeline/table_008/table_008.cli | 23 +
dep/pipeline/table_008/table_008.spec | 82 ++++
dep/pipeline/table_009/cmd_files/cmd_1.txt | 1 +
dep/pipeline/table_009/ethdev.io | 27 ++
dep/pipeline/table_009/pcap_files/in_1.txt | 19 +
dep/pipeline/table_009/pcap_files/out_1.txt | 19 +
dep/pipeline/table_009/readme.md | 14 +
dep/pipeline/table_009/table_009.cli | 20 +
dep/pipeline/table_009/table_009.spec | 75 ++++
dep/pipeline/table_010/cmd_files/cmd_1.txt | 1 +
dep/pipeline/table_010/ethdev.io | 27 ++
dep/pipeline/table_010/pcap_files/in_1.txt | 19 +
dep/pipeline/table_010/pcap_files/out_1.txt | 19 +
dep/pipeline/table_010/readme.md | 15 +
dep/pipeline/table_010/table_010.cli | 20 +
dep/pipeline/table_010/table_010.spec | 84 ++++
dep/pipeline/table_011/cmd_files/cmd_1.txt | 2 +
dep/pipeline/table_011/ethdev.io | 27 ++
dep/pipeline/table_011/pcap_files/in_1.txt | 13 +
dep/pipeline/table_011/pcap_files/in_2.txt | 13 +
dep/pipeline/table_011/pcap_files/out_1.txt | 13 +
dep/pipeline/table_011/pcap_files/out_2.txt | 13 +
dep/pipeline/table_011/readme.md | 14 +
dep/pipeline/table_011/table_011.cli | 20 +
dep/pipeline/table_011/table_011.spec | 93 ++++
dep/pipeline/table_012/cmd_files/cmd_1.txt | 2 +
dep/pipeline/table_012/ethdev.io | 27 ++
dep/pipeline/table_012/pcap_files/in_1.txt | 17 +
dep/pipeline/table_012/pcap_files/out_1.txt | 17 +
dep/pipeline/table_012/readme.md | 15 +
dep/pipeline/table_012/table_012.cli | 20 +
dep/pipeline/table_012/table_012.spec | 80 ++++
dep/pipeline/table_013/cmd_files/cmd_1.txt | 2 +
dep/pipeline/table_013/ethdev.io | 27 ++
dep/pipeline/table_013/pcap_files/in_1.txt | 19 +
dep/pipeline/table_013/pcap_files/out_1.txt | 19 +
dep/pipeline/table_013/readme.md | 14 +
dep/pipeline/table_013/table_013.cli | 20 +
dep/pipeline/table_013/table_013.spec | 91 ++++
dep/pipeline/table_014/cmd_files/cmd_1.txt | 1 +
dep/pipeline/table_014/ethdev.io | 27 ++
dep/pipeline/table_014/pcap_files/in_1.txt | 15 +
dep/pipeline/table_014/pcap_files/in_2.txt | 16 +
dep/pipeline/table_014/pcap_files/out_1.txt | 15 +
dep/pipeline/table_014/pcap_files/out_2.txt | 12 +
dep/pipeline/table_014/readme.md | 15 +
dep/pipeline/table_014/table_014.cli | 20 +
dep/pipeline/table_014/table_014.spec | 161 +++++++
dep/pipeline/table_015/cmd_files/cmd_1.txt | 1 +
dep/pipeline/table_015/ethdev.io | 27 ++
dep/pipeline/table_015/pcap_files/in_1.txt | 15 +
dep/pipeline/table_015/pcap_files/in_2.txt | 16 +
dep/pipeline/table_015/pcap_files/out_1.txt | 15 +
dep/pipeline/table_015/pcap_files/out_2.txt | 12 +
dep/pipeline/table_015/readme.md | 15 +
dep/pipeline/table_015/table_015.cli | 20 +
dep/pipeline/table_015/table_015.spec | 161 +++++++
dep/pipeline/table_016/cmd_files/cmd_1.txt | 1 +
dep/pipeline/table_016/ethdev.io | 27 ++
dep/pipeline/table_016/pcap_files/in_1.txt | 17 +
dep/pipeline/table_016/pcap_files/in_2.txt | 17 +
dep/pipeline/table_016/pcap_files/out_1.txt | 17 +
dep/pipeline/table_016/pcap_files/out_2.txt | 13 +
dep/pipeline/table_016/readme.md | 15 +
dep/pipeline/table_016/table_016.cli | 20 +
dep/pipeline/table_016/table_016.spec | 157 +++++++
dep/pipeline/table_017/cmd_files/cmd_1.txt | 1 +
dep/pipeline/table_017/ethdev.io | 27 ++
dep/pipeline/table_017/pcap_files/in_1.txt | 17 +
dep/pipeline/table_017/pcap_files/in_2.txt | 17 +
dep/pipeline/table_017/pcap_files/out_1.txt | 17 +
dep/pipeline/table_017/pcap_files/out_2.txt | 13 +
dep/pipeline/table_017/readme.md | 15 +
dep/pipeline/table_017/table_017.cli | 20 +
dep/pipeline/table_017/table_017.spec | 157 +++++++
dep/pipeline/table_018/cmd_files/cmd_1.txt | 1 +
dep/pipeline/table_018/ethdev.io | 27 ++
dep/pipeline/table_018/pcap_files/in_1.txt | 15 +
dep/pipeline/table_018/pcap_files/in_2.txt | 16 +
dep/pipeline/table_018/pcap_files/out_1.txt | 15 +
dep/pipeline/table_018/pcap_files/out_2.txt | 12 +
dep/pipeline/table_018/readme.md | 15 +
dep/pipeline/table_018/table_018.cli | 20 +
dep/pipeline/table_018/table_018.spec | 156 +++++++
dep/pipeline/table_019/cmd_files/cmd_1.txt | 1 +
dep/pipeline/table_019/ethdev.io | 27 ++
dep/pipeline/table_019/pcap_files/in_1.txt | 15 +
dep/pipeline/table_019/pcap_files/in_2.txt | 16 +
dep/pipeline/table_019/pcap_files/out_1.txt | 15 +
dep/pipeline/table_019/pcap_files/out_2.txt | 12 +
dep/pipeline/table_019/readme.md | 15 +
dep/pipeline/table_019/table_019.cli | 20 +
dep/pipeline/table_019/table_019.spec | 157 +++++++
dep/pipeline/table_020/cmd_files/cmd_1.txt | 1 +
dep/pipeline/table_020/ethdev.io | 27 ++
dep/pipeline/table_020/pcap_files/in_1.txt | 17 +
dep/pipeline/table_020/pcap_files/in_2.txt | 17 +
dep/pipeline/table_020/pcap_files/out_1.txt | 17 +
dep/pipeline/table_020/pcap_files/out_2.txt | 13 +
dep/pipeline/table_020/readme.md | 15 +
dep/pipeline/table_020/table_020.cli | 20 +
dep/pipeline/table_020/table_020.spec | 153 +++++++
dep/pipeline/table_021/cmd_files/cmd_1.txt | 1 +
dep/pipeline/table_021/ethdev.io | 27 ++
dep/pipeline/table_021/pcap_files/in_1.txt | 17 +
dep/pipeline/table_021/pcap_files/in_2.txt | 17 +
dep/pipeline/table_021/pcap_files/out_1.txt | 17 +
dep/pipeline/table_021/pcap_files/out_2.txt | 13 +
dep/pipeline/table_021/readme.md | 15 +
dep/pipeline/table_021/table_021.cli | 20 +
dep/pipeline/table_021/table_021.spec | 153 +++++++
dep/pipeline/u100_001/ethdev.io | 27 ++
dep/pipeline/u100_001/pcap_files/in_1.txt | 72 ++++
dep/pipeline/u100_001/pcap_files/in_2.txt | 23 +
dep/pipeline/u100_001/pcap_files/in_3.txt | 23 +
dep/pipeline/u100_001/pcap_files/in_4.txt | 27 ++
dep/pipeline/u100_001/pcap_files/out_11.txt | 22 +
dep/pipeline/u100_001/pcap_files/out_12.txt | 22 +
dep/pipeline/u100_001/pcap_files/out_13.txt | 22 +
dep/pipeline/u100_001/pcap_files/out_14.txt | 22 +
dep/pipeline/u100_001/pcap_files/out_21.txt | 11 +
dep/pipeline/u100_001/pcap_files/out_22.txt | 11 +
dep/pipeline/u100_001/pcap_files/out_23.txt | 11 +
dep/pipeline/u100_001/pcap_files/out_24.txt | 11 +
dep/pipeline/u100_001/pcap_files/out_31.txt | 11 +
dep/pipeline/u100_001/pcap_files/out_32.txt | 11 +
dep/pipeline/u100_001/pcap_files/out_33.txt | 11 +
dep/pipeline/u100_001/pcap_files/out_34.txt | 11 +
dep/pipeline/u100_001/pcap_files/out_41.txt | 12 +
dep/pipeline/u100_001/pcap_files/out_42.txt | 12 +
dep/pipeline/u100_001/pcap_files/out_43.txt | 12 +
dep/pipeline/u100_001/pcap_files/out_44.txt | 12 +
dep/pipeline/u100_001/readme.md | 14 +
dep/pipeline/u100_001/table_1.txt | 6 +
dep/pipeline/u100_001/table_2.txt | 6 +
dep/pipeline/u100_001/table_3.txt | 28 ++
dep/pipeline/u100_001/table_4.txt | 7 +
dep/pipeline/u100_001/u100_001.cli | 30 ++
dep/pipeline/u100_001/u100_001.spec | 246 +++++++++++
dep/pipeline/u100_002/ethdev.io | 27 ++
dep/pipeline/u100_002/pcap_files/in_1.txt | 75 ++++
dep/pipeline/u100_002/pcap_files/in_2.txt | 25 ++
dep/pipeline/u100_002/pcap_files/in_3.txt | 25 ++
dep/pipeline/u100_002/pcap_files/in_4.txt | 27 ++
dep/pipeline/u100_002/pcap_files/in_5.txt | 31 ++
dep/pipeline/u100_002/pcap_files/out_11.txt | 22 +
dep/pipeline/u100_002/pcap_files/out_12.txt | 22 +
dep/pipeline/u100_002/pcap_files/out_13.txt | 25 ++
dep/pipeline/u100_002/pcap_files/out_14.txt | 22 +
dep/pipeline/u100_002/pcap_files/out_21.txt | 11 +
dep/pipeline/u100_002/pcap_files/out_22.txt | 12 +
dep/pipeline/u100_002/pcap_files/out_23.txt | 12 +
dep/pipeline/u100_002/pcap_files/out_24.txt | 11 +
dep/pipeline/u100_002/pcap_files/out_31.txt | 11 +
dep/pipeline/u100_002/pcap_files/out_32.txt | 12 +
dep/pipeline/u100_002/pcap_files/out_33.txt | 12 +
dep/pipeline/u100_002/pcap_files/out_34.txt | 11 +
dep/pipeline/u100_002/pcap_files/out_41.txt | 12 +
dep/pipeline/u100_002/pcap_files/out_42.txt | 12 +
dep/pipeline/u100_002/pcap_files/out_43.txt | 12 +
dep/pipeline/u100_002/pcap_files/out_44.txt | 12 +
dep/pipeline/u100_002/pcap_files/out_51.txt | 13 +
dep/pipeline/u100_002/pcap_files/out_52.txt | 13 +
dep/pipeline/u100_002/pcap_files/out_53.txt | 13 +
dep/pipeline/u100_002/pcap_files/out_54.txt | 13 +
dep/pipeline/u100_002/readme.md | 14 +
dep/pipeline/u100_002/table_1.txt | 6 +
dep/pipeline/u100_002/table_2.txt | 6 +
dep/pipeline/u100_002/table_3.txt | 28 ++
dep/pipeline/u100_002/table_4.txt | 7 +
dep/pipeline/u100_002/table_5.txt | 6 +
dep/pipeline/u100_002/u100_002.cli | 32 ++
dep/pipeline/u100_002/u100_002.spec | 346 +++++++++++++++
dep/pipeline/u100_003/ethdev.io | 27 ++
dep/pipeline/u100_003/pcap_files/in_1.txt | 75 ++++
dep/pipeline/u100_003/pcap_files/in_2.txt | 25 ++
dep/pipeline/u100_003/pcap_files/in_3.txt | 25 ++
dep/pipeline/u100_003/pcap_files/in_4.txt | 27 ++
dep/pipeline/u100_003/pcap_files/in_5.txt | 31 ++
dep/pipeline/u100_003/pcap_files/out_11.txt | 22 +
dep/pipeline/u100_003/pcap_files/out_12.txt | 22 +
dep/pipeline/u100_003/pcap_files/out_13.txt | 25 ++
dep/pipeline/u100_003/pcap_files/out_14.txt | 22 +
dep/pipeline/u100_003/pcap_files/out_21.txt | 11 +
dep/pipeline/u100_003/pcap_files/out_22.txt | 12 +
dep/pipeline/u100_003/pcap_files/out_23.txt | 12 +
dep/pipeline/u100_003/pcap_files/out_24.txt | 11 +
dep/pipeline/u100_003/pcap_files/out_31.txt | 11 +
dep/pipeline/u100_003/pcap_files/out_32.txt | 12 +
dep/pipeline/u100_003/pcap_files/out_33.txt | 12 +
dep/pipeline/u100_003/pcap_files/out_34.txt | 11 +
dep/pipeline/u100_003/pcap_files/out_41.txt | 12 +
dep/pipeline/u100_003/pcap_files/out_42.txt | 12 +
dep/pipeline/u100_003/pcap_files/out_43.txt | 12 +
dep/pipeline/u100_003/pcap_files/out_44.txt | 12 +
dep/pipeline/u100_003/pcap_files/out_51.txt | 13 +
dep/pipeline/u100_003/pcap_files/out_52.txt | 13 +
dep/pipeline/u100_003/pcap_files/out_53.txt | 13 +
dep/pipeline/u100_003/pcap_files/out_54.txt | 13 +
dep/pipeline/u100_003/readme.md | 15 +
dep/pipeline/u100_003/table_1.txt | 6 +
dep/pipeline/u100_003/table_2.txt | 6 +
dep/pipeline/u100_003/table_3.txt | 28 ++
dep/pipeline/u100_003/table_4.txt | 5 +
dep/pipeline/u100_003/table_5.txt | 6 +
dep/pipeline/u100_003/table_6.txt | 14 +
dep/pipeline/u100_003/table_7.txt | 7 +
dep/pipeline/u100_003/u100_003.cli | 42 ++
dep/pipeline/u100_003/u100_003.spec | 407 ++++++++++++++++++
dep/pipeline/validate_001/ethdev.io | 27 ++
dep/pipeline/validate_001/pcap_files/in_1.txt | 22 +
.../validate_001/pcap_files/out_1.txt | 17 +
dep/pipeline/validate_001/readme.md | 14 +
dep/pipeline/validate_001/table.txt | 1 +
dep/pipeline/validate_001/validate_001.cli | 22 +
dep/pipeline/validate_001/validate_001.spec | 86 ++++
dep/pipeline/varbit_001/ethdev.io | 27 ++
dep/pipeline/varbit_001/pcap_files/in_1.txt | 17 +
dep/pipeline/varbit_001/pcap_files/out_1.txt | 17 +
dep/pipeline/varbit_001/readme.md | 13 +
dep/pipeline/varbit_001/varbit_001.cli | 20 +
dep/pipeline/varbit_001/varbit_001.spec | 90 ++++
dep/pipeline/vxlan_001/ethdev.io | 27 ++
dep/pipeline/vxlan_001/pcap_files/in_1.txt | 12 +
dep/pipeline/vxlan_001/pcap_files/in_2.txt | 12 +
dep/pipeline/vxlan_001/pcap_files/in_3.txt | 12 +
dep/pipeline/vxlan_001/pcap_files/in_4.txt | 12 +
dep/pipeline/vxlan_001/pcap_files/out_1.txt | 15 +
dep/pipeline/vxlan_001/pcap_files/out_2.txt | 15 +
dep/pipeline/vxlan_001/pcap_files/out_3.txt | 15 +
dep/pipeline/vxlan_001/pcap_files/out_4.txt | 15 +
dep/pipeline/vxlan_001/readme.md | 12 +
dep/pipeline/vxlan_001/table.txt | 4 +
dep/pipeline/vxlan_001/vxlan_001.cli | 22 +
dep/pipeline/vxlan_001/vxlan_001.py | 72 ++++
dep/pipeline/vxlan_001/vxlan_001.spec | 201 +++++++++
dep/pipeline/xor_001/ethdev.io | 27 ++
dep/pipeline/xor_001/pcap_files/in_1.txt | 12 +
dep/pipeline/xor_001/pcap_files/out_1.txt | 12 +
dep/pipeline/xor_001/readme.md | 11 +
dep/pipeline/xor_001/xor_001.cli | 20 +
dep/pipeline/xor_001/xor_001.spec | 20 +
dep/pipeline/xor_002/ethdev.io | 27 ++
dep/pipeline/xor_002/pcap_files/in_1.txt | 12 +
dep/pipeline/xor_002/pcap_files/out_1.txt | 12 +
dep/pipeline/xor_002/readme.md | 12 +
dep/pipeline/xor_002/xor_002.cli | 20 +
dep/pipeline/xor_002/xor_002.spec | 51 +++
dep/pipeline/xor_003/ethdev.io | 27 ++
dep/pipeline/xor_003/pcap_files/in_1.txt | 12 +
dep/pipeline/xor_003/pcap_files/out_1.txt | 12 +
dep/pipeline/xor_003/readme.md | 13 +
dep/pipeline/xor_003/xor_003.cli | 20 +
dep/pipeline/xor_003/xor_003.spec | 38 ++
dep/pipeline/xor_004/ethdev.io | 27 ++
dep/pipeline/xor_004/pcap_files/in_1.txt | 12 +
dep/pipeline/xor_004/pcap_files/out_1.txt | 12 +
dep/pipeline/xor_004/readme.md | 11 +
dep/pipeline/xor_004/xor_004.cli | 20 +
dep/pipeline/xor_004/xor_004.spec | 36 ++
dep/pipeline/xor_005/ethdev.io | 27 ++
dep/pipeline/xor_005/pcap_files/in_1.txt | 12 +
dep/pipeline/xor_005/pcap_files/out_1.txt | 12 +
dep/pipeline/xor_005/readme.md | 11 +
dep/pipeline/xor_005/xor_005.cli | 20 +
dep/pipeline/xor_005/xor_005.spec | 34 ++
dep/pipeline/xor_006/ethdev.io | 27 ++
dep/pipeline/xor_006/pcap_files/in_1.txt | 12 +
dep/pipeline/xor_006/pcap_files/out_1.txt | 12 +
dep/pipeline/xor_006/readme.md | 11 +
dep/pipeline/xor_006/table.txt | 1 +
dep/pipeline/xor_006/xor_006.cli | 22 +
dep/pipeline/xor_006/xor_006.spec | 66 +++
dep/pipeline/xor_007/ethdev.io | 27 ++
dep/pipeline/xor_007/pcap_files/in_1.txt | 12 +
dep/pipeline/xor_007/pcap_files/out_1.txt | 12 +
dep/pipeline/xor_007/readme.md | 16 +
dep/pipeline/xor_007/table.txt | 1 +
dep/pipeline/xor_007/xor_007.cli | 22 +
dep/pipeline/xor_007/xor_007.spec | 82 ++++
dep/pipeline/xor_008/ethdev.io | 27 ++
dep/pipeline/xor_008/pcap_files/in_1.txt | 12 +
dep/pipeline/xor_008/pcap_files/out_1.txt | 12 +
dep/pipeline/xor_008/readme.md | 16 +
dep/pipeline/xor_008/xor_008.cli | 20 +
dep/pipeline/xor_008/xor_008.spec | 52 +++
2119 files changed, 55621 insertions(+)
delete mode 100644 dep/pipeline.tar.gz
create mode 100644 dep/pipeline/add_001/add_001.cli
create mode 100644 dep/pipeline/add_001/add_001.spec
create mode 100644 dep/pipeline/add_001/ethdev.io
create mode 100644 dep/pipeline/add_001/pcap_files/in_1.txt
create mode 100644 dep/pipeline/add_001/pcap_files/out_1.txt
create mode 100644 dep/pipeline/add_001/readme.md
create mode 100644 dep/pipeline/add_002/add_002.cli
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create mode 100644 dep/pipeline/add_002/pcap_files/in_1.txt
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create mode 100644 dep/pipeline/add_003/add_003.cli
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create mode 100644 dep/pipeline/add_003/pcap_files/in_1.txt
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create mode 100644 dep/pipeline/add_004/add_004.cli
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create mode 100644 dep/pipeline/add_004/pcap_files/in_1.txt
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create mode 100644 dep/pipeline/add_005/add_005.cli
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create mode 100644 dep/pipeline/add_005/pcap_files/in_1.txt
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create mode 100644 dep/pipeline/add_006/pcap_files/in_1.txt
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create mode 100644 dep/pipeline/add_007/pcap_files/in_1.txt
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create mode 100644 dep/pipeline/add_008/pcap_files/in_1.txt
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create mode 100644 dep/pipeline/and_001/and_001.cli
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create mode 100644 dep/pipeline/and_001/pcap_files/in_1.txt
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create mode 100644 dep/pipeline/and_005/pcap_files/in_1.txt
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create mode 100644 dep/pipeline/and_006/pcap_files/in_1.txt
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create mode 100644 dep/pipeline/and_007/pcap_files/in_1.txt
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create mode 100644 dep/pipeline/and_008/pcap_files/in_1.txt
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create mode 100644 dep/pipeline/ckadd_009/pcap_files/in_1.txt
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create mode 100644 dep/pipeline/cksub_001/cksub_001.cli
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diff --git a/dep/pipeline/add_001/add_001.cli b/dep/pipeline/add_001/add_001.cli
new file mode 100644
index 00000000..7b64da74
--- /dev/null
+++ b/dep/pipeline/add_001/add_001.cli
@@ -0,0 +1,19 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/add_001/add_001.spec /tmp/pipeline/add_001/add_001.c
+pipeline libbuild /tmp/pipeline/add_001/add_001.c /tmp/pipeline/add_001/add_001.so
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/add_001/add_001.so io /tmp/pipeline/add_001/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/add_001/add_001.spec b/dep/pipeline/add_001/add_001.spec
new file mode 100644
index 00000000..2b1e0f5f
--- /dev/null
+++ b/dep/pipeline/add_001/add_001.spec
@@ -0,0 +1,33 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ add h.ethernet.dst_addr 1
+ emit h.ethernet
+ tx m.port
+}
diff --git a/dep/pipeline/add_001/ethdev.io b/dep/pipeline/add_001/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/add_001/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/add_001/pcap_files/in_1.txt b/dep/pipeline/add_001/pcap_files/in_1.txt
new file mode 100644
index 00000000..75115c15
--- /dev/null
+++ b/dep/pipeline/add_001/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/add_001/pcap_files/out_1.txt b/dep/pipeline/add_001/pcap_files/out_1.txt
new file mode 100644
index 00000000..777b89f0
--- /dev/null
+++ b/dep/pipeline/add_001/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 56 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/add_001/readme.md b/dep/pipeline/add_001/readme.md
new file mode 100644
index 00000000..4c49e9bc
--- /dev/null
+++ b/dep/pipeline/add_001/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_add_001
+-----------------------
+
+ Instruction being tested:
+ add h.field immediate_value
+
+ Description:
+ Add one to the destination MAC address of the received packet and transmit it back on the same port.
+
+ Verification:
+ Destination MAC address of the transmitted packet should be one more than the destination MAC address of the received packet.
diff --git a/dep/pipeline/add_002/add_002.cli b/dep/pipeline/add_002/add_002.cli
new file mode 100644
index 00000000..975b21db
--- /dev/null
+++ b/dep/pipeline/add_002/add_002.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/add_002/add_002.spec /tmp/pipeline/add_002/add_002.c
+pipeline libbuild /tmp/pipeline/add_002/add_002.c /tmp/pipeline/add_002/add_002.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/add_002/add_002.so io /tmp/pipeline/add_002/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/add_002/add_002.spec b/dep/pipeline/add_002/add_002.spec
new file mode 100644
index 00000000..2951be64
--- /dev/null
+++ b/dep/pipeline/add_002/add_002.spec
@@ -0,0 +1,51 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ add h.ipv4.dst_addr h.ethernet.src_addr // <
+ add h.ethernet.src_addr h.ethernet.dst_addr // =
+ add h.ipv4.src_addr h.ipv4.ttl // >
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/add_002/ethdev.io b/dep/pipeline/add_002/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/add_002/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/add_002/pcap_files/in_1.txt b/dep/pipeline/add_002/pcap_files/in_1.txt
new file mode 100644
index 00000000..ab415f17
--- /dev/null
+++ b/dep/pipeline/add_002/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 0f 0f 0f 0f 0f 0f ff f0 f0 f0 f0 f0 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 b2 c4 ff ff ff fa c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 bd a2 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/add_002/pcap_files/out_1.txt b/dep/pipeline/add_002/pcap_files/out_1.txt
new file mode 100644
index 00000000..171b8948
--- /dev/null
+++ b/dep/pipeline/add_002/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 0f 0f 0f 0f 0f 0f 0e ff ff ff ff ff 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 b2 c4 00 00 00 3a b8 f0
+000020 f0 fa 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 bd a2 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/add_002/readme.md b/dep/pipeline/add_002/readme.md
new file mode 100644
index 00000000..3a88e58c
--- /dev/null
+++ b/dep/pipeline/add_002/readme.md
@@ -0,0 +1,10 @@
+Test Case: test_add_002
+-----------------------
+
+ Instruction being tested:
+ add h.field h.field
+
+ Description:
+ For the received packet ipv4 dest addr = ethernet src addr + ipv4 dest addr, ethernet src addr = ethernet src addr + ethernet dest addr and, ipv4 src addr = ttl + ipv4 src addr.
+ Verification:
+ Verify using input and output pcap files.
diff --git a/dep/pipeline/add_003/add_003.cli b/dep/pipeline/add_003/add_003.cli
new file mode 100644
index 00000000..665c1f8e
--- /dev/null
+++ b/dep/pipeline/add_003/add_003.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/add_003/add_003.spec /tmp/pipeline/add_003/add_003.c
+pipeline libbuild /tmp/pipeline/add_003/add_003.c /tmp/pipeline/add_003/add_003.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/add_003/add_003.so io /tmp/pipeline/add_003/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/add_003/add_003.spec b/dep/pipeline/add_003/add_003.spec
new file mode 100644
index 00000000..9e9da1c0
--- /dev/null
+++ b/dep/pipeline/add_003/add_003.spec
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ add m.port 1
+ tx m.port
+}
diff --git a/dep/pipeline/add_003/ethdev.io b/dep/pipeline/add_003/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/add_003/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/add_003/pcap_files/in_1.txt b/dep/pipeline/add_003/pcap_files/in_1.txt
new file mode 100644
index 00000000..75115c15
--- /dev/null
+++ b/dep/pipeline/add_003/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/add_003/pcap_files/out_1.txt b/dep/pipeline/add_003/pcap_files/out_1.txt
new file mode 100644
index 00000000..75115c15
--- /dev/null
+++ b/dep/pipeline/add_003/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/add_003/readme.md b/dep/pipeline/add_003/readme.md
new file mode 100644
index 00000000..9f1af24f
--- /dev/null
+++ b/dep/pipeline/add_003/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_add_003
+-----------------------
+
+ Instruction being tested:
+ add m.field immediate_value
+
+ Description:
+ Increment the port_id by 1 and transmit the packet on that port_id.
+
+ Verification:
+ Packet should be received on the increamented port, for example if packet received by DUT on port 0 then it will be transmitted by DUT on port 1.
diff --git a/dep/pipeline/add_004/add_004.cli b/dep/pipeline/add_004/add_004.cli
new file mode 100644
index 00000000..0cd1c5f9
--- /dev/null
+++ b/dep/pipeline/add_004/add_004.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/add_004/add_004.spec /tmp/pipeline/add_004/add_004.c
+pipeline libbuild /tmp/pipeline/add_004/add_004.c /tmp/pipeline/add_004/add_004.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/add_004/add_004.so io /tmp/pipeline/add_004/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/add_004/add_004.spec b/dep/pipeline/add_004/add_004.spec
new file mode 100644
index 00000000..93e93d31
--- /dev/null
+++ b/dep/pipeline/add_004/add_004.spec
@@ -0,0 +1,60 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<48> eth_src_addr
+ bit<32> ip_src_addr
+ bit<32> ip_dst_addr
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ mov m.eth_src_addr h.ethernet.src_addr
+ mov m.ip_src_addr h.ipv4.src_addr
+ mov m.ip_dst_addr h.ipv4.dst_addr
+ add m.ip_dst_addr h.ethernet.src_addr
+ add m.eth_src_addr h.ethernet.dst_addr
+ add m.ip_src_addr h.ipv4.hdr_checksum
+ mov h.ipv4.dst_addr m.ip_dst_addr
+ mov h.ethernet.src_addr m.eth_src_addr
+ mov h.ipv4.src_addr m.ip_src_addr
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/add_004/ethdev.io b/dep/pipeline/add_004/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/add_004/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/add_004/pcap_files/in_1.txt b/dep/pipeline/add_004/pcap_files/in_1.txt
new file mode 100644
index 00000000..ab415f17
--- /dev/null
+++ b/dep/pipeline/add_004/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 0f 0f 0f 0f 0f 0f ff f0 f0 f0 f0 f0 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 b2 c4 ff ff ff fa c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 bd a2 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/add_004/pcap_files/out_1.txt b/dep/pipeline/add_004/pcap_files/out_1.txt
new file mode 100644
index 00000000..2f2584da
--- /dev/null
+++ b/dep/pipeline/add_004/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 0f 0f 0f 0f 0f 0f 0e ff ff ff ff ff 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 b2 c4 00 00 b2 be b8 f0
+000020 f0 fa 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 bd a2 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/add_004/readme.md b/dep/pipeline/add_004/readme.md
new file mode 100644
index 00000000..bb184d1c
--- /dev/null
+++ b/dep/pipeline/add_004/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_add_004
+-----------------------
+
+ Instruction being tested:
+ add m.field h.field
+
+ Description:
+ For the received packet ipv4 dest addr = ethernet src addr + ipv4 dest addr, ethernet src addr = ethernet src addr + ethernet dest addr and, ipv4 src addr = ipv4 header checksum + ipv4 src addr
+
+ Verification:
+ Verify using input and output pcap files.
diff --git a/dep/pipeline/add_005/add_005.cli b/dep/pipeline/add_005/add_005.cli
new file mode 100644
index 00000000..48f615e5
--- /dev/null
+++ b/dep/pipeline/add_005/add_005.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/add_005/add_005.spec /tmp/pipeline/add_005/add_005.c
+pipeline libbuild /tmp/pipeline/add_005/add_005.c /tmp/pipeline/add_005/add_005.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/add_005/add_005.so io /tmp/pipeline/add_005/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/add_005/add_005.spec b/dep/pipeline/add_005/add_005.spec
new file mode 100644
index 00000000..7336a518
--- /dev/null
+++ b/dep/pipeline/add_005/add_005.spec
@@ -0,0 +1,58 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<48> eth_dst_addr
+ bit<48> eth_src_addr
+ bit<8> ip_ttl
+
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ mov m.eth_src_addr h.ethernet.src_addr
+ mov m.eth_dst_addr h.ethernet.dst_addr
+ mov m.ip_ttl h.ipv4.ttl
+ add h.ipv4.dst_addr m.eth_src_addr
+ add h.ethernet.src_addr m.eth_dst_addr
+ add h.ipv4.src_addr m.ip_ttl
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/add_005/ethdev.io b/dep/pipeline/add_005/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/add_005/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/add_005/pcap_files/in_1.txt b/dep/pipeline/add_005/pcap_files/in_1.txt
new file mode 100644
index 00000000..ab415f17
--- /dev/null
+++ b/dep/pipeline/add_005/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 0f 0f 0f 0f 0f 0f ff f0 f0 f0 f0 f0 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 b2 c4 ff ff ff fa c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 bd a2 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/add_005/pcap_files/out_1.txt b/dep/pipeline/add_005/pcap_files/out_1.txt
new file mode 100644
index 00000000..171b8948
--- /dev/null
+++ b/dep/pipeline/add_005/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 0f 0f 0f 0f 0f 0f 0e ff ff ff ff ff 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 b2 c4 00 00 00 3a b8 f0
+000020 f0 fa 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 bd a2 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/add_005/readme.md b/dep/pipeline/add_005/readme.md
new file mode 100644
index 00000000..0771c143
--- /dev/null
+++ b/dep/pipeline/add_005/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_add_005
+-----------------------
+
+ Instruction being tested:
+ add h.field m.field
+
+ Description:
+ For the received packet ipv4 dest addr = ethernet src addr + ipv4 dest addr, ethernet src addr = ethernet src addr + ethernet dest addr and, ipv4 src addr = ttl + ipv4 src addr.
+
+ Verification:
+ Verify using input and output pcap files.
diff --git a/dep/pipeline/add_006/add_006.cli b/dep/pipeline/add_006/add_006.cli
new file mode 100644
index 00000000..7942e826
--- /dev/null
+++ b/dep/pipeline/add_006/add_006.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/add_006/add_006.spec /tmp/pipeline/add_006/add_006.c
+pipeline libbuild /tmp/pipeline/add_006/add_006.c /tmp/pipeline/add_006/add_006.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/add_006/add_006.so io /tmp/pipeline/add_006/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/add_006/add_006.spec b/dep/pipeline/add_006/add_006.spec
new file mode 100644
index 00000000..77bdc2af
--- /dev/null
+++ b/dep/pipeline/add_006/add_006.spec
@@ -0,0 +1,38 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<48> addr_1
+ bit<48> addr_2
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ mov m.addr_1 h.ethernet.src_addr
+ mov m.addr_2 h.ethernet.dst_addr
+ add m.addr_2 m.addr_1
+ mov h.ethernet.dst_addr m.addr_2
+ emit h.ethernet
+ tx m.port
+}
diff --git a/dep/pipeline/add_006/ethdev.io b/dep/pipeline/add_006/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/add_006/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/add_006/pcap_files/in_1.txt b/dep/pipeline/add_006/pcap_files/in_1.txt
new file mode 100644
index 00000000..c7e0552c
--- /dev/null
+++ b/dep/pipeline/add_006/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 10 11 12 13 14 15 20 21 22 23 24 25 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/add_006/pcap_files/out_1.txt b/dep/pipeline/add_006/pcap_files/out_1.txt
new file mode 100644
index 00000000..583686b6
--- /dev/null
+++ b/dep/pipeline/add_006/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 30 32 34 36 38 3a 20 21 22 23 24 25 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/add_006/readme.md b/dep/pipeline/add_006/readme.md
new file mode 100644
index 00000000..7f1b022c
--- /dev/null
+++ b/dep/pipeline/add_006/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_add_006
+-----------------------
+
+ Instruction being tested:
+ add m.field m.field
+
+ Description:
+ For the received packet, add the source MAC address to the destination MAC address and transmit it back on the same port.
+
+ Verification:
+ Destination MAC address of the transmitted packet should be the sum of source and destination MAC addresses of the received packet.
diff --git a/dep/pipeline/add_007/add_007.cli b/dep/pipeline/add_007/add_007.cli
new file mode 100755
index 00000000..3ff2820b
--- /dev/null
+++ b/dep/pipeline/add_007/add_007.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/add_007/add_007.spec /tmp/pipeline/add_007/add_007.c
+pipeline libbuild /tmp/pipeline/add_007/add_007.c /tmp/pipeline/add_007/add_007.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/add_007/add_007.so io /tmp/pipeline/add_007/ethdev.io numa 0
+pipeline PIPELINE0 table add_007 add /tmp/pipeline/add_007/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/add_007/add_007.spec b/dep/pipeline/add_007/add_007.spec
new file mode 100755
index 00000000..649c8de5
--- /dev/null
+++ b/dep/pipeline/add_007/add_007.spec
@@ -0,0 +1,82 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct add_007_args_t {
+ bit<32> src_addr_add
+}
+
+action add_007_action args instanceof add_007_args_t {
+ add h.ipv4.src_addr t.src_addr_add
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Table
+//
+table add_007 {
+ key {
+ h.ethernet.dst_addr exact
+ }
+
+ actions {
+ add_007_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ table add_007
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/add_007/ethdev.io b/dep/pipeline/add_007/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/add_007/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/add_007/pcap_files/in_1.txt b/dep/pipeline/add_007/pcap_files/in_1.txt
new file mode 100644
index 00000000..ce0583c0
--- /dev/null
+++ b/dep/pipeline/add_007/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/add_007/pcap_files/out_1.txt b/dep/pipeline/add_007/pcap_files/out_1.txt
new file mode 100644
index 00000000..b45ea689
--- /dev/null
+++ b/dep/pipeline/add_007/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0b c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/add_007/readme.md b/dep/pipeline/add_007/readme.md
new file mode 100644
index 00000000..06df777f
--- /dev/null
+++ b/dep/pipeline/add_007/readme.md
@@ -0,0 +1,12 @@
+Test Case: test_add_007
+-----------------------
+
+ Instructions being tested:
+ add h.field t.field
+
+
+ Description:
+ For a packet with matching destination MAC address, source IP address is added with the entry in table and updated source IP address is tranmitted on the same port.
+
+ Verification:
+ Packet will be received on the same port and source IP address will be sum of previous IP source address and table entry.
diff --git a/dep/pipeline/add_007/table.txt b/dep/pipeline/add_007/table.txt
new file mode 100755
index 00000000..e531dcf0
--- /dev/null
+++ b/dep/pipeline/add_007/table.txt
@@ -0,0 +1 @@
+match 0x525400124457 action add_007_action src_addr_add 0x1
diff --git a/dep/pipeline/add_008/add_008.cli b/dep/pipeline/add_008/add_008.cli
new file mode 100755
index 00000000..da313d7c
--- /dev/null
+++ b/dep/pipeline/add_008/add_008.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/add_008/add_008.spec /tmp/pipeline/add_008/add_008.c
+pipeline libbuild /tmp/pipeline/add_008/add_008.c /tmp/pipeline/add_008/add_008.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/add_008/add_008.so io /tmp/pipeline/add_008/ethdev.io numa 0
+pipeline PIPELINE0 table add_008 add /tmp/pipeline/add_008/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/add_008/add_008.spec b/dep/pipeline/add_008/add_008.spec
new file mode 100755
index 00000000..52926937
--- /dev/null
+++ b/dep/pipeline/add_008/add_008.spec
@@ -0,0 +1,69 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port
+ bit<48> addr
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct add_008_args_t {
+ bit<48> value
+}
+
+action add_008_action args instanceof add_008_args_t {
+ mov m.addr h.ethernet.src_addr
+ add m.addr t.value
+ mov h.ethernet.src_addr m.addr
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Table
+//
+table add_008 {
+ key {
+ h.ethernet.dst_addr exact
+ }
+
+ actions {
+ add_008_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ table add_008
+ emit h.ethernet
+ tx m.port
+}
diff --git a/dep/pipeline/add_008/ethdev.io b/dep/pipeline/add_008/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/add_008/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/add_008/pcap_files/in_1.txt b/dep/pipeline/add_008/pcap_files/in_1.txt
new file mode 100644
index 00000000..6b124802
--- /dev/null
+++ b/dep/pipeline/add_008/pcap_files/in_1.txt
@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 22 00 01 00 00 40 11 4e b6 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 0e c9 88 58 58 58 58 58 58
diff --git a/dep/pipeline/add_008/pcap_files/out_1.txt b/dep/pipeline/add_008/pcap_files/out_1.txt
new file mode 100644
index 00000000..66e69fce
--- /dev/null
+++ b/dep/pipeline/add_008/pcap_files/out_1.txt
@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 57 08 00 45 00
+000010 00 22 00 01 00 00 40 11 4e b6 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 0e c9 88 58 58 58 58 58 58
diff --git a/dep/pipeline/add_008/readme.md b/dep/pipeline/add_008/readme.md
new file mode 100644
index 00000000..8546e128
--- /dev/null
+++ b/dep/pipeline/add_008/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_add_008
+-----------------------
+
+ Instructions being tested:
+ add m.field t.field
+
+ Description:
+ For a packet with matching destination MAC address, source MAC address is added with the entry in table and updated source MAC address is tranmitted on the same port.
+
+ Verification:
+ Packet will be received on the same port and ethernet MAC src address will be the sum of original src MAC address and entry stored in the table.
diff --git a/dep/pipeline/add_008/table.txt b/dep/pipeline/add_008/table.txt
new file mode 100755
index 00000000..761a49b6
--- /dev/null
+++ b/dep/pipeline/add_008/table.txt
@@ -0,0 +1 @@
+match 0x525400124457 action add_008_action value 0x1
diff --git a/dep/pipeline/and_001/and_001.cli b/dep/pipeline/and_001/and_001.cli
new file mode 100644
index 00000000..e13f695b
--- /dev/null
+++ b/dep/pipeline/and_001/and_001.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/and_001/and_001.spec /tmp/pipeline/and_001/and_001.c
+pipeline libbuild /tmp/pipeline/and_001/and_001.c /tmp/pipeline/and_001/and_001.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/and_001/and_001.so io /tmp/pipeline/and_001/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/and_001/and_001.spec b/dep/pipeline/and_001/and_001.spec
new file mode 100644
index 00000000..60927ca2
--- /dev/null
+++ b/dep/pipeline/and_001/and_001.spec
@@ -0,0 +1,52 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<48> addr
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ and h.ipv4.dst_addr h.ethernet.src_addr // <
+ and h.ethernet.src_addr h.ethernet.dst_addr // =
+ and h.ethernet.dst_addr h.ipv4.src_addr // >
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/and_001/ethdev.io b/dep/pipeline/and_001/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/and_001/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/and_001/pcap_files/in_1.txt b/dep/pipeline/and_001/pcap_files/in_1.txt
new file mode 100644
index 00000000..75115c15
--- /dev/null
+++ b/dep/pipeline/and_001/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/and_001/pcap_files/out_1.txt b/dep/pipeline/and_001/pcap_files/out_1.txt
new file mode 100644
index 00000000..ec990181
--- /dev/null
+++ b/dep/pipeline/and_001/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 00 20 00 00 00 00 00 22 00 00 00 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a 40 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/and_001/readme.md b/dep/pipeline/and_001/readme.md
new file mode 100644
index 00000000..93aca09e
--- /dev/null
+++ b/dep/pipeline/and_001/readme.md
@@ -0,0 +1,15 @@
+
+Test Case: test_and_001
+-----------------------
+
+ Instruction being tested:
+ and h.field h.field
+
+ Description:
+ For the received packet, bitwise AND the bits of destination IP address
+ and source MAC address, source MAC address and destination MAC address,
+ destination MAC address and source IP address and transmit the packet
+ back on the same port.
+
+ Verification:
+ Verify using input and output pcap files.
diff --git a/dep/pipeline/and_002/and_002.cli b/dep/pipeline/and_002/and_002.cli
new file mode 100755
index 00000000..4fe95b24
--- /dev/null
+++ b/dep/pipeline/and_002/and_002.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/and_002/and_002.spec /tmp/pipeline/and_002/and_002.c
+pipeline libbuild /tmp/pipeline/and_002/and_002.c /tmp/pipeline/and_002/and_002.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/and_002/and_002.so io /tmp/pipeline/and_002/ethdev.io numa 0
+pipeline PIPELINE0 table and_002 add /tmp/pipeline/and_002/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/and_002/and_002.spec b/dep/pipeline/and_002/and_002.spec
new file mode 100755
index 00000000..c6e3f37c
--- /dev/null
+++ b/dep/pipeline/and_002/and_002.spec
@@ -0,0 +1,66 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct src_pat_args_t {
+ bit<32> port
+}
+
+action and_002_action args instanceof src_pat_args_t {
+ and m.port t.port
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+//table
+//
+table and_002 {
+ key {
+ h.ethernet.dst_addr exact
+ }
+
+ actions {
+ and_002_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ table and_002
+ emit h.ethernet
+ tx m.port
+}
diff --git a/dep/pipeline/and_002/ethdev.io b/dep/pipeline/and_002/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/and_002/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/and_002/pcap_files/in_1.txt b/dep/pipeline/and_002/pcap_files/in_1.txt
new file mode 100644
index 00000000..ce0583c0
--- /dev/null
+++ b/dep/pipeline/and_002/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/and_002/pcap_files/out_1.txt b/dep/pipeline/and_002/pcap_files/out_1.txt
new file mode 100644
index 00000000..ce0583c0
--- /dev/null
+++ b/dep/pipeline/and_002/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/and_002/readme.md b/dep/pipeline/and_002/readme.md
new file mode 100644
index 00000000..8c46a52d
--- /dev/null
+++ b/dep/pipeline/and_002/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_and_002
+-----------------------
+
+ Instructions being tested:
+ and m.field t.field
+
+ Description:
+ For a packet with matching destination MAC address, bitwise AND the received port metadata with the value stored in the table.
+
+ Verification:
+ Packet should be received on the port which is the result of logical AND of received port and value stored in the table.
diff --git a/dep/pipeline/and_002/table.txt b/dep/pipeline/and_002/table.txt
new file mode 100755
index 00000000..47ce87dc
--- /dev/null
+++ b/dep/pipeline/and_002/table.txt
@@ -0,0 +1 @@
+match 0x525400124457 action and_002_action port 0x0
diff --git a/dep/pipeline/and_003/and_003.cli b/dep/pipeline/and_003/and_003.cli
new file mode 100644
index 00000000..8a3183c1
--- /dev/null
+++ b/dep/pipeline/and_003/and_003.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/and_003/and_003.spec /tmp/pipeline/and_003/and_003.c
+pipeline libbuild /tmp/pipeline/and_003/and_003.c /tmp/pipeline/and_003/and_003.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/and_003/and_003.so io /tmp/pipeline/and_003/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/and_003/and_003.spec b/dep/pipeline/and_003/and_003.spec
new file mode 100644
index 00000000..2a60a98f
--- /dev/null
+++ b/dep/pipeline/and_003/and_003.spec
@@ -0,0 +1,38 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<48> addr_1
+ bit<48> addr_2
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ mov m.addr_1 h.ethernet.src_addr
+ mov m.addr_2 h.ethernet.dst_addr
+ and m.addr_2 m.addr_1
+ mov h.ethernet.dst_addr m.addr_2
+ emit h.ethernet
+ tx m.port
+}
diff --git a/dep/pipeline/and_003/ethdev.io b/dep/pipeline/and_003/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/and_003/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/and_003/pcap_files/in_1.txt b/dep/pipeline/and_003/pcap_files/in_1.txt
new file mode 100644
index 00000000..75115c15
--- /dev/null
+++ b/dep/pipeline/and_003/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/and_003/pcap_files/out_1.txt b/dep/pipeline/and_003/pcap_files/out_1.txt
new file mode 100644
index 00000000..abca5818
--- /dev/null
+++ b/dep/pipeline/and_003/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 00 22 00 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/and_003/readme.md b/dep/pipeline/and_003/readme.md
new file mode 100644
index 00000000..bef7bdba
--- /dev/null
+++ b/dep/pipeline/and_003/readme.md
@@ -0,0 +1,13 @@
+Test Case: test_and_003
+-----------------------
+
+ Instruction being tested:
+ and m.field m.field
+
+ Description:
+ For the received packet, bitwise AND the bits of source and destination MAC addresses and store the result in destination MAC address
+ field and transmit the packet back on the same port.
+
+ Verification:
+ Bits of destination MAC address of the transmitted packet should be the result of bitwise AND of source and destination MAC addresses
+ of the received packet.
diff --git a/dep/pipeline/and_004/and_004.cli b/dep/pipeline/and_004/and_004.cli
new file mode 100644
index 00000000..0653bb53
--- /dev/null
+++ b/dep/pipeline/and_004/and_004.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/and_004/and_004.spec /tmp/pipeline/and_004/and_004.c
+pipeline libbuild /tmp/pipeline/and_004/and_004.c /tmp/pipeline/and_004/and_004.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/and_004/and_004.so io /tmp/pipeline/and_004/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/and_004/and_004.spec b/dep/pipeline/and_004/and_004.spec
new file mode 100644
index 00000000..03e205d6
--- /dev/null
+++ b/dep/pipeline/and_004/and_004.spec
@@ -0,0 +1,36 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<48> addr
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ mov m.addr h.ethernet.dst_addr
+ and m.addr h.ethernet.src_addr
+ mov h.ethernet.dst_addr m.addr
+ emit h.ethernet
+ tx m.port
+}
diff --git a/dep/pipeline/and_004/ethdev.io b/dep/pipeline/and_004/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/and_004/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/and_004/pcap_files/in_1.txt b/dep/pipeline/and_004/pcap_files/in_1.txt
new file mode 100644
index 00000000..75115c15
--- /dev/null
+++ b/dep/pipeline/and_004/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/and_004/pcap_files/out_1.txt b/dep/pipeline/and_004/pcap_files/out_1.txt
new file mode 100644
index 00000000..abca5818
--- /dev/null
+++ b/dep/pipeline/and_004/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 00 22 00 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/and_004/readme.md b/dep/pipeline/and_004/readme.md
new file mode 100644
index 00000000..1948ee5e
--- /dev/null
+++ b/dep/pipeline/and_004/readme.md
@@ -0,0 +1,13 @@
+Test Case: test_and_004
+-----------------------
+
+ Instruction being tested:
+ and m.field h.field
+
+ Description:
+ For the received packet, bitwise AND the bits of source and destination MAC addresses and store the result in destination MAC address
+ field and transmit the packet back on the same port.
+
+ Verification:
+ Bits of destination MAC address of the transmitted packet should be the result of bitwise AND of source and destination MAC addresses
+ of the received packet.
diff --git a/dep/pipeline/and_005/and_005.cli b/dep/pipeline/and_005/and_005.cli
new file mode 100644
index 00000000..ea4b1391
--- /dev/null
+++ b/dep/pipeline/and_005/and_005.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/and_005/and_005.spec /tmp/pipeline/and_005/and_005.c
+pipeline libbuild /tmp/pipeline/and_005/and_005.c /tmp/pipeline/and_005/and_005.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/and_005/and_005.so io /tmp/pipeline/and_005/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/and_005/and_005.spec b/dep/pipeline/and_005/and_005.spec
new file mode 100644
index 00000000..9b451425
--- /dev/null
+++ b/dep/pipeline/and_005/and_005.spec
@@ -0,0 +1,57 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<48> data_48
+ bit<32> data_32
+ bit<16> data_16
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ mov m.data_48 0xaabbccdd
+ mov m.data_32 0xaabbccdd
+ mov m.data_16 0xaabbccdd
+ and h.ethernet.dst_addr m.data_32 // >
+ and h.ipv4.dst_addr m.data_48 // <
+ and h.ipv4.identification m.data_16 // =
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/and_005/ethdev.io b/dep/pipeline/and_005/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/and_005/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/and_005/pcap_files/in_1.txt b/dep/pipeline/and_005/pcap_files/in_1.txt
new file mode 100644
index 00000000..040ff38d
--- /dev/null
+++ b/dep/pipeline/and_005/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 11 22 33 44 55 66 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e a1 a2 00 00 40 06 4e b5 aa bb cc dd 12 34
+000020 56 78 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/and_005/pcap_files/out_1.txt b/dep/pipeline/and_005/pcap_files/out_1.txt
new file mode 100644
index 00000000..fc0666e5
--- /dev/null
+++ b/dep/pipeline/and_005/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 00 22 00 44 44 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 80 80 00 00 40 06 4e b5 aa bb cc dd 02 30
+000020 44 58 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/and_005/readme.md b/dep/pipeline/and_005/readme.md
new file mode 100644
index 00000000..7cd2ee12
--- /dev/null
+++ b/dep/pipeline/and_005/readme.md
@@ -0,0 +1,14 @@
+
+Test Case: test_and_005
+-----------------------
+
+ Instruction being tested:
+ and h.field m.field
+
+ Description:
+ For the received packet, bitwise AND destination MAC address,
+ destination IP address and IP identification with a fixed value and
+ transmit the packet back on the same port.
+
+ Verification:
+ Verify using input and output pcap files.
diff --git a/dep/pipeline/and_006/and_006.cli b/dep/pipeline/and_006/and_006.cli
new file mode 100644
index 00000000..3b356733
--- /dev/null
+++ b/dep/pipeline/and_006/and_006.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/and_006/and_006.spec /tmp/pipeline/and_006/and_006.c
+pipeline libbuild /tmp/pipeline/and_006/and_006.c /tmp/pipeline/and_006/and_006.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/and_006/and_006.so io /tmp/pipeline/and_006/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/and_006/and_006.spec b/dep/pipeline/and_006/and_006.spec
new file mode 100644
index 00000000..595046ad
--- /dev/null
+++ b/dep/pipeline/and_006/and_006.spec
@@ -0,0 +1,51 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ipv4 instanceof ipv4_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ and h.ipv4.src_addr 0xF0F0F0F0
+ and h.ipv4.dst_addr 0xF0F0F0F0
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/and_006/ethdev.io b/dep/pipeline/and_006/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/and_006/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/and_006/pcap_files/in_1.txt b/dep/pipeline/and_006/pcap_files/in_1.txt
new file mode 100644
index 00000000..e49eb3de
--- /dev/null
+++ b/dep/pipeline/and_006/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 12 34 56 78 9a bc
+000020 de f0 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/and_006/pcap_files/out_1.txt b/dep/pipeline/and_006/pcap_files/out_1.txt
new file mode 100644
index 00000000..1a3c0a36
--- /dev/null
+++ b/dep/pipeline/and_006/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 10 30 50 70 90 b0
+000020 d0 f0 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/and_006/readme.md b/dep/pipeline/and_006/readme.md
new file mode 100644
index 00000000..41c5f2d5
--- /dev/null
+++ b/dep/pipeline/and_006/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_and_006
+-----------------------
+
+ Instruction being tested:
+ and h.field immediate_value
+
+ Description:
+ For the received packet, bitwise AND the bits of source and destination IP addresses with 0xF0F0F0F0 and transmit the packet back on the same port.
+
+ Verification:
+ Bits of source and destination IP addresses of the transmitted packet should be the result of bitwise AND of 0xF0F0F0F0 with that of source and destination IP addresses of the received packet.
diff --git a/dep/pipeline/and_007/and_007.cli b/dep/pipeline/and_007/and_007.cli
new file mode 100644
index 00000000..314dff7b
--- /dev/null
+++ b/dep/pipeline/and_007/and_007.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/and_007/and_007.spec /tmp/pipeline/and_007/and_007.c
+pipeline libbuild /tmp/pipeline/and_007/and_007.c /tmp/pipeline/and_007/and_007.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/and_007/and_007.so io /tmp/pipeline/and_007/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/and_007/and_007.spec b/dep/pipeline/and_007/and_007.spec
new file mode 100644
index 00000000..9ab1747e
--- /dev/null
+++ b/dep/pipeline/and_007/and_007.spec
@@ -0,0 +1,57 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ipv4 instanceof ipv4_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<32> addr_1
+ bit<32> addr_2
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ mov m.addr_1 h.ipv4.src_addr
+ mov m.addr_2 h.ipv4.dst_addr
+ and m.addr_1 0xF0F0F0F0
+ and m.addr_2 0xF0F0F0F0
+ mov h.ipv4.src_addr m.addr_1
+ mov h.ipv4.dst_addr m.addr_2
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/and_007/ethdev.io b/dep/pipeline/and_007/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/and_007/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/and_007/pcap_files/in_1.txt b/dep/pipeline/and_007/pcap_files/in_1.txt
new file mode 100644
index 00000000..e49eb3de
--- /dev/null
+++ b/dep/pipeline/and_007/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 12 34 56 78 9a bc
+000020 de f0 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/and_007/pcap_files/out_1.txt b/dep/pipeline/and_007/pcap_files/out_1.txt
new file mode 100644
index 00000000..1a3c0a36
--- /dev/null
+++ b/dep/pipeline/and_007/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 10 30 50 70 90 b0
+000020 d0 f0 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/and_007/readme.md b/dep/pipeline/and_007/readme.md
new file mode 100644
index 00000000..60c5b179
--- /dev/null
+++ b/dep/pipeline/and_007/readme.md
@@ -0,0 +1,13 @@
+Test Case: test_and_007
+-----------------------
+
+ Instruction being tested:
+ and m.field immediate_value
+
+ Description:
+ For the received packet, bitwise AND the bits of source and destination IP addresses with 0xF0F0F0F0 and transmit the packet back on the same
+ port.
+
+ Verification:
+ Bits of source and destination IP addresses of the transmitted packet should be the result of bitwise AND of 0xF0F0F0F0 with that of source
+ and destination IP addresses of the received packet.
diff --git a/dep/pipeline/and_008/and_008.cli b/dep/pipeline/and_008/and_008.cli
new file mode 100755
index 00000000..d9e61c19
--- /dev/null
+++ b/dep/pipeline/and_008/and_008.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/and_008/and_008.spec /tmp/pipeline/and_008/and_008.c
+pipeline libbuild /tmp/pipeline/and_008/and_008.c /tmp/pipeline/and_008/and_008.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/and_008/and_008.so io /tmp/pipeline/and_008/ethdev.io numa 0
+pipeline PIPELINE0 table and_008 add /tmp/pipeline/and_008/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/and_008/and_008.spec b/dep/pipeline/and_008/and_008.spec
new file mode 100755
index 00000000..77cb4be8
--- /dev/null
+++ b/dep/pipeline/and_008/and_008.spec
@@ -0,0 +1,82 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct and_008_args_t {
+ bit<48> addr
+}
+
+action and_008_action args instanceof and_008_args_t {
+ and h.ipv4.dst_addr t.addr
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Table
+//
+table and_008 {
+ key {
+ h.ethernet.dst_addr exact
+ }
+
+ actions {
+ and_008_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ table and_008
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/and_008/ethdev.io b/dep/pipeline/and_008/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/and_008/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/and_008/pcap_files/in_1.txt b/dep/pipeline/and_008/pcap_files/in_1.txt
new file mode 100644
index 00000000..e34fa2c4
--- /dev/null
+++ b/dep/pipeline/and_008/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 aa bb cc dd 12 34
+000020 56 78 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/and_008/pcap_files/out_1.txt b/dep/pipeline/and_008/pcap_files/out_1.txt
new file mode 100644
index 00000000..fd96e913
--- /dev/null
+++ b/dep/pipeline/and_008/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 aa bb cc dd 02 30
+000020 44 58 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/and_008/readme.md b/dep/pipeline/and_008/readme.md
new file mode 100644
index 00000000..1257bd99
--- /dev/null
+++ b/dep/pipeline/and_008/readme.md
@@ -0,0 +1,16 @@
+
+Test Case: test_and_008
+-----------------------
+
+ Instructions being tested:
+ and h.field t.field
+
+ Description:
+ For a packet with matching destination MAC address, destination IP
+ address will be logically AND with the matching entry action data in
+ the table.
+
+ Verification:
+ Packet should be received on the same port and destination IP address
+ should be logically and with the matching entry action data in the
+ table.
diff --git a/dep/pipeline/and_008/table.txt b/dep/pipeline/and_008/table.txt
new file mode 100755
index 00000000..55bb97f5
--- /dev/null
+++ b/dep/pipeline/and_008/table.txt
@@ -0,0 +1 @@
+match 0x525400124457 action and_008_action addr 0xaabbccdd
diff --git a/dep/pipeline/annotation_001/annotation_001.cli b/dep/pipeline/annotation_001/annotation_001.cli
new file mode 100644
index 00000000..e458dc3d
--- /dev/null
+++ b/dep/pipeline/annotation_001/annotation_001.cli
@@ -0,0 +1,21 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/annotation_001/annotation_001.spec /tmp/pipeline/annotation_001/annotation_001.c
+pipeline libbuild /tmp/pipeline/annotation_001/annotation_001.c /tmp/pipeline/annotation_001/annotation_001.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/annotation_001/annotation_001.so io /tmp/pipeline/annotation_001/ethdev.io numa 0
+pipeline PIPELINE0 table annotation_001 add /tmp/pipeline/annotation_001/annotation_001_table.txt
+pipeline PIPELINE0 commit
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/annotation_001/annotation_001.spec b/dep/pipeline/annotation_001/annotation_001.spec
new file mode 100644
index 00000000..f9850b55
--- /dev/null
+++ b/dep/pipeline/annotation_001/annotation_001.spec
@@ -0,0 +1,76 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct annotation_001_args_t {
+ bit<48> ethernet_dst_addr
+}
+
+action action_001 args instanceof annotation_001_args_t {
+ mov h.ethernet.dst_addr t.ethernet_dst_addr
+ return
+}
+
+action action_002 args none {
+ drop
+}
+
+action default_001 args none {
+ drop
+}
+
+action default_002 args none {
+ drop
+}
+
+//
+// Tables.
+//
+table annotation_001 {
+ key {
+ h.ethernet.dst_addr exact
+ }
+
+ actions {
+ action_001 @tableonly
+ action_002 @tableonly
+ default_001 @defaultonly
+ default_002 @defaultonly
+ }
+
+ default_action default_001 args none
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ table annotation_001
+ emit h.ethernet
+ tx m.port
+}
\ No newline at end of file
diff --git a/dep/pipeline/annotation_001/annotation_001_table.txt b/dep/pipeline/annotation_001/annotation_001_table.txt
new file mode 100644
index 00000000..82e91eba
--- /dev/null
+++ b/dep/pipeline/annotation_001/annotation_001_table.txt
@@ -0,0 +1,2 @@
+match 0xa0a1a2a30000 action action_001 ethernet_dst_addr 0xb0b1b2b30000
+match 0xb0b1b2b30000 action action_002
\ No newline at end of file
diff --git a/dep/pipeline/annotation_001/ethdev.io b/dep/pipeline/annotation_001/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/annotation_001/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/annotation_001/pcap_files/in_1.txt b/dep/pipeline/annotation_001/pcap_files/in_1.txt
new file mode 100644
index 00000000..b0bea7cf
--- /dev/null
+++ b/dep/pipeline/annotation_001/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 a0 a1 a2 a3 00 00 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 b2 be 64 00 00 01 64 00
+000020 00 0a 00 64 00 c8 00 00 00 0f 00 00 00 0a 50 02
+000030 20 00 bd 83 00 00 58 58 58 58 58 58
+# Packet 1
+000000 b0 b1 b2 b3 00 00 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 b2 be 64 00 00 01 64 00
+000020 00 0a 00 64 00 c8 00 00 00 0f 00 00 00 0a 50 02
+000030 20 00 bd 83 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/annotation_001/pcap_files/out_1.txt b/dep/pipeline/annotation_001/pcap_files/out_1.txt
new file mode 100644
index 00000000..2c0f46f4
--- /dev/null
+++ b/dep/pipeline/annotation_001/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 b0 b1 b2 b3 00 00 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 b2 be 64 00 00 01 64 00
+000020 00 0a 00 64 00 c8 00 00 00 0f 00 00 00 0a 50 02
+000030 20 00 bd 83 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/annotation_001/readme.md b/dep/pipeline/annotation_001/readme.md
new file mode 100644
index 00000000..3339bfc7
--- /dev/null
+++ b/dep/pipeline/annotation_001/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_annotation_001
+-----------------------
+
+ Scenario being tested:
+ SPEC file contains more than one correctly defined defaultonly and tableonly annotations.
+ The tableonly actions mentioned in the SPEC file are listed/configured properly in rule file.
+ The application should run without any errors and packet verification must happen accordingly.
+
+
+ Verification:
+ Packet should get verified according to configured rules in the rule file.
diff --git a/dep/pipeline/annotation_002/annotation_002.cli b/dep/pipeline/annotation_002/annotation_002.cli
new file mode 100644
index 00000000..2fb5a427
--- /dev/null
+++ b/dep/pipeline/annotation_002/annotation_002.cli
@@ -0,0 +1,21 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/annotation_002/annotation_002.spec /tmp/pipeline/annotation_002/annotation_002.c
+pipeline libbuild /tmp/pipeline/annotation_002/annotation_002.c /tmp/pipeline/annotation_002/annotation_002.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/annotation_002/annotation_002.so io /tmp/pipeline/annotation_002/ethdev.io numa 0
+pipeline PIPELINE0 table annotation_002 add /tmp/pipeline/annotation_002/annotation_002_table.txt
+pipeline PIPELINE0 commit
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/annotation_002/annotation_002.spec b/dep/pipeline/annotation_002/annotation_002.spec
new file mode 100644
index 00000000..9df3ee7d
--- /dev/null
+++ b/dep/pipeline/annotation_002/annotation_002.spec
@@ -0,0 +1,77 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct annotation_002_args_t {
+ bit<48> ethernet_dst_addr
+}
+
+action action_001 args instanceof annotation_002_args_t {
+ mov h.ethernet.dst_addr t.ethernet_dst_addr
+ return
+}
+
+action action_002 args none {
+ drop
+}
+
+action default_001 args none {
+ drop
+}
+
+action default_002 args none {
+ drop
+}
+
+//
+// Tables.
+//
+table annotation_002 {
+ key {
+ h.ethernet.dst_addr exact
+ }
+
+ actions {
+ action_001
+ action_002
+ default_001
+ default_002
+ }
+
+ default_action default_001 args none
+
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ table annotation_002
+ emit h.ethernet
+ tx m.port
+}
diff --git a/dep/pipeline/annotation_002/annotation_002_table.txt b/dep/pipeline/annotation_002/annotation_002_table.txt
new file mode 100644
index 00000000..82e91eba
--- /dev/null
+++ b/dep/pipeline/annotation_002/annotation_002_table.txt
@@ -0,0 +1,2 @@
+match 0xa0a1a2a30000 action action_001 ethernet_dst_addr 0xb0b1b2b30000
+match 0xb0b1b2b30000 action action_002
\ No newline at end of file
diff --git a/dep/pipeline/annotation_002/ethdev.io b/dep/pipeline/annotation_002/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/annotation_002/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/annotation_002/pcap_files/in_1.txt b/dep/pipeline/annotation_002/pcap_files/in_1.txt
new file mode 100644
index 00000000..b0bea7cf
--- /dev/null
+++ b/dep/pipeline/annotation_002/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 a0 a1 a2 a3 00 00 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 b2 be 64 00 00 01 64 00
+000020 00 0a 00 64 00 c8 00 00 00 0f 00 00 00 0a 50 02
+000030 20 00 bd 83 00 00 58 58 58 58 58 58
+# Packet 1
+000000 b0 b1 b2 b3 00 00 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 b2 be 64 00 00 01 64 00
+000020 00 0a 00 64 00 c8 00 00 00 0f 00 00 00 0a 50 02
+000030 20 00 bd 83 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/annotation_002/pcap_files/out_1.txt b/dep/pipeline/annotation_002/pcap_files/out_1.txt
new file mode 100644
index 00000000..2c0f46f4
--- /dev/null
+++ b/dep/pipeline/annotation_002/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 b0 b1 b2 b3 00 00 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 b2 be 64 00 00 01 64 00
+000020 00 0a 00 64 00 c8 00 00 00 0f 00 00 00 0a 50 02
+000030 20 00 bd 83 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/annotation_002/readme.md b/dep/pipeline/annotation_002/readme.md
new file mode 100644
index 00000000..bc16941b
--- /dev/null
+++ b/dep/pipeline/annotation_002/readme.md
@@ -0,0 +1,10 @@
+Test Case: test_annotation_002
+-----------------------
+
+ Scenario being tested:
+ SPEC file don't have any defaultonly and tableonly annotations.
+ The actions mentioned in the SPEC file are listed/configured properly in rule file.
+ The application should run without any errors and packet verification must happen accordingly.
+
+ Verification:
+ Packet should get verified according to configured rules in the table file.
diff --git a/dep/pipeline/annotation_003/annotation_003.cli b/dep/pipeline/annotation_003/annotation_003.cli
new file mode 100644
index 00000000..42ace40a
--- /dev/null
+++ b/dep/pipeline/annotation_003/annotation_003.cli
@@ -0,0 +1,4 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+pipeline codegen /tmp/pipeline/annotation_003/annotation_003.spec /tmp/pipeline/annotation_003/annotation_003.c
diff --git a/dep/pipeline/annotation_003/annotation_003.spec b/dep/pipeline/annotation_003/annotation_003.spec
new file mode 100644
index 00000000..9b979b50
--- /dev/null
+++ b/dep/pipeline/annotation_003/annotation_003.spec
@@ -0,0 +1,73 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+
+action action_001 args none {
+ return
+}
+
+action action_002 args none {
+ return
+}
+
+action default_001 args none {
+ drop
+}
+
+action default_002 args none {
+ return
+}
+
+//
+// Tables.
+//
+
+table annotation_003 {
+ key {
+ h.ethernet.dst_addr exact
+ }
+
+ actions {
+ action_001 @tableonly @defaultonly
+ action_002
+ default_001
+ default_002
+ }
+
+ default_action default_001 args none
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ table annotation_003
+ emit h.ethernet
+ tx m.port
+}
\ No newline at end of file
diff --git a/dep/pipeline/annotation_003/readme.md b/dep/pipeline/annotation_003/readme.md
new file mode 100644
index 00000000..dd16ca4a
--- /dev/null
+++ b/dep/pipeline/annotation_003/readme.md
@@ -0,0 +1,9 @@
+Test Case: test_annotation_003
+-----------------------
+
+ Scenario being tested:
+ Amongst all the listed actions in SPEC file, one action is annoted twice.
+
+ Verification:
+ Application should not run and throw error
+ "Error -22 at line xx: Invalid action name statement."
diff --git a/dep/pipeline/annotation_004/annotation_004.cli b/dep/pipeline/annotation_004/annotation_004.cli
new file mode 100644
index 00000000..161fac33
--- /dev/null
+++ b/dep/pipeline/annotation_004/annotation_004.cli
@@ -0,0 +1,18 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/annotation_004/annotation_004.spec /tmp/pipeline/annotation_004/annotation_004.c
+pipeline libbuild /tmp/pipeline/annotation_004/annotation_004.c /tmp/pipeline/annotation_004/annotation_004.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/annotation_004/annotation_004.so io /tmp/pipeline/annotation_004/ethdev.io numa 0
diff --git a/dep/pipeline/annotation_004/annotation_004.spec b/dep/pipeline/annotation_004/annotation_004.spec
new file mode 100644
index 00000000..c64fdb25
--- /dev/null
+++ b/dep/pipeline/annotation_004/annotation_004.spec
@@ -0,0 +1,75 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct annotation_004_args_t {
+ bit<48> ethernet_dst_addr
+}
+
+action action_001 args instanceof annotation_004_args_t {
+ mov h.ethernet.dst_addr t.ethernet_dst_addr
+ return
+}
+
+action action_002 args none {
+ return
+}
+
+action default_001 args none {
+ drop
+}
+
+action default_002 args none {
+ return
+}
+
+//
+// Tables.
+//
+
+table annotation_004 {
+ key {
+ h.ethernet.dst_addr exact
+ }
+ actions {
+ action_001 @tableonly
+ action_002
+ default_001 @defaultonly
+ default_002
+ }
+ default_action default_001 args none
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ table annotation_004
+ emit h.ethernet
+ tx m.port
+}
diff --git a/dep/pipeline/annotation_004/annotation_004_table.txt b/dep/pipeline/annotation_004/annotation_004_table.txt
new file mode 100644
index 00000000..e3e5620e
--- /dev/null
+++ b/dep/pipeline/annotation_004/annotation_004_table.txt
@@ -0,0 +1,2 @@
+match 0xa0a1a2a30000 action action_001 ethernet_dst_addr 0xb0b1b2b30000
+match 0xaabbccde0000 action default_001
\ No newline at end of file
diff --git a/dep/pipeline/annotation_004/ethdev.io b/dep/pipeline/annotation_004/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/annotation_004/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/annotation_004/readme.md b/dep/pipeline/annotation_004/readme.md
new file mode 100644
index 00000000..11dcd5b8
--- /dev/null
+++ b/dep/pipeline/annotation_004/readme.md
@@ -0,0 +1,9 @@
+Test Case: test_annotation_004
+-----------------------
+
+ Scenario being tested:
+ Adding rule to a defaultonly annotated default action
+
+ Verification:
+ Application should not run and throw error
+ "Invalid entry in file /tmp/pipeline/annotation_004/annotation_004_table.txt at line xx"
diff --git a/dep/pipeline/annotation_005/annotation_005.cli b/dep/pipeline/annotation_005/annotation_005.cli
new file mode 100644
index 00000000..224f6dcf
--- /dev/null
+++ b/dep/pipeline/annotation_005/annotation_005.cli
@@ -0,0 +1,7 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/annotation_005/annotation_005.spec /tmp/pipeline/annotation_005/annotation_005.c
diff --git a/dep/pipeline/annotation_005/annotation_005.spec b/dep/pipeline/annotation_005/annotation_005.spec
new file mode 100644
index 00000000..12e3cda8
--- /dev/null
+++ b/dep/pipeline/annotation_005/annotation_005.spec
@@ -0,0 +1,73 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+
+action action_001 args none {
+ return
+}
+
+action action_002 args none {
+ return
+}
+
+action default_001 args none {
+ drop
+}
+
+action default_002 args none {
+ return
+}
+
+//
+// Tables.
+//
+
+table annotation_table {
+ key {
+ h.ethernet.dst_addr exact
+ }
+
+ actions {
+ action_001
+ action_002
+ default_001 @tableonly
+ default_002
+ }
+
+ default_action default_001 args none
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ table annotation_table
+ emit h.ethernet
+ tx m.port
+}
diff --git a/dep/pipeline/annotation_005/readme.md b/dep/pipeline/annotation_005/readme.md
new file mode 100644
index 00000000..3eabd99a
--- /dev/null
+++ b/dep/pipeline/annotation_005/readme.md
@@ -0,0 +1,9 @@
+Test Case: test_annotation_005
+-----------------------
+
+ Scenario being tested:
+ The SPEC file contains an action which is annotated as tableonly but used as default in SPEC.
+
+ Verification:
+ Application should not run and throw error
+ "Error -22 at line xx: Table configuration error."
diff --git a/dep/pipeline/ckadd_001/ckadd_001.cli b/dep/pipeline/ckadd_001/ckadd_001.cli
new file mode 100644
index 00000000..af1de1a4
--- /dev/null
+++ b/dep/pipeline/ckadd_001/ckadd_001.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/ckadd_001/ckadd_001.spec /tmp/pipeline/ckadd_001/ckadd_001.c
+pipeline libbuild /tmp/pipeline/ckadd_001/ckadd_001.c /tmp/pipeline/ckadd_001/ckadd_001.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/ckadd_001/ckadd_001.so io /tmp/pipeline/ckadd_001/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/ckadd_001/ckadd_001.spec b/dep/pipeline/ckadd_001/ckadd_001.spec
new file mode 100644
index 00000000..255f3f35
--- /dev/null
+++ b/dep/pipeline/ckadd_001/ckadd_001.spec
@@ -0,0 +1,53 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ipv4 instanceof ipv4_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ mov h.ipv4.identification 0x01
+ mov h.ipv4.flags_offset 0x2000
+ ckadd h.ipv4.hdr_checksum h.ipv4.identification
+ ckadd h.ipv4.hdr_checksum h.ipv4.flags_offset
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/ckadd_001/ethdev.io b/dep/pipeline/ckadd_001/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/ckadd_001/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/ckadd_001/pcap_files/in_1.txt b/dep/pipeline/ckadd_001/pcap_files/in_1.txt
new file mode 100644
index 00000000..cb800554
--- /dev/null
+++ b/dep/pipeline/ckadd_001/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 00 00 00 40 06 4e b6 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/ckadd_001/pcap_files/out_1.txt b/dep/pipeline/ckadd_001/pcap_files/out_1.txt
new file mode 100644
index 00000000..feb4beaf
--- /dev/null
+++ b/dep/pipeline/ckadd_001/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 20 00 40 06 2e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/ckadd_001/readme.md b/dep/pipeline/ckadd_001/readme.md
new file mode 100644
index 00000000..594d3684
--- /dev/null
+++ b/dep/pipeline/ckadd_001/readme.md
@@ -0,0 +1,36 @@
+Test Case: test_ckadd_001
+-------------------------
+
+ Instructions being tested:
+ ckadd h.field h.field
+
+ Description:
+ For the received packet, enable MF flag of ipv4 header and set the value of identification field to 1. Checksum to
+ be updated accordingly. Transmit the packet back on the same port.
+
+ Verification:
+ The transmitted packet should have MF flag of ipv4 header enabled, its identification field should be set to 1 and its
+ checksum updated accordingly.
+
+ Input IPv4 Packet Details:
+ total length: 20 (ipv4 header) + 20 (tcp header) + 6 (payload) => 46 bytes
+
+ Input packet IPv4 header checksum calculation
+ Without checksum: 45 00 00 2e 00 00 00 00 40 06 00 00 64 00 00 0a c8 00 00 0a
+
+ Without checksum: 4500 002e 0000 0000 4006 0000 6400 000a c800 000a
+
+ Sum: 1 b148 => b149
+ Checksum: 4eb6
+
+ With checksum: 4500 002e 0000 0000 4006 4eb6 6400 000a c800 000a
+
+ Output packet IPv4 header checksum calculation
+ Without checksum: 45 00 00 2e 00 01 20 00 40 06 00 00 64 00 00 0a c8 00 00 0a
+
+ Without checksum: 4500 002e 0001 2000 4006 0000 6400 000a c800 000a
+
+ Sum: 1 d149 => d14a
+ Checksum: 2eb5
+
+ With checksum: 4500 002e 0001 2000 4006 2eb5 6400 000a c800 000a
diff --git a/dep/pipeline/ckadd_009/ckadd_009.cli b/dep/pipeline/ckadd_009/ckadd_009.cli
new file mode 100644
index 00000000..c7ff2542
--- /dev/null
+++ b/dep/pipeline/ckadd_009/ckadd_009.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/ckadd_009/ckadd_009.spec /tmp/pipeline/ckadd_009/ckadd_009.c
+pipeline libbuild /tmp/pipeline/ckadd_009/ckadd_009.c /tmp/pipeline/ckadd_009/ckadd_009.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/ckadd_009/ckadd_009.so io /tmp/pipeline/ckadd_009/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/ckadd_009/ckadd_009.spec b/dep/pipeline/ckadd_009/ckadd_009.spec
new file mode 100644
index 00000000..a9a7db0b
--- /dev/null
+++ b/dep/pipeline/ckadd_009/ckadd_009.spec
@@ -0,0 +1,50 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ipv4 instanceof ipv4_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ ckadd h.ipv4.hdr_checksum h.ipv4
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/ckadd_009/ethdev.io b/dep/pipeline/ckadd_009/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/ckadd_009/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/ckadd_009/pcap_files/in_1.txt b/dep/pipeline/ckadd_009/pcap_files/in_1.txt
new file mode 100644
index 00000000..90fa5012
--- /dev/null
+++ b/dep/pipeline/ckadd_009/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 00 00 00 40 06 00 00 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/ckadd_009/pcap_files/out_1.txt b/dep/pipeline/ckadd_009/pcap_files/out_1.txt
new file mode 100644
index 00000000..cb800554
--- /dev/null
+++ b/dep/pipeline/ckadd_009/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 00 00 00 40 06 4e b6 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/ckadd_009/readme.md b/dep/pipeline/ckadd_009/readme.md
new file mode 100644
index 00000000..b2b3d611
--- /dev/null
+++ b/dep/pipeline/ckadd_009/readme.md
@@ -0,0 +1,26 @@
+Test Case: test_ckadd_009
+-------------------------
+
+ Instructions being tested:
+ ckadd h.field h.field
+
+ Description:
+ Send a packet with zero value in the ipv4 checksum field. For the received packet, calculate the ipv4 checksum and update
+ its checksum field with that value and transmit the packet back on the same port.
+
+ Verification:
+ For a packet received with zero value in its checksum field, its checksum field should be populated with the calculated
+ checksum value.
+
+ Input IPv4 Packet Details:
+ total length: 20 (ipv4 header) + 20 (tcp header) + 6 (payload) => 46 bytes
+
+ Input packet IPv4 header checksum calculation
+ Without checksum: 45 00 00 2e 00 00 00 00 40 06 00 00 64 00 00 0a c8 00 00 0a
+
+ Without checksum: 4500 002e 0000 0000 4006 0000 6400 000a c800 000a
+
+ Sum: 1 b148 => b149
+ Checksum: 4eb6
+
+ With checksum: 4500 002e 0000 0000 4006 4eb6 6400 000a c800 000a
diff --git a/dep/pipeline/ckadd_010/ckadd_010.cli b/dep/pipeline/ckadd_010/ckadd_010.cli
new file mode 100644
index 00000000..c1a4764a
--- /dev/null
+++ b/dep/pipeline/ckadd_010/ckadd_010.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/ckadd_010/ckadd_010.spec /tmp/pipeline/ckadd_010/ckadd_010.c
+pipeline libbuild /tmp/pipeline/ckadd_010/ckadd_010.c /tmp/pipeline/ckadd_010/ckadd_010.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/ckadd_010/ckadd_010.so io /tmp/pipeline/ckadd_010/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/ckadd_010/ckadd_010.spec b/dep/pipeline/ckadd_010/ckadd_010.spec
new file mode 100644
index 00000000..69d47e58
--- /dev/null
+++ b/dep/pipeline/ckadd_010/ckadd_010.spec
@@ -0,0 +1,51 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+ bit<32> dummy
+}
+
+header ipv4 instanceof ipv4_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ ckadd h.ipv4.hdr_checksum h.ipv4
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/ckadd_010/ethdev.io b/dep/pipeline/ckadd_010/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/ckadd_010/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/ckadd_010/pcap_files/in_1.txt b/dep/pipeline/ckadd_010/pcap_files/in_1.txt
new file mode 100644
index 00000000..d238cc49
--- /dev/null
+++ b/dep/pipeline/ckadd_010/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 00 00 00 40 06 00 00 64 00 00 0a c8 00
+000020 00 0a dd dd dd dd 00 64 00 c8 00 00 00 00 00 00
+000030 00 00 50 02 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/ckadd_010/pcap_files/out_1.txt b/dep/pipeline/ckadd_010/pcap_files/out_1.txt
new file mode 100644
index 00000000..553e7942
--- /dev/null
+++ b/dep/pipeline/ckadd_010/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 00 00 00 40 06 92 fa 64 00 00 0a c8 00
+000020 00 0a dd dd dd dd 00 64 00 c8 00 00 00 00 00 00
+000030 00 00 50 02 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/ckadd_010/readme.md b/dep/pipeline/ckadd_010/readme.md
new file mode 100644
index 00000000..ee3c5ceb
--- /dev/null
+++ b/dep/pipeline/ckadd_010/readme.md
@@ -0,0 +1,36 @@
+Test Case: test_ckadd_010
+-------------------------
+
+ Instructions being tested:
+ ckadd h.field h.hdr (h.hdr size not multiple of 20)
+
+ Description:
+ Send a packet with zero value in the ipv4 checksum field. For the received packet, calculate the ipv4 checksum
+ and update its checksum field with that value and transmit the packet back on the same port.
+
+ Verification:
+ For a packet received with zero value in its checksum field, its checksum field should be populated with the
+ calculated checksum value.
+
+ Input IPv4 Packet Details:
+ total length: 20 (ipv4 header) + 20 (tcp header) + 6 (payload) => 46 bytes
+
+ Input packet 1 IPv4 header checksum calculation
+ Without checksum: 45 00 00 2e 00 00 00 00 40 06 00 00 64 00 00 0a c8 00 00 0a dd dd dd dd
+
+ Without checksum: 4500 002e 0000 0000 4006 0000 6400 000a c800 000a dddd dddd
+
+ Sum: 3 6d02 => 6d05
+ Checksum: 92fa
+
+ With checksum: 4500 002e 0000 0000 4006 92fa 6400 000a c800 000a dddd dddd
+
+ Input packet 2 IPv4 header checksum calculation (if odd number of bytes are required to be checked at a later stage)
+ Without checksum: 45 00 00 2e 00 00 00 00 40 06 00 00 64 00 00 0a c8 00 00 0a dd dd dd
+
+ Without checksum: 4500 002e 0000 0000 4006 0000 6400 000a c800 000a dddd dd
+
+ Sum: 2 9002 => 9004
+ Checksum: 6ffb
+
+ With checksum: 4500 002e 0000 0000 4006 92fa 6400 000a c800 000a dddd dddd
diff --git a/dep/pipeline/cksub_001/cksub_001.cli b/dep/pipeline/cksub_001/cksub_001.cli
new file mode 100644
index 00000000..8099cfd5
--- /dev/null
+++ b/dep/pipeline/cksub_001/cksub_001.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/cksub_001/cksub_001.spec /tmp/pipeline/cksub_001/cksub_001.c
+pipeline libbuild /tmp/pipeline/cksub_001/cksub_001.c /tmp/pipeline/cksub_001/cksub_001.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/cksub_001/cksub_001.so io /tmp/pipeline/cksub_001/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/cksub_001/cksub_001.spec b/dep/pipeline/cksub_001/cksub_001.spec
new file mode 100644
index 00000000..f550aa7d
--- /dev/null
+++ b/dep/pipeline/cksub_001/cksub_001.spec
@@ -0,0 +1,76 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ipv4 instanceof ipv4_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table cksub_001 {
+ key {
+ }
+
+ actions {
+ drop
+ }
+
+ default_action drop args none const
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ jmpgt LABEL_0 h.ipv4.ttl 0x00
+ table cksub_001
+ LABEL_0 : cksub h.ipv4.hdr_checksum h.ipv4.ttl
+ sub h.ipv4.ttl 0x01
+ ckadd h.ipv4.hdr_checksum h.ipv4.ttl
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/cksub_001/ethdev.io b/dep/pipeline/cksub_001/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/cksub_001/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/cksub_001/pcap_files/in_1.txt b/dep/pipeline/cksub_001/pcap_files/in_1.txt
new file mode 100644
index 00000000..3d967084
--- /dev/null
+++ b/dep/pipeline/cksub_001/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 00 00 00 40 06 4e b6 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 00 00 00 00 06 4e b6 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/cksub_001/pcap_files/out_1.txt b/dep/pipeline/cksub_001/pcap_files/out_1.txt
new file mode 100644
index 00000000..eb0c5028
--- /dev/null
+++ b/dep/pipeline/cksub_001/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 00 00 00 3f 06 4f b6 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/cksub_001/readme.md b/dep/pipeline/cksub_001/readme.md
new file mode 100644
index 00000000..a4f7c3a4
--- /dev/null
+++ b/dep/pipeline/cksub_001/readme.md
@@ -0,0 +1,36 @@
+Test Case: test_ckadd_001
+-------------------------
+
+ Instructions being tested:
+ cksub h.field h.field
+
+ Description:
+ For ttl value equal to zero, discard the packet. For ttl greater than zero, decrement tha value by one and update
+ its checksum. Transmit the packet back on the same port.
+
+ Verification:
+ Packets with zero ttl should be discarded. For others the ttl should be decremented by one and checksum should be
+ updated accordingly.
+
+ Input IPv4 Packet Details:
+ total length: 20 (ipv4 header) + 20 (tcp header) + 6 (payload) => 46 bytes
+
+ Input packet IPv4 header checksum calculation
+ Without checksum: 45 00 00 2e 00 00 00 00 40 06 00 00 64 00 00 0a c8 00 00 0a
+
+ Without checksum: 4500 002e 0000 0000 4006 0000 6400 000a c800 000a
+
+ Sum: 1 b148 => b149
+ Checksum: 4eb6
+
+ With checksum: 4500 002e 0000 0000 4006 4eb6 6400 000a c800 000a
+
+ Output packet IPv4 header checksum calculation
+ Without checksum: 45 00 00 2e 00 00 00 00 3f 06 00 00 64 00 00 0a c8 00 00 0a
+
+ Without checksum: 4500 002e 0000 0000 3f06 0000 6400 000a c800 000a
+
+ Sum: 1 b048 => b049
+ Checksum: 4fb6
+
+ With checksum: 4500 002e 0001 2000 4006 4fb6 6400 000a c800 000a
diff --git a/dep/pipeline/direct_counter_001/direct_counter_001.cli b/dep/pipeline/direct_counter_001/direct_counter_001.cli
new file mode 100644
index 00000000..6c20977f
--- /dev/null
+++ b/dep/pipeline/direct_counter_001/direct_counter_001.cli
@@ -0,0 +1,21 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/direct_counter_001/direct_counter_001.spec /tmp/pipeline/direct_counter_001/direct_counter_001.c
+pipeline libbuild /tmp/pipeline/direct_counter_001/direct_counter_001.c /tmp/pipeline/direct_counter_001/direct_counter_001.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+pipeline PIPELINE0 build lib /tmp/pipeline/direct_counter_001/direct_counter_001.so io /tmp/pipeline/direct_counter_001/ethdev.io numa 0
+pipeline PIPELINE0 table direct_counter_001 add /tmp/pipeline/direct_counter_001/direct_counter_001.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/direct_counter_001/direct_counter_001.spec b/dep/pipeline/direct_counter_001/direct_counter_001.spec
new file mode 100644
index 00000000..110db055
--- /dev/null
+++ b/dep/pipeline/direct_counter_001/direct_counter_001.spec
@@ -0,0 +1,84 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> version_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_frag_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port
+ bit<32> table_entry_index
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+action direct_counter_001_action args none {
+ entryid m.table_entry_index
+ regadd REG_DIRECT_COUNTER_001 m.table_entry_index 1
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table direct_counter_001 {
+ key {
+ h.ipv4.dst_addr exact
+ }
+
+ actions {
+ direct_counter_001_action
+ drop
+ }
+
+ default_action drop args none
+ size 65536
+}
+
+// Define the register upfront for direct counter based on registers
+// The size of the register array is table size + 1 (for default entry)
+regarray REG_DIRECT_COUNTER_001 size 0x10001 initval 0
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ table direct_counter_001
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/direct_counter_001/direct_counter_001.txt b/dep/pipeline/direct_counter_001/direct_counter_001.txt
new file mode 100644
index 00000000..2252adf2
--- /dev/null
+++ b/dep/pipeline/direct_counter_001/direct_counter_001.txt
@@ -0,0 +1,2 @@
+match 0x0a0a0a01 action direct_counter_001_action
+match 0x0a0a0a02 action direct_counter_001_action
diff --git a/dep/pipeline/direct_counter_001/ethdev.io b/dep/pipeline/direct_counter_001/ethdev.io
new file mode 100644
index 00000000..50ea330a
--- /dev/null
+++ b/dep/pipeline/direct_counter_001/ethdev.io
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/direct_counter_001/pcap_files/in_1.txt b/dep/pipeline/direct_counter_001/pcap_files/in_1.txt
new file mode 100644
index 00000000..c9162a23
--- /dev/null
+++ b/dep/pipeline/direct_counter_001/pcap_files/in_1.txt
@@ -0,0 +1,22 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 01 01 01 01 0a 0a
+000020 0a 01 d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
+# Packet 1
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b8 01 01 01 01 0a 0a
+000020 0a 02 d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 eb be 00 00 66 63 69 57 4a 6a 44 41 47 39
+# Packet 2
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b7 01 01 01 01 0a 0a
+000020 0a 03 d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 c9 8b 00 00 43 44 4a 55 67 70 6e 56 64 71
diff --git a/dep/pipeline/direct_counter_001/pcap_files/out_1.txt b/dep/pipeline/direct_counter_001/pcap_files/out_1.txt
new file mode 100644
index 00000000..a37f1833
--- /dev/null
+++ b/dep/pipeline/direct_counter_001/pcap_files/out_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 01 01 01 01 0a 0a
+000020 0a 01 d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
+# Packet 1
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b8 01 01 01 01 0a 0a
+000020 0a 02 d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 eb be 00 00 66 63 69 57 4a 6a 44 41 47 39
diff --git a/dep/pipeline/direct_counter_001/readme.md b/dep/pipeline/direct_counter_001/readme.md
new file mode 100644
index 00000000..89e3a4cf
--- /dev/null
+++ b/dep/pipeline/direct_counter_001/readme.md
@@ -0,0 +1,22 @@
+Test Case: direct_counter_001
+-----------------------------
+
+Instruction being tested:
+ entryid m.table_entry_index
+
+Scenario being tested:
+ Regular table with a single parameter as a key
+
+Description:
+ Increment the counter [packet] value at specific index in the
+ register array. This register array is allocated for the specific
+ table to support table property "pna_direct_counter or
+ psa_direct_counter".
+ The 'entryid' instruction gets the index from the table lookup of
+ the current packet. This will identify the unique location in the
+ register array to maintain the counter for the table entry that
+ is hit.
+
+Verification:
+ Read the VALUE from the CLI with table entry information and it
+ should match the number that each entry in the table hit.
diff --git a/dep/pipeline/direct_counter_002/direct_counter_002.cli b/dep/pipeline/direct_counter_002/direct_counter_002.cli
new file mode 100644
index 00000000..419e4f86
--- /dev/null
+++ b/dep/pipeline/direct_counter_002/direct_counter_002.cli
@@ -0,0 +1,21 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/direct_counter_002/direct_counter_002.spec /tmp/pipeline/direct_counter_002/direct_counter_002.c
+pipeline libbuild /tmp/pipeline/direct_counter_002/direct_counter_002.c /tmp/pipeline/direct_counter_002/direct_counter_002.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+pipeline PIPELINE0 build lib /tmp/pipeline/direct_counter_002/direct_counter_002.so io /tmp/pipeline/direct_counter_002/ethdev.io numa 0
+pipeline PIPELINE0 table direct_counter_002 add /tmp/pipeline/direct_counter_002/direct_counter_002.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/direct_counter_002/direct_counter_002.spec b/dep/pipeline/direct_counter_002/direct_counter_002.spec
new file mode 100644
index 00000000..356400b7
--- /dev/null
+++ b/dep/pipeline/direct_counter_002/direct_counter_002.spec
@@ -0,0 +1,89 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> version_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_frag_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port
+ bit<32> ipv4_src_addr
+ bit<32> ipv4_dst_addr
+ bit<32> table_entry_index
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+action direct_counter_002_action args none {
+ entryid m.table_entry_index
+ regadd REG_DIRECT_COUNTER_002 m.table_entry_index 1
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table direct_counter_002 {
+ key {
+ m.ipv4_src_addr exact
+ m.ipv4_dst_addr exact
+ }
+
+ actions {
+ direct_counter_002_action
+ drop
+ }
+
+ default_action drop args none
+ size 65536
+}
+
+// Define the register upfront for direct counter based on registers
+// The size of the register array is table size + 1 (for default entry)
+regarray REG_DIRECT_COUNTER_002 size 0x10001 initval 0
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ mov m.ipv4_src_addr h.ipv4.src_addr
+ mov m.ipv4_dst_addr h.ipv4.dst_addr
+ table direct_counter_002
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/direct_counter_002/direct_counter_002.txt b/dep/pipeline/direct_counter_002/direct_counter_002.txt
new file mode 100644
index 00000000..31fbdffa
--- /dev/null
+++ b/dep/pipeline/direct_counter_002/direct_counter_002.txt
@@ -0,0 +1,2 @@
+match 0x01010101 0x0a0a0a01 action direct_counter_002_action
+match 0x02020202 0x0a0a0a02 action direct_counter_002_action
diff --git a/dep/pipeline/direct_counter_002/ethdev.io b/dep/pipeline/direct_counter_002/ethdev.io
new file mode 100644
index 00000000..50ea330a
--- /dev/null
+++ b/dep/pipeline/direct_counter_002/ethdev.io
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/direct_counter_002/pcap_files/in_1.txt b/dep/pipeline/direct_counter_002/pcap_files/in_1.txt
new file mode 100644
index 00000000..a2a50ea3
--- /dev/null
+++ b/dep/pipeline/direct_counter_002/pcap_files/in_1.txt
@@ -0,0 +1,22 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 01 01 01 01 0a 0a
+000020 0a 01 d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
+# Packet 1
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b8 02 02 02 02 0a 0a
+000020 0a 02 d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 eb be 00 00 66 63 69 57 4a 6a 44 41 47 39
+# Packet 2
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b7 01 01 01 01 0a 0a
+000020 0a 03 d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 c9 8b 00 00 43 44 4a 55 67 70 6e 56 64 71
diff --git a/dep/pipeline/direct_counter_002/pcap_files/out_1.txt b/dep/pipeline/direct_counter_002/pcap_files/out_1.txt
new file mode 100644
index 00000000..7040e8dd
--- /dev/null
+++ b/dep/pipeline/direct_counter_002/pcap_files/out_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 01 01 01 01 0a 0a
+000020 0a 01 d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
+# Packet 1
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b8 02 02 02 02 0a 0a
+000020 0a 02 d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 eb be 00 00 66 63 69 57 4a 6a 44 41 47 39
diff --git a/dep/pipeline/direct_counter_002/readme.md b/dep/pipeline/direct_counter_002/readme.md
new file mode 100644
index 00000000..ecbafc75
--- /dev/null
+++ b/dep/pipeline/direct_counter_002/readme.md
@@ -0,0 +1,23 @@
+Test Case: direct_counter_002
+-----------------------------
+
+Instruction being tested:
+ entryid m.table_entry_index
+
+Scenario being tested:
+ Regular table with a multiple parameters as a key.
+ The key structure is metadata.
+
+Description:
+ Increment the counter [packet] value at specific index in the
+ register array. This register array is allocated for the specific
+ table to support table property "pna_direct_counter or
+ psa_direct_counter".
+ The 'entryid' instruction gets the index from the table lookup of
+ the current packet. This will identify the unique location in the
+ register array to maintain the counter for the table entry that
+ is hit.
+
+Verification:
+ Read the VALUE from the CLI with table entry information and it
+ should match the number that each entry in the table hit.
diff --git a/dep/pipeline/direct_counter_003/direct_counter_003.cli b/dep/pipeline/direct_counter_003/direct_counter_003.cli
new file mode 100644
index 00000000..255ca700
--- /dev/null
+++ b/dep/pipeline/direct_counter_003/direct_counter_003.cli
@@ -0,0 +1,21 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/direct_counter_003/direct_counter_003.spec /tmp/pipeline/direct_counter_003/direct_counter_003.c
+pipeline libbuild /tmp/pipeline/direct_counter_003/direct_counter_003.c /tmp/pipeline/direct_counter_003/direct_counter_003.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+pipeline PIPELINE0 build lib /tmp/pipeline/direct_counter_003/direct_counter_003.so io /tmp/pipeline/direct_counter_003/ethdev.io numa 0
+pipeline PIPELINE0 table direct_counter_003 add /tmp/pipeline/direct_counter_003/direct_counter_003.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/direct_counter_003/direct_counter_003.spec b/dep/pipeline/direct_counter_003/direct_counter_003.spec
new file mode 100644
index 00000000..f5a2e0f6
--- /dev/null
+++ b/dep/pipeline/direct_counter_003/direct_counter_003.spec
@@ -0,0 +1,86 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> version_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_frag_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port
+ bit<32> table_entry_index
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+action direct_counter_003_action args none {
+ entryid m.table_entry_index
+ regadd REG_DIRECT_COUNTER_003 m.table_entry_index 1
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table direct_counter_003 {
+ key {
+ h.ipv4.dst_addr exact
+ h.ipv4.protocol exact
+ h.ipv4.src_addr exact
+ }
+
+ actions {
+ direct_counter_003_action
+ drop
+ }
+
+ default_action drop args none
+ size 65536
+}
+
+// Define the register upfront for direct counter based on registers
+// The size of the register array is table size + 1 (for default entry)
+regarray REG_DIRECT_COUNTER_003 size 0x10001 initval 0
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ table direct_counter_003
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/direct_counter_003/direct_counter_003.txt b/dep/pipeline/direct_counter_003/direct_counter_003.txt
new file mode 100644
index 00000000..f02efc95
--- /dev/null
+++ b/dep/pipeline/direct_counter_003/direct_counter_003.txt
@@ -0,0 +1,2 @@
+match 0x0a0a0a01 0x06 0x01010101 action direct_counter_003_action
+match 0x0a0a0a02 0x06 0x02020202 action direct_counter_003_action
diff --git a/dep/pipeline/direct_counter_003/ethdev.io b/dep/pipeline/direct_counter_003/ethdev.io
new file mode 100644
index 00000000..50ea330a
--- /dev/null
+++ b/dep/pipeline/direct_counter_003/ethdev.io
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/direct_counter_003/pcap_files/in_1.txt b/dep/pipeline/direct_counter_003/pcap_files/in_1.txt
new file mode 100644
index 00000000..a2a50ea3
--- /dev/null
+++ b/dep/pipeline/direct_counter_003/pcap_files/in_1.txt
@@ -0,0 +1,22 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 01 01 01 01 0a 0a
+000020 0a 01 d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
+# Packet 1
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b8 02 02 02 02 0a 0a
+000020 0a 02 d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 eb be 00 00 66 63 69 57 4a 6a 44 41 47 39
+# Packet 2
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b7 01 01 01 01 0a 0a
+000020 0a 03 d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 c9 8b 00 00 43 44 4a 55 67 70 6e 56 64 71
diff --git a/dep/pipeline/direct_counter_003/pcap_files/out_1.txt b/dep/pipeline/direct_counter_003/pcap_files/out_1.txt
new file mode 100644
index 00000000..7040e8dd
--- /dev/null
+++ b/dep/pipeline/direct_counter_003/pcap_files/out_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 01 01 01 01 0a 0a
+000020 0a 01 d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
+# Packet 1
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b8 02 02 02 02 0a 0a
+000020 0a 02 d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 eb be 00 00 66 63 69 57 4a 6a 44 41 47 39
diff --git a/dep/pipeline/direct_counter_003/readme.md b/dep/pipeline/direct_counter_003/readme.md
new file mode 100644
index 00000000..f59a1658
--- /dev/null
+++ b/dep/pipeline/direct_counter_003/readme.md
@@ -0,0 +1,23 @@
+Test Case: direct_counter_003
+-----------------------------
+
+Instruction being tested:
+ entryid m.table_entry_index
+
+Scenario being tested:
+ Regular table with a multiple parameters as a key.
+ The key structure is header and key alignment is non-contiguous.
+
+Description:
+ Increment the counter [packet] value at specific index in the
+ register array. This register array is allocated for the specific
+ table to support table property "pna_direct_counter or
+ psa_direct_counter".
+ The 'entryid' instruction gets the index from the table lookup of
+ the current packet. This will identify the unique location in the
+ register array to maintain the counter for the table entry that
+ is hit.
+
+Verification:
+ Read the VALUE from the CLI with table entry information and it
+ should match the number that each entry in the table hit.
diff --git a/dep/pipeline/direct_counter_004/direct_counter_004.cli b/dep/pipeline/direct_counter_004/direct_counter_004.cli
new file mode 100644
index 00000000..e623d20d
--- /dev/null
+++ b/dep/pipeline/direct_counter_004/direct_counter_004.cli
@@ -0,0 +1,21 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/direct_counter_004/direct_counter_004.spec /tmp/pipeline/direct_counter_004/direct_counter_004.c
+pipeline libbuild /tmp/pipeline/direct_counter_004/direct_counter_004.c /tmp/pipeline/direct_counter_004/direct_counter_004.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+pipeline PIPELINE0 build lib /tmp/pipeline/direct_counter_004/direct_counter_004.so io /tmp/pipeline/direct_counter_004/ethdev.io numa 0
+pipeline PIPELINE0 table direct_counter_004 add /tmp/pipeline/direct_counter_004/direct_counter_004.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/direct_counter_004/direct_counter_004.spec b/dep/pipeline/direct_counter_004/direct_counter_004.spec
new file mode 100644
index 00000000..39e5edeb
--- /dev/null
+++ b/dep/pipeline/direct_counter_004/direct_counter_004.spec
@@ -0,0 +1,85 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> version_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_frag_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port
+ bit<32> table_entry_index
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+action direct_counter_004_action args none {
+ entryid m.table_entry_index
+ regadd REG_DIRECT_COUNTER_004 m.table_entry_index 1
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table direct_counter_004 {
+ key {
+ h.ipv4.src_addr exact
+ h.ipv4.dst_addr exact
+ }
+
+ actions {
+ direct_counter_004_action
+ drop
+ }
+
+ default_action drop args none
+ size 16
+}
+
+// Define the register upfront for direct counter based on registers
+// The size of the register array is table size + 1 (for default entry)
+regarray REG_DIRECT_COUNTER_004 size 0x11 initval 0
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ table direct_counter_004
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/direct_counter_004/direct_counter_004.txt b/dep/pipeline/direct_counter_004/direct_counter_004.txt
new file mode 100644
index 00000000..f44e7550
--- /dev/null
+++ b/dep/pipeline/direct_counter_004/direct_counter_004.txt
@@ -0,0 +1,16 @@
+match 0x00000000 0x0a0a0a00 action direct_counter_004_action
+match 0x01010101 0x0a0a0a01 action direct_counter_004_action
+match 0x02020202 0x0a0a0a02 action direct_counter_004_action
+match 0x03030303 0x0a0a0a03 action direct_counter_004_action
+match 0x04040404 0x0a0a0a04 action direct_counter_004_action
+match 0x05050505 0x0a0a0a05 action direct_counter_004_action
+match 0x06060606 0x0a0a0a06 action direct_counter_004_action
+match 0x07070707 0x0a0a0a07 action direct_counter_004_action
+match 0x08080808 0x0a0a0a08 action direct_counter_004_action
+match 0x09090909 0x0a0a0a09 action direct_counter_004_action
+match 0x0a0a0a0a 0x0a0a0a0a action direct_counter_004_action
+match 0x0b0b0b0b 0x0a0a0a0b action direct_counter_004_action
+match 0x0c0c0c0c 0x0a0a0a0c action direct_counter_004_action
+match 0x0d0d0d0d 0x0a0a0a0d action direct_counter_004_action
+match 0x0e0e0e0e 0x0a0a0a0e action direct_counter_004_action
+match 0x0f0f0f0f 0x0a0a0a0f action direct_counter_004_action
diff --git a/dep/pipeline/direct_counter_004/ethdev.io b/dep/pipeline/direct_counter_004/ethdev.io
new file mode 100644
index 00000000..50ea330a
--- /dev/null
+++ b/dep/pipeline/direct_counter_004/ethdev.io
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/direct_counter_004/pcap_files/in_1.txt b/dep/pipeline/direct_counter_004/pcap_files/in_1.txt
new file mode 100644
index 00000000..7a1b7c90
--- /dev/null
+++ b/dep/pipeline/direct_counter_004/pcap_files/in_1.txt
@@ -0,0 +1,27 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 00 00 00 00 0a 0a
+000020 0a 00 d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
+# Packet 1
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 01 01 01 01 0a 0a
+000020 0a 01 d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
+# Packet 2
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 02 02 02 02 0a 0a
+000020 0a 02 d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
+# Packet 3
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 03 03 03 03 0a 0a
+000020 0a 03 d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
diff --git a/dep/pipeline/direct_counter_004/pcap_files/in_2.txt b/dep/pipeline/direct_counter_004/pcap_files/in_2.txt
new file mode 100644
index 00000000..6893e269
--- /dev/null
+++ b/dep/pipeline/direct_counter_004/pcap_files/in_2.txt
@@ -0,0 +1,27 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 04 04 04 04 0a 0a
+000020 0a 04 d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
+# Packet 1
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 05 05 05 05 0a 0a
+000020 0a 05 d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
+# Packet 2
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 06 06 06 06 0a 0a
+000020 0a 06 d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
+# Packet 3
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 07 07 07 07 0a 0a
+000020 0a 07 d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
diff --git a/dep/pipeline/direct_counter_004/pcap_files/in_3.txt b/dep/pipeline/direct_counter_004/pcap_files/in_3.txt
new file mode 100644
index 00000000..d1d526fe
--- /dev/null
+++ b/dep/pipeline/direct_counter_004/pcap_files/in_3.txt
@@ -0,0 +1,27 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 08 08 08 08 0a 0a
+000020 0a 08 d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
+# Packet 1
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 09 09 09 09 0a 0a
+000020 0a 09 d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
+# Packet 2
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 0a 0a 0a 0a 0a 0a
+000020 0a 0a d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
+# Packet 3
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 0b 0b 0b 0b 0a 0a
+000020 0a 0b d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
diff --git a/dep/pipeline/direct_counter_004/pcap_files/in_4.txt b/dep/pipeline/direct_counter_004/pcap_files/in_4.txt
new file mode 100644
index 00000000..b0e70358
--- /dev/null
+++ b/dep/pipeline/direct_counter_004/pcap_files/in_4.txt
@@ -0,0 +1,27 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 0c 0c 0c 0c 0a 0a
+000020 0a 0c d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
+# Packet 1
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 0d 0d 0d 0d 0a 0a
+000020 0a 0d d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
+# Packet 2
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 0e 0e 0e 0e 0a 0a
+000020 0a 0e d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
+# Packet 3
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 0f 0f 0f 0f 0a 0a
+000020 0a 0f d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
diff --git a/dep/pipeline/direct_counter_004/pcap_files/out_1.txt b/dep/pipeline/direct_counter_004/pcap_files/out_1.txt
new file mode 100644
index 00000000..7a1b7c90
--- /dev/null
+++ b/dep/pipeline/direct_counter_004/pcap_files/out_1.txt
@@ -0,0 +1,27 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 00 00 00 00 0a 0a
+000020 0a 00 d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
+# Packet 1
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 01 01 01 01 0a 0a
+000020 0a 01 d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
+# Packet 2
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 02 02 02 02 0a 0a
+000020 0a 02 d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
+# Packet 3
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 03 03 03 03 0a 0a
+000020 0a 03 d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
diff --git a/dep/pipeline/direct_counter_004/pcap_files/out_2.txt b/dep/pipeline/direct_counter_004/pcap_files/out_2.txt
new file mode 100644
index 00000000..6893e269
--- /dev/null
+++ b/dep/pipeline/direct_counter_004/pcap_files/out_2.txt
@@ -0,0 +1,27 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 04 04 04 04 0a 0a
+000020 0a 04 d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
+# Packet 1
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 05 05 05 05 0a 0a
+000020 0a 05 d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
+# Packet 2
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 06 06 06 06 0a 0a
+000020 0a 06 d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
+# Packet 3
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 07 07 07 07 0a 0a
+000020 0a 07 d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
diff --git a/dep/pipeline/direct_counter_004/pcap_files/out_3.txt b/dep/pipeline/direct_counter_004/pcap_files/out_3.txt
new file mode 100644
index 00000000..d1d526fe
--- /dev/null
+++ b/dep/pipeline/direct_counter_004/pcap_files/out_3.txt
@@ -0,0 +1,27 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 08 08 08 08 0a 0a
+000020 0a 08 d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
+# Packet 1
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 09 09 09 09 0a 0a
+000020 0a 09 d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
+# Packet 2
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 0a 0a 0a 0a 0a 0a
+000020 0a 0a d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
+# Packet 3
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 0b 0b 0b 0b 0a 0a
+000020 0a 0b d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
diff --git a/dep/pipeline/direct_counter_004/pcap_files/out_4.txt b/dep/pipeline/direct_counter_004/pcap_files/out_4.txt
new file mode 100644
index 00000000..b0e70358
--- /dev/null
+++ b/dep/pipeline/direct_counter_004/pcap_files/out_4.txt
@@ -0,0 +1,27 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 0c 0c 0c 0c 0a 0a
+000020 0a 0c d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
+# Packet 1
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 0d 0d 0d 0d 0a 0a
+000020 0a 0d d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
+# Packet 2
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 0e 0e 0e 0e 0a 0a
+000020 0a 0e d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
+# Packet 3
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 0f 0f 0f 0f 0a 0a
+000020 0a 0f d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
diff --git a/dep/pipeline/direct_counter_004/readme.md b/dep/pipeline/direct_counter_004/readme.md
new file mode 100644
index 00000000..ed92dd06
--- /dev/null
+++ b/dep/pipeline/direct_counter_004/readme.md
@@ -0,0 +1,24 @@
+Test Case: direct_counter_004
+-----------------------------
+
+Instruction being tested:
+ entryid m.table_entry_index
+
+Scenario being tested:
+ Regular table with a multiple parameters as a key.
+ The table has a fixed size of 16 with 16 match action
+ rules being applied.
+
+Description:
+ Increment the counter [packet] value at specific index in the
+ register array. This register array is allocated for the specific
+ table to support table property "pna_direct_counter or
+ psa_direct_counter".
+ The 'entryid' instruction gets the index from the table lookup of
+ the current packet. This will identify the unique location in the
+ register array to maintain the counter for the table entry that
+ is hit.
+
+Verification:
+ Read the VALUE from the CLI with table entry information and it
+ should match the number that each entry in the table hit.
diff --git a/dep/pipeline/direct_counter_005/direct_counter_005.cli b/dep/pipeline/direct_counter_005/direct_counter_005.cli
new file mode 100644
index 00000000..791a8de3
--- /dev/null
+++ b/dep/pipeline/direct_counter_005/direct_counter_005.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/direct_counter_005/direct_counter_005.spec /tmp/pipeline/direct_counter_005/direct_counter_005.c
+pipeline libbuild /tmp/pipeline/direct_counter_005/direct_counter_005.c /tmp/pipeline/direct_counter_005/direct_counter_005.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+pipeline PIPELINE0 build lib /tmp/pipeline/direct_counter_005/direct_counter_005.so io /tmp/pipeline/direct_counter_005/ethdev.io numa 0
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/direct_counter_005/direct_counter_005.spec b/dep/pipeline/direct_counter_005/direct_counter_005.spec
new file mode 100644
index 00000000..9ce15622
--- /dev/null
+++ b/dep/pipeline/direct_counter_005/direct_counter_005.spec
@@ -0,0 +1,100 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> version_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_frag_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port
+ bit<32> ipv4_src_addr
+ bit<32> ipv4_dst_addr
+ bit<32> table_entry_index
+ bit<32> timeout_id
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+action direct_counter_005_action args none {
+ entryid m.table_entry_index
+ regadd REG_DIRECT_COUNTER_005 m.table_entry_index 1
+ return
+}
+
+action drop args none {
+ jmpneq DROP m.ipv4_src_addr 0x01010101
+ jmpneq DROP m.ipv4_dst_addr 0x0a0a0a01
+ mov m.timeout_id 0
+ learn direct_counter_005_action m.timeout_id
+ DROP : drop
+}
+
+//
+// Tables.
+//
+learner direct_counter_005 {
+ key {
+ m.ipv4_src_addr
+ m.ipv4_dst_addr
+ }
+
+ actions {
+ direct_counter_005_action
+ drop
+ }
+
+ default_action drop args none
+
+ timeout {
+ 60
+ 120
+ 180
+ }
+
+ size 16
+}
+
+// Define the register upfront for direct counter based on registers
+regarray REG_DIRECT_COUNTER_005 size 0x10 initval 0
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ mov m.ipv4_src_addr h.ipv4.src_addr
+ mov m.ipv4_dst_addr h.ipv4.dst_addr
+ table direct_counter_005
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/direct_counter_005/ethdev.io b/dep/pipeline/direct_counter_005/ethdev.io
new file mode 100644
index 00000000..50ea330a
--- /dev/null
+++ b/dep/pipeline/direct_counter_005/ethdev.io
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/direct_counter_005/pcap_files/in_1.txt b/dep/pipeline/direct_counter_005/pcap_files/in_1.txt
new file mode 100644
index 00000000..25e0dfcd
--- /dev/null
+++ b/dep/pipeline/direct_counter_005/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 01 01 01 01 0a 0a
+000020 0a 01 d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
diff --git a/dep/pipeline/direct_counter_005/pcap_files/out_1.txt b/dep/pipeline/direct_counter_005/pcap_files/out_1.txt
new file mode 100644
index 00000000..af0fc303
--- /dev/null
+++ b/dep/pipeline/direct_counter_005/pcap_files/out_1.txt
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
diff --git a/dep/pipeline/direct_counter_005/pcap_files/out_2.txt b/dep/pipeline/direct_counter_005/pcap_files/out_2.txt
new file mode 100644
index 00000000..25e0dfcd
--- /dev/null
+++ b/dep/pipeline/direct_counter_005/pcap_files/out_2.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 01 01 01 01 0a 0a
+000020 0a 01 d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
diff --git a/dep/pipeline/direct_counter_005/readme.md b/dep/pipeline/direct_counter_005/readme.md
new file mode 100644
index 00000000..9f065df9
--- /dev/null
+++ b/dep/pipeline/direct_counter_005/readme.md
@@ -0,0 +1,24 @@
+Test Case: direct_counter_005
+-----------------------------
+
+Instruction being tested:
+ entryid m.table_entry_index
+
+Scenario being tested:
+ Learner table with a multiple parameters as a key.
+ The key structure is metadata.
+
+Description:
+ Increment the counter (packet) value at specific index in the
+ register array. This register array is allocated for the specific
+ table to support table property "pna_direct_counter or
+ psa_direct_counter".
+ The 'entryid' instruction gets the index from the table lookup of
+ the current packet. This will identify the unique location in the
+ register array to maintain the counter for the table entry that
+ is hit.
+
+Verification:
+ Read the VALUE from the CLI with register index (Table entry as
+ a key is not available in CLI for learner table) and it should
+ match the number that an entry in the table hit.
diff --git a/dep/pipeline/direct_meter_001/direct_meter_001.cli b/dep/pipeline/direct_meter_001/direct_meter_001.cli
new file mode 100644
index 00000000..38c11173
--- /dev/null
+++ b/dep/pipeline/direct_meter_001/direct_meter_001.cli
@@ -0,0 +1,23 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/direct_meter_001/direct_meter_001.spec /tmp/pipeline/direct_meter_001/direct_meter_001.c
+pipeline libbuild /tmp/pipeline/direct_meter_001/direct_meter_001.c /tmp/pipeline/direct_meter_001/direct_meter_001.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+pipeline PIPELINE0 build lib /tmp/pipeline/direct_meter_001/direct_meter_001.so io /tmp/pipeline/direct_meter_001/ethdev.io numa 0
+pipeline PIPELINE0 meter profile platinum add cir 8 pir 16 cbs 8 pbs 16
+pipeline PIPELINE0 table direct_meter_001 add /tmp/pipeline/direct_meter_001/direct_meter_001.txt
+pipeline PIPELINE0 commit
+
+pipeline PIPELINE0 meter MET_DIRECT_METER_001 set profile platinum table direct_meter_001 match 0x01010101 0x0a0a0a01
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/direct_meter_001/direct_meter_001.spec b/dep/pipeline/direct_meter_001/direct_meter_001.spec
new file mode 100644
index 00000000..31a2bf27
--- /dev/null
+++ b/dep/pipeline/direct_meter_001/direct_meter_001.spec
@@ -0,0 +1,89 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> version_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_frag_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port
+ bit<32> table_entry_index
+ bit<32> count_packet
+ bit<32> color_in
+ bit<32> color_out
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+action direct_meter_001_action args none {
+ entryid m.table_entry_index
+ mov m.count_packet 1
+ mov m.color_in 0
+ meter MET_DIRECT_METER_001 m.table_entry_index m.count_packet m.color_in m.color_out
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table direct_meter_001 {
+ key {
+ h.ipv4.src_addr exact
+ h.ipv4.dst_addr exact
+ }
+
+ actions {
+ direct_meter_001_action
+ drop
+ }
+
+ default_action drop args none
+ size 65536
+}
+
+// Direct meter reference for the table direct_meter_001
+metarray MET_DIRECT_METER_001 size 0x10001
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ table direct_meter_001
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/direct_meter_001/direct_meter_001.txt b/dep/pipeline/direct_meter_001/direct_meter_001.txt
new file mode 100644
index 00000000..70855149
--- /dev/null
+++ b/dep/pipeline/direct_meter_001/direct_meter_001.txt
@@ -0,0 +1 @@
+match 0x01010101 0x0a0a0a01 action direct_meter_001_action
\ No newline at end of file
diff --git a/dep/pipeline/direct_meter_001/ethdev.io b/dep/pipeline/direct_meter_001/ethdev.io
new file mode 100644
index 00000000..50ea330a
--- /dev/null
+++ b/dep/pipeline/direct_meter_001/ethdev.io
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/direct_meter_001/pcap_files/in_1.txt b/dep/pipeline/direct_meter_001/pcap_files/in_1.txt
new file mode 100644
index 00000000..bd861a6c
--- /dev/null
+++ b/dep/pipeline/direct_meter_001/pcap_files/in_1.txt
@@ -0,0 +1,49 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 01 01 01 01 0a 0a
+000020 0a 01 d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
+# Packet 1
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 01 01 01 01 0a 0a
+000020 0a 01 d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
+# Packet 2
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 01 01 01 01 0a 0a
+000020 0a 01 d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
+# Packet 3
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 01 01 01 01 0a 0a
+000020 0a 01 d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000020 0a 01 d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
+# Packet 4
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 01 01 01 01 0a 0a
+000020 0a 01 d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
+# Packet 5
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 01 01 01 01 0a 0a
+000020 0a 01 d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
+# Packet 6
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 01 01 01 01 0a 0a
+000020 0a 01 d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
+# Packet 7
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 01 01 01 01 0a 0a
+000020 0a 01 d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000020 0a 01 d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
\ No newline at end of file
diff --git a/dep/pipeline/direct_meter_001/readme.md b/dep/pipeline/direct_meter_001/readme.md
new file mode 100644
index 00000000..d71f9491
--- /dev/null
+++ b/dep/pipeline/direct_meter_001/readme.md
@@ -0,0 +1,23 @@
+Test Case: direct_meter_001
+-----------------------------
+
+Instruction being tested:
+ entryid m.table_entry_index
+
+Scenario being tested:
+ Regular table with multiple parameters as a key.
+ The key structure is header.
+
+Description:
+ Increment the meter (packet count) value at specific index in
+ the meter array. This meter array is allocated for the specific
+ table to support table property "pna_direct_meter or
+ psa_direct_meter".
+ The 'entryid' instruction gets the index from the table lookup
+ of the current packet. This will identify the unique location
+ in the meter array to maintain the meter stats for the table
+ entry that is hit.
+
+Verification:
+ Read the VALUE from the CLI with table entry information and it
+ should match the meter stats that each entry in the table hit.
diff --git a/dep/pipeline/direct_meter_002/direct_meter_002.cli b/dep/pipeline/direct_meter_002/direct_meter_002.cli
new file mode 100644
index 00000000..5387a66c
--- /dev/null
+++ b/dep/pipeline/direct_meter_002/direct_meter_002.cli
@@ -0,0 +1,23 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/direct_meter_002/direct_meter_002.spec /tmp/pipeline/direct_meter_002/direct_meter_002.c
+pipeline libbuild /tmp/pipeline/direct_meter_002/direct_meter_002.c /tmp/pipeline/direct_meter_002/direct_meter_002.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+pipeline PIPELINE0 build lib /tmp/pipeline/direct_meter_002/direct_meter_002.so io /tmp/pipeline/direct_meter_002/ethdev.io numa 0
+pipeline PIPELINE0 meter profile platinum add cir 400 pir 800 cbs 400 pbs 800
+pipeline PIPELINE0 table direct_meter_002 add /tmp/pipeline/direct_meter_002/direct_meter_002.txt
+pipeline PIPELINE0 commit
+
+pipeline PIPELINE0 meter MET_DIRECT_METER_002 set profile platinum table direct_meter_002 match 0x0a0a0a01 0x06 0x01010101
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/direct_meter_002/direct_meter_002.spec b/dep/pipeline/direct_meter_002/direct_meter_002.spec
new file mode 100644
index 00000000..14ae0710
--- /dev/null
+++ b/dep/pipeline/direct_meter_002/direct_meter_002.spec
@@ -0,0 +1,94 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> version_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_frag_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port
+ bit<32> ipv4_src_addr
+ bit<32> ipv4_dst_addr
+ bit<8> ipv4_protocol
+ bit<32> table_entry_index
+ bit<32> color_in
+ bit<32> color_out
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+action direct_meter_002_action args none {
+ entryid m.table_entry_index
+ mov m.color_in 0
+ meter MET_DIRECT_METER_002 m.table_entry_index h.ipv4.total_len m.color_in m.color_out
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table direct_meter_002 {
+ key {
+ m.ipv4_dst_addr exact
+ m.ipv4_protocol exact
+ m.ipv4_src_addr exact
+ }
+
+ actions {
+ direct_meter_002_action
+ drop
+ }
+
+ default_action drop args none
+ size 65536
+}
+
+// Direct meter reference for the table direct_meter_002
+metarray MET_DIRECT_METER_002 size 0x10001
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ mov m.ipv4_dst_addr h.ipv4.dst_addr
+ mov m.ipv4_protocol h.ipv4.protocol
+ mov m.ipv4_src_addr h.ipv4.src_addr
+ table direct_meter_002
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
\ No newline at end of file
diff --git a/dep/pipeline/direct_meter_002/direct_meter_002.txt b/dep/pipeline/direct_meter_002/direct_meter_002.txt
new file mode 100644
index 00000000..5cb32e8e
--- /dev/null
+++ b/dep/pipeline/direct_meter_002/direct_meter_002.txt
@@ -0,0 +1 @@
+match 0x0a0a0a01 0x06 0x01010101 action direct_meter_002_action
\ No newline at end of file
diff --git a/dep/pipeline/direct_meter_002/ethdev.io b/dep/pipeline/direct_meter_002/ethdev.io
new file mode 100644
index 00000000..50ea330a
--- /dev/null
+++ b/dep/pipeline/direct_meter_002/ethdev.io
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/direct_meter_002/pcap_files/in_1.txt b/dep/pipeline/direct_meter_002/pcap_files/in_1.txt
new file mode 100644
index 00000000..cc39ddbb
--- /dev/null
+++ b/dep/pipeline/direct_meter_002/pcap_files/in_1.txt
@@ -0,0 +1,47 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 01 01 01 01 0a 0a
+000020 0a 01 d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
+# Packet 1
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 01 01 01 01 0a 0a
+000020 0a 01 d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
+# Packet 2
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 01 01 01 01 0a 0a
+000020 0a 01 d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
+# Packet 3
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 01 01 01 01 0a 0a
+000020 0a 01 d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
+# Packet 4
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 01 01 01 01 0a 0a
+000020 0a 01 d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
+# Packet 5
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 01 01 01 01 0a 0a
+000020 0a 01 d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
+# Packet 6
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 01 01 01 01 0a 0a
+000020 0a 01 d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
+# Packet 7
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 01 01 01 01 0a 0a
+000020 0a 01 d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
\ No newline at end of file
diff --git a/dep/pipeline/direct_meter_002/readme.md b/dep/pipeline/direct_meter_002/readme.md
new file mode 100644
index 00000000..16d40770
--- /dev/null
+++ b/dep/pipeline/direct_meter_002/readme.md
@@ -0,0 +1,24 @@
+Test Case: direct_meter_002
+-----------------------------
+
+Instruction being tested:
+ entryid m.table_entry_index
+
+Scenario being tested:
+ Regular table with a multiple parameters as a key.
+ The key structure is metadata, with key elements
+ are in non-consecutive order.
+
+Description:
+ Increment the meter value (bytes in ipv4 packet length) at specific
+ index in the meter array. This meter array is allocated for the
+ specific table to support table property "pna_direct_meter or
+ psa_direct_meter".
+ The 'entryid' instruction gets the index from the table lookup
+ of the current packet. This will identify the unique location in
+ the meter array to maintain the meter stats for the table entry
+ that is hit.
+
+Verification:
+ Read the VALUE from the CLI with table entry information and it
+ should match the meter stats that each entry in the table hit.
\ No newline at end of file
diff --git a/dep/pipeline/direct_meter_003/direct_meter_003.cli b/dep/pipeline/direct_meter_003/direct_meter_003.cli
new file mode 100644
index 00000000..2df9859d
--- /dev/null
+++ b/dep/pipeline/direct_meter_003/direct_meter_003.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/direct_meter_003/direct_meter_003.spec /tmp/pipeline/direct_meter_003/direct_meter_003.c
+pipeline libbuild /tmp/pipeline/direct_meter_003/direct_meter_003.c /tmp/pipeline/direct_meter_003/direct_meter_003.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+pipeline PIPELINE0 build lib /tmp/pipeline/direct_meter_003/direct_meter_003.so io /tmp/pipeline/direct_meter_003/ethdev.io numa 0
+pipeline PIPELINE0 meter profile platinum add cir 8 pir 16 cbs 8 pbs 16
+pipeline PIPELINE0 commit
+
+pipeline PIPELINE0 meter MET_DIRECT_METER_003 set profile platinum index from 0 to 15
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/direct_meter_003/direct_meter_003.spec b/dep/pipeline/direct_meter_003/direct_meter_003.spec
new file mode 100644
index 00000000..0b1b1b7e
--- /dev/null
+++ b/dep/pipeline/direct_meter_003/direct_meter_003.spec
@@ -0,0 +1,105 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> version_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_frag_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port
+ bit<32> ipv4_src_addr
+ bit<32> ipv4_dst_addr
+ bit<32> table_entry_index
+ bit<32> count_packet
+ bit<32> color_in
+ bit<32> color_out
+ bit<32> timeout_id
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+action direct_meter_003_action args none {
+ entryid m.table_entry_index
+ mov m.count_packet 1
+ mov m.color_in 0
+ meter MET_DIRECT_METER_003 m.table_entry_index m.count_packet m.color_in m.color_out
+ return
+}
+
+action drop args none {
+ jmpneq DROP m.ipv4_src_addr 0x01010101
+ jmpneq DROP m.ipv4_dst_addr 0x0a0a0a01
+ mov m.timeout_id 0
+ learn direct_meter_003_action m.timeout_id
+ DROP : drop
+}
+
+//
+// Tables.
+//
+learner direct_meter_003 {
+ key {
+ m.ipv4_src_addr
+ m.ipv4_dst_addr
+ }
+
+ actions {
+ direct_meter_003_action
+ drop
+ }
+
+ default_action drop args none
+
+ timeout {
+ 60
+ 120
+ 180
+ }
+
+ size 16
+}
+
+// Direct meter reference for the learner table direct_meter_003
+metarray MET_DIRECT_METER_003 size 0x10
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ mov m.ipv4_src_addr h.ipv4.src_addr
+ mov m.ipv4_dst_addr h.ipv4.dst_addr
+ table direct_meter_003
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
\ No newline at end of file
diff --git a/dep/pipeline/direct_meter_003/ethdev.io b/dep/pipeline/direct_meter_003/ethdev.io
new file mode 100644
index 00000000..50ea330a
--- /dev/null
+++ b/dep/pipeline/direct_meter_003/ethdev.io
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/direct_meter_003/pcap_files/in_1.txt b/dep/pipeline/direct_meter_003/pcap_files/in_1.txt
new file mode 100644
index 00000000..05bff2c3
--- /dev/null
+++ b/dep/pipeline/direct_meter_003/pcap_files/in_1.txt
@@ -0,0 +1,32 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 01 01 01 01 0a 0a
+000020 0a 01 d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
+# Packet 1
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 01 01 01 01 0a 0a
+000020 0a 01 d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
+# Packet 2
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 01 01 01 01 0a 0a
+000020 0a 01 d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
+# Packet 3
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 01 01 01 01 0a 0a
+000020 0a 01 d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
+# Packet 4
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 32 00 01 00 00 40 06 64 b9 01 01 01 01 0a 0a
+000020 0a 01 d4 e4 13 88 00 00 00 00 00 00 00 00 50 02
+000030 20 00 fc a9 00 00 69 4f 58 77 37 4c 33 33 68 6f
\ No newline at end of file
diff --git a/dep/pipeline/direct_meter_003/readme.md b/dep/pipeline/direct_meter_003/readme.md
new file mode 100644
index 00000000..24e8a54c
--- /dev/null
+++ b/dep/pipeline/direct_meter_003/readme.md
@@ -0,0 +1,23 @@
+Test Case: direct_meter_003
+-----------------------------
+
+Instruction being tested:
+ entryid m.table_entry_index
+
+Scenario being tested:
+ Learner table with multiple parameters as a key.
+ The key structure is metadata.
+
+Description:
+ Increment the meter (packet count) value at specific index in
+ the meter array. This meter array is allocated for the specific
+ table to support table property "pna_direct_meter or
+ psa_direct_meter".
+ The 'entryid' instruction gets the index from the table lookup
+ of the current packet. This will identify the unique location
+ in the meter array to maintain the meter stats for the table
+ entry that is hit.
+
+Verification:
+ Read the VALUE from the CLI with table entry information and it
+ should match the meter stats that each entry in the table hit.
diff --git a/dep/pipeline/direction_001/direction_001.cli b/dep/pipeline/direction_001/direction_001.cli
new file mode 100644
index 00000000..ce5cfd6e
--- /dev/null
+++ b/dep/pipeline/direction_001/direction_001.cli
@@ -0,0 +1,42 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/direction_001/direction_001.spec /tmp/pipeline/direction_001/direction_001.c
+pipeline libbuild /tmp/pipeline/direction_001/direction_001.c /tmp/pipeline/direction_001/direction_001.so
+
+;
+; Customize the LINK parameters to match your setup.
+;
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+;
+; PIPELINE0 setup.
+;
+
+pipeline PIPELINE0 build lib /tmp/pipeline/direction_001/direction_001.so io /tmp/pipeline/direction_001/ethdev.io numa 0
+
+;
+; Direction flag for ports 1-HOST 0-NET
+;
+pipeline PIPELINE0 regwr direction value 1 index 0
+pipeline PIPELINE0 regwr direction value 1 index 1
+pipeline PIPELINE0 regwr direction value 0 index 2
+pipeline PIPELINE0 regwr direction value 0 index 3
+
+pipeline PIPELINE0 regrd direction index 0
+pipeline PIPELINE0 regrd direction index 1
+pipeline PIPELINE0 regrd direction index 2
+pipeline PIPELINE0 regrd direction index 3
+
+;
+; Pipelines-to-threads mapping.
+;
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/direction_001/direction_001.spec b/dep/pipeline/direction_001/direction_001.spec
new file mode 100644
index 00000000..fc02e4ba
--- /dev/null
+++ b/dep/pipeline/direction_001/direction_001.spec
@@ -0,0 +1,81 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+; This simple example illustrates that the ports can be configured into two different direction,
+; HOST_TO_NETWORK and NETWORK_TO_HOST. This helps to apply different functions (processing) for
+; packets from different direction.
+; In this example, different L2/MAC address are updated based on the configured direction.
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+struct udp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<16> length
+ bit<16> checksum
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+header udp instanceof udp_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> input_port
+ bit<32> direction
+}
+
+metadata instanceof metadata_t
+
+//
+// register to hold the direction of the port
+//
+regarray direction size 0x100 initval 0
+
+//
+// Pipeline.
+//
+apply {
+ rx m.input_port
+ extract h.ethernet
+ extract h.ipv4
+ extract h.udp
+
+ //
+ // Update the source and destination mac address based on direction
+ //
+ regrd m.direction direction m.input_port
+ jmpneq PACKET_FROM_HOST m.direction 0x0
+ mov h.ethernet.dst_addr 0x001122334455
+ mov h.ethernet.src_addr 0x00AABBCCDDEE
+ jmp EMIT
+ PACKET_FROM_HOST : mov h.ethernet.dst_addr 0x00EEDDCCBBAA
+ mov h.ethernet.src_addr 0x005544332211
+
+ EMIT : emit h.ethernet
+ emit h.ipv4
+ emit h.udp
+ tx m.input_port
+}
diff --git a/dep/pipeline/direction_001/ethdev.io b/dep/pipeline/direction_001/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/direction_001/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/direction_001/pcap_files/in_1.txt b/dep/pipeline/direction_001/pcap_files/in_1.txt
new file mode 100644
index 00000000..ce723bc8
--- /dev/null
+++ b/dep/pipeline/direction_001/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2022 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 80 00 01 00 00 40 11 ad 55 64 00 00 01 64 00
+000020 05 16 d4 e4 13 88 00 6c 32 53 71 64 78 41 67 79
+000030 4a 77 51 44 62 70 74 44 36 71 37 4c 70 66 57 54
+000040 75 45 6c 36 56 56 55 68 39 75 4e 77 41 4e 70 52
+000050 6e 6c 54 79 77 55 35 74 6a 51 78 78 44 6e 70 74
+000060 6f 6e 4b 4f 6b 73 44 78 73 54 69 6c 69 34 78 34
+000070 75 42 53 62 39 35 57 57 68 64 49 43 6e 35 6e 6d
+000080 4d 4d 79 4a 33 31 6a 47 61 46 44 35 36 38
diff --git a/dep/pipeline/direction_001/pcap_files/out_1.txt b/dep/pipeline/direction_001/pcap_files/out_1.txt
new file mode 100644
index 00000000..4db2ca9a
--- /dev/null
+++ b/dep/pipeline/direction_001/pcap_files/out_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 ee dd cc bb aa 00 55 44 33 22 11 08 00 45 00
+000010 00 80 00 01 00 00 40 11 ad 55 64 00 00 01 64 00
+000020 05 16 d4 e4 13 88 00 6c 32 53 71 64 78 41 67 79
+000030 4a 77 51 44 62 70 74 44 36 71 37 4c 70 66 57 54
+000040 75 45 6c 36 56 56 55 68 39 75 4e 77 41 4e 70 52
+000050 6e 6c 54 79 77 55 35 74 6a 51 78 78 44 6e 70 74
+000060 6f 6e 4b 4f 6b 73 44 78 73 54 69 6c 69 34 78 34
+000070 75 42 53 62 39 35 57 57 68 64 49 43 6e 35 6e 6d
+000080 4d 4d 79 4a 33 31 6a 47 61 46 44 35 36 38
diff --git a/dep/pipeline/direction_001/pcap_files/out_2.txt b/dep/pipeline/direction_001/pcap_files/out_2.txt
new file mode 100644
index 00000000..f392b0a1
--- /dev/null
+++ b/dep/pipeline/direction_001/pcap_files/out_2.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 aa bb cc dd ee 08 00 45 00
+000010 00 80 00 01 00 00 40 11 ad 55 64 00 00 01 64 00
+000020 05 16 d4 e4 13 88 00 6c 32 53 71 64 78 41 67 79
+000030 4a 77 51 44 62 70 74 44 36 71 37 4c 70 66 57 54
+000040 75 45 6c 36 56 56 55 68 39 75 4e 77 41 4e 70 52
+000050 6e 6c 54 79 77 55 35 74 6a 51 78 78 44 6e 70 74
+000060 6f 6e 4b 4f 6b 73 44 78 73 54 69 6c 69 34 78 34
+000070 75 42 53 62 39 35 57 57 68 64 49 43 6e 35 6e 6d
+000080 4d 4d 79 4a 33 31 6a 47 61 46 44 35 36 38
diff --git a/dep/pipeline/direction_001/readme.md b/dep/pipeline/direction_001/readme.md
new file mode 100644
index 00000000..ac057f89
--- /dev/null
+++ b/dep/pipeline/direction_001/readme.md
@@ -0,0 +1,12 @@
+Test Case: test_direction_001
+-----------------------------
+
+ Description:
+ Packet processing can be conditioned based on the packet flow direction.
+ Each port either belongs to network or host side as per PNA specification.
+
+ Verification:
+ Send the same packet to all the ports, the packets expected to received on the same port.
+ The packets from the HOST direction has been updated with specific source(0x005544332211)
+ and destination(0x00eeddccbbaa) MAC address. Packets from NETWORK direction updated with
+ source (0x001122334455) and destinateion(0x00AABBCCDDEE) MAC address.
diff --git a/dep/pipeline/dma_001/dma_001.cli b/dep/pipeline/dma_001/dma_001.cli
new file mode 100755
index 00000000..dc1a2605
--- /dev/null
+++ b/dep/pipeline/dma_001/dma_001.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/dma_001/dma_001.spec /tmp/pipeline/dma_001/dma_001.c
+pipeline libbuild /tmp/pipeline/dma_001/dma_001.c /tmp/pipeline/dma_001/dma_001.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/dma_001/dma_001.so io /tmp/pipeline/dma_001/ethdev.io numa 0
+pipeline PIPELINE0 table dma_001 add /tmp/pipeline/dma_001/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/dma_001/dma_001.spec b/dep/pipeline/dma_001/dma_001.spec
new file mode 100755
index 00000000..aa8d9dce
--- /dev/null
+++ b/dep/pipeline/dma_001/dma_001.spec
@@ -0,0 +1,71 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct dma_001_args_t {
+ bit<48> ethernet_dst_addr
+ bit<48> ethernet_src_addr
+ bit<16> ethernet_ethertype
+}
+
+action dma_001_action args instanceof dma_001_args_t {
+ mov h.ethernet.dst_addr t.ethernet_dst_addr
+ mov h.ethernet.src_addr t.ethernet_src_addr
+ mov h.ethernet.ethertype t.ethernet_ethertype
+ validate h.ethernet
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table dma_001 {
+ key {
+ h.ethernet.dst_addr exact
+ }
+
+ actions {
+ dma_001_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ table dma_001
+ emit h.ethernet
+ tx m.port
+}
diff --git a/dep/pipeline/dma_001/ethdev.io b/dep/pipeline/dma_001/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/dma_001/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/dma_001/pcap_files/in_1.txt b/dep/pipeline/dma_001/pcap_files/in_1.txt
new file mode 100644
index 00000000..4d830793
--- /dev/null
+++ b/dep/pipeline/dma_001/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/dma_001/pcap_files/out_1.txt b/dep/pipeline/dma_001/pcap_files/out_1.txt
new file mode 100644
index 00000000..568e4959
--- /dev/null
+++ b/dep/pipeline/dma_001/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 a0 a1 a2 a3 00 00 b0 b1 b2 b3 00 00 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/dma_001/readme.md b/dep/pipeline/dma_001/readme.md
new file mode 100644
index 00000000..287a6f20
--- /dev/null
+++ b/dep/pipeline/dma_001/readme.md
@@ -0,0 +1,15 @@
+
+Test Case: test_dma_001
+-----------------------
+
+ Instructions being tested:
+ dma h.header.field t.field (level 1)
+ validate h.header (level 1)
+
+ Description:
+ Based on the destination MAC address of the received packet, ethernet
+ header is updated from the table.
+
+ Verification:
+ Transmitted packet should have the ethernet header as defined in the
+ table.
diff --git a/dep/pipeline/dma_001/table.txt b/dep/pipeline/dma_001/table.txt
new file mode 100755
index 00000000..a994e935
--- /dev/null
+++ b/dep/pipeline/dma_001/table.txt
@@ -0,0 +1 @@
+match 0xaabbccdd0000 action dma_001_action ethernet_dst_addr 0xa0a1a2a30000 ethernet_src_addr 0xb0b1b2b30000 ethernet_ethertype 0x0800
diff --git a/dep/pipeline/dma_002/dma_002.cli b/dep/pipeline/dma_002/dma_002.cli
new file mode 100644
index 00000000..07dd12da
--- /dev/null
+++ b/dep/pipeline/dma_002/dma_002.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/dma_002/dma_002.spec /tmp/pipeline/dma_002/dma_002.c
+pipeline libbuild /tmp/pipeline/dma_002/dma_002.c /tmp/pipeline/dma_002/dma_002.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/dma_002/dma_002.so io /tmp/pipeline/dma_002/ethdev.io numa 0
+pipeline PIPELINE0 table dma_002 add /tmp/pipeline/dma_002/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/dma_002/dma_002.spec b/dep/pipeline/dma_002/dma_002.spec
new file mode 100644
index 00000000..4e6bf4a5
--- /dev/null
+++ b/dep/pipeline/dma_002/dma_002.spec
@@ -0,0 +1,110 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct dma_002_args_t {
+ bit<48> ethernet_dst_addr
+ bit<48> ethernet_src_addr
+ bit<16> ethernet_ethertype
+ bit<8> ipv4_ver_ihl
+ bit<8> ipv4_diffserv
+ bit<16> ipv4_total_len
+ bit<16> ipv4_identification
+ bit<16> ipv4_flags_offset
+ bit<8> ipv4_ttl
+ bit<8> ipv4_protocol
+ bit<16> ipv4_hdr_checksum
+ bit<32> ipv4_src_addr
+ bit<32> ipv4_dst_addr
+}
+
+action dma_002_action args instanceof dma_002_args_t {
+ mov h.ethernet.dst_addr t.ethernet_dst_addr
+ mov h.ethernet.src_addr t.ethernet_src_addr
+ mov h.ethernet.ethertype t.ethernet_ethertype
+ validate h.ethernet
+
+ mov h.ipv4.ver_ihl t.ipv4_ver_ihl
+ mov h.ipv4.diffserv t.ipv4_diffserv
+ mov h.ipv4.total_len t.ipv4_total_len
+ mov h.ipv4.identification t.ipv4_identification
+ mov h.ipv4.flags_offset t.ipv4_flags_offset
+ mov h.ipv4.ttl t.ipv4_ttl
+ mov h.ipv4.protocol t.ipv4_protocol
+ mov h.ipv4.hdr_checksum t.ipv4_hdr_checksum
+ mov h.ipv4.src_addr t.ipv4_src_addr
+ mov h.ipv4.dst_addr t.ipv4_dst_addr
+ validate h.ipv4
+
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table dma_002 {
+ key {
+ h.ethernet.dst_addr exact
+ }
+
+ actions {
+ dma_002_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ table dma_002
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/dma_002/ethdev.io b/dep/pipeline/dma_002/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/dma_002/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/dma_002/pcap_files/in_1.txt b/dep/pipeline/dma_002/pcap_files/in_1.txt
new file mode 100644
index 00000000..d24bd71c
--- /dev/null
+++ b/dep/pipeline/dma_002/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/dma_002/pcap_files/out_1.txt b/dep/pipeline/dma_002/pcap_files/out_1.txt
new file mode 100644
index 00000000..f68c205c
--- /dev/null
+++ b/dep/pipeline/dma_002/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 a0 a1 a2 a3 00 00 b0 b1 b2 b3 00 00 08 00 45 04
+000010 00 2e 00 01 00 00 50 06 b5 63 32 00 00 0b 16 00
+000020 00 05 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/dma_002/readme.md b/dep/pipeline/dma_002/readme.md
new file mode 100644
index 00000000..cc75bad6
--- /dev/null
+++ b/dep/pipeline/dma_002/readme.md
@@ -0,0 +1,15 @@
+
+Test Case: test_dma_002
+-----------------------
+
+ Instructions being tested:
+ mov h.header.field t.field (level 2)
+ validate h.header (level 2)
+
+ Description:
+ Based on the destination MAC address of the received packet, ethernet
+ and ipv4 headers are updated from the table.
+
+ Verification:
+ Transmitted packet should have the ethernet and ipv4 headers as defined
+ in the table.
diff --git a/dep/pipeline/dma_002/table.txt b/dep/pipeline/dma_002/table.txt
new file mode 100644
index 00000000..8069e826
--- /dev/null
+++ b/dep/pipeline/dma_002/table.txt
@@ -0,0 +1 @@
+match 0xaabbccdd0000 action dma_002_action ethernet_dst_addr 0xa0a1a2a30000 ethernet_src_addr 0xb0b1b2b30000 ethernet_ethertype 0x800 ipv4_ver_ihl 0x45 ipv4_diffserv 0x4 ipv4_total_len 0x2e ipv4_identification 0x1 ipv4_flags_offset 0x0 ipv4_ttl 0x50 ipv4_protocol 0x6 ipv4_hdr_checksum 0xb563 ipv4_src_addr 0x3200000b ipv4_dst_addr 0x16000005
diff --git a/dep/pipeline/dma_003/dma_003.cli b/dep/pipeline/dma_003/dma_003.cli
new file mode 100644
index 00000000..380ee5b3
--- /dev/null
+++ b/dep/pipeline/dma_003/dma_003.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/dma_003/dma_003.spec /tmp/pipeline/dma_003/dma_003.c
+pipeline libbuild /tmp/pipeline/dma_003/dma_003.c /tmp/pipeline/dma_003/dma_003.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/dma_003/dma_003.so io /tmp/pipeline/dma_003/ethdev.io numa 0
+pipeline PIPELINE0 table dma_003 add /tmp/pipeline/dma_003/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/dma_003/dma_003.spec b/dep/pipeline/dma_003/dma_003.spec
new file mode 100644
index 00000000..453c42ba
--- /dev/null
+++ b/dep/pipeline/dma_003/dma_003.spec
@@ -0,0 +1,142 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+struct tcp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<32> seq_num
+ bit<32> ack_num
+ bit<16> hdr_len_flags
+ bit<16> window_size
+ bit<16> checksum
+ bit<16> urg_ptr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+header tcp instanceof tcp_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct dma_003_args_t {
+ bit<48> ethernet_dst_addr
+ bit<48> ethernet_src_addr
+ bit<16> ethernet_ethertype
+ bit<8> ipv4_ver_ihl
+ bit<8> ipv4_diffserv
+ bit<16> ipv4_total_len
+ bit<16> ipv4_identification
+ bit<16> ipv4_flags_offset
+ bit<8> ipv4_ttl
+ bit<8> ipv4_protocol
+ bit<16> ipv4_hdr_checksum
+ bit<32> ipv4_src_addr
+ bit<32> ipv4_dst_addr
+ bit<16> tcp_src_port
+ bit<16> tcp_dst_port
+ bit<32> tcp_seq_num
+ bit<32> tcp_ack_num
+ bit<16> tcp_hdr_len_flags
+ bit<16> tcp_window_size
+ bit<16> tcp_checksum
+ bit<16> tcp_urg_ptr
+}
+
+action dma_003_action args instanceof dma_003_args_t {
+ mov h.ethernet.dst_addr t.ethernet_dst_addr
+ mov h.ethernet.src_addr t.ethernet_src_addr
+ mov h.ethernet.ethertype t.ethernet_ethertype
+ validate h.ethernet
+
+ mov h.ipv4.ver_ihl t.ipv4_ver_ihl
+ mov h.ipv4.diffserv t.ipv4_diffserv
+ mov h.ipv4.total_len t.ipv4_total_len
+ mov h.ipv4.identification t.ipv4_identification
+ mov h.ipv4.flags_offset t.ipv4_flags_offset
+ mov h.ipv4.ttl t.ipv4_ttl
+ mov h.ipv4.protocol t.ipv4_protocol
+ mov h.ipv4.hdr_checksum t.ipv4_hdr_checksum
+ mov h.ipv4.src_addr t.ipv4_src_addr
+ mov h.ipv4.dst_addr t.ipv4_dst_addr
+ validate h.ipv4
+
+ mov h.tcp.src_port t.tcp_src_port
+ mov h.tcp.dst_port t.tcp_dst_port
+ mov h.tcp.seq_num t.tcp_seq_num
+ mov h.tcp.ack_num t.tcp_ack_num
+ mov h.tcp.hdr_len_flags t.tcp_hdr_len_flags
+ mov h.tcp.window_size t.tcp_window_size
+ mov h.tcp.checksum t.tcp_checksum
+ mov h.tcp.urg_ptr t.tcp_urg_ptr
+ validate h.tcp
+
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table dma_003 {
+ key {
+ h.ethernet.dst_addr exact
+ }
+
+ actions {
+ dma_003_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ extract h.tcp
+ table dma_003
+ emit h.ethernet
+ emit h.ipv4
+ emit h.tcp
+ tx m.port
+}
diff --git a/dep/pipeline/dma_003/ethdev.io b/dep/pipeline/dma_003/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/dma_003/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/dma_003/pcap_files/in_1.txt b/dep/pipeline/dma_003/pcap_files/in_1.txt
new file mode 100644
index 00000000..d24bd71c
--- /dev/null
+++ b/dep/pipeline/dma_003/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/dma_003/pcap_files/out_1.txt b/dep/pipeline/dma_003/pcap_files/out_1.txt
new file mode 100644
index 00000000..c3a94a33
--- /dev/null
+++ b/dep/pipeline/dma_003/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 a0 a1 a2 a3 00 00 b0 b1 b2 b3 00 00 08 00 45 04
+000010 00 2e 00 01 00 00 50 06 b5 63 32 00 00 0b 16 00
+000020 00 05 00 65 00 c9 00 00 00 02 00 00 00 01 50 03
+000030 30 00 59 94 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/dma_003/readme.md b/dep/pipeline/dma_003/readme.md
new file mode 100644
index 00000000..437e2edf
--- /dev/null
+++ b/dep/pipeline/dma_003/readme.md
@@ -0,0 +1,15 @@
+
+Test Case: test_dma_003
+-----------------------
+
+ Instructions being tested:
+ mov h.header.field t.field (level 3)
+ validate h.header (level 3)
+
+ Description:
+ Based on the destination MAC address of the received packet ethernet,
+ ipv4 and tcp headers are updated from the table.
+
+ Verification:
+ Transmitted packet should have the ethernet, ipv4 and tcp headers as
+ defined in the table.
diff --git a/dep/pipeline/dma_003/table.txt b/dep/pipeline/dma_003/table.txt
new file mode 100644
index 00000000..933030b9
--- /dev/null
+++ b/dep/pipeline/dma_003/table.txt
@@ -0,0 +1 @@
+match 0xaabbccdd0000 action dma_003_action ethernet_dst_addr 0xa0a1a2a30000 ethernet_src_addr 0xb0b1b2b30000 ethernet_ethertype 0x0800 ipv4_ver_ihl 0x45 ipv4_diffserv 0x4 ipv4_total_len 0x2e ipv4_identification 0x1 ipv4_flags_offset 0x0 ipv4_ttl 0x50 ipv4_protocol 0x6 ipv4_hdr_checksum 0xb563 ipv4_src_addr 0x3200000b ipv4_dst_addr 0x16000005 tcp_src_port 0x65 tcp_dst_port 0xc9 tcp_seq_num 0x2 tcp_ack_num 0x1 tcp_hdr_len_flags 0x5003 tcp_window_size 0x3000 tcp_checksum 0x5994 tcp_urg_ptr 0x0
diff --git a/dep/pipeline/dma_004/dma_004.cli b/dep/pipeline/dma_004/dma_004.cli
new file mode 100644
index 00000000..6e730ac6
--- /dev/null
+++ b/dep/pipeline/dma_004/dma_004.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/dma_004/dma_004.spec /tmp/pipeline/dma_004/dma_004.c
+pipeline libbuild /tmp/pipeline/dma_004/dma_004.c /tmp/pipeline/dma_004/dma_004.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/dma_004/dma_004.so io /tmp/pipeline/dma_004/ethdev.io numa 0
+pipeline PIPELINE0 table dma_004 add /tmp/pipeline/dma_004/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/dma_004/dma_004.spec b/dep/pipeline/dma_004/dma_004.spec
new file mode 100644
index 00000000..3ced6839
--- /dev/null
+++ b/dep/pipeline/dma_004/dma_004.spec
@@ -0,0 +1,156 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+}
+
+struct vlan_h {
+ bit<16> tpid
+ bit<16> pcp_dei_vid
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+struct tcp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<32> seq_num
+ bit<32> ack_num
+ bit<16> hdr_len_flags
+ bit<16> window_size
+ bit<16> checksum
+ bit<16> urg_ptr
+}
+
+header ethernet instanceof ethernet_h
+header vlan instanceof vlan_h
+header ipv4 instanceof ipv4_h
+header tcp instanceof tcp_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct dma_004_args_t {
+ bit<48> ethernet_dst_addr
+ bit<48> ethernet_src_addr
+ bit<16> vlan_tpid
+ bit<16> vlan_pcp_dei_vid
+ bit<16> vlan_ethertype
+ bit<8> ipv4_ver_ihl
+ bit<8> ipv4_diffserv
+ bit<16> ipv4_total_len
+ bit<16> ipv4_identification
+ bit<16> ipv4_flags_offset
+ bit<8> ipv4_ttl
+ bit<8> ipv4_protocol
+ bit<16> ipv4_hdr_checksum
+ bit<32> ipv4_src_addr
+ bit<32> ipv4_dst_addr
+ bit<16> tcp_src_port
+ bit<16> tcp_dst_port
+ bit<32> tcp_seq_num
+ bit<32> tcp_ack_num
+ bit<16> tcp_hdr_len_flags
+ bit<16> tcp_window_size
+ bit<16> tcp_checksum
+ bit<16> tcp_urg_ptr
+}
+
+action dma_004_action args instanceof dma_004_args_t {
+ mov h.ethernet.dst_addr t.ethernet_dst_addr
+ mov h.ethernet.src_addr t.ethernet_src_addr
+ validate h.ethernet
+
+ mov h.vlan.tpid t.vlan_tpid
+ mov h.vlan.pcp_dei_vid t.vlan_pcp_dei_vid
+ mov h.vlan.ethertype t.vlan_ethertype
+ validate h.vlan
+
+ mov h.ipv4.ver_ihl t.ipv4_ver_ihl
+ mov h.ipv4.diffserv t.ipv4_diffserv
+ mov h.ipv4.total_len t.ipv4_total_len
+ mov h.ipv4.identification t.ipv4_identification
+ mov h.ipv4.flags_offset t.ipv4_flags_offset
+ mov h.ipv4.ttl t.ipv4_ttl
+ mov h.ipv4.protocol t.ipv4_protocol
+ mov h.ipv4.hdr_checksum t.ipv4_hdr_checksum
+ mov h.ipv4.src_addr t.ipv4_src_addr
+ mov h.ipv4.dst_addr t.ipv4_dst_addr
+ validate h.ipv4
+
+ mov h.tcp.src_port t.tcp_src_port
+ mov h.tcp.dst_port t.tcp_dst_port
+ mov h.tcp.seq_num t.tcp_seq_num
+ mov h.tcp.ack_num t.tcp_ack_num
+ mov h.tcp.hdr_len_flags t.tcp_hdr_len_flags
+ mov h.tcp.window_size t.tcp_window_size
+ mov h.tcp.checksum t.tcp_checksum
+ mov h.tcp.urg_ptr t.tcp_urg_ptr
+ validate h.tcp
+
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table dma_004 {
+ key {
+ h.ethernet.dst_addr exact
+ }
+
+ actions {
+ dma_004_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.vlan
+ extract h.ipv4
+ extract h.tcp
+ table dma_004
+ emit h.ethernet
+ emit h.vlan
+ emit h.ipv4
+ emit h.tcp
+ tx m.port
+}
diff --git a/dep/pipeline/dma_004/ethdev.io b/dep/pipeline/dma_004/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/dma_004/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/dma_004/pcap_files/in_1.txt b/dep/pipeline/dma_004/pcap_files/in_1.txt
new file mode 100644
index 00000000..f85c98c4
--- /dev/null
+++ b/dep/pipeline/dma_004/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 81 00 01 23
+000010 08 00 45 00 00 2e 00 01 00 00 40 06 4e b5 64 00
+000020 00 0a c8 00 00 0a 00 64 00 c8 00 00 00 00 00 00
+000030 00 00 50 02 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/dma_004/pcap_files/out_1.txt b/dep/pipeline/dma_004/pcap_files/out_1.txt
new file mode 100644
index 00000000..c557fc7d
--- /dev/null
+++ b/dep/pipeline/dma_004/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 a0 a1 a2 a3 00 00 b0 b1 b2 b3 00 00 81 00 01 24
+000010 08 00 45 04 00 2e 00 01 00 00 50 06 b5 63 32 00
+000020 00 0b 16 00 00 05 00 65 00 c9 00 00 00 02 00 00
+000030 00 01 50 03 30 00 59 94 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/dma_004/readme.md b/dep/pipeline/dma_004/readme.md
new file mode 100644
index 00000000..0e6127e4
--- /dev/null
+++ b/dep/pipeline/dma_004/readme.md
@@ -0,0 +1,15 @@
+
+Test Case: test_dma_004
+-----------------------
+
+ Instructions being tested:
+ mov h.header.field t.field (level 4)
+ validate h.header (level 4)
+
+ Description:
+ Based on the destination MAC address of the received packet ethernet,
+ vlan, ipv4 and tcp headers are updated from the table.
+
+ Verification:
+ Transmitted packet should have the ethernet, vlan, ipv4 and tcp headers
+ as defined in the table.
diff --git a/dep/pipeline/dma_004/table.txt b/dep/pipeline/dma_004/table.txt
new file mode 100644
index 00000000..3b7b0fa6
--- /dev/null
+++ b/dep/pipeline/dma_004/table.txt
@@ -0,0 +1 @@
+match 0xaabbccdd0000 action dma_004_action ethernet_dst_addr 0xa0a1a2a30000 ethernet_src_addr 0xb0b1b2b30000 vlan_tpid 0x8100 vlan_pcp_dei_vid 0x124 vlan_ethertype 0x800 ipv4_ver_ihl 0x45 ipv4_diffserv 0x4 ipv4_total_len 0x2e ipv4_identification 0x1 ipv4_flags_offset 0x0 ipv4_ttl 0x50 ipv4_protocol 0x6 ipv4_hdr_checksum 0xb563 ipv4_src_addr 0x3200000b ipv4_dst_addr 0x16000005 tcp_src_port 0x65 tcp_dst_port 0xc9 tcp_seq_num 0x2 tcp_ack_num 0x1 tcp_hdr_len_flags 0x5003 tcp_window_size 0x3000 tcp_checksum 0x5994 tcp_urg_ptr 0x0
diff --git a/dep/pipeline/dma_005/dma_005.cli b/dep/pipeline/dma_005/dma_005.cli
new file mode 100644
index 00000000..6c9b667f
--- /dev/null
+++ b/dep/pipeline/dma_005/dma_005.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/dma_005/dma_005.spec /tmp/pipeline/dma_005/dma_005.c
+pipeline libbuild /tmp/pipeline/dma_005/dma_005.c /tmp/pipeline/dma_005/dma_005.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/dma_005/dma_005.so io /tmp/pipeline/dma_005/ethdev.io numa 0
+pipeline PIPELINE0 table dma_005 add /tmp/pipeline/dma_005/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/dma_005/dma_005.spec b/dep/pipeline/dma_005/dma_005.spec
new file mode 100644
index 00000000..034d901a
--- /dev/null
+++ b/dep/pipeline/dma_005/dma_005.spec
@@ -0,0 +1,167 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+}
+
+struct vlan_h {
+ bit<16> tpid
+ bit<16> pcp_dei_vid
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+struct tcp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<32> seq_num
+ bit<32> ack_num
+ bit<16> hdr_len_flags
+ bit<16> window_size
+ bit<16> checksum
+ bit<16> urg_ptr
+}
+
+header ethernet instanceof ethernet_h
+header vlan_1 instanceof vlan_h
+header vlan_2 instanceof vlan_h
+header ipv4 instanceof ipv4_h
+header tcp instanceof tcp_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct dma_005_args_t {
+ bit<48> ethernet_dst_addr
+ bit<48> ethernet_src_addr
+ bit<16> vlan_1_tpid
+ bit<16> vlan_1_pcp_dei_vid
+ bit<16> vlan_1_ethertype
+ bit<16> vlan_2_tpid
+ bit<16> vlan_2_pcp_dei_vid
+ bit<16> vlan_2_ethertype
+ bit<8> ipv4_ver_ihl
+ bit<8> ipv4_diffserv
+ bit<16> ipv4_total_len
+ bit<16> ipv4_identification
+ bit<16> ipv4_flags_offset
+ bit<8> ipv4_ttl
+ bit<8> ipv4_protocol
+ bit<16> ipv4_hdr_checksum
+ bit<32> ipv4_src_addr
+ bit<32> ipv4_dst_addr
+ bit<16> tcp_src_port
+ bit<16> tcp_dst_port
+ bit<32> tcp_seq_num
+ bit<32> tcp_ack_num
+ bit<16> tcp_hdr_len_flags
+ bit<16> tcp_window_size
+ bit<16> tcp_checksum
+ bit<16> tcp_urg_ptr
+}
+
+action dma_005_action args instanceof dma_005_args_t {
+ mov h.ethernet.dst_addr t.ethernet_dst_addr
+ mov h.ethernet.src_addr t.ethernet_src_addr
+ validate h.ethernet
+
+ mov h.vlan_1.tpid t.vlan_1_tpid
+ mov h.vlan_1.pcp_dei_vid t.vlan_1_pcp_dei_vid
+ mov h.vlan_1.ethertype t.vlan_1_ethertype
+ validate h.vlan_1
+
+ mov h.vlan_2.tpid t.vlan_2_tpid
+ mov h.vlan_2.pcp_dei_vid t.vlan_2_pcp_dei_vid
+ mov h.vlan_2.ethertype t.vlan_2_ethertype
+ validate h.vlan_2
+
+ mov h.ipv4.ver_ihl t.ipv4_ver_ihl
+ mov h.ipv4.diffserv t.ipv4_diffserv
+ mov h.ipv4.total_len t.ipv4_total_len
+ mov h.ipv4.identification t.ipv4_identification
+ mov h.ipv4.flags_offset t.ipv4_flags_offset
+ mov h.ipv4.ttl t.ipv4_ttl
+ mov h.ipv4.protocol t.ipv4_protocol
+ mov h.ipv4.hdr_checksum t.ipv4_hdr_checksum
+ mov h.ipv4.src_addr t.ipv4_src_addr
+ mov h.ipv4.dst_addr t.ipv4_dst_addr
+ validate h.ipv4
+
+ mov h.tcp.src_port t.tcp_src_port
+ mov h.tcp.dst_port t.tcp_dst_port
+ mov h.tcp.seq_num t.tcp_seq_num
+ mov h.tcp.ack_num t.tcp_ack_num
+ mov h.tcp.hdr_len_flags t.tcp_hdr_len_flags
+ mov h.tcp.window_size t.tcp_window_size
+ mov h.tcp.checksum t.tcp_checksum
+ mov h.tcp.urg_ptr t.tcp_urg_ptr
+ validate h.tcp
+
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table dma_005 {
+ key {
+ h.ethernet.dst_addr exact
+ }
+
+ actions {
+ dma_005_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.vlan_1
+ extract h.vlan_2
+ extract h.ipv4
+ extract h.tcp
+ table dma_005
+ emit h.ethernet
+ emit h.vlan_1
+ emit h.vlan_2
+ emit h.ipv4
+ emit h.tcp
+ tx m.port
+}
diff --git a/dep/pipeline/dma_005/ethdev.io b/dep/pipeline/dma_005/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/dma_005/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/dma_005/pcap_files/in_1.txt b/dep/pipeline/dma_005/pcap_files/in_1.txt
new file mode 100644
index 00000000..57aa00b2
--- /dev/null
+++ b/dep/pipeline/dma_005/pcap_files/in_1.txt
@@ -0,0 +1,13 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 81 00 01 23
+000010 81 00 01 33 08 00 45 00 00 2e 00 01 00 00 40 06
+000020 4e b5 64 00 00 0a c8 00 00 0a 00 64 00 c8 00 00
+000030 00 00 00 00 00 00 50 02 20 00 59 93 00 00 58 58
+000040 58 58 58 58
diff --git a/dep/pipeline/dma_005/pcap_files/out_1.txt b/dep/pipeline/dma_005/pcap_files/out_1.txt
new file mode 100644
index 00000000..8d8a7c28
--- /dev/null
+++ b/dep/pipeline/dma_005/pcap_files/out_1.txt
@@ -0,0 +1,13 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 a0 a1 a2 a3 00 00 b0 b1 b2 b3 00 00 81 00 01 24
+000010 08 00 81 00 01 34 08 00 45 04 00 2e 00 01 00 00
+000020 50 06 b5 63 32 00 00 0b 16 00 00 05 00 65 00 c9
+000030 00 00 00 02 00 00 00 01 50 03 30 00 59 94 00 00
+000040 58 58 58 58
diff --git a/dep/pipeline/dma_005/readme.md b/dep/pipeline/dma_005/readme.md
new file mode 100644
index 00000000..414152cc
--- /dev/null
+++ b/dep/pipeline/dma_005/readme.md
@@ -0,0 +1,15 @@
+
+Test Case: test_dma_005
+-----------------------
+
+ Instructions being tested:
+ mov h.header.field t.field (level 5)
+ validate h.header (level 5)
+
+ Description:
+ Based on the destination MAC address of the received packet ethernet,
+ vlan 1, vlan 2, ipv4 and tcp headers are updated from the table.
+
+ Verification:
+ Transmitted packet should have the ethernet, vlan 1, vlan 2, ipv4 and
+ tcp headers as defined in the table.
diff --git a/dep/pipeline/dma_005/table.txt b/dep/pipeline/dma_005/table.txt
new file mode 100644
index 00000000..0b2f765b
--- /dev/null
+++ b/dep/pipeline/dma_005/table.txt
@@ -0,0 +1 @@
+match 0xaabbccdd0000 action dma_005_action ethernet_dst_addr 0xa0a1a2a30000 ethernet_src_addr 0xb0b1b2b30000 vlan_1_tpid 0x8100 vlan_1_pcp_dei_vid 0x0124 vlan_1_ethertype 0x800 vlan_2_tpid 0x8100 vlan_2_pcp_dei_vid 0x0134 vlan_2_ethertype 0x800 ipv4_ver_ihl 0x45 ipv4_diffserv 0x4 ipv4_total_len 0x2e ipv4_identification 0x1 ipv4_flags_offset 0x0 ipv4_ttl 0x50 ipv4_protocol 0x6 ipv4_hdr_checksum 0xb563 ipv4_src_addr 0x3200000b ipv4_dst_addr 0x16000005 tcp_src_port 0x65 tcp_dst_port 0xc9 tcp_seq_num 0x2 tcp_ack_num 0x1 tcp_hdr_len_flags 0x5003 tcp_window_size 0x3000 tcp_checksum 0x5994 tcp_urg_ptr 0x0
diff --git a/dep/pipeline/dma_006/dma_006.cli b/dep/pipeline/dma_006/dma_006.cli
new file mode 100644
index 00000000..660bad42
--- /dev/null
+++ b/dep/pipeline/dma_006/dma_006.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/dma_006/dma_006.spec /tmp/pipeline/dma_006/dma_006.c
+pipeline libbuild /tmp/pipeline/dma_006/dma_006.c /tmp/pipeline/dma_006/dma_006.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/dma_006/dma_006.so io /tmp/pipeline/dma_006/ethdev.io numa 0
+pipeline PIPELINE0 table dma_006 add /tmp/pipeline/dma_006/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/dma_006/dma_006.spec b/dep/pipeline/dma_006/dma_006.spec
new file mode 100644
index 00000000..6a344cfa
--- /dev/null
+++ b/dep/pipeline/dma_006/dma_006.spec
@@ -0,0 +1,186 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+struct udp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<16> length
+ bit<16> checksum
+}
+
+struct vxlan_h {
+ bit<8> flags
+ bit<24> reserved
+ bit<24> vni
+ bit<8> reserved2
+}
+
+header outer_ethernet instanceof ethernet_h
+header outer_ipv4 instanceof ipv4_h
+header outer_udp instanceof udp_h
+header outer_vxlan instanceof vxlan_h
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct dma_006_args_t {
+ bit<48> out_ethernet_dst_addr
+ bit<48> out_ethernet_src_addr
+ bit<16> out_ethernet_ethertype
+ bit<8> out_ipv4_ver_ihl
+ bit<8> out_ipv4_diffserv
+ bit<16> out_ipv4_total_len
+ bit<16> out_ipv4_identification
+ bit<16> out_ipv4_flags_offset
+ bit<8> out_ipv4_ttl
+ bit<8> out_ipv4_protocol
+ bit<16> out_ipv4_hdr_checksum
+ bit<32> out_ipv4_src_addr
+ bit<32> out_ipv4_dst_addr
+ bit<16> out_udp_src_port
+ bit<16> out_udp_dst_port
+ bit<16> out_udp_length
+ bit<16> out_udp_checksum
+ bit<8> out_vxlan_flags
+ bit<24> out_vxlan_reserved
+ bit<24> out_vxlan_vni
+ bit<8> out_vxlan_reserved2
+ bit<48> in_ethernet_dst_addr
+ bit<48> in_ethernet_src_addr
+ bit<16> in_ethernet_ethertype
+ bit<8> in_ipv4_ver_ihl
+ bit<8> in_ipv4_diffserv
+ bit<16> in_ipv4_total_len
+ bit<16> in_ipv4_identification
+ bit<16> in_ipv4_flags_offset
+ bit<8> in_ipv4_ttl
+ bit<8> in_ipv4_protocol
+ bit<16> in_ipv4_hdr_checksum
+ bit<32> in_ipv4_src_addr
+ bit<32> in_ipv4_dst_addr
+}
+
+action dma_006_action args instanceof dma_006_args_t {
+ mov h.outer_ethernet.dst_addr t.out_ethernet_dst_addr
+ mov h.outer_ethernet.src_addr t.out_ethernet_src_addr
+ mov h.outer_ethernet.ethertype t.out_ethernet_ethertype
+ validate h.outer_ethernet
+
+ mov h.outer_ipv4.ver_ihl t.out_ipv4_ver_ihl
+ mov h.outer_ipv4.diffserv t.out_ipv4_diffserv
+ mov h.outer_ipv4.total_len t.out_ipv4_total_len
+ mov h.outer_ipv4.identification t.out_ipv4_identification
+ mov h.outer_ipv4.flags_offset t.out_ipv4_flags_offset
+ mov h.outer_ipv4.ttl t.out_ipv4_ttl
+ mov h.outer_ipv4.protocol t.out_ipv4_protocol
+ mov h.outer_ipv4.hdr_checksum t.out_ipv4_hdr_checksum
+ mov h.outer_ipv4.src_addr t.out_ipv4_src_addr
+ mov h.outer_ipv4.dst_addr t.out_ipv4_dst_addr
+ validate h.outer_ipv4
+
+ mov h.outer_udp.src_port t.out_udp_src_port
+ mov h.outer_udp.dst_port t.out_udp_dst_port
+ mov h.outer_udp.length t.out_udp_length
+ mov h.outer_udp.checksum t.out_udp_checksum
+ validate h.outer_udp
+
+ mov h.outer_vxlan.flags t.out_vxlan_flags
+ mov h.outer_vxlan.reserved t.out_vxlan_reserved
+ mov h.outer_vxlan.vni t.out_vxlan_vni
+ mov h.outer_vxlan.reserved2 t.out_vxlan_reserved2
+ validate h.outer_vxlan
+
+ mov h.ethernet.dst_addr t.in_ethernet_dst_addr
+ mov h.ethernet.src_addr t.in_ethernet_src_addr
+ mov h.ethernet.ethertype t.in_ethernet_ethertype
+ validate h.ethernet
+
+ mov h.ipv4.ver_ihl t.in_ipv4_ver_ihl
+ mov h.ipv4.diffserv t.in_ipv4_diffserv
+ mov h.ipv4.total_len t.in_ipv4_total_len
+ mov h.ipv4.identification t.in_ipv4_identification
+ mov h.ipv4.flags_offset t.in_ipv4_flags_offset
+ mov h.ipv4.ttl t.in_ipv4_ttl
+ mov h.ipv4.protocol t.in_ipv4_protocol
+ mov h.ipv4.hdr_checksum t.in_ipv4_hdr_checksum
+ mov h.ipv4.src_addr t.in_ipv4_src_addr
+ mov h.ipv4.dst_addr t.in_ipv4_dst_addr
+ validate h.ipv4
+
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table dma_006 {
+ key {
+ h.ethernet.dst_addr exact
+ }
+
+ actions {
+ dma_006_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.outer_ethernet
+ extract h.outer_ipv4
+ extract h.outer_udp
+ extract h.outer_vxlan
+ extract h.ethernet
+ extract h.ipv4
+ table dma_006
+ emit h.outer_ethernet
+ emit h.outer_ipv4
+ emit h.outer_udp
+ emit h.outer_vxlan
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/dma_006/ethdev.io b/dep/pipeline/dma_006/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/dma_006/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/dma_006/pcap_files/in_1.txt b/dep/pipeline/dma_006/pcap_files/in_1.txt
new file mode 100644
index 00000000..e6d6d4c6
--- /dev/null
+++ b/dep/pipeline/dma_006/pcap_files/in_1.txt
@@ -0,0 +1,15 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 c0 c1 c2 c3 00 00 08 00 45 00
+000010 00 60 00 00 00 00 40 11 e8 fa c0 c1 00 00 d0 d1
+000020 00 00 e0 00 12 b5 00 4c 00 00 00 00 00 00 00 00
+000030 00 00 aa bb cc dd 00 00 10 22 33 44 55 66 08 00
+000040 45 00 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a
+000050 c8 00 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00
+000060 50 02 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/dma_006/pcap_files/out_1.txt b/dep/pipeline/dma_006/pcap_files/out_1.txt
new file mode 100644
index 00000000..59703a1d
--- /dev/null
+++ b/dep/pipeline/dma_006/pcap_files/out_1.txt
@@ -0,0 +1,15 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 a0 a1 a2 a3 00 00 b0 b1 b2 b3 00 00 08 00 45 04
+000010 00 2e 00 01 00 00 50 11 b5 63 32 00 00 0b 16 00
+000020 00 05 d0 00 11 b4 00 4c 00 00 01 00 00 00 00 00
+000030 01 00 c0 c1 c2 c3 00 00 d0 d1 d2 d3 00 00 08 00
+000040 45 05 00 2f 00 02 00 00 60 06 a5 53 21 00 00 0a
+000050 30 00 00 05 00 64 00 c8 00 00 00 00 00 00 00 00
+000060 50 02 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/dma_006/readme.md b/dep/pipeline/dma_006/readme.md
new file mode 100644
index 00000000..d4a53e8d
--- /dev/null
+++ b/dep/pipeline/dma_006/readme.md
@@ -0,0 +1,16 @@
+
+Test Case: test_dma_006
+-----------------------
+
+ Instructions being tested:
+ mov h.header.field t.field (level 6)
+ validate h.header (level 6)
+
+ Description:
+ Based on the destination MAC address of the received packet outer
+ ethernet, outer ipv4, outer udp, outer vxlan, ethernet and ipv4 headers
+ are updated from the table.
+
+ Verification:
+ Transmitted packet should have the outer ethernet, outer ipv4, outer
+ udp, outer vxlan, ethernet and ipv4 headers as defined in the table.
diff --git a/dep/pipeline/dma_006/table.txt b/dep/pipeline/dma_006/table.txt
new file mode 100644
index 00000000..9d271cb4
--- /dev/null
+++ b/dep/pipeline/dma_006/table.txt
@@ -0,0 +1 @@
+match 0xaabbccdd0000 action dma_006_action out_ethernet_dst_addr 0xa0a1a2a30000 out_ethernet_src_addr 0xb0b1b2b30000 out_ethernet_ethertype 0x800 out_ipv4_ver_ihl 0x45 out_ipv4_diffserv 0x4 out_ipv4_total_len 0x2e out_ipv4_identification 0x1 out_ipv4_flags_offset 0x0 out_ipv4_ttl 0x50 out_ipv4_protocol 0x11 out_ipv4_hdr_checksum 0xb563 out_ipv4_src_addr 0x3200000b out_ipv4_dst_addr 0x16000005 out_udp_src_port 0xd000 out_udp_dst_port 0x11b4 out_udp_length 0x4c out_udp_checksum 0x0 out_vxlan_flags 0x1 out_vxlan_reserved 0x0 out_vxlan_vni 0x1 out_vxlan_reserved2 0x0 in_ethernet_dst_addr 0xc0c1c2c30000 in_ethernet_src_addr 0xd0d1d2d30000 in_ethernet_ethertype 0x800 in_ipv4_ver_ihl 0x45 in_ipv4_diffserv 0x5 in_ipv4_total_len 0x2f in_ipv4_identification 0x2 in_ipv4_flags_offset 0x0 in_ipv4_ttl 0x60 in_ipv4_protocol 0x6 in_ipv4_hdr_checksum 0xa553 in_ipv4_src_addr 0x2100000a in_ipv4_dst_addr 0x30000005
diff --git a/dep/pipeline/dma_007/dma_007.cli b/dep/pipeline/dma_007/dma_007.cli
new file mode 100644
index 00000000..5f862bdf
--- /dev/null
+++ b/dep/pipeline/dma_007/dma_007.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/dma_007/dma_007.spec /tmp/pipeline/dma_007/dma_007.c
+pipeline libbuild /tmp/pipeline/dma_007/dma_007.c /tmp/pipeline/dma_007/dma_007.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/dma_007/dma_007.so io /tmp/pipeline/dma_007/ethdev.io numa 0
+pipeline PIPELINE0 table dma_007 add /tmp/pipeline/dma_007/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/dma_007/dma_007.spec b/dep/pipeline/dma_007/dma_007.spec
new file mode 100644
index 00000000..55875b63
--- /dev/null
+++ b/dep/pipeline/dma_007/dma_007.spec
@@ -0,0 +1,218 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+struct udp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<16> length
+ bit<16> checksum
+}
+
+struct vxlan_h {
+ bit<8> flags
+ bit<24> reserved
+ bit<24> vni
+ bit<8> reserved2
+}
+
+struct tcp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<32> seq_num
+ bit<32> ack_num
+ bit<16> hdr_len_flags
+ bit<16> window_size
+ bit<16> checksum
+ bit<16> urg_ptr
+}
+
+header outer_ethernet instanceof ethernet_h
+header outer_ipv4 instanceof ipv4_h
+header outer_udp instanceof udp_h
+header outer_vxlan instanceof vxlan_h
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+header tcp instanceof tcp_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct dma_007_args_t {
+ bit<48> out_ethernet_dst_addr
+ bit<48> out_ethernet_src_addr
+ bit<16> out_ethernet_ethertype
+ bit<8> out_ipv4_ver_ihl
+ bit<8> out_ipv4_diffserv
+ bit<16> out_ipv4_total_len
+ bit<16> out_ipv4_identification
+ bit<16> out_ipv4_flags_offset
+ bit<8> out_ipv4_ttl
+ bit<8> out_ipv4_protocol
+ bit<16> out_ipv4_hdr_checksum
+ bit<32> out_ipv4_src_addr
+ bit<32> out_ipv4_dst_addr
+ bit<16> out_udp_src_port
+ bit<16> out_udp_dst_port
+ bit<16> out_udp_length
+ bit<16> out_udp_checksum
+ bit<8> out_vxlan_flags
+ bit<24> out_vxlan_reserved
+ bit<24> out_vxlan_vni
+ bit<8> out_vxlan_reserved2
+ bit<48> in_ethernet_dst_addr
+ bit<48> in_ethernet_src_addr
+ bit<16> in_ethernet_ethertype
+ bit<8> in_ipv4_ver_ihl
+ bit<8> in_ipv4_diffserv
+ bit<16> in_ipv4_total_len
+ bit<16> in_ipv4_identification
+ bit<16> in_ipv4_flags_offset
+ bit<8> in_ipv4_ttl
+ bit<8> in_ipv4_protocol
+ bit<16> in_ipv4_hdr_checksum
+ bit<32> in_ipv4_src_addr
+ bit<32> in_ipv4_dst_addr
+ bit<16> tcp_src_port
+ bit<16> tcp_dst_port
+ bit<32> tcp_seq_num
+ bit<32> tcp_ack_num
+ bit<16> tcp_hdr_len_flags
+ bit<16> tcp_window_size
+ bit<16> tcp_checksum
+ bit<16> tcp_urg_ptr
+}
+
+action dma_007_action args instanceof dma_007_args_t {
+ mov h.outer_ethernet.dst_addr t.out_ethernet_dst_addr
+ mov h.outer_ethernet.src_addr t.out_ethernet_src_addr
+ mov h.outer_ethernet.ethertype t.out_ethernet_ethertype
+ validate h.outer_ethernet
+
+ mov h.outer_ipv4.ver_ihl t.out_ipv4_ver_ihl
+ mov h.outer_ipv4.diffserv t.out_ipv4_diffserv
+ mov h.outer_ipv4.total_len t.out_ipv4_total_len
+ mov h.outer_ipv4.identification t.out_ipv4_identification
+ mov h.outer_ipv4.flags_offset t.out_ipv4_flags_offset
+ mov h.outer_ipv4.ttl t.out_ipv4_ttl
+ mov h.outer_ipv4.protocol t.out_ipv4_protocol
+ mov h.outer_ipv4.hdr_checksum t.out_ipv4_hdr_checksum
+ mov h.outer_ipv4.src_addr t.out_ipv4_src_addr
+ mov h.outer_ipv4.dst_addr t.out_ipv4_dst_addr
+ validate h.outer_ipv4
+
+ mov h.outer_udp.src_port t.out_udp_src_port
+ mov h.outer_udp.dst_port t.out_udp_dst_port
+ mov h.outer_udp.length t.out_udp_length
+ mov h.outer_udp.checksum t.out_udp_checksum
+ validate h.outer_udp
+
+ mov h.outer_vxlan.flags t.out_vxlan_flags
+ mov h.outer_vxlan.reserved t.out_vxlan_reserved
+ mov h.outer_vxlan.vni t.out_vxlan_vni
+ mov h.outer_vxlan.reserved2 t.out_vxlan_reserved2
+ validate h.outer_vxlan
+
+ mov h.ethernet.dst_addr t.in_ethernet_dst_addr
+ mov h.ethernet.src_addr t.in_ethernet_src_addr
+ mov h.ethernet.ethertype t.in_ethernet_ethertype
+ validate h.ethernet
+
+ mov h.ipv4.ver_ihl t.in_ipv4_ver_ihl
+ mov h.ipv4.diffserv t.in_ipv4_diffserv
+ mov h.ipv4.total_len t.in_ipv4_total_len
+ mov h.ipv4.identification t.in_ipv4_identification
+ mov h.ipv4.flags_offset t.in_ipv4_flags_offset
+ mov h.ipv4.ttl t.in_ipv4_ttl
+ mov h.ipv4.protocol t.in_ipv4_protocol
+ mov h.ipv4.hdr_checksum t.in_ipv4_hdr_checksum
+ mov h.ipv4.src_addr t.in_ipv4_src_addr
+ mov h.ipv4.dst_addr t.in_ipv4_dst_addr
+ validate h.ipv4
+
+ mov h.tcp.src_port t.tcp_src_port
+ mov h.tcp.dst_port t.tcp_dst_port
+ mov h.tcp.seq_num t.tcp_seq_num
+ mov h.tcp.ack_num t.tcp_ack_num
+ mov h.tcp.hdr_len_flags t.tcp_hdr_len_flags
+ mov h.tcp.window_size t.tcp_window_size
+ mov h.tcp.checksum t.tcp_checksum
+ mov h.tcp.urg_ptr t.tcp_urg_ptr
+ validate h.tcp
+
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table dma_007 {
+ key {
+ h.ethernet.dst_addr exact
+ }
+
+ actions {
+ dma_007_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.outer_ethernet
+ extract h.outer_ipv4
+ extract h.outer_udp
+ extract h.outer_vxlan
+ extract h.ethernet
+ extract h.ipv4
+ extract h.tcp
+ table dma_007
+ emit h.outer_ethernet
+ emit h.outer_ipv4
+ emit h.outer_udp
+ emit h.outer_vxlan
+ emit h.ethernet
+ emit h.ipv4
+ emit h.tcp
+ tx m.port
+}
diff --git a/dep/pipeline/dma_007/ethdev.io b/dep/pipeline/dma_007/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/dma_007/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/dma_007/pcap_files/in_1.txt b/dep/pipeline/dma_007/pcap_files/in_1.txt
new file mode 100644
index 00000000..e6d6d4c6
--- /dev/null
+++ b/dep/pipeline/dma_007/pcap_files/in_1.txt
@@ -0,0 +1,15 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 c0 c1 c2 c3 00 00 08 00 45 00
+000010 00 60 00 00 00 00 40 11 e8 fa c0 c1 00 00 d0 d1
+000020 00 00 e0 00 12 b5 00 4c 00 00 00 00 00 00 00 00
+000030 00 00 aa bb cc dd 00 00 10 22 33 44 55 66 08 00
+000040 45 00 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a
+000050 c8 00 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00
+000060 50 02 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/dma_007/pcap_files/out_1.txt b/dep/pipeline/dma_007/pcap_files/out_1.txt
new file mode 100644
index 00000000..170a0a3d
--- /dev/null
+++ b/dep/pipeline/dma_007/pcap_files/out_1.txt
@@ -0,0 +1,15 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 a0 a1 a2 a3 00 00 b0 b1 b2 b3 00 00 08 00 45 04
+000010 00 2e 00 01 00 00 50 11 b5 63 32 00 00 0b 16 00
+000020 00 05 d0 00 11 b4 00 4c 00 00 01 00 00 00 00 00
+000030 01 00 c0 c1 c2 c3 00 00 d0 d1 d2 d3 00 00 08 00
+000040 45 05 00 2f 00 02 00 00 60 06 a5 53 21 00 00 0a
+000050 30 00 00 05 00 65 00 c9 00 00 00 03 00 00 00 02
+000060 50 03 10 00 59 83 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/dma_007/readme.md b/dep/pipeline/dma_007/readme.md
new file mode 100644
index 00000000..77125453
--- /dev/null
+++ b/dep/pipeline/dma_007/readme.md
@@ -0,0 +1,17 @@
+
+Test Case: test_dma_007
+-----------------------
+
+ Instructions being tested:
+ mov h.header.field t.field (level 7)
+ validate h.header (level 7)
+
+ Description:
+ Based on the destination MAC address of the received packet outer
+ ethernet, outer ipv4, outer udp, outer vxlan, ethernet, ipv4 and tcp
+ headers are updated from the table.
+
+ Verification:
+ Transmitted packet should have the outer ethernet, outer ipv4, outer
+ udp, outer vxlan, ethernet, ipv4 and tcp headers as defined in the
+ table.
diff --git a/dep/pipeline/dma_007/table.txt b/dep/pipeline/dma_007/table.txt
new file mode 100644
index 00000000..4231a87f
--- /dev/null
+++ b/dep/pipeline/dma_007/table.txt
@@ -0,0 +1 @@
+match 0xaabbccdd0000 action dma_007_action out_ethernet_dst_addr 0xa0a1a2a30000 out_ethernet_src_addr 0xb0b1b2b30000 out_ethernet_ethertype 0x0800 out_ipv4_ver_ihl 0x45 out_ipv4_diffserv 0x04 out_ipv4_total_len 0x002e out_ipv4_identification 0x0001 out_ipv4_flags_offset 0x0000 out_ipv4_ttl 0x50 out_ipv4_protocol 0x11 out_ipv4_hdr_checksum 0xb563 out_ipv4_src_addr 0x3200000b out_ipv4_dst_addr 0x16000005 out_udp_src_port 0xd000 out_udp_dst_port 0x11b4 out_udp_length 0x004c out_udp_checksum 0x0000 out_vxlan_flags 0x01 out_vxlan_reserved 0x000000 out_vxlan_vni 0x000001 out_vxlan_reserved2 0x00 in_ethernet_dst_addr 0xc0c1c2c30000 in_ethernet_src_addr 0xd0d1d2d30000 in_ethernet_ethertype 0x0800 in_ipv4_ver_ihl 0x45 in_ipv4_diffserv 0x05 in_ipv4_total_len 0x002f in_ipv4_identification 0x0002 in_ipv4_flags_offset 0x0000 in_ipv4_ttl 0x60 in_ipv4_protocol 0x06 in_ipv4_hdr_checksum 0xa553 in_ipv4_src_addr 0x2100000a in_ipv4_dst_addr 0x30000005 tcp_src_port 0x0065 tcp_dst_port 0x00c9 tcp_seq_num 0x00000003 tcp_ack_num 0x00000002 tcp_hdr_len_flags 0x5003 tcp_window_size 0x1000 tcp_checksum 0x5983 tcp_urg_ptr 0x0000
diff --git a/dep/pipeline/dma_008/dma_008.cli b/dep/pipeline/dma_008/dma_008.cli
new file mode 100644
index 00000000..41fcfc49
--- /dev/null
+++ b/dep/pipeline/dma_008/dma_008.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/dma_008/dma_008.spec /tmp/pipeline/dma_008/dma_008.c
+pipeline libbuild /tmp/pipeline/dma_008/dma_008.c /tmp/pipeline/dma_008/dma_008.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/dma_008/dma_008.so io /tmp/pipeline/dma_008/ethdev.io numa 0
+pipeline PIPELINE0 table dma_008 add /tmp/pipeline/dma_008/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/dma_008/dma_008.spec b/dep/pipeline/dma_008/dma_008.spec
new file mode 100644
index 00000000..d05f3009
--- /dev/null
+++ b/dep/pipeline/dma_008/dma_008.spec
@@ -0,0 +1,238 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_1_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ethernet_2_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+}
+
+struct vlan_h {
+ bit<16> tpid
+ bit<16> pcp_dei_vid
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+struct udp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<16> length
+ bit<16> checksum
+}
+
+struct vxlan_h {
+ bit<8> flags
+ bit<24> reserved
+ bit<24> vni
+ bit<8> reserved2
+}
+
+struct tcp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<32> seq_num
+ bit<32> ack_num
+ bit<16> hdr_len_flags
+ bit<16> window_size
+ bit<16> checksum
+ bit<16> urg_ptr
+}
+
+header outer_ethernet instanceof ethernet_1_h
+header outer_ipv4 instanceof ipv4_h
+header outer_udp instanceof udp_h
+header outer_vxlan instanceof vxlan_h
+header ethernet instanceof ethernet_2_h
+header vlan instanceof vlan_h
+header ipv4 instanceof ipv4_h
+header tcp instanceof tcp_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct dma_008_args_t {
+ bit<48> out_ethernet_dst_addr
+ bit<48> out_ethernet_src_addr
+ bit<16> out_ethernet_ethertype
+ bit<8> out_ipv4_ver_ihl
+ bit<8> out_ipv4_diffserv
+ bit<16> out_ipv4_total_len
+ bit<16> out_ipv4_identification
+ bit<16> out_ipv4_flags_offset
+ bit<8> out_ipv4_ttl
+ bit<8> out_ipv4_protocol
+ bit<16> out_ipv4_hdr_checksum
+ bit<32> out_ipv4_src_addr
+ bit<32> out_ipv4_dst_addr
+ bit<16> out_udp_src_port
+ bit<16> out_udp_dst_port
+ bit<16> out_udp_length
+ bit<16> out_udp_checksum
+ bit<8> out_vxlan_flags
+ bit<24> out_vxlan_reserved
+ bit<24> out_vxlan_vni
+ bit<8> out_vxlan_reserved2
+ bit<48> in_ethernet_dst_addr
+ bit<48> in_ethernet_src_addr
+ bit<16> vlan_tpid
+ bit<16> vlan_pcp_dei_vid
+ bit<16> vlan_ethertype
+ bit<8> in_ipv4_ver_ihl
+ bit<8> in_ipv4_diffserv
+ bit<16> in_ipv4_total_len
+ bit<16> in_ipv4_identification
+ bit<16> in_ipv4_flags_offset
+ bit<8> in_ipv4_ttl
+ bit<8> in_ipv4_protocol
+ bit<16> in_ipv4_hdr_checksum
+ bit<32> in_ipv4_src_addr
+ bit<32> in_ipv4_dst_addr
+ bit<16> tcp_src_port
+ bit<16> tcp_dst_port
+ bit<32> tcp_seq_num
+ bit<32> tcp_ack_num
+ bit<16> tcp_hdr_len_flags
+ bit<16> tcp_window_size
+ bit<16> tcp_checksum
+ bit<16> tcp_urg_ptr
+}
+
+action dma_008_action args instanceof dma_008_args_t {
+ mov h.outer_ethernet.dst_addr t.out_ethernet_dst_addr
+ mov h.outer_ethernet.src_addr t.out_ethernet_src_addr
+ mov h.outer_ethernet.ethertype t.out_ethernet_ethertype
+ validate h.outer_ethernet
+
+ mov h.outer_ipv4.ver_ihl t.out_ipv4_ver_ihl
+ mov h.outer_ipv4.diffserv t.out_ipv4_diffserv
+ mov h.outer_ipv4.total_len t.out_ipv4_total_len
+ mov h.outer_ipv4.identification t.out_ipv4_identification
+ mov h.outer_ipv4.flags_offset t.out_ipv4_flags_offset
+ mov h.outer_ipv4.ttl t.out_ipv4_ttl
+ mov h.outer_ipv4.protocol t.out_ipv4_protocol
+ mov h.outer_ipv4.hdr_checksum t.out_ipv4_hdr_checksum
+ mov h.outer_ipv4.src_addr t.out_ipv4_src_addr
+ mov h.outer_ipv4.dst_addr t.out_ipv4_dst_addr
+ validate h.outer_ipv4
+
+ mov h.outer_udp.src_port t.out_udp_src_port
+ mov h.outer_udp.dst_port t.out_udp_dst_port
+ mov h.outer_udp.length t.out_udp_length
+ mov h.outer_udp.checksum t.out_udp_checksum
+ validate h.outer_udp
+
+ mov h.outer_vxlan.flags t.out_vxlan_flags
+ mov h.outer_vxlan.reserved t.out_vxlan_reserved
+ mov h.outer_vxlan.vni t.out_vxlan_vni
+ mov h.outer_vxlan.reserved2 t.out_vxlan_reserved2
+ validate h.outer_vxlan
+
+ mov h.ethernet.dst_addr t.in_ethernet_dst_addr
+ mov h.ethernet.src_addr t.in_ethernet_src_addr
+ validate h.ethernet
+
+ mov h.vlan.tpid t.vlan_tpid
+ mov h.vlan.pcp_dei_vid t.vlan_pcp_dei_vid
+ mov h.vlan.ethertype t.vlan_ethertype
+ validate h.vlan
+
+ mov h.ipv4.ver_ihl t.in_ipv4_ver_ihl
+ mov h.ipv4.diffserv t.in_ipv4_diffserv
+ mov h.ipv4.total_len t.in_ipv4_total_len
+ mov h.ipv4.identification t.in_ipv4_identification
+ mov h.ipv4.flags_offset t.in_ipv4_flags_offset
+ mov h.ipv4.ttl t.in_ipv4_ttl
+ mov h.ipv4.protocol t.in_ipv4_protocol
+ mov h.ipv4.hdr_checksum t.in_ipv4_hdr_checksum
+ mov h.ipv4.src_addr t.in_ipv4_src_addr
+ mov h.ipv4.dst_addr t.in_ipv4_dst_addr
+ validate h.ipv4
+
+ mov h.tcp.src_port t.tcp_src_port
+ mov h.tcp.dst_port t.tcp_dst_port
+ mov h.tcp.seq_num t.tcp_seq_num
+ mov h.tcp.ack_num t.tcp_ack_num
+ mov h.tcp.hdr_len_flags t.tcp_hdr_len_flags
+ mov h.tcp.window_size t.tcp_window_size
+ mov h.tcp.checksum t.tcp_checksum
+ mov h.tcp.urg_ptr t.tcp_urg_ptr
+ validate h.tcp
+
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table dma_008 {
+ key {
+ h.ethernet.dst_addr exact
+ }
+
+ actions {
+ dma_008_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.outer_ethernet
+ extract h.outer_ipv4
+ extract h.outer_udp
+ extract h.outer_vxlan
+ extract h.ethernet
+ extract h.vlan
+ extract h.ipv4
+ extract h.tcp
+ table dma_008
+ emit h.outer_ethernet
+ emit h.outer_ipv4
+ emit h.outer_udp
+ emit h.outer_vxlan
+ emit h.ethernet
+ emit h.vlan
+ emit h.ipv4
+ emit h.tcp
+ tx m.port
+}
diff --git a/dep/pipeline/dma_008/ethdev.io b/dep/pipeline/dma_008/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/dma_008/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/dma_008/pcap_files/in_1.txt b/dep/pipeline/dma_008/pcap_files/in_1.txt
new file mode 100644
index 00000000..22a28371
--- /dev/null
+++ b/dep/pipeline/dma_008/pcap_files/in_1.txt
@@ -0,0 +1,16 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 c0 c1 c2 c3 00 00 08 00 45 00
+000010 00 60 00 00 00 00 40 11 e8 fa c0 c1 00 00 d0 d1
+000020 00 00 e0 00 12 b5 00 4c 00 00 00 00 00 00 00 00
+000030 00 00 aa bb cc dd 00 00 10 22 33 44 55 66 81 00
+000040 01 23 08 00 45 00 00 2e 00 01 00 00 40 06 4e b5
+000050 64 00 00 0a c8 00 00 0a 00 64 00 c8 00 00 00 00
+000060 00 00 00 00 50 02 20 00 59 93 00 00 58 58 58 58
+000070 58 58
diff --git a/dep/pipeline/dma_008/pcap_files/out_1.txt b/dep/pipeline/dma_008/pcap_files/out_1.txt
new file mode 100644
index 00000000..4b32613e
--- /dev/null
+++ b/dep/pipeline/dma_008/pcap_files/out_1.txt
@@ -0,0 +1,16 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 a0 a1 a2 a3 00 00 b0 b1 b2 b3 00 00 08 00 45 04
+000010 00 2e 00 01 00 00 50 11 b5 63 32 00 00 0b 16 00
+000020 00 05 d0 00 11 b4 00 4c 00 00 01 00 00 00 00 00
+000030 01 00 c0 c1 c2 c3 00 00 d0 d1 d2 d3 00 00 81 00
+000040 01 25 08 00 45 05 00 2f 00 02 00 00 60 06 a5 53
+000050 21 00 00 0a 30 00 00 05 00 65 00 c9 00 00 00 03
+000060 00 00 00 02 50 03 10 00 59 83 00 00 58 58 58 58
+000070 58 58
diff --git a/dep/pipeline/dma_008/readme.md b/dep/pipeline/dma_008/readme.md
new file mode 100644
index 00000000..89c4433d
--- /dev/null
+++ b/dep/pipeline/dma_008/readme.md
@@ -0,0 +1,17 @@
+
+Test Case: test_dma_008
+-----------------------
+
+ Instructions being tested:
+ dma h.header.field t.field (level 8)
+ validate h.header (level 8)
+
+ Description:
+ Based on the destination MAC address of the received packet outer
+ ethernet, outer ipv4, outer udp, outer vxlan, ethernet, vlan, ipv4 and
+ tcp headers are updated from the table.
+
+ Verification:
+ Transmitted packet should have the outer ethernet, outer ipv4, outer
+ udp, outer vxlan, ethernet, vlan, ipv4 and tcp headers as defined in
+ the table.
diff --git a/dep/pipeline/dma_008/table.txt b/dep/pipeline/dma_008/table.txt
new file mode 100644
index 00000000..c56714e6
--- /dev/null
+++ b/dep/pipeline/dma_008/table.txt
@@ -0,0 +1 @@
+match 0xaabbccdd0000 action dma_008_action out_ethernet_dst_addr 0xa0a1a2a30000 out_ethernet_src_addr 0xb0b1b2b30000 out_ethernet_ethertype 0x800 out_ipv4_ver_ihl 0x45 out_ipv4_diffserv 0x4 out_ipv4_total_len 0x2e out_ipv4_identification 0x1 out_ipv4_flags_offset 0x0 out_ipv4_ttl 0x50 out_ipv4_protocol 0x11 out_ipv4_hdr_checksum 0xb563 out_ipv4_src_addr 0x3200000b out_ipv4_dst_addr 0x16000005 out_udp_src_port 0xd000 out_udp_dst_port 0x11b4 out_udp_length 0x4c out_udp_checksum 0x0 out_vxlan_flags 0x1 out_vxlan_reserved 0x0 out_vxlan_vni 0x1 out_vxlan_reserved2 0x0 in_ethernet_dst_addr 0xc0c1c2c30000 in_ethernet_src_addr 0xd0d1d2d30000 vlan_tpid 0x8100 vlan_pcp_dei_vid 0x125 vlan_ethertype 0x800 in_ipv4_ver_ihl 0x45 in_ipv4_diffserv 0x5 in_ipv4_total_len 0x2f in_ipv4_identification 0x2 in_ipv4_flags_offset 0x0 in_ipv4_ttl 0x60 in_ipv4_protocol 0x6 in_ipv4_hdr_checksum 0xa553 in_ipv4_src_addr 0x2100000a in_ipv4_dst_addr 0x30000005 tcp_src_port 0x65 tcp_dst_port 0xc9 tcp_seq_num 0x3 tcp_ack_num 0x2 tcp_hdr_len_flags 0x5003 tcp_window_size 0x1000 tcp_checksum 0x5983 tcp_urg_ptr 0x0
--git a/dep/pipeline/extract_emit_001/ethdev.io b/dep/pipeline/extract_emit_001/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/extract_emit_001/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
--git a/dep/pipeline/extract_emit_001/extract_emit_001.cli b/dep/pipeline/extract_emit_001/extract_emit_001.cli
new file mode 100644
index 00000000..edda1b7f
--- /dev/null
+++ b/dep/pipeline/extract_emit_001/extract_emit_001.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/extract_emit_001/extract_emit_001.spec /tmp/pipeline/extract_emit_001/extract_emit_001.c
+pipeline libbuild /tmp/pipeline/extract_emit_001/extract_emit_001.c /tmp/pipeline/extract_emit_001/extract_emit_001.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/extract_emit_001/extract_emit_001.so io /tmp/pipeline/extract_emit_001/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
--git a/dep/pipeline/extract_emit_001/extract_emit_001.spec b/dep/pipeline/extract_emit_001/extract_emit_001.spec
new file mode 100644
index 00000000..cc9ca53c
--- /dev/null
+++ b/dep/pipeline/extract_emit_001/extract_emit_001.spec
@@ -0,0 +1,32 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ emit h.ethernet
+ tx m.port
+}
--git a/dep/pipeline/extract_emit_001/pcap_files/in_1.txt b/dep/pipeline/extract_emit_001/pcap_files/in_1.txt
new file mode 100644
index 00000000..75115c15
--- /dev/null
+++ b/dep/pipeline/extract_emit_001/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
--git a/dep/pipeline/extract_emit_001/pcap_files/out_1.txt b/dep/pipeline/extract_emit_001/pcap_files/out_1.txt
new file mode 100644
index 00000000..75115c15
--- /dev/null
+++ b/dep/pipeline/extract_emit_001/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
--git a/dep/pipeline/extract_emit_001/readme.md b/dep/pipeline/extract_emit_001/readme.md
new file mode 100644
index 00000000..c461f705
--- /dev/null
+++ b/dep/pipeline/extract_emit_001/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_extract_emit_001
+--------------------------------
+ Instructions being tested:
+ extract h.field
+ emit h.field
+
+ Description:
+ For the received packet, extract its ethernet header and without modifying it, transmit the packet back on the same port.
+
+ Verification:
+ The transmitted packet should be same as that of the received packet.
--git a/dep/pipeline/extract_emit_002/ethdev.io b/dep/pipeline/extract_emit_002/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/extract_emit_002/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
--git a/dep/pipeline/extract_emit_002/extract_emit_002.cli b/dep/pipeline/extract_emit_002/extract_emit_002.cli
new file mode 100644
index 00000000..2c471add
--- /dev/null
+++ b/dep/pipeline/extract_emit_002/extract_emit_002.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/extract_emit_002/extract_emit_002.spec /tmp/pipeline/extract_emit_002/extract_emit_002.c
+pipeline libbuild /tmp/pipeline/extract_emit_002/extract_emit_002.c /tmp/pipeline/extract_emit_002/extract_emit_002.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/extract_emit_002/extract_emit_002.so io /tmp/pipeline/extract_emit_002/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
--git a/dep/pipeline/extract_emit_002/extract_emit_002.spec b/dep/pipeline/extract_emit_002/extract_emit_002.spec
new file mode 100644
index 00000000..03cb58d6
--- /dev/null
+++ b/dep/pipeline/extract_emit_002/extract_emit_002.spec
@@ -0,0 +1,49 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ipv4 instanceof ipv4_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
--git a/dep/pipeline/extract_emit_002/pcap_files/in_1.txt b/dep/pipeline/extract_emit_002/pcap_files/in_1.txt
new file mode 100644
index 00000000..75115c15
--- /dev/null
+++ b/dep/pipeline/extract_emit_002/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
--git a/dep/pipeline/extract_emit_002/pcap_files/out_1.txt b/dep/pipeline/extract_emit_002/pcap_files/out_1.txt
new file mode 100644
index 00000000..75115c15
--- /dev/null
+++ b/dep/pipeline/extract_emit_002/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
--git a/dep/pipeline/extract_emit_002/readme.md b/dep/pipeline/extract_emit_002/readme.md
new file mode 100644
index 00000000..92f0dbd8
--- /dev/null
+++ b/dep/pipeline/extract_emit_002/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_extract_emit_002
+--------------------------------
+ Instructions being tested:
+ extract h.field (level 2)
+ emit h.field (level 2)
+
+ Description:
+ For the received packet, extract its ethernet and ipv4 header and without modifying it, transmit the packet back on the same port.
+
+ Verification:
+ The transmitted packet should be same as that of the received packet.
--git a/dep/pipeline/extract_emit_003/ethdev.io b/dep/pipeline/extract_emit_003/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/extract_emit_003/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
--git a/dep/pipeline/extract_emit_003/extract_emit_003.cli b/dep/pipeline/extract_emit_003/extract_emit_003.cli
new file mode 100644
index 00000000..e5187481
--- /dev/null
+++ b/dep/pipeline/extract_emit_003/extract_emit_003.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/extract_emit_003/extract_emit_003.spec /tmp/pipeline/extract_emit_003/extract_emit_003.c
+pipeline libbuild /tmp/pipeline/extract_emit_003/extract_emit_003.c /tmp/pipeline/extract_emit_003/extract_emit_003.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/extract_emit_003/extract_emit_003.so io /tmp/pipeline/extract_emit_003/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
--git a/dep/pipeline/extract_emit_003/extract_emit_003.spec b/dep/pipeline/extract_emit_003/extract_emit_003.spec
new file mode 100644
index 00000000..e3fd1509
--- /dev/null
+++ b/dep/pipeline/extract_emit_003/extract_emit_003.spec
@@ -0,0 +1,64 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ipv4 instanceof ipv4_h
+
+struct tcp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<32> seq_num
+ bit<32> ack_num
+ bit<16> hdr_len_flags
+ bit<16> window_size
+ bit<16> checksum
+ bit<16> urg_ptr
+}
+
+header tcp instanceof tcp_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ extract h.tcp
+ emit h.ethernet
+ emit h.ipv4
+ emit h.tcp
+ tx m.port
+}
--git a/dep/pipeline/extract_emit_003/pcap_files/in_1.txt b/dep/pipeline/extract_emit_003/pcap_files/in_1.txt
new file mode 100644
index 00000000..75115c15
--- /dev/null
+++ b/dep/pipeline/extract_emit_003/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
--git a/dep/pipeline/extract_emit_003/pcap_files/out_1.txt b/dep/pipeline/extract_emit_003/pcap_files/out_1.txt
new file mode 100644
index 00000000..75115c15
--- /dev/null
+++ b/dep/pipeline/extract_emit_003/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
--git a/dep/pipeline/extract_emit_003/readme.md b/dep/pipeline/extract_emit_003/readme.md
new file mode 100644
index 00000000..0dd6f2b0
--- /dev/null
+++ b/dep/pipeline/extract_emit_003/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_extract_emit_003
+--------------------------------
+ Instructions being tested:
+ extract h.field (level 3)
+ emit h.field (level 3)
+
+ Description:
+ For the received packet, extract its ethernet, ipv4 and tcp header and without modifying it, transmit the packet back on the same port.
+
+ Verification:
+ The transmitted packet should be same as that of the received packet.
--git a/dep/pipeline/extract_emit_004/ethdev.io b/dep/pipeline/extract_emit_004/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/extract_emit_004/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
--git a/dep/pipeline/extract_emit_004/extract_emit_004.cli b/dep/pipeline/extract_emit_004/extract_emit_004.cli
new file mode 100644
index 00000000..bbe939a8
--- /dev/null
+++ b/dep/pipeline/extract_emit_004/extract_emit_004.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/extract_emit_004/extract_emit_004.spec /tmp/pipeline/extract_emit_004/extract_emit_004.c
+pipeline libbuild /tmp/pipeline/extract_emit_004/extract_emit_004.c /tmp/pipeline/extract_emit_004/extract_emit_004.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/extract_emit_004/extract_emit_004.so io /tmp/pipeline/extract_emit_004/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
--git a/dep/pipeline/extract_emit_004/extract_emit_004.spec b/dep/pipeline/extract_emit_004/extract_emit_004.spec
new file mode 100644
index 00000000..6708eefb
--- /dev/null
+++ b/dep/pipeline/extract_emit_004/extract_emit_004.spec
@@ -0,0 +1,73 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+}
+
+header ethernet instanceof ethernet_h
+
+struct vlan_h {
+ bit<16> tpid
+ bit<16> pcp_dei_vid
+ bit<16> ether_type
+}
+
+header vlan instanceof vlan_h
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ipv4 instanceof ipv4_h
+
+struct tcp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<32> seq_num
+ bit<32> ack_num
+ bit<16> hdr_len_flags
+ bit<16> window_size
+ bit<16> checksum
+ bit<16> urg_ptr
+}
+
+header tcp instanceof tcp_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.vlan
+ extract h.ipv4
+ extract h.tcp
+ emit h.ethernet
+ emit h.vlan
+ emit h.ipv4
+ emit h.tcp
+ tx m.port
+}
--git a/dep/pipeline/extract_emit_004/pcap_files/in_1.txt b/dep/pipeline/extract_emit_004/pcap_files/in_1.txt
new file mode 100644
index 00000000..ddcb4753
--- /dev/null
+++ b/dep/pipeline/extract_emit_004/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 81 00 01 23
+000010 08 00 45 00 00 2e 00 01 00 00 40 06 4e b5 64 00
+000020 00 0a c8 00 00 0a 00 64 00 c8 00 00 00 00 00 00
+000030 00 00 50 02 20 00 59 93 00 00 58 58 58 58 58 58
--git a/dep/pipeline/extract_emit_004/pcap_files/out_1.txt b/dep/pipeline/extract_emit_004/pcap_files/out_1.txt
new file mode 100644
index 00000000..ddcb4753
--- /dev/null
+++ b/dep/pipeline/extract_emit_004/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 81 00 01 23
+000010 08 00 45 00 00 2e 00 01 00 00 40 06 4e b5 64 00
+000020 00 0a c8 00 00 0a 00 64 00 c8 00 00 00 00 00 00
+000030 00 00 50 02 20 00 59 93 00 00 58 58 58 58 58 58
--git a/dep/pipeline/extract_emit_004/readme.md b/dep/pipeline/extract_emit_004/readme.md
new file mode 100644
index 00000000..3b5c4a95
--- /dev/null
+++ b/dep/pipeline/extract_emit_004/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_extract_emit_004
+--------------------------------
+ Instructions being tested:
+ extract h.field (level 4)
+ emit h.field (level 4)
+
+ Description:
+ For the received packet, extract its ethernet, vlan, ipv4 and tcp header and without modifying it, transmit the packet back on the same port.
+
+ Verification:
+ The transmitted packet should be same as that of the received packet.
--git a/dep/pipeline/extract_emit_005/ethdev.io b/dep/pipeline/extract_emit_005/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/extract_emit_005/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
--git a/dep/pipeline/extract_emit_005/extract_emit_005.cli b/dep/pipeline/extract_emit_005/extract_emit_005.cli
new file mode 100644
index 00000000..e2a9f69c
--- /dev/null
+++ b/dep/pipeline/extract_emit_005/extract_emit_005.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/extract_emit_005/extract_emit_005.spec /tmp/pipeline/extract_emit_005/extract_emit_005.c
+pipeline libbuild /tmp/pipeline/extract_emit_005/extract_emit_005.c /tmp/pipeline/extract_emit_005/extract_emit_005.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/extract_emit_005/extract_emit_005.so io /tmp/pipeline/extract_emit_005/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
--git a/dep/pipeline/extract_emit_005/extract_emit_005.spec b/dep/pipeline/extract_emit_005/extract_emit_005.spec
new file mode 100644
index 00000000..ad21e1d6
--- /dev/null
+++ b/dep/pipeline/extract_emit_005/extract_emit_005.spec
@@ -0,0 +1,76 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+}
+
+header ethernet instanceof ethernet_h
+
+struct vlan_h {
+ bit<16> tpid
+ bit<16> pcp_dei_vid
+ bit<16> ether_type
+}
+
+header vlan_1 instanceof vlan_h
+header vlan_2 instanceof vlan_h
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ipv4 instanceof ipv4_h
+
+struct tcp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<32> seq_num
+ bit<32> ack_num
+ bit<16> hdr_len_flags
+ bit<16> window_size
+ bit<16> checksum
+ bit<16> urg_ptr
+}
+
+header tcp instanceof tcp_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.vlan_1
+ extract h.vlan_2
+ extract h.ipv4
+ extract h.tcp
+ emit h.ethernet
+ emit h.vlan_1
+ emit h.vlan_2
+ emit h.ipv4
+ emit h.tcp
+ tx m.port
+}
--git a/dep/pipeline/extract_emit_005/pcap_files/in_1.txt b/dep/pipeline/extract_emit_005/pcap_files/in_1.txt
new file mode 100644
index 00000000..c7773d2e
--- /dev/null
+++ b/dep/pipeline/extract_emit_005/pcap_files/in_1.txt
@@ -0,0 +1,13 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 81 00 01 23
+000010 81 00 01 33 08 00 45 00 00 2e 00 01 00 00 40 06
+000020 4e b5 64 00 00 0a c8 00 00 0a 00 64 00 c8 00 00
+000030 00 00 00 00 00 00 50 02 20 00 59 93 00 00 58 58
+000040 58 58 58 58
--git a/dep/pipeline/extract_emit_005/pcap_files/out_1.txt b/dep/pipeline/extract_emit_005/pcap_files/out_1.txt
new file mode 100644
index 00000000..c7773d2e
--- /dev/null
+++ b/dep/pipeline/extract_emit_005/pcap_files/out_1.txt
@@ -0,0 +1,13 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 81 00 01 23
+000010 81 00 01 33 08 00 45 00 00 2e 00 01 00 00 40 06
+000020 4e b5 64 00 00 0a c8 00 00 0a 00 64 00 c8 00 00
+000030 00 00 00 00 00 00 50 02 20 00 59 93 00 00 58 58
+000040 58 58 58 58
--git a/dep/pipeline/extract_emit_005/readme.md b/dep/pipeline/extract_emit_005/readme.md
new file mode 100644
index 00000000..c4245675
--- /dev/null
+++ b/dep/pipeline/extract_emit_005/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_extract_emit_005
+--------------------------------
+ Instructions being tested:
+ extract h.field (level 5)
+ emit h.field (level 5)
+
+ Description:
+ For the received packet, extract its ethernet, vlan 1, vlan 2, ipv4 and tcp header and without modifying it, transmit the packet back on the same port.
+
+ Verification:
+ The transmitted packet should be same as that of the received packet.
--git a/dep/pipeline/extract_emit_006/ethdev.io b/dep/pipeline/extract_emit_006/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/extract_emit_006/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
--git a/dep/pipeline/extract_emit_006/extract_emit_006.cli b/dep/pipeline/extract_emit_006/extract_emit_006.cli
new file mode 100644
index 00000000..44cc65ab
--- /dev/null
+++ b/dep/pipeline/extract_emit_006/extract_emit_006.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/extract_emit_006/extract_emit_006.spec /tmp/pipeline/extract_emit_006/extract_emit_006.c
+pipeline libbuild /tmp/pipeline/extract_emit_006/extract_emit_006.c /tmp/pipeline/extract_emit_006/extract_emit_006.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/extract_emit_006/extract_emit_006.so io /tmp/pipeline/extract_emit_006/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
--git a/dep/pipeline/extract_emit_006/extract_emit_006.spec b/dep/pipeline/extract_emit_006/extract_emit_006.spec
new file mode 100644
index 00000000..4fafeecb
--- /dev/null
+++ b/dep/pipeline/extract_emit_006/extract_emit_006.spec
@@ -0,0 +1,77 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header outer_ethernet instanceof ethernet_h
+header ethernet instanceof ethernet_h
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header outer_ipv4 instanceof ipv4_h
+header ipv4 instanceof ipv4_h
+
+struct udp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<16> length
+ bit<16> checksum
+}
+
+header outer_udp instanceof udp_h
+
+struct vxlan_h {
+ bit<8> flags
+ bit<24> reserved
+ bit<24> vni
+ bit<8> reserved2
+}
+
+header outer_vxlan instanceof vxlan_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.outer_ethernet
+ extract h.outer_ipv4
+ extract h.outer_udp
+ extract h.outer_vxlan
+ extract h.ethernet
+ extract h.ipv4
+ emit h.outer_ethernet
+ emit h.outer_ipv4
+ emit h.outer_udp
+ emit h.outer_vxlan
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
--git a/dep/pipeline/extract_emit_006/pcap_files/in_1.txt b/dep/pipeline/extract_emit_006/pcap_files/in_1.txt
new file mode 100644
index 00000000..e9709645
--- /dev/null
+++ b/dep/pipeline/extract_emit_006/pcap_files/in_1.txt
@@ -0,0 +1,15 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 a0 a1 a2 a3 00 00 b0 b1 b2 b3 00 00 08 00 45 00
+000010 00 60 00 00 00 00 40 11 e8 fa c0 c1 00 00 d0 d1
+000020 00 00 e0 00 12 b5 00 4c 00 00 00 00 00 00 00 00
+000030 00 00 aa bb cc dd 00 00 10 22 33 44 55 66 08 00
+000040 45 00 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a
+000050 c8 00 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00
+000060 50 02 20 00 59 93 00 00 58 58 58 58 58 58
--git a/dep/pipeline/extract_emit_006/pcap_files/out_1.txt b/dep/pipeline/extract_emit_006/pcap_files/out_1.txt
new file mode 100644
index 00000000..e9709645
--- /dev/null
+++ b/dep/pipeline/extract_emit_006/pcap_files/out_1.txt
@@ -0,0 +1,15 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 a0 a1 a2 a3 00 00 b0 b1 b2 b3 00 00 08 00 45 00
+000010 00 60 00 00 00 00 40 11 e8 fa c0 c1 00 00 d0 d1
+000020 00 00 e0 00 12 b5 00 4c 00 00 00 00 00 00 00 00
+000030 00 00 aa bb cc dd 00 00 10 22 33 44 55 66 08 00
+000040 45 00 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a
+000050 c8 00 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00
+000060 50 02 20 00 59 93 00 00 58 58 58 58 58 58
--git a/dep/pipeline/extract_emit_006/readme.md b/dep/pipeline/extract_emit_006/readme.md
new file mode 100644
index 00000000..4e7f23d1
--- /dev/null
+++ b/dep/pipeline/extract_emit_006/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_extract_emit_006
+--------------------------------
+ Instructions being tested:
+ extract h.field (level 6)
+ emit h.field (level 6)
+
+ Description:
+ For the received packet, extract its outer ethernet, outer ipv4, outer udp, outer vxlan, ethernet and ipv4 headers and without modifying them, transmit the packet back on the same port.
+
+ Verification:
+ The transmitted packet should be same as that of the received packet.
--git a/dep/pipeline/extract_emit_007/ethdev.io b/dep/pipeline/extract_emit_007/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/extract_emit_007/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
--git a/dep/pipeline/extract_emit_007/extract_emit_007.cli b/dep/pipeline/extract_emit_007/extract_emit_007.cli
new file mode 100644
index 00000000..15ca8b1a
--- /dev/null
+++ b/dep/pipeline/extract_emit_007/extract_emit_007.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/extract_emit_007/extract_emit_007.spec /tmp/pipeline/extract_emit_007/extract_emit_007.c
+pipeline libbuild /tmp/pipeline/extract_emit_007/extract_emit_007.c /tmp/pipeline/extract_emit_007/extract_emit_007.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/extract_emit_007/extract_emit_007.so io /tmp/pipeline/extract_emit_007/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
--git a/dep/pipeline/extract_emit_007/extract_emit_007.spec b/dep/pipeline/extract_emit_007/extract_emit_007.spec
new file mode 100644
index 00000000..ee5cf68d
--- /dev/null
+++ b/dep/pipeline/extract_emit_007/extract_emit_007.spec
@@ -0,0 +1,91 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+}
+
+header outer_ethernet instanceof ethernet_h
+header ethernet instanceof ethernet_h
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header outer_ipv4 instanceof ipv4_h
+header ipv4 instanceof ipv4_h
+
+struct udp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<16> length
+ bit<16> checksum
+}
+
+header outer_udp instanceof udp_h
+
+struct vxlan_h {
+ bit<8> flags
+ bit<24> reserved
+ bit<24> vni
+ bit<8> reserved2
+}
+
+header outer_vxlan instanceof vxlan_h
+
+struct tcp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<32> seq_num
+ bit<32> ack_num
+ bit<16> hdr_len_flags
+ bit<16> window_size
+ bit<16> checksum
+ bit<16> urg_ptr
+}
+
+header tcp instanceof tcp_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.outer_ethernet
+ extract h.outer_ipv4
+ extract h.outer_udp
+ extract h.outer_vxlan
+ extract h.ethernet
+ extract h.ipv4
+ extract h.tcp
+ emit h.outer_ethernet
+ emit h.outer_ipv4
+ emit h.outer_udp
+ emit h.outer_vxlan
+ emit h.ethernet
+ emit h.ipv4
+ emit h.tcp
+ tx m.port
+}
--git a/dep/pipeline/extract_emit_007/pcap_files/in_1.txt b/dep/pipeline/extract_emit_007/pcap_files/in_1.txt
new file mode 100644
index 00000000..e9709645
--- /dev/null
+++ b/dep/pipeline/extract_emit_007/pcap_files/in_1.txt
@@ -0,0 +1,15 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 a0 a1 a2 a3 00 00 b0 b1 b2 b3 00 00 08 00 45 00
+000010 00 60 00 00 00 00 40 11 e8 fa c0 c1 00 00 d0 d1
+000020 00 00 e0 00 12 b5 00 4c 00 00 00 00 00 00 00 00
+000030 00 00 aa bb cc dd 00 00 10 22 33 44 55 66 08 00
+000040 45 00 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a
+000050 c8 00 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00
+000060 50 02 20 00 59 93 00 00 58 58 58 58 58 58
--git a/dep/pipeline/extract_emit_007/pcap_files/out_1.txt b/dep/pipeline/extract_emit_007/pcap_files/out_1.txt
new file mode 100644
index 00000000..e9709645
--- /dev/null
+++ b/dep/pipeline/extract_emit_007/pcap_files/out_1.txt
@@ -0,0 +1,15 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 a0 a1 a2 a3 00 00 b0 b1 b2 b3 00 00 08 00 45 00
+000010 00 60 00 00 00 00 40 11 e8 fa c0 c1 00 00 d0 d1
+000020 00 00 e0 00 12 b5 00 4c 00 00 00 00 00 00 00 00
+000030 00 00 aa bb cc dd 00 00 10 22 33 44 55 66 08 00
+000040 45 00 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a
+000050 c8 00 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00
+000060 50 02 20 00 59 93 00 00 58 58 58 58 58 58
--git a/dep/pipeline/extract_emit_007/readme.md b/dep/pipeline/extract_emit_007/readme.md
new file mode 100644
index 00000000..d51656cf
--- /dev/null
+++ b/dep/pipeline/extract_emit_007/readme.md
@@ -0,0 +1,12 @@
+Test Case: test_extract_emit_007
+--------------------------------
+ Instructions being tested:
+ extract h.field (level 7)
+ emit h.field (level 7)
+
+ Description:
+ For the received packet, extract its outer ethernet, outer ipv4, outer udp, outer vxlan, ethernet, ipv4 and tcp headers and without modifying them,
+ transmit the packet back on the same port.
+
+ Verification:
+ The transmitted packet should be same as that of the received packet.
--git a/dep/pipeline/extract_emit_008/ethdev.io b/dep/pipeline/extract_emit_008/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/extract_emit_008/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
--git a/dep/pipeline/extract_emit_008/extract_emit_008.cli b/dep/pipeline/extract_emit_008/extract_emit_008.cli
new file mode 100644
index 00000000..2c703530
--- /dev/null
+++ b/dep/pipeline/extract_emit_008/extract_emit_008.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/extract_emit_008/extract_emit_008.spec /tmp/pipeline/extract_emit_008/extract_emit_008.c
+pipeline libbuild /tmp/pipeline/extract_emit_008/extract_emit_008.c /tmp/pipeline/extract_emit_008/extract_emit_008.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/extract_emit_008/extract_emit_008.so io /tmp/pipeline/extract_emit_008/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
--git a/dep/pipeline/extract_emit_008/extract_emit_008.spec b/dep/pipeline/extract_emit_008/extract_emit_008.spec
new file mode 100644
index 00000000..15597881
--- /dev/null
+++ b/dep/pipeline/extract_emit_008/extract_emit_008.spec
@@ -0,0 +1,108 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_1_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header outer_ethernet instanceof ethernet_1_h
+
+struct ethernet_2_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+}
+
+header ethernet instanceof ethernet_2_h
+
+struct vlan_h {
+ bit<16> tpid
+ bit<16> pcp_dei_vid
+ bit<16> ether_type
+}
+
+header vlan instanceof vlan_h
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header outer_ipv4 instanceof ipv4_h
+header ipv4 instanceof ipv4_h
+
+struct udp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<16> length
+ bit<16> checksum
+}
+
+header outer_udp instanceof udp_h
+
+struct vxlan_h {
+ bit<8> flags
+ bit<24> reserved
+ bit<24> vni
+ bit<8> reserved2
+}
+
+header outer_vxlan instanceof vxlan_h
+
+struct tcp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<32> seq_num
+ bit<32> ack_num
+ bit<16> hdr_len_flags
+ bit<16> window_size
+ bit<16> checksum
+ bit<16> urg_ptr
+}
+
+header tcp instanceof tcp_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.outer_ethernet
+ extract h.outer_ipv4
+ extract h.outer_udp
+ extract h.outer_vxlan
+ extract h.ethernet
+ extract h.vlan
+ extract h.ipv4
+ extract h.tcp
+ emit h.outer_ethernet
+ emit h.outer_ipv4
+ emit h.outer_udp
+ emit h.outer_vxlan
+ emit h.ethernet
+ emit h.vlan
+ emit h.ipv4
+ emit h.tcp
+ tx m.port
+}
--git a/dep/pipeline/extract_emit_008/pcap_files/in_1.txt b/dep/pipeline/extract_emit_008/pcap_files/in_1.txt
new file mode 100644
index 00000000..3fab8ba5
--- /dev/null
+++ b/dep/pipeline/extract_emit_008/pcap_files/in_1.txt
@@ -0,0 +1,16 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 a0 a1 a2 a3 00 00 b0 b1 b2 b3 00 00 08 00 45 00
+000010 00 60 00 00 00 00 40 11 e8 fa c0 c1 00 00 d0 d1
+000020 00 00 e0 00 12 b5 00 4c 00 00 00 00 00 00 00 00
+000030 00 00 aa bb cc dd 00 00 10 22 33 44 55 66 81 00
+000040 01 23 08 00 45 00 00 2e 00 01 00 00 40 06 4e b5
+000050 64 00 00 0a c8 00 00 0a 00 64 00 c8 00 00 00 00
+000060 00 00 00 00 50 02 20 00 59 93 00 00 58 58 58 58
+000070 58 58
--git a/dep/pipeline/extract_emit_008/pcap_files/out_1.txt b/dep/pipeline/extract_emit_008/pcap_files/out_1.txt
new file mode 100644
index 00000000..3fab8ba5
--- /dev/null
+++ b/dep/pipeline/extract_emit_008/pcap_files/out_1.txt
@@ -0,0 +1,16 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 a0 a1 a2 a3 00 00 b0 b1 b2 b3 00 00 08 00 45 00
+000010 00 60 00 00 00 00 40 11 e8 fa c0 c1 00 00 d0 d1
+000020 00 00 e0 00 12 b5 00 4c 00 00 00 00 00 00 00 00
+000030 00 00 aa bb cc dd 00 00 10 22 33 44 55 66 81 00
+000040 01 23 08 00 45 00 00 2e 00 01 00 00 40 06 4e b5
+000050 64 00 00 0a c8 00 00 0a 00 64 00 c8 00 00 00 00
+000060 00 00 00 00 50 02 20 00 59 93 00 00 58 58 58 58
+000070 58 58
--git a/dep/pipeline/extract_emit_008/readme.md b/dep/pipeline/extract_emit_008/readme.md
new file mode 100644
index 00000000..bb245e0c
--- /dev/null
+++ b/dep/pipeline/extract_emit_008/readme.md
@@ -0,0 +1,12 @@
+Test Case: test_extract_emit_008
+--------------------------------
+ Instructions being tested:
+ extract h.field (level 8)
+ emit h.field (level 8)
+
+ Description:
+ For the received packet, extract its outer ethernet, outer ipv4, outer udp, outer vxlan, ethernet, vlan, ipv4 and tcp headers and without modifying
+ them, transmit the packet back on the same port.
+
+ Verification:
+ The transmitted packet should be same as that of the received packet.
--git a/dep/pipeline/extract_emit_009/ethdev.io b/dep/pipeline/extract_emit_009/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/extract_emit_009/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
--git a/dep/pipeline/extract_emit_009/extract_emit_009.cli b/dep/pipeline/extract_emit_009/extract_emit_009.cli
new file mode 100644
index 00000000..61fd7a18
--- /dev/null
+++ b/dep/pipeline/extract_emit_009/extract_emit_009.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/extract_emit_009/extract_emit_009.spec /tmp/pipeline/extract_emit_009/extract_emit_009.c
+pipeline libbuild /tmp/pipeline/extract_emit_009/extract_emit_009.c /tmp/pipeline/extract_emit_009/extract_emit_009.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/extract_emit_009/extract_emit_009.so io /tmp/pipeline/extract_emit_009/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
--git a/dep/pipeline/extract_emit_009/extract_emit_009.spec b/dep/pipeline/extract_emit_009/extract_emit_009.spec
new file mode 100644
index 00000000..66fa32b0
--- /dev/null
+++ b/dep/pipeline/extract_emit_009/extract_emit_009.spec
@@ -0,0 +1,56 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+action extract_emit_009_action args none {
+ return
+}
+
+//
+// Tables.
+//
+table extract_emit_009 {
+ key {
+ }
+
+ actions {
+ extract_emit_009_action
+ }
+
+ default_action extract_emit_009_action args none const
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ table extract_emit_009
+ emit h.ethernet
+ table extract_emit_009
+ tx m.port
+}
--git a/dep/pipeline/extract_emit_009/pcap_files/in_1.txt b/dep/pipeline/extract_emit_009/pcap_files/in_1.txt
new file mode 100644
index 00000000..75115c15
--- /dev/null
+++ b/dep/pipeline/extract_emit_009/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
--git a/dep/pipeline/extract_emit_009/pcap_files/out_1.txt b/dep/pipeline/extract_emit_009/pcap_files/out_1.txt
new file mode 100644
index 00000000..75115c15
--- /dev/null
+++ b/dep/pipeline/extract_emit_009/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
--git a/dep/pipeline/extract_emit_009/readme.md b/dep/pipeline/extract_emit_009/readme.md
new file mode 100644
index 00000000..a65fb349
--- /dev/null
+++ b/dep/pipeline/extract_emit_009/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_extract_emit_009
+--------------------------------
+
+ Instructions being tested:
+ emit h.field
+
+ Description:
+ For the received packet, extract its ethernet header and without modifying it, transmit the packet back on the same port.
+
+ Verification:
+ The transmitted packet should be same as that of the received packet.
--git a/dep/pipeline/extract_emit_010/ethdev.io b/dep/pipeline/extract_emit_010/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/extract_emit_010/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
--git a/dep/pipeline/extract_emit_010/extract_emit_010.cli b/dep/pipeline/extract_emit_010/extract_emit_010.cli
new file mode 100644
index 00000000..e7ff1785
--- /dev/null
+++ b/dep/pipeline/extract_emit_010/extract_emit_010.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/extract_emit_010/extract_emit_010.spec /tmp/pipeline/extract_emit_010/extract_emit_010.c
+pipeline libbuild /tmp/pipeline/extract_emit_010/extract_emit_010.c /tmp/pipeline/extract_emit_010/extract_emit_010.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/extract_emit_010/extract_emit_010.so io /tmp/pipeline/extract_emit_010/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
--git a/dep/pipeline/extract_emit_010/extract_emit_010.spec b/dep/pipeline/extract_emit_010/extract_emit_010.spec
new file mode 100644
index 00000000..cf6b433a
--- /dev/null
+++ b/dep/pipeline/extract_emit_010/extract_emit_010.spec
@@ -0,0 +1,119 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_1_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header outer_ethernet instanceof ethernet_1_h
+
+struct ethernet_2_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_2_h
+
+struct vlan_h {
+ bit<16> tpid
+ bit<16> ether_type
+}
+
+header vlan instanceof vlan_h
+header vlan_1 instanceof vlan_h
+header vlan_2 instanceof vlan_h
+header vlan_3 instanceof vlan_h
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header outer_ipv4 instanceof ipv4_h
+header ipv4 instanceof ipv4_h
+
+struct udp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<16> length
+ bit<16> checksum
+}
+header outer_udp instanceof udp_h
+
+struct vxlan_h {
+ bit<8> flags
+ bit<24> reserved
+ bit<24> vni
+ bit<8> reserved2
+}
+
+header outer_vxlan instanceof vxlan_h
+
+struct tcp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<32> seq_num
+ bit<32> ack_num
+ bit<16> hdr_len_flags
+ bit<16> window_size
+ bit<16> checksum
+ bit<16> urg_ptr
+}
+
+header tcp instanceof tcp_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.outer_ethernet
+ extract h.outer_ipv4
+ extract h.outer_udp
+ extract h.outer_vxlan
+ extract h.ethernet
+ extract h.vlan
+ extract h.vlan_1
+ extract h.vlan_2
+ extract h.vlan_3
+ extract h.ipv4
+ extract h.tcp
+
+ invalidate h.outer_ethernet
+
+ emit h.outer_ethernet
+ emit h.outer_ipv4
+ emit h.outer_udp
+ emit h.outer_vxlan
+ emit h.ethernet
+ emit h.vlan
+ emit h.vlan_1
+ emit h.vlan_2
+ emit h.vlan_3
+ emit h.ipv4
+ emit h.tcp
+ tx m.port
+}
--git a/dep/pipeline/extract_emit_010/pcap_files/in_1.txt b/dep/pipeline/extract_emit_010/pcap_files/in_1.txt
new file mode 100644
index 00000000..7040e177
--- /dev/null
+++ b/dep/pipeline/extract_emit_010/pcap_files/in_1.txt
@@ -0,0 +1,16 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 52 54 00 12 34 56 08 00 45 00
+000010 00 70 00 01 00 00 40 11 4e 68 64 00 00 0a c8 00
+000020 00 0a 00 64 13 1a 00 5c 4d 0d 0c 00 00 03 00 00
+000030 00 00 ff ff ff ff ff ff 52 54 00 12 34 56 81 00
+000040 00 01 81 00 00 02 81 00 00 03 81 00 00 04 08 00
+000050 45 00 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a
+000060 c8 00 00 0a 00 64 13 1a 00 00 00 00 00 00 00 00
+000070 50 02 20 00 47 41 00 00 58 58 58 58 58 58
--git a/dep/pipeline/extract_emit_010/pcap_files/out_1.txt b/dep/pipeline/extract_emit_010/pcap_files/out_1.txt
new file mode 100644
index 00000000..6df795c4
--- /dev/null
+++ b/dep/pipeline/extract_emit_010/pcap_files/out_1.txt
@@ -0,0 +1,15 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 45 00 00 70 00 01 00 00 40 11 4e 68 64 00 00 0a
+000010 c8 00 00 0a 00 64 13 1a 00 5c 4d 0d 0c 00 00 03
+000020 00 00 00 00 ff ff ff ff ff ff 52 54 00 12 34 56
+000030 81 00 00 01 81 00 00 02 81 00 00 03 81 00 00 04
+000040 08 00 45 00 00 2e 00 01 00 00 40 06 4e b5 64 00
+000050 00 0a c8 00 00 0a 00 64 13 1a 00 00 00 00 00 00
+000060 00 00 50 02 20 00 47 41 00 00 58 58 58 58 58 58
--git a/dep/pipeline/extract_emit_010/readme.md b/dep/pipeline/extract_emit_010/readme.md
new file mode 100644
index 00000000..7a3a535b
--- /dev/null
+++ b/dep/pipeline/extract_emit_010/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_extract_emit_010
+--------------------------------
+ Instructions being tested:
+ extract h.field
+ emit h.field
+
+ Description:
+ Testcase will verify invalidating outer most header from the packet.
+
+ Verification:
+ The received packet will have outer most header removed from the packet.
--git a/dep/pipeline/extract_emit_011/ethdev.io b/dep/pipeline/extract_emit_011/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/extract_emit_011/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
--git a/dep/pipeline/extract_emit_011/extract_emit_011.cli b/dep/pipeline/extract_emit_011/extract_emit_011.cli
new file mode 100644
index 00000000..f701e53d
--- /dev/null
+++ b/dep/pipeline/extract_emit_011/extract_emit_011.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/extract_emit_011/extract_emit_011.spec /tmp/pipeline/extract_emit_011/extract_emit_011.c
+pipeline libbuild /tmp/pipeline/extract_emit_011/extract_emit_011.c /tmp/pipeline/extract_emit_011/extract_emit_011.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/extract_emit_011/extract_emit_011.so io /tmp/pipeline/extract_emit_011/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
--git a/dep/pipeline/extract_emit_011/extract_emit_011.spec b/dep/pipeline/extract_emit_011/extract_emit_011.spec
new file mode 100644
index 00000000..c0b69519
--- /dev/null
+++ b/dep/pipeline/extract_emit_011/extract_emit_011.spec
@@ -0,0 +1,119 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_1_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header outer_ethernet instanceof ethernet_1_h
+
+struct ethernet_2_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_2_h
+
+struct vlan_h {
+ bit<16> tpid
+ bit<16> ether_type
+}
+
+header vlan instanceof vlan_h
+header vlan_1 instanceof vlan_h
+header vlan_2 instanceof vlan_h
+header vlan_3 instanceof vlan_h
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header outer_ipv4 instanceof ipv4_h
+header ipv4 instanceof ipv4_h
+
+struct udp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<16> length
+ bit<16> checksum
+}
+header outer_udp instanceof udp_h
+
+struct vxlan_h {
+ bit<8> flags
+ bit<24> reserved
+ bit<24> vni
+ bit<8> reserved2
+}
+
+header outer_vxlan instanceof vxlan_h
+
+struct tcp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<32> seq_num
+ bit<32> ack_num
+ bit<16> hdr_len_flags
+ bit<16> window_size
+ bit<16> checksum
+ bit<16> urg_ptr
+}
+
+header tcp instanceof tcp_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.outer_ethernet
+ extract h.outer_ipv4
+ extract h.outer_udp
+ extract h.outer_vxlan
+ extract h.ethernet
+ extract h.vlan
+ extract h.vlan_1
+ extract h.vlan_2
+ extract h.vlan_3
+ extract h.ipv4
+ extract h.tcp
+
+ invalidate h.outer_ipv4
+
+ emit h.outer_ethernet
+ emit h.outer_ipv4
+ emit h.outer_udp
+ emit h.outer_vxlan
+ emit h.ethernet
+ emit h.vlan
+ emit h.vlan_1
+ emit h.vlan_2
+ emit h.vlan_3
+ emit h.ipv4
+ emit h.tcp
+ tx m.port
+}
--git a/dep/pipeline/extract_emit_011/pcap_files/in_1.txt b/dep/pipeline/extract_emit_011/pcap_files/in_1.txt
new file mode 100644
index 00000000..7040e177
--- /dev/null
+++ b/dep/pipeline/extract_emit_011/pcap_files/in_1.txt
@@ -0,0 +1,16 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 52 54 00 12 34 56 08 00 45 00
+000010 00 70 00 01 00 00 40 11 4e 68 64 00 00 0a c8 00
+000020 00 0a 00 64 13 1a 00 5c 4d 0d 0c 00 00 03 00 00
+000030 00 00 ff ff ff ff ff ff 52 54 00 12 34 56 81 00
+000040 00 01 81 00 00 02 81 00 00 03 81 00 00 04 08 00
+000050 45 00 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a
+000060 c8 00 00 0a 00 64 13 1a 00 00 00 00 00 00 00 00
+000070 50 02 20 00 47 41 00 00 58 58 58 58 58 58
--git a/dep/pipeline/extract_emit_011/pcap_files/out_1.txt b/dep/pipeline/extract_emit_011/pcap_files/out_1.txt
new file mode 100644
index 00000000..ba6a4c04
--- /dev/null
+++ b/dep/pipeline/extract_emit_011/pcap_files/out_1.txt
@@ -0,0 +1,15 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 52 54 00 12 34 56 08 00 00 64
+000010 13 1a 00 5c 4d 0d 0c 00 00 03 00 00 00 00 ff ff
+000020 ff ff ff ff 52 54 00 12 34 56 81 00 00 01 81 00
+000030 00 02 81 00 00 03 81 00 00 04 08 00 45 00 00 2e
+000040 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00 00 0a
+000050 00 64 13 1a 00 00 00 00 00 00 00 00 50 02 20 00
+000060 47 41 00 00 58 58 58 58 58 58
--git a/dep/pipeline/extract_emit_011/readme.md b/dep/pipeline/extract_emit_011/readme.md
new file mode 100644
index 00000000..f26c2b59
--- /dev/null
+++ b/dep/pipeline/extract_emit_011/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_extract_emit_011
+--------------------------------
+ Instructions being tested:
+ extract h.field
+ emit h.field
+
+ Description:
+ Testcase will verify invalidating second header of the packet.
+
+ Verification:
+ The received packet will have second header removed from the packet.
--git a/dep/pipeline/extract_emit_012/ethdev.io b/dep/pipeline/extract_emit_012/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/extract_emit_012/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
--git a/dep/pipeline/extract_emit_012/extract_emit_012.cli b/dep/pipeline/extract_emit_012/extract_emit_012.cli
new file mode 100644
index 00000000..27f8c8ba
--- /dev/null
+++ b/dep/pipeline/extract_emit_012/extract_emit_012.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/extract_emit_012/extract_emit_012.spec /tmp/pipeline/extract_emit_012/extract_emit_012.c
+pipeline libbuild /tmp/pipeline/extract_emit_012/extract_emit_012.c /tmp/pipeline/extract_emit_012/extract_emit_012.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/extract_emit_012/extract_emit_012.so io /tmp/pipeline/extract_emit_012/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
--git a/dep/pipeline/extract_emit_012/extract_emit_012.spec b/dep/pipeline/extract_emit_012/extract_emit_012.spec
new file mode 100644
index 00000000..a36fc9d1
--- /dev/null
+++ b/dep/pipeline/extract_emit_012/extract_emit_012.spec
@@ -0,0 +1,130 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_1_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header outer_ethernet instanceof ethernet_1_h
+
+struct ethernet_2_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_2_h
+
+struct vlan_h {
+ bit<16> tpid
+ bit<16> ether_type
+}
+
+header vlan instanceof vlan_h
+header vlan_1 instanceof vlan_h
+header vlan_2 instanceof vlan_h
+header vlan_3 instanceof vlan_h
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header outer_ipv4 instanceof ipv4_h
+header ipv4 instanceof ipv4_h
+
+struct udp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<16> length
+ bit<16> checksum
+}
+header outer_udp instanceof udp_h
+
+struct vxlan_h {
+ bit<8> flags
+ bit<24> reserved
+ bit<24> vni
+ bit<8> reserved2
+}
+
+header outer_vxlan instanceof vxlan_h
+
+struct tcp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<32> seq_num
+ bit<32> ack_num
+ bit<16> hdr_len_flags
+ bit<16> window_size
+ bit<16> checksum
+ bit<16> urg_ptr
+}
+
+header tcp instanceof tcp_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.outer_ethernet
+ extract h.outer_ipv4
+ extract h.outer_udp
+ extract h.outer_vxlan
+ extract h.ethernet
+ extract h.vlan
+ extract h.vlan_1
+ extract h.vlan_2
+ extract h.vlan_3
+ extract h.ipv4
+ extract h.tcp
+
+ invalidate h.outer_ethernet
+ invalidate h.outer_ipv4
+ invalidate h.outer_udp
+ invalidate h.outer_vxlan
+ invalidate h.ethernet
+ invalidate h.vlan
+ invalidate h.vlan_1
+ invalidate h.vlan_2
+ invalidate h.vlan_3
+ invalidate h.ipv4
+ invalidate h.tcp
+
+
+ emit h.outer_ethernet
+ emit h.outer_ipv4
+ emit h.outer_udp
+ emit h.outer_vxlan
+ emit h.ethernet
+ emit h.vlan
+ emit h.vlan_1
+ emit h.vlan_2
+ emit h.vlan_3
+ emit h.ipv4
+ emit h.tcp
+ tx m.port
+}
--git a/dep/pipeline/extract_emit_012/pcap_files/in_1.txt b/dep/pipeline/extract_emit_012/pcap_files/in_1.txt
new file mode 100644
index 00000000..1481983e
--- /dev/null
+++ b/dep/pipeline/extract_emit_012/pcap_files/in_1.txt
@@ -0,0 +1,18 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 52 54 00 12 34 56 08 00 45 00
+000010 00 8c 00 01 00 00 40 11 4e 4c 64 00 00 0a c8 00
+000020 00 0a 00 64 13 1a 00 78 4c f1 0c 00 00 03 00 00
+000030 00 00 ff ff ff ff ff ff 52 54 00 12 34 56 81 00
+000040 00 01 81 00 00 02 81 00 00 03 81 00 00 04 08 00
+000050 45 00 00 4a 00 01 00 00 40 06 4e 99 64 00 00 0a
+000060 c8 00 00 0a 00 64 13 1a 00 00 00 00 00 00 00 00
+000070 50 02 20 00 72 50 00 00 58 58 58 58 58 58 58 58
+000080 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58
+000090 58 58 58 58 58 58 58 58 58 58
--git a/dep/pipeline/extract_emit_012/pcap_files/out_1.txt b/dep/pipeline/extract_emit_012/pcap_files/out_1.txt
new file mode 100644
index 00000000..ab6718af
--- /dev/null
+++ b/dep/pipeline/extract_emit_012/pcap_files/out_1.txt
@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58
+000010 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58
+000020 58 58
--git a/dep/pipeline/extract_emit_012/readme.md b/dep/pipeline/extract_emit_012/readme.md
new file mode 100644
index 00000000..f275d11b
--- /dev/null
+++ b/dep/pipeline/extract_emit_012/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_extract_emit_012
+--------------------------------
+ Instructions being tested:
+ extract h.field
+ emit h.field
+
+ Description:
+ The test will verify invalidating all headers. The received packet should have load content.
+
+ Verification:
+ The received packet whould have load content.
--git a/dep/pipeline/extract_emit_013/ethdev.io b/dep/pipeline/extract_emit_013/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/extract_emit_013/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
--git a/dep/pipeline/extract_emit_013/extract_emit_013.cli b/dep/pipeline/extract_emit_013/extract_emit_013.cli
new file mode 100644
index 00000000..13feb68d
--- /dev/null
+++ b/dep/pipeline/extract_emit_013/extract_emit_013.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/extract_emit_013/extract_emit_013.spec /tmp/pipeline/extract_emit_013/extract_emit_013.c
+pipeline libbuild /tmp/pipeline/extract_emit_013/extract_emit_013.c /tmp/pipeline/extract_emit_013/extract_emit_013.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/extract_emit_013/extract_emit_013.so io /tmp/pipeline/extract_emit_013/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
--git a/dep/pipeline/extract_emit_013/extract_emit_013.spec b/dep/pipeline/extract_emit_013/extract_emit_013.spec
new file mode 100644
index 00000000..bb99af2e
--- /dev/null
+++ b/dep/pipeline/extract_emit_013/extract_emit_013.spec
@@ -0,0 +1,120 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_1_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header outer_ethernet instanceof ethernet_1_h
+
+struct ethernet_2_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_2_h
+
+struct vlan_h {
+ bit<16> tpid
+ bit<16> ether_type
+}
+
+header vlan instanceof vlan_h
+header vlan_1 instanceof vlan_h
+header vlan_2 instanceof vlan_h
+header vlan_3 instanceof vlan_h
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header outer_ipv4 instanceof ipv4_h
+header ipv4 instanceof ipv4_h
+
+struct udp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<16> length
+ bit<16> checksum
+}
+header outer_udp instanceof udp_h
+
+struct vxlan_h {
+ bit<8> flags
+ bit<24> reserved
+ bit<24> vni
+ bit<8> reserved2
+}
+
+header outer_vxlan instanceof vxlan_h
+
+struct tcp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<32> seq_num
+ bit<32> ack_num
+ bit<16> hdr_len_flags
+ bit<16> window_size
+ bit<16> checksum
+ bit<16> urg_ptr
+}
+
+header tcp instanceof tcp_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.outer_ethernet
+ extract h.outer_ipv4
+ extract h.outer_udp
+ extract h.outer_vxlan
+ extract h.ethernet
+ extract h.vlan
+ extract h.vlan_1
+ extract h.vlan_2
+ extract h.vlan_3
+ extract h.ipv4
+ extract h.tcp
+
+
+ invalidate h.vlan_1
+
+ emit h.outer_ethernet
+ emit h.outer_ipv4
+ emit h.outer_udp
+ emit h.outer_vxlan
+ emit h.ethernet
+ emit h.vlan
+ emit h.vlan_1
+ emit h.vlan_2
+ emit h.vlan_3
+ emit h.ipv4
+ emit h.tcp
+ tx m.port
+}
--git a/dep/pipeline/extract_emit_013/pcap_files/in_1.txt b/dep/pipeline/extract_emit_013/pcap_files/in_1.txt
new file mode 100644
index 00000000..1481983e
--- /dev/null
+++ b/dep/pipeline/extract_emit_013/pcap_files/in_1.txt
@@ -0,0 +1,18 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 52 54 00 12 34 56 08 00 45 00
+000010 00 8c 00 01 00 00 40 11 4e 4c 64 00 00 0a c8 00
+000020 00 0a 00 64 13 1a 00 78 4c f1 0c 00 00 03 00 00
+000030 00 00 ff ff ff ff ff ff 52 54 00 12 34 56 81 00
+000040 00 01 81 00 00 02 81 00 00 03 81 00 00 04 08 00
+000050 45 00 00 4a 00 01 00 00 40 06 4e 99 64 00 00 0a
+000060 c8 00 00 0a 00 64 13 1a 00 00 00 00 00 00 00 00
+000070 50 02 20 00 72 50 00 00 58 58 58 58 58 58 58 58
+000080 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58
+000090 58 58 58 58 58 58 58 58 58 58
--git a/dep/pipeline/extract_emit_013/pcap_files/out_1.txt b/dep/pipeline/extract_emit_013/pcap_files/out_1.txt
new file mode 100644
index 00000000..a124863d
--- /dev/null
+++ b/dep/pipeline/extract_emit_013/pcap_files/out_1.txt
@@ -0,0 +1,18 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 52 54 00 12 34 56 08 00 45 00
+000010 00 8c 00 01 00 00 40 11 4e 4c 64 00 00 0a c8 00
+000020 00 0a 00 64 13 1a 00 78 4c f1 0c 00 00 03 00 00
+000030 00 00 ff ff ff ff ff ff 52 54 00 12 34 56 81 00
+000040 00 01 81 00 00 03 81 00 00 04 08 00 45 00 00 4a
+000050 00 01 00 00 40 06 4e 99 64 00 00 0a c8 00 00 0a
+000060 00 64 13 1a 00 00 00 00 00 00 00 00 50 02 20 00
+000070 72 50 00 00 58 58 58 58 58 58 58 58 58 58 58 58
+000080 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58 58
+000090 58 58 58 58 58 58
--git a/dep/pipeline/extract_emit_013/readme.md b/dep/pipeline/extract_emit_013/readme.md
new file mode 100644
index 00000000..4bdccd72
--- /dev/null
+++ b/dep/pipeline/extract_emit_013/readme.md
@@ -0,0 +1,12 @@
+Test Case: test_extract_emit_013
+--------------------------------
+ Instructions being tested:
+ extract h.field
+ invalidate h (removing one header among 11 headers)
+ emit h.field
+
+ Description:
+ For the received packet, Invalidate a header among the optimised many emit instructions, transmit the packet back on the same port.
+
+ Verification:
+ The received packet should have only valid headers.
--git a/dep/pipeline/extract_emit_014/ethdev.io b/dep/pipeline/extract_emit_014/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/extract_emit_014/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
--git a/dep/pipeline/extract_emit_014/extract_emit_014.cli b/dep/pipeline/extract_emit_014/extract_emit_014.cli
new file mode 100644
index 00000000..d76561a3
--- /dev/null
+++ b/dep/pipeline/extract_emit_014/extract_emit_014.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/extract_emit_014/extract_emit_014.spec /tmp/pipeline/extract_emit_014/extract_emit_014.c
+pipeline libbuild /tmp/pipeline/extract_emit_014/extract_emit_014.c /tmp/pipeline/extract_emit_014/extract_emit_014.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/extract_emit_014/extract_emit_014.so io /tmp/pipeline/extract_emit_014/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
--git a/dep/pipeline/extract_emit_014/extract_emit_014.spec b/dep/pipeline/extract_emit_014/extract_emit_014.spec
new file mode 100644
index 00000000..bb830924
--- /dev/null
+++ b/dep/pipeline/extract_emit_014/extract_emit_014.spec
@@ -0,0 +1,44 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+struct ipv6_h {
+ bit<32> ver_tc_label
+ bit<16> payload_length
+ bit<8> next_header
+ bit<8> hop_limit
+ bit<128> src_addr
+ bit<128> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv6 instanceof ipv6_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv6
+ emit h.ethernet
+ emit h.ipv6
+ tx m.port
+}
--git a/dep/pipeline/extract_emit_014/pcap_files/in_1.txt b/dep/pipeline/extract_emit_014/pcap_files/in_1.txt
new file mode 100644
index 00000000..c955c1e1
--- /dev/null
+++ b/dep/pipeline/extract_emit_014/pcap_files/in_1.txt
@@ -0,0 +1,13 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc de 00 00 00 00 00 00 00 00 86 dd 60 00
+000010 00 00 00 1a 06 40 10 00 20 00 30 00 40 00 50 00
+000020 60 00 70 00 80 00 20 01 0d b8 00 00 00 01 02 07
+000030 3f ff fe 68 df 44 00 64 00 c8 00 00 00 0f 00 00
+000040 00 0a 50 02 20 00 f8 1e 00 00 58 58 58 58 58 58
\ No newline at end of file
--git a/dep/pipeline/extract_emit_014/pcap_files/out_1.txt b/dep/pipeline/extract_emit_014/pcap_files/out_1.txt
new file mode 100644
index 00000000..70291da2
--- /dev/null
+++ b/dep/pipeline/extract_emit_014/pcap_files/out_1.txt
@@ -0,0 +1,13 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc de 00 00 00 00 00 00 00 00 86 dd 60 00
+000010 00 00 00 1a 06 40 10 00 20 00 30 00 40 00 50 00
+000020 60 00 70 00 80 00 20 01 0d b8 00 00 00 01 02 07
+000030 3f ff fe 68 df 44 00 64 00 c8 00 00 00 0f 00 00
+000040 00 0a 50 02 20 00 f8 1e 00 00 58 58 58 58 58 58
--git a/dep/pipeline/extract_emit_014/readme.md b/dep/pipeline/extract_emit_014/readme.md
new file mode 100644
index 00000000..6658c7b3
--- /dev/null
+++ b/dep/pipeline/extract_emit_014/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_extract_emit_014
+--------------------------------
+ Instructions being tested:
+ extract h.field
+ emit h.field
+
+ Description:
+ For the received packet, extract its ipv6 header and without modifying it, transmit the packet back on the same port.
+
+ Verification:
+ The transmitted packet should be same as that of the received packet.
diff --git a/dep/pipeline/hash_001/ethdev.io b/dep/pipeline/hash_001/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/hash_001/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/hash_001/hash_001.cli b/dep/pipeline/hash_001/hash_001.cli
new file mode 100644
index 00000000..87670f4b
--- /dev/null
+++ b/dep/pipeline/hash_001/hash_001.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/hash_001/hash_001.spec /tmp/pipeline/hash_001/hash_001.c
+pipeline libbuild /tmp/pipeline/hash_001/hash_001.c /tmp/pipeline/hash_001/hash_001.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/hash_001/hash_001.so io /tmp/pipeline/hash_001/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/hash_001/hash_001.spec b/dep/pipeline/hash_001/hash_001.spec
new file mode 100644
index 00000000..31f38910
--- /dev/null
+++ b/dep/pipeline/hash_001/hash_001.spec
@@ -0,0 +1,79 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+struct udp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<16> length
+ bit<16> checksum
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+header udp instanceof udp_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<32> src_addr
+ bit<32> dst_addr
+ bit<8> protocol
+ bit<16> src_port
+ bit<16> dst_port
+ bit<32> hash
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ //
+ // RX and parse.
+ //
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ extract h.udp
+
+ mov m.src_addr h.ipv4.src_addr
+ mov m.dst_addr h.ipv4.dst_addr
+ mov m.protocol h.ipv4.protocol
+ mov m.src_port h.udp.src_port
+ mov m.dst_port h.udp.dst_port
+
+ hash jhash m.hash m.src_addr m.dst_port
+
+ and m.hash 3
+ mov m.port m.hash
+
+ emit h.ethernet
+ emit h.ipv4
+ emit h.udp
+ tx m.port
+}
diff --git a/dep/pipeline/hash_001/pcap_files/in_1.txt b/dep/pipeline/hash_001/pcap_files/in_1.txt
new file mode 100644
index 00000000..59cc47a2
--- /dev/null
+++ b/dep/pipeline/hash_001/pcap_files/in_1.txt
@@ -0,0 +1,23 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 33 33 33 33 33 33 08 00 45 00
+000010 00 22 00 01 00 00 40 11 4e 4a 64 00 00 0a c8 00
+000020 00 76 00 64 00 c8 00 0e c9 1c 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 33 33 33 33 33 33 08 00 45 00
+000010 00 22 00 01 00 00 40 11 4e 5c 64 00 00 0a c8 00
+000020 00 64 00 64 00 c8 00 0e c9 2e 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc dd 00 00 33 33 33 33 33 33 08 00 45 00
+000010 00 22 00 01 00 00 40 11 4e 5b 64 00 00 0a c8 00
+000020 00 65 00 64 00 c8 00 0e c9 2d 58 58 58 58 58 58
+# Packet 3
+000000 aa bb cc dd 00 00 33 33 33 33 33 33 08 00 45 00
+000010 00 22 00 01 00 00 40 11 4e 5a 64 00 00 0a c8 00
+000020 00 66 00 64 00 c8 00 0e c9 2c 58 58 58 58 58 58
\ No newline at end of file
diff --git a/dep/pipeline/hash_001/pcap_files/out_1.txt b/dep/pipeline/hash_001/pcap_files/out_1.txt
new file mode 100644
index 00000000..1f773fe6
--- /dev/null
+++ b/dep/pipeline/hash_001/pcap_files/out_1.txt
@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 33 33 33 33 33 33 08 00 45 00
+000010 00 22 00 01 00 00 40 11 4e 4a 64 00 00 0a c8 00
+000020 00 76 00 64 00 c8 00 0e c9 1c 58 58 58 58 58 58
diff --git a/dep/pipeline/hash_001/pcap_files/out_2.txt b/dep/pipeline/hash_001/pcap_files/out_2.txt
new file mode 100644
index 00000000..30ab30cf
--- /dev/null
+++ b/dep/pipeline/hash_001/pcap_files/out_2.txt
@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 33 33 33 33 33 33 08 00 45 00
+000010 00 22 00 01 00 00 40 11 4e 5c 64 00 00 0a c8 00
+000020 00 64 00 64 00 c8 00 0e c9 2e 58 58 58 58 58 58
diff --git a/dep/pipeline/hash_001/pcap_files/out_3.txt b/dep/pipeline/hash_001/pcap_files/out_3.txt
new file mode 100644
index 00000000..802ccec1
--- /dev/null
+++ b/dep/pipeline/hash_001/pcap_files/out_3.txt
@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 33 33 33 33 33 33 08 00 45 00
+000010 00 22 00 01 00 00 40 11 4e 5b 64 00 00 0a c8 00
+000020 00 65 00 64 00 c8 00 0e c9 2d 58 58 58 58 58 58
diff --git a/dep/pipeline/hash_001/pcap_files/out_4.txt b/dep/pipeline/hash_001/pcap_files/out_4.txt
new file mode 100644
index 00000000..a2bac693
--- /dev/null
+++ b/dep/pipeline/hash_001/pcap_files/out_4.txt
@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 33 33 33 33 33 33 08 00 45 00
+000010 00 22 00 01 00 00 40 11 4e 5a 64 00 00 0a c8 00
+000020 00 66 00 64 00 c8 00 0e c9 2c 58 58 58 58 58 58
diff --git a/dep/pipeline/hash_001/readme.md b/dep/pipeline/hash_001/readme.md
new file mode 100644
index 00000000..9febc367
--- /dev/null
+++ b/dep/pipeline/hash_001/readme.md
@@ -0,0 +1,12 @@
+Test Case: test_hash_001
+-----------------------
+
+ Instruction being tested:
+ hash jhash m.field m.field m.field
+
+ Description:
+ jhash algorithm is used to calculte the hash.
+
+ Verification:
+ Packet is transmitted to the output port on the basis of hash value calculated. last two bits of the hash value
+ are used send the packet to a particular port.
diff --git a/dep/pipeline/hash_002/ethdev.io b/dep/pipeline/hash_002/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/hash_002/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/hash_002/hash_002.cli b/dep/pipeline/hash_002/hash_002.cli
new file mode 100644
index 00000000..88537cfa
--- /dev/null
+++ b/dep/pipeline/hash_002/hash_002.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/hash_002/hash_002.spec /tmp/pipeline/hash_002/hash_002.c
+pipeline libbuild /tmp/pipeline/hash_002/hash_002.c /tmp/pipeline/hash_002/hash_002.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/hash_002/hash_002.so io /tmp/pipeline/hash_002/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/hash_002/hash_002.spec b/dep/pipeline/hash_002/hash_002.spec
new file mode 100644
index 00000000..38c8e087
--- /dev/null
+++ b/dep/pipeline/hash_002/hash_002.spec
@@ -0,0 +1,79 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+struct udp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<16> length
+ bit<16> checksum
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+header udp instanceof udp_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<32> src_addr
+ bit<32> dst_addr
+ bit<8> protocol
+ bit<16> src_port
+ bit<16> dst_port
+ bit<32> hash
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ //
+ // RX and parse.
+ //
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ extract h.udp
+
+ mov m.src_addr h.ipv4.src_addr
+ mov m.dst_addr h.ipv4.dst_addr
+ mov m.protocol h.ipv4.protocol
+ mov m.src_port h.udp.src_port
+ mov m.dst_port h.udp.dst_port
+
+ hash crc32 m.hash m.src_addr m.dst_port
+
+ and m.hash 3
+ mov m.port m.hash
+
+ emit h.ethernet
+ emit h.ipv4
+ emit h.udp
+ tx m.port
+}
diff --git a/dep/pipeline/hash_002/pcap_files/in_1.txt b/dep/pipeline/hash_002/pcap_files/in_1.txt
new file mode 100644
index 00000000..7d349add
--- /dev/null
+++ b/dep/pipeline/hash_002/pcap_files/in_1.txt
@@ -0,0 +1,23 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 33 33 33 33 33 33 08 00 45 00
+000010 00 22 00 01 00 00 40 11 4e 57 64 00 00 0a c8 00
+000020 00 69 00 64 00 c8 00 0e c9 29 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 33 33 33 33 33 33 08 00 45 00
+000010 00 22 00 01 00 00 40 11 4e 57 64 00 00 0a c8 00
+000020 00 69 00 64 00 cb 00 0e c9 26 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc dd 00 00 33 33 33 33 33 33 08 00 45 00
+000010 00 22 00 01 00 00 40 11 4e 57 64 00 00 0a c8 00
+000020 00 69 00 64 00 ce 00 0e c9 23 58 58 58 58 58 58
+# Packet 3
+000000 aa bb cc dd 00 00 33 33 33 33 33 33 08 00 45 00
+000010 00 22 00 01 00 00 40 11 4e 58 64 00 00 0a c8 00
+000020 00 68 00 64 00 c9 00 0e c9 29 58 58 58 58 58 58
diff --git a/dep/pipeline/hash_002/pcap_files/out_1.txt b/dep/pipeline/hash_002/pcap_files/out_1.txt
new file mode 100644
index 00000000..dca09ac4
--- /dev/null
+++ b/dep/pipeline/hash_002/pcap_files/out_1.txt
@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 33 33 33 33 33 33 08 00 45 00
+000010 00 22 00 01 00 00 40 11 4e 57 64 00 00 0a c8 00
+000020 00 69 00 64 00 c8 00 0e c9 29 58 58 58 58 58 58
diff --git a/dep/pipeline/hash_002/pcap_files/out_2.txt b/dep/pipeline/hash_002/pcap_files/out_2.txt
new file mode 100644
index 00000000..c2676ea6
--- /dev/null
+++ b/dep/pipeline/hash_002/pcap_files/out_2.txt
@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 33 33 33 33 33 33 08 00 45 00
+000010 00 22 00 01 00 00 40 11 4e 57 64 00 00 0a c8 00
+000020 00 69 00 64 00 cb 00 0e c9 26 58 58 58 58 58 58
diff --git a/dep/pipeline/hash_002/pcap_files/out_3.txt b/dep/pipeline/hash_002/pcap_files/out_3.txt
new file mode 100644
index 00000000..826c25af
--- /dev/null
+++ b/dep/pipeline/hash_002/pcap_files/out_3.txt
@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 33 33 33 33 33 33 08 00 45 00
+000010 00 22 00 01 00 00 40 11 4e 57 64 00 00 0a c8 00
+000020 00 69 00 64 00 ce 00 0e c9 23 58 58 58 58 58 58
diff --git a/dep/pipeline/hash_002/pcap_files/out_4.txt b/dep/pipeline/hash_002/pcap_files/out_4.txt
new file mode 100644
index 00000000..9f9a10eb
--- /dev/null
+++ b/dep/pipeline/hash_002/pcap_files/out_4.txt
@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 33 33 33 33 33 33 08 00 45 00
+000010 00 22 00 01 00 00 40 11 4e 58 64 00 00 0a c8 00
+000020 00 68 00 64 00 c9 00 0e c9 29 58 58 58 58 58 58
diff --git a/dep/pipeline/hash_002/readme.md b/dep/pipeline/hash_002/readme.md
new file mode 100644
index 00000000..ed4b4d65
--- /dev/null
+++ b/dep/pipeline/hash_002/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_hash_002
+-----------------------
+
+ Instruction being tested:
+ hash crc32 m.field m.field m.field
+
+ Description:
+ Hash is calculated using the crc32 algorithm on metadata fields.
+
+ Verification:
+ Packet sent to the output port on the basis of last two bits of the calculted hash value.
diff --git a/dep/pipeline/hash_003/ethdev.io b/dep/pipeline/hash_003/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/hash_003/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/hash_003/hash_003.cli b/dep/pipeline/hash_003/hash_003.cli
new file mode 100644
index 00000000..b41a8472
--- /dev/null
+++ b/dep/pipeline/hash_003/hash_003.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/hash_003/hash_003.spec /tmp/pipeline/hash_003/hash_003.c
+pipeline libbuild /tmp/pipeline/hash_003/hash_003.c /tmp/pipeline/hash_003/hash_003.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/hash_003/hash_003.so io /tmp/pipeline/hash_003/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/hash_003/hash_003.spec b/dep/pipeline/hash_003/hash_003.spec
new file mode 100644
index 00000000..f1a2172f
--- /dev/null
+++ b/dep/pipeline/hash_003/hash_003.spec
@@ -0,0 +1,73 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+struct udp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<16> length
+ bit<16> checksum
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+header udp instanceof udp_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<32> src_addr
+ bit<32> dst_addr
+ bit<8> protocol
+ bit<16> src_port
+ bit<16> dst_port
+ bit<32> hash
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ //
+ // RX and parse.
+ //
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ extract h.udp
+
+ hash crc32 m.hash h.udp.src_port h.udp.length
+
+ and m.hash 3
+ mov m.port m.hash
+
+ emit h.ethernet
+ emit h.ipv4
+ emit h.udp
+ tx m.port
+}
diff --git a/dep/pipeline/hash_003/pcap_files/in_1.txt b/dep/pipeline/hash_003/pcap_files/in_1.txt
new file mode 100644
index 00000000..826c25af
--- /dev/null
+++ b/dep/pipeline/hash_003/pcap_files/in_1.txt
@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 33 33 33 33 33 33 08 00 45 00
+000010 00 22 00 01 00 00 40 11 4e 57 64 00 00 0a c8 00
+000020 00 69 00 64 00 ce 00 0e c9 23 58 58 58 58 58 58
diff --git a/dep/pipeline/hash_003/pcap_files/out_1.txt b/dep/pipeline/hash_003/pcap_files/out_1.txt
new file mode 100644
index 00000000..826c25af
--- /dev/null
+++ b/dep/pipeline/hash_003/pcap_files/out_1.txt
@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 33 33 33 33 33 33 08 00 45 00
+000010 00 22 00 01 00 00 40 11 4e 57 64 00 00 0a c8 00
+000020 00 69 00 64 00 ce 00 0e c9 23 58 58 58 58 58 58
diff --git a/dep/pipeline/hash_003/readme.md b/dep/pipeline/hash_003/readme.md
new file mode 100644
index 00000000..bfa3e56e
--- /dev/null
+++ b/dep/pipeline/hash_003/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_hash_003
+-----------------------
+
+ Instruction being tested:
+ hash HASH_TYPE m.field h.field h.field
+
+ Description:
+ Calculate hash on the header fields and send the packet one the basis of last two bits of the hash value.
+
+ Verification:
+ Behavior should be as per the description.
diff --git a/dep/pipeline/invalidate_001/ethdev.io b/dep/pipeline/invalidate_001/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/invalidate_001/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/invalidate_001/invalidate_001.cli b/dep/pipeline/invalidate_001/invalidate_001.cli
new file mode 100644
index 00000000..4d3f7990
--- /dev/null
+++ b/dep/pipeline/invalidate_001/invalidate_001.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/invalidate_001/invalidate_001.spec /tmp/pipeline/invalidate_001/invalidate_001.c
+pipeline libbuild /tmp/pipeline/invalidate_001/invalidate_001.c /tmp/pipeline/invalidate_001/invalidate_001.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/invalidate_001/invalidate_001.so io /tmp/pipeline/invalidate_001/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/invalidate_001/invalidate_001.spec b/dep/pipeline/invalidate_001/invalidate_001.spec
new file mode 100644
index 00000000..5dd45487
--- /dev/null
+++ b/dep/pipeline/invalidate_001/invalidate_001.spec
@@ -0,0 +1,58 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table invalidate_001 {
+ key {
+ }
+
+ actions {
+ drop
+ }
+
+ default_action drop args none const
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ jmpeq LABEL_0 h.ethernet.ether_type 0x0800
+ invalidate h.ethernet
+ LABEL_0 : jmpv LABEL_1 h.ethernet
+ table invalidate_001
+ LABEL_1 : emit h.ethernet
+ tx m.port
+}
diff --git a/dep/pipeline/invalidate_001/pcap_files/in_1.txt b/dep/pipeline/invalidate_001/pcap_files/in_1.txt
new file mode 100644
index 00000000..6e48efc0
--- /dev/null
+++ b/dep/pipeline/invalidate_001/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 06 45 00
+000010 00 2e 00 01 00 00 00 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 aa bb cc de aa bb cc df 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 aa bb cc de aa bb cc df 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/invalidate_001/pcap_files/out_1.txt b/dep/pipeline/invalidate_001/pcap_files/out_1.txt
new file mode 100644
index 00000000..30d671c6
--- /dev/null
+++ b/dep/pipeline/invalidate_001/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 aa bb cc de aa bb cc df 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/invalidate_001/readme.md b/dep/pipeline/invalidate_001/readme.md
new file mode 100644
index 00000000..552fc678
--- /dev/null
+++ b/dep/pipeline/invalidate_001/readme.md
@@ -0,0 +1,11 @@
+Test Case: invalidate_001
+------------------------
+
+ Instructions being tested:
+ invalidate h.header
+
+ Description:
+ For the received packet, if its ether type is 0x0800, transmit it back on the same port. Else drop the packet.
+
+ Verification:
+ Packets received with ether type 0x0800 should be reverted back as it is on the same port. All other packets should be dropped.
diff --git a/dep/pipeline/jump_001/ethdev.io b/dep/pipeline/jump_001/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/jump_001/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/jump_001/jump_001.cli b/dep/pipeline/jump_001/jump_001.cli
new file mode 100755
index 00000000..ccecb309
--- /dev/null
+++ b/dep/pipeline/jump_001/jump_001.cli
@@ -0,0 +1,19 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/jump_001/jump_001.spec /tmp/pipeline/jump_001/jump_001.c
+pipeline libbuild /tmp/pipeline/jump_001/jump_001.c /tmp/pipeline/jump_001/jump_001.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/jump_001/jump_001.so io /tmp/pipeline/jump_001/ethdev.io numa 0
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/jump_001/jump_001.spec b/dep/pipeline/jump_001/jump_001.spec
new file mode 100644
index 00000000..f23df117
--- /dev/null
+++ b/dep/pipeline/jump_001/jump_001.spec
@@ -0,0 +1,33 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+header ethernet instanceof ethernet_h
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+
+//
+// Pipeline.
+//
+ apply {
+ rx m.port
+ extract h.ethernet
+ jmp LABEL_0
+ mov h.ethernet.dst_addr 0xa0b0c0d00000
+ LABEL_0 : emit h.ethernet
+ tx m.port
+ }
\ No newline at end of file
diff --git a/dep/pipeline/jump_001/pcap_files/in_1.txt b/dep/pipeline/jump_001/pcap_files/in_1.txt
new file mode 100644
index 00000000..75115c15
--- /dev/null
+++ b/dep/pipeline/jump_001/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_001/pcap_files/out_1.txt b/dep/pipeline/jump_001/pcap_files/out_1.txt
new file mode 100644
index 00000000..75115c15
--- /dev/null
+++ b/dep/pipeline/jump_001/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_001/readme.md b/dep/pipeline/jump_001/readme.md
new file mode 100644
index 00000000..9383ae61
--- /dev/null
+++ b/dep/pipeline/jump_001/readme.md
@@ -0,0 +1,10 @@
+Test Case: test_jump_001
+-----------------------
+ Instructions being tested:
+ jmp LABEL
+
+ Description:
+ In this testcase, program will skip the ethernet dst address update and directly go to the emit section of the pipeline where the packet will be transmitted to the same port.
+
+ Verification:
+ Same packet will be received on the same port
diff --git a/dep/pipeline/jump_002/ethdev.io b/dep/pipeline/jump_002/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/jump_002/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/jump_002/jump_002.cli b/dep/pipeline/jump_002/jump_002.cli
new file mode 100644
index 00000000..04044a69
--- /dev/null
+++ b/dep/pipeline/jump_002/jump_002.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/jump_002/jump_002.spec /tmp/pipeline/jump_002/jump_002.c
+pipeline libbuild /tmp/pipeline/jump_002/jump_002.c /tmp/pipeline/jump_002/jump_002.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/jump_002/jump_002.so io /tmp/pipeline/jump_002/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/jump_002/jump_002.spec b/dep/pipeline/jump_002/jump_002.spec
new file mode 100644
index 00000000..ae52ed3d
--- /dev/null
+++ b/dep/pipeline/jump_002/jump_002.spec
@@ -0,0 +1,60 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<16> ether_type
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table jump_002 {
+ key {
+ }
+
+ actions {
+ drop
+ }
+
+ default_action drop args none const
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ mov m.ether_type 0x0800
+ jmpeq LABEL_0 h.ethernet.ether_type m.ether_type
+ invalidate h.ethernet
+ LABEL_0 : jmpv LABEL_1 h.ethernet
+ table jump_002
+ LABEL_1 : emit h.ethernet
+ tx m.port
+}
diff --git a/dep/pipeline/jump_002/pcap_files/in_1.txt b/dep/pipeline/jump_002/pcap_files/in_1.txt
new file mode 100644
index 00000000..7ad6f37d
--- /dev/null
+++ b/dep/pipeline/jump_002/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 06 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 aa bb cc de aa bb cc df 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 aa bb cc de aa bb cc dd 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_002/pcap_files/out_1.txt b/dep/pipeline/jump_002/pcap_files/out_1.txt
new file mode 100644
index 00000000..379c56b7
--- /dev/null
+++ b/dep/pipeline/jump_002/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 aa bb cc de aa bb cc dd 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_002/readme.md b/dep/pipeline/jump_002/readme.md
new file mode 100644
index 00000000..bc27bf16
--- /dev/null
+++ b/dep/pipeline/jump_002/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_jump_002
+------------------------
+
+ Instructions being tested:
+ jmpv LABEL h.header
+
+ Description:
+ For the received packet, if its ether type is 0x0800 transmit it as it is back on the same port else drop the packet.
+
+ Verification:
+ All the packets with ether type as 0x0800 should be transmitted back. All others should be dropped.
diff --git a/dep/pipeline/jump_003/ethdev.io b/dep/pipeline/jump_003/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/jump_003/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/jump_003/jump_003.cli b/dep/pipeline/jump_003/jump_003.cli
new file mode 100644
index 00000000..c5e2ccd1
--- /dev/null
+++ b/dep/pipeline/jump_003/jump_003.cli
@@ -0,0 +1,21 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/jump_003/jump_003.spec /tmp/pipeline/jump_003/jump_003.c
+pipeline libbuild /tmp/pipeline/jump_003/jump_003.c /tmp/pipeline/jump_003/jump_003.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/jump_003/jump_003.so io /tmp/pipeline/jump_003/ethdev.io numa 0
+pipeline PIPELINE0 table jump_003 add /tmp/pipeline/jump_003/table.txt
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/jump_003/jump_003.spec b/dep/pipeline/jump_003/jump_003.spec
new file mode 100644
index 00000000..98a3857e
--- /dev/null
+++ b/dep/pipeline/jump_003/jump_003.spec
@@ -0,0 +1,82 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ipv4 instanceof ipv4_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+action jump_003_action args none {
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table jump_003 {
+ key {
+ h.ipv4.ttl exact
+ }
+
+ actions {
+ jump_003_action
+ drop
+ }
+
+ default_action jump_003_action args none const
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ jmpgt LABEL_0 h.ipv4.ttl 0x00
+ invalidate h.ipv4
+ LABEL_0 : jmpnv LABEL_1 h.ipv4
+ sub h.ipv4.ttl 0x01
+ LABEL_1 : table jump_003
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/jump_003/pcap_files/in_1.txt b/dep/pipeline/jump_003/pcap_files/in_1.txt
new file mode 100644
index 00000000..8be037ca
--- /dev/null
+++ b/dep/pipeline/jump_003/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 00 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 aa bb cc de aa bb cc df 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 aa bb cc de aa bb cc df 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_003/pcap_files/out_1.txt b/dep/pipeline/jump_003/pcap_files/out_1.txt
new file mode 100644
index 00000000..944cbb69
--- /dev/null
+++ b/dep/pipeline/jump_003/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 aa bb cc de aa bb cc df 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_003/readme.md b/dep/pipeline/jump_003/readme.md
new file mode 100644
index 00000000..690aa365
--- /dev/null
+++ b/dep/pipeline/jump_003/readme.md
@@ -0,0 +1,13 @@
+Test Case: test_jump_003
+------------------------
+
+ Instructions being tested:
+ jmpnv LABEL h.header
+
+ Description:
+ For the received packet, if its ipv4 ttl is non-zero, decrement its value by 1 and transmit it back on the same port. Else packets
+ with zero ttl value are dropped.
+
+ Verification:
+ Packets received with nonzero ttl value should be reverted back by decrementing their value by one. Packets with zero ttl value
+ should be dropped.
diff --git a/dep/pipeline/jump_003/table.txt b/dep/pipeline/jump_003/table.txt
new file mode 100644
index 00000000..e6a1f0a7
--- /dev/null
+++ b/dep/pipeline/jump_003/table.txt
@@ -0,0 +1 @@
+match 0x00 action drop
diff --git a/dep/pipeline/jump_004/ethdev.io b/dep/pipeline/jump_004/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/jump_004/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/jump_004/jump_004.cli b/dep/pipeline/jump_004/jump_004.cli
new file mode 100644
index 00000000..3f4ca6f9
--- /dev/null
+++ b/dep/pipeline/jump_004/jump_004.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/jump_004/jump_004.spec /tmp/pipeline/jump_004/jump_004.c
+pipeline libbuild /tmp/pipeline/jump_004/jump_004.c /tmp/pipeline/jump_004/jump_004.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/jump_004/jump_004.so io /tmp/pipeline/jump_004/ethdev.io numa 0
+pipeline PIPELINE0 table jump_004 add /tmp/pipeline/jump_004/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/jump_004/jump_004.spec b/dep/pipeline/jump_004/jump_004.spec
new file mode 100644
index 00000000..049ba483
--- /dev/null
+++ b/dep/pipeline/jump_004/jump_004.spec
@@ -0,0 +1,59 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+action jump_004_action args none {
+ return
+}
+
+//
+// Tables.
+//
+table jump_004 {
+ key {
+ h.ethernet.dst_addr exact
+ }
+
+ actions {
+ jump_004_action
+ }
+
+ default_action jump_004_action args none const
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ table jump_004
+ jmph LABEL_0
+ jmp LABEL_DROP
+ LABEL_0 : emit h.ethernet
+ tx m.port
+ LABEL_DROP : drop
+}
diff --git a/dep/pipeline/jump_004/pcap_files/in_1.txt b/dep/pipeline/jump_004/pcap_files/in_1.txt
new file mode 100644
index 00000000..dd823a47
--- /dev/null
+++ b/dep/pipeline/jump_004/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 aa bb cc de aa bb cc df 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 aa bb cc de aa bb cc dd 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_004/pcap_files/out_1.txt b/dep/pipeline/jump_004/pcap_files/out_1.txt
new file mode 100644
index 00000000..30d671c6
--- /dev/null
+++ b/dep/pipeline/jump_004/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 aa bb cc de aa bb cc df 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_004/readme.md b/dep/pipeline/jump_004/readme.md
new file mode 100644
index 00000000..4d4dd4dd
--- /dev/null
+++ b/dep/pipeline/jump_004/readme.md
@@ -0,0 +1,13 @@
+Test Case: test_jump_004
+------------------------
+
+ Instructions being tested:
+ jmph LABEL
+
+ Description:
+ For the received packet, if its destination MAC address matches with any entry in the table (a hit), do not change the packet contents.
+ For a miss, copy the source MAC address into destination MAC address.Transmit the packet back on the same port.
+
+ Verification:
+ For a table hit, contents of transmitted packet should be same as received. For a miss, the source and destination MAC address of
+ transmitted packet should be same.
diff --git a/dep/pipeline/jump_004/table.txt b/dep/pipeline/jump_004/table.txt
new file mode 100644
index 00000000..62fa58d9
--- /dev/null
+++ b/dep/pipeline/jump_004/table.txt
@@ -0,0 +1 @@
+match 0xaabbccdd0000 action jump_004_action
diff --git a/dep/pipeline/jump_005/ethdev.io b/dep/pipeline/jump_005/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/jump_005/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/jump_005/jump_005.cli b/dep/pipeline/jump_005/jump_005.cli
new file mode 100644
index 00000000..2876d509
--- /dev/null
+++ b/dep/pipeline/jump_005/jump_005.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/jump_005/jump_005.spec /tmp/pipeline/jump_005/jump_005.c
+pipeline libbuild /tmp/pipeline/jump_005/jump_005.c /tmp/pipeline/jump_005/jump_005.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/jump_005/jump_005.so io /tmp/pipeline/jump_005/ethdev.io numa 0
+pipeline PIPELINE0 table jump_005 add /tmp/pipeline/jump_005/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/jump_005/jump_005.spec b/dep/pipeline/jump_005/jump_005.spec
new file mode 100644
index 00000000..3d4660ad
--- /dev/null
+++ b/dep/pipeline/jump_005/jump_005.spec
@@ -0,0 +1,58 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+action jump_005_action args none {
+ return
+}
+
+//
+// Tables.
+//
+table jump_005 {
+ key {
+ h.ethernet.dst_addr exact
+ }
+
+ actions {
+ jump_005_action
+ }
+
+ default_action jump_005_action args none const
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ table jump_005
+ jmpnh LABEL_DROP
+ emit h.ethernet
+ tx m.port
+ LABEL_DROP : drop
+}
diff --git a/dep/pipeline/jump_005/pcap_files/in_1.txt b/dep/pipeline/jump_005/pcap_files/in_1.txt
new file mode 100644
index 00000000..dd823a47
--- /dev/null
+++ b/dep/pipeline/jump_005/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 aa bb cc de aa bb cc df 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 aa bb cc de aa bb cc dd 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_005/pcap_files/out_1.txt b/dep/pipeline/jump_005/pcap_files/out_1.txt
new file mode 100644
index 00000000..30d671c6
--- /dev/null
+++ b/dep/pipeline/jump_005/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 aa bb cc de aa bb cc df 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_005/readme.md b/dep/pipeline/jump_005/readme.md
new file mode 100644
index 00000000..f7eb8841
--- /dev/null
+++ b/dep/pipeline/jump_005/readme.md
@@ -0,0 +1,13 @@
+Test Case: test_jump_005
+------------------------
+
+ Instructions being tested:
+ jmpnh LABEL
+
+ Description:
+ For the received packet, if its destination MAC address doesn't match with any entry in the table (a miss), do not change the packet
+ contents. For a hit, copy the destination MAC address into source MAC address. Transmit the packet back on the same port.
+
+ Verification:
+ For a table miss, contents of transmitted packet should be same as received. For a hit, the source and destination MAC address of
+ transmitted packet should be same.
diff --git a/dep/pipeline/jump_005/table.txt b/dep/pipeline/jump_005/table.txt
new file mode 100644
index 00000000..a17d8955
--- /dev/null
+++ b/dep/pipeline/jump_005/table.txt
@@ -0,0 +1 @@
+match 0xaabbccdd0000 action jump_005_action
diff --git a/dep/pipeline/jump_006/ethdev.io b/dep/pipeline/jump_006/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/jump_006/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/jump_006/jump_006.cli b/dep/pipeline/jump_006/jump_006.cli
new file mode 100644
index 00000000..d6107bd4
--- /dev/null
+++ b/dep/pipeline/jump_006/jump_006.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/jump_006/jump_006.spec /tmp/pipeline/jump_006/jump_006.c
+pipeline libbuild /tmp/pipeline/jump_006/jump_006.c /tmp/pipeline/jump_006/jump_006.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/jump_006/jump_006.so io /tmp/pipeline/jump_006/ethdev.io numa 0
+pipeline PIPELINE0 table jump_006 add /tmp/pipeline/jump_006/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/jump_006/jump_006.spec b/dep/pipeline/jump_006/jump_006.spec
new file mode 100644
index 00000000..358dfb7e
--- /dev/null
+++ b/dep/pipeline/jump_006/jump_006.spec
@@ -0,0 +1,69 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+action jump_006_action_01 args none {
+ return
+}
+
+action jump_006_action_02 args none {
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table jump_006 {
+ key {
+ h.ethernet.dst_addr exact
+ }
+
+ actions {
+ jump_006_action_01
+ jump_006_action_02
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ table jump_006
+ jmpa LABEL_0 jump_006_action_01
+ jmp LABEL_DROP
+ LABEL_0 : emit h.ethernet
+ tx m.port
+ LABEL_DROP : drop
+}
diff --git a/dep/pipeline/jump_006/pcap_files/in_1.txt b/dep/pipeline/jump_006/pcap_files/in_1.txt
new file mode 100644
index 00000000..47c94553
--- /dev/null
+++ b/dep/pipeline/jump_006/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 aa bb cc de aa bb cc df 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 a1 b1 c1 d1 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 aa bb cc de aa bb cc dd 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_006/pcap_files/out_1.txt b/dep/pipeline/jump_006/pcap_files/out_1.txt
new file mode 100644
index 00000000..30d671c6
--- /dev/null
+++ b/dep/pipeline/jump_006/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 aa bb cc de aa bb cc df 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_006/readme.md b/dep/pipeline/jump_006/readme.md
new file mode 100644
index 00000000..39982e96
--- /dev/null
+++ b/dep/pipeline/jump_006/readme.md
@@ -0,0 +1,14 @@
+Test Case: test_jump_006
+------------------------
+
+ Instructions being tested:
+ jmpa LABEL ACTION
+
+ Description:
+ For received packet, if its destination MAC doesn't match with any entry in table (a miss), drop the packet. Else (a hit) perform
+ the action specified for the match. Take a jump based on the action performed for the match. For packet with matching action
+ specified in jump instruction do not change its contents, for packets copy the destination MAC to source MAC. Transmit the packet
+ back on the same port.
+
+ Verification:
+ Behavior should be as per the description.
diff --git a/dep/pipeline/jump_006/table.txt b/dep/pipeline/jump_006/table.txt
new file mode 100644
index 00000000..41c06ed8
--- /dev/null
+++ b/dep/pipeline/jump_006/table.txt
@@ -0,0 +1,2 @@
+match 0xaabbccdd0000 action jump_006_action_01
+match 0xa1b1c1d10000 action jump_006_action_02
diff --git a/dep/pipeline/jump_007/ethdev.io b/dep/pipeline/jump_007/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/jump_007/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/jump_007/jump_007.cli b/dep/pipeline/jump_007/jump_007.cli
new file mode 100644
index 00000000..8f3b1ee9
--- /dev/null
+++ b/dep/pipeline/jump_007/jump_007.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/jump_007/jump_007.spec /tmp/pipeline/jump_007/jump_007.c
+pipeline libbuild /tmp/pipeline/jump_007/jump_007.c /tmp/pipeline/jump_007/jump_007.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/jump_007/jump_007.so io /tmp/pipeline/jump_007/ethdev.io numa 0
+pipeline PIPELINE0 table jump_007 add /tmp/pipeline/jump_007/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/jump_007/jump_007.spec b/dep/pipeline/jump_007/jump_007.spec
new file mode 100644
index 00000000..b9a7b972
--- /dev/null
+++ b/dep/pipeline/jump_007/jump_007.spec
@@ -0,0 +1,69 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+action jump_007_action_01 args none {
+ return
+}
+
+action jump_007_action_02 args none {
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table jump_007 {
+ key {
+ h.ethernet.dst_addr exact
+ }
+
+ actions {
+ jump_007_action_01
+ jump_007_action_02
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ table jump_007
+ jmpna LABEL_0 jump_007_action_02
+ jmp LABEL_DROP
+ LABEL_0 : emit h.ethernet
+ tx m.port
+ LABEL_DROP : drop
+}
diff --git a/dep/pipeline/jump_007/pcap_files/in_1.txt b/dep/pipeline/jump_007/pcap_files/in_1.txt
new file mode 100644
index 00000000..47c94553
--- /dev/null
+++ b/dep/pipeline/jump_007/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 aa bb cc de aa bb cc df 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 a1 b1 c1 d1 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 aa bb cc de aa bb cc dd 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_007/pcap_files/out_1.txt b/dep/pipeline/jump_007/pcap_files/out_1.txt
new file mode 100644
index 00000000..30d671c6
--- /dev/null
+++ b/dep/pipeline/jump_007/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 aa bb cc de aa bb cc df 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_007/readme.md b/dep/pipeline/jump_007/readme.md
new file mode 100644
index 00000000..cc9b8095
--- /dev/null
+++ b/dep/pipeline/jump_007/readme.md
@@ -0,0 +1,14 @@
+Test Case: test_jump_007
+------------------------
+
+ Instructions being tested:
+ jmpna LABEL ACTION
+
+ Description:
+ For received packet, if its destination MAC doesn't match with any entry in table (a miss), drop the packet. Else (a hit) perform
+ the action specified for the match. Take a jump based on the action performed for the match. For packet whose matching action is not
+ same as that specified in jump instruction do not change the packet contents, for other packets copy the destination MAC to source
+ MAC. Transmit the packet back on the same port.
+
+ Verification:
+ Behavior should be as per the description.
diff --git a/dep/pipeline/jump_007/table.txt b/dep/pipeline/jump_007/table.txt
new file mode 100644
index 00000000..cc4dcf01
--- /dev/null
+++ b/dep/pipeline/jump_007/table.txt
@@ -0,0 +1,2 @@
+match 0xaabbccdd0000 action jump_007_action_01
+match 0xa1b1c1d10000 action jump_007_action_02
diff --git a/dep/pipeline/jump_008/ethdev.io b/dep/pipeline/jump_008/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/jump_008/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/jump_008/jump_008.cli b/dep/pipeline/jump_008/jump_008.cli
new file mode 100644
index 00000000..c82a1198
--- /dev/null
+++ b/dep/pipeline/jump_008/jump_008.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/jump_008/jump_008.spec /tmp/pipeline/jump_008/jump_008.c
+pipeline libbuild /tmp/pipeline/jump_008/jump_008.c /tmp/pipeline/jump_008/jump_008.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/jump_008/jump_008.so io /tmp/pipeline/jump_008/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/jump_008/jump_008.spec b/dep/pipeline/jump_008/jump_008.spec
new file mode 100644
index 00000000..443a054e
--- /dev/null
+++ b/dep/pipeline/jump_008/jump_008.spec
@@ -0,0 +1,91 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ipv4 instanceof ipv4_h
+
+struct tcp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<32> seq_num
+ bit<32> ack_num
+ bit<16> hdr_len_flags
+ bit<16> window_size
+ bit<16> checksum
+ bit<16> urg_ptr
+}
+
+header tcp instanceof tcp_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<32> seq_num
+ bit<32> ack_num
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table jump_008 {
+ key {
+ }
+
+ actions {
+ drop
+ }
+
+ default_action drop args none const
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ extract h.tcp
+ mov m.seq_num h.tcp.seq_num
+ mov m.ack_num h.tcp.ack_num
+ jmplt LABEL_0 m.ack_num m.seq_num
+ table jump_008
+ LABEL_0 : emit h.ethernet
+ emit h.ipv4
+ emit h.tcp
+ tx m.port
+}
diff --git a/dep/pipeline/jump_008/pcap_files/in_1.txt b/dep/pipeline/jump_008/pcap_files/in_1.txt
new file mode 100644
index 00000000..eccf3c49
--- /dev/null
+++ b/dep/pipeline/jump_008/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 aa bb cc de aa bb cc df 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 aa bb cc de aa bb cc dd 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_008/pcap_files/out_1.txt b/dep/pipeline/jump_008/pcap_files/out_1.txt
new file mode 100644
index 00000000..379c56b7
--- /dev/null
+++ b/dep/pipeline/jump_008/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 aa bb cc de aa bb cc dd 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_008/readme.md b/dep/pipeline/jump_008/readme.md
new file mode 100644
index 00000000..59002f84
--- /dev/null
+++ b/dep/pipeline/jump_008/readme.md
@@ -0,0 +1,12 @@
+Test Case: test_jump_008
+------------------------
+
+ Instructions being tested:
+ jmplt LABEL m.field m.field
+
+ Description:
+ For the received packet, if its tcp sequence number is greater than its acknowledgement number, transmit the packet back on the same
+ port, else drop it.
+
+ Verification:
+ Only packets having tcp sequence number greater than its acknowledgement number will be transmitted. Other packets should be dropped.
diff --git a/dep/pipeline/jump_009/ethdev.io b/dep/pipeline/jump_009/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/jump_009/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/jump_009/jump_009.cli b/dep/pipeline/jump_009/jump_009.cli
new file mode 100644
index 00000000..25afc474
--- /dev/null
+++ b/dep/pipeline/jump_009/jump_009.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/jump_009/jump_009.spec /tmp/pipeline/jump_009/jump_009.c
+pipeline libbuild /tmp/pipeline/jump_009/jump_009.c /tmp/pipeline/jump_009/jump_009.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/jump_009/jump_009.so io /tmp/pipeline/jump_009/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/jump_009/jump_009.spec b/dep/pipeline/jump_009/jump_009.spec
new file mode 100644
index 00000000..7b1b4cb6
--- /dev/null
+++ b/dep/pipeline/jump_009/jump_009.spec
@@ -0,0 +1,81 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<48> data_48
+ bit<32> data_32
+ bit<16> data_16
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table jump_009 {
+ key {
+ }
+
+ actions {
+ drop
+ }
+
+ default_action drop args none
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ mov m.data_48 0x000012345678
+ mov m.data_32 0x12345678
+ mov m.data_16 0x1234
+ jmplt LABEL_1 m.data_48 h.ipv4.dst_addr // >
+ table jump_009
+ LABEL_1 : jmplt LABEL_2 m.data_32 h.ipv4.dst_addr // =
+ table jump_009
+ LABEL_2 : jmplt LABEL_3 m.data_16 h.ipv4.src_addr // <
+ table jump_009
+ LABEL_3 : emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/jump_009/pcap_files/in_1.txt b/dep/pipeline/jump_009/pcap_files/in_1.txt
new file mode 100644
index 00000000..844c73d4
--- /dev/null
+++ b/dep/pipeline/jump_009/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 aa bb cc dc 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 12 34 56 78 12 34
+000020 56 78 00 64 00 c8 aa bb cc dc 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_009/pcap_files/out_1.txt b/dep/pipeline/jump_009/pcap_files/out_1.txt
new file mode 100644
index 00000000..21d2a546
--- /dev/null
+++ b/dep/pipeline/jump_009/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 aa bb cc dc 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_009/readme.md b/dep/pipeline/jump_009/readme.md
new file mode 100644
index 00000000..36946115
--- /dev/null
+++ b/dep/pipeline/jump_009/readme.md
@@ -0,0 +1,14 @@
+
+Test Case: test_jump_009
+------------------------
+
+ Instructions being tested:
+ jmplt LABEL m.field h.field
+
+ Description:
+ For the received packet, if its source and destination IPv4 addresses
+ are greater than the predefined values in metadata, transmit the packet
+ back on the same port, else drop it.
+
+ Verification:
+ Verify using input and output pcap files.
diff --git a/dep/pipeline/jump_010/ethdev.io b/dep/pipeline/jump_010/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/jump_010/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/jump_010/jump_010.cli b/dep/pipeline/jump_010/jump_010.cli
new file mode 100644
index 00000000..7538ee36
--- /dev/null
+++ b/dep/pipeline/jump_010/jump_010.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/jump_010/jump_010.spec /tmp/pipeline/jump_010/jump_010.c
+pipeline libbuild /tmp/pipeline/jump_010/jump_010.c /tmp/pipeline/jump_010/jump_010.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/jump_010/jump_010.so io /tmp/pipeline/jump_010/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/jump_010/jump_010.spec b/dep/pipeline/jump_010/jump_010.spec
new file mode 100644
index 00000000..c615779d
--- /dev/null
+++ b/dep/pipeline/jump_010/jump_010.spec
@@ -0,0 +1,81 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<48> data_48
+ bit<32> data_32
+ bit<16> data_16
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table jump_010 {
+ key {
+ }
+
+ actions {
+ drop
+ }
+
+ default_action drop args none
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ mov m.data_48 0xa1a2a3a4a5a6
+ mov m.data_32 0xa1a2a3a4
+ mov m.data_16 0xa1a2
+ jmplt LABEL_1 h.ipv4.dst_addr m.data_48 // <
+ table jump_010
+ LABEL_1 : jmplt LABEL_2 h.ipv4.dst_addr m.data_32 // =
+ table jump_010
+ LABEL_2 : jmplt LABEL_3 h.ipv4.src_addr m.data_16 // >
+ table jump_010
+ LABEL_3 : emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/jump_010/pcap_files/in_1.txt b/dep/pipeline/jump_010/pcap_files/in_1.txt
new file mode 100644
index 00000000..2bc1b8db
--- /dev/null
+++ b/dep/pipeline/jump_010/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 00 00 64 aa bb cc 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 c2 1e 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 0f 00 00 00 0a 50 02
+000030 20 00 cc e3 00 00 58 58 58 58 58 58
+# Packet 1
+000000 52 54 00 12 44 57 00 00 64 aa bb cc 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 c2 1e 00 00 a0 a1 18 00
+000020 00 0a 00 64 00 c8 00 00 00 0f 00 00 00 0a 50 02
+000030 20 00 cc e3 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_010/pcap_files/out_1.txt b/dep/pipeline/jump_010/pcap_files/out_1.txt
new file mode 100644
index 00000000..04dfca90
--- /dev/null
+++ b/dep/pipeline/jump_010/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 00 00 64 aa bb cc 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 c2 1e 00 00 a0 a1 18 00
+000020 00 0a 00 64 00 c8 00 00 00 0f 00 00 00 0a 50 02
+000030 20 00 cc e3 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_010/readme.md b/dep/pipeline/jump_010/readme.md
new file mode 100644
index 00000000..3dab73bf
--- /dev/null
+++ b/dep/pipeline/jump_010/readme.md
@@ -0,0 +1,14 @@
+
+Test Case: test_jump_010
+------------------------
+
+ Instructions being tested:
+ jmplt LABEL h.field m.field
+
+ Description:
+ For the received packet, if its source & destination IPv4 addresses are
+ less than the predefined values in metadata, transmit packet back on
+ the same port. Drop all other packets.
+
+ Verification:
+ Verify using input and output pcap files.
diff --git a/dep/pipeline/jump_011/ethdev.io b/dep/pipeline/jump_011/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/jump_011/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/jump_011/jump_011.cli b/dep/pipeline/jump_011/jump_011.cli
new file mode 100644
index 00000000..20c77aec
--- /dev/null
+++ b/dep/pipeline/jump_011/jump_011.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/jump_011/jump_011.spec /tmp/pipeline/jump_011/jump_011.c
+pipeline libbuild /tmp/pipeline/jump_011/jump_011.c /tmp/pipeline/jump_011/jump_011.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/jump_011/jump_011.so io /tmp/pipeline/jump_011/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/jump_011/jump_011.spec b/dep/pipeline/jump_011/jump_011.spec
new file mode 100644
index 00000000..0ea9c9b5
--- /dev/null
+++ b/dep/pipeline/jump_011/jump_011.spec
@@ -0,0 +1,75 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table jump_011 {
+ key {
+ }
+
+ actions {
+ drop
+ }
+
+ default_action drop args none const
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ jmplt LABEL_1 h.ethernet.src_addr h.ipv4.dst_addr // >
+ table jump_011
+ LABEL_1 : jmplt LABEL_2 h.ipv4.src_addr h.ethernet.src_addr // <
+ table jump_011
+ LABEL_2 : jmplt LABEL_3 h.ipv4.src_addr h.ipv4.dst_addr // =
+ table jump_011
+ LABEL_3 : emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/jump_011/pcap_files/in_1.txt b/dep/pipeline/jump_011/pcap_files/in_1.txt
new file mode 100644
index 00000000..a797ff7f
--- /dev/null
+++ b/dep/pipeline/jump_011/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 00 00 64 aa bb cc 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e be 64 00 00 01 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 0f 00 00 00 0a 50 02
+000030 20 00 59 83 00 00 58 58 58 58 58 58
+# Packet 1
+000000 52 54 00 12 44 57 11 00 64 aa bb cc 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e be 64 00 00 01 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 0f 00 00 00 0a 50 02
+000030 20 00 59 83 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_011/pcap_files/out_1.txt b/dep/pipeline/jump_011/pcap_files/out_1.txt
new file mode 100644
index 00000000..edc1914e
--- /dev/null
+++ b/dep/pipeline/jump_011/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 00 00 64 aa bb cc 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e be 64 00 00 01 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 0f 00 00 00 0a 50 02
+000030 20 00 59 83 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_011/readme.md b/dep/pipeline/jump_011/readme.md
new file mode 100644
index 00000000..9d8d59ec
--- /dev/null
+++ b/dep/pipeline/jump_011/readme.md
@@ -0,0 +1,15 @@
+
+Test Case: test_jump_011
+------------------------
+
+ Instructions being tested:
+ jmplt LABEL h.field h.field
+
+ Description:
+ For the received packet, if its source MAC address is less than its
+ destination IPv4 address, source IPv4 address is less than its source
+ MAC address and source IPv4 address is less than its destination IPv4
+ address transmit the packet back on the same port, else drop it.
+
+ Verification:
+ Verify using input and output pcap files.
diff --git a/dep/pipeline/jump_012/ethdev.io b/dep/pipeline/jump_012/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/jump_012/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/jump_012/jump_012.cli b/dep/pipeline/jump_012/jump_012.cli
new file mode 100644
index 00000000..a3117fff
--- /dev/null
+++ b/dep/pipeline/jump_012/jump_012.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/jump_012/jump_012.spec /tmp/pipeline/jump_012/jump_012.c
+pipeline libbuild /tmp/pipeline/jump_012/jump_012.c /tmp/pipeline/jump_012/jump_012.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/jump_012/jump_012.so io /tmp/pipeline/jump_012/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/jump_012/jump_012.spec b/dep/pipeline/jump_012/jump_012.spec
new file mode 100644
index 00000000..1a84b8a4
--- /dev/null
+++ b/dep/pipeline/jump_012/jump_012.spec
@@ -0,0 +1,76 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ipv4 instanceof ipv4_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<8> ttl_val
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table jump_012 {
+ key {
+ }
+
+ actions {
+ drop
+ }
+
+ default_action drop args none const
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ mov m.ttl_val h.ipv4.ttl
+ jmplt LABEL_0 m.ttl_val 0x50
+ table jump_012
+ LABEL_0 : sub m.ttl_val 0x01
+ mov h.ipv4.ttl m.ttl_val
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/jump_012/pcap_files/in_1.txt b/dep/pipeline/jump_012/pcap_files/in_1.txt
new file mode 100644
index 00000000..e090e789
--- /dev/null
+++ b/dep/pipeline/jump_012/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 60 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_012/pcap_files/out_1.txt b/dep/pipeline/jump_012/pcap_files/out_1.txt
new file mode 100644
index 00000000..9583c5c0
--- /dev/null
+++ b/dep/pipeline/jump_012/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_012/readme.md b/dep/pipeline/jump_012/readme.md
new file mode 100644
index 00000000..6ab758f7
--- /dev/null
+++ b/dep/pipeline/jump_012/readme.md
@@ -0,0 +1,13 @@
+Test Case: test_jump_012
+------------------------
+
+ Instructions being tested:
+ jmplt LABEL m.field immediate_value
+
+ Description:
+ For the received packet, if the ttl value is less than 0x50, decrement it and transmit the packet back on the same port. Else drop
+ the packet.
+
+ Verification:
+ If the received packet had the ttl value less than 0x50, then the transmitted packet should have ttl value one less than it. Else
+ the received packet is dropped.
diff --git a/dep/pipeline/jump_013/ethdev.io b/dep/pipeline/jump_013/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/jump_013/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/jump_013/jump_013.cli b/dep/pipeline/jump_013/jump_013.cli
new file mode 100644
index 00000000..4f8f5db0
--- /dev/null
+++ b/dep/pipeline/jump_013/jump_013.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/jump_013/jump_013.spec /tmp/pipeline/jump_013/jump_013.c
+pipeline libbuild /tmp/pipeline/jump_013/jump_013.c /tmp/pipeline/jump_013/jump_013.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/jump_013/jump_013.so io /tmp/pipeline/jump_013/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/jump_013/jump_013.spec b/dep/pipeline/jump_013/jump_013.spec
new file mode 100644
index 00000000..ab8f372f
--- /dev/null
+++ b/dep/pipeline/jump_013/jump_013.spec
@@ -0,0 +1,73 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ipv4 instanceof ipv4_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table jump_013 {
+ key {
+ }
+
+ actions {
+ drop
+ }
+
+ default_action drop args none const
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ jmplt LABEL_0 h.ipv4.ttl 0x50
+ table jump_013
+ LABEL_0 : sub h.ipv4.ttl 0x01
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/jump_013/pcap_files/in_1.txt b/dep/pipeline/jump_013/pcap_files/in_1.txt
new file mode 100644
index 00000000..e090e789
--- /dev/null
+++ b/dep/pipeline/jump_013/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 60 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_013/pcap_files/out_1.txt b/dep/pipeline/jump_013/pcap_files/out_1.txt
new file mode 100644
index 00000000..9583c5c0
--- /dev/null
+++ b/dep/pipeline/jump_013/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_013/readme.md b/dep/pipeline/jump_013/readme.md
new file mode 100644
index 00000000..e6eb553e
--- /dev/null
+++ b/dep/pipeline/jump_013/readme.md
@@ -0,0 +1,13 @@
+Test Case: test_jump_013
+------------------------
+
+ Instructions being tested:
+ jmplt LABEL h.field immediate_value
+
+ Description:
+ For the received packet, if the ttl value is less than 0x50, decrement it and transmit the packet back on the same
+ port. Else drop the packet.
+
+ Verification:
+ If the received packet had the ttl value less than 0x50, then the transmitted packet should have ttl value one less
+ than it. Else the received packet should be dropped.
diff --git a/dep/pipeline/jump_014/ethdev.io b/dep/pipeline/jump_014/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/jump_014/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/jump_014/jump_014.cli b/dep/pipeline/jump_014/jump_014.cli
new file mode 100644
index 00000000..5c98c050
--- /dev/null
+++ b/dep/pipeline/jump_014/jump_014.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/jump_014/jump_014.spec /tmp/pipeline/jump_014/jump_014.c
+pipeline libbuild /tmp/pipeline/jump_014/jump_014.c /tmp/pipeline/jump_014/jump_014.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/jump_014/jump_014.so io /tmp/pipeline/jump_014/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/jump_014/jump_014.spec b/dep/pipeline/jump_014/jump_014.spec
new file mode 100644
index 00000000..e2d27a7a
--- /dev/null
+++ b/dep/pipeline/jump_014/jump_014.spec
@@ -0,0 +1,91 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ipv4 instanceof ipv4_h
+
+struct tcp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<32> seq_num
+ bit<32> ack_num
+ bit<16> hdr_len_flags
+ bit<16> window_size
+ bit<16> checksum
+ bit<16> urg_ptr
+}
+
+header tcp instanceof tcp_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<32> seq_num
+ bit<32> ack_num
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table jump_014 {
+ key {
+ }
+
+ actions {
+ drop
+ }
+
+ default_action drop args none const
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ extract h.tcp
+ mov m.seq_num h.tcp.seq_num
+ mov m.ack_num h.tcp.ack_num
+ jmpgt LABEL_0 m.seq_num m.ack_num
+ table jump_014
+ LABEL_0 : emit h.ethernet
+ emit h.ipv4
+ emit h.tcp
+ tx m.port
+}
diff --git a/dep/pipeline/jump_014/pcap_files/in_1.txt b/dep/pipeline/jump_014/pcap_files/in_1.txt
new file mode 100644
index 00000000..eccf3c49
--- /dev/null
+++ b/dep/pipeline/jump_014/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 aa bb cc de aa bb cc df 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 aa bb cc de aa bb cc dd 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_014/pcap_files/out_1.txt b/dep/pipeline/jump_014/pcap_files/out_1.txt
new file mode 100644
index 00000000..379c56b7
--- /dev/null
+++ b/dep/pipeline/jump_014/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 aa bb cc de aa bb cc dd 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_014/readme.md b/dep/pipeline/jump_014/readme.md
new file mode 100644
index 00000000..69d408a5
--- /dev/null
+++ b/dep/pipeline/jump_014/readme.md
@@ -0,0 +1,12 @@
+Test Case: test_jump_014
+------------------------
+
+ Instructions being tested:
+ jmpgt LABEL m.field m.field
+
+ Description:
+ For the received packet, if its tcp sequence number is greater than its acknowledgement number, transmit the packet back on the
+ same port, else drop it.
+
+ Verification:
+ Only packets having tcp sequence number greater than its acknowledgement number will be transmitted. Other packets should be dropped.
diff --git a/dep/pipeline/jump_015/ethdev.io b/dep/pipeline/jump_015/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/jump_015/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/jump_015/jump_015.cli b/dep/pipeline/jump_015/jump_015.cli
new file mode 100644
index 00000000..e9b5cff8
--- /dev/null
+++ b/dep/pipeline/jump_015/jump_015.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/jump_015/jump_015.spec /tmp/pipeline/jump_015/jump_015.c
+pipeline libbuild /tmp/pipeline/jump_015/jump_015.c /tmp/pipeline/jump_015/jump_015.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/jump_015/jump_015.so io /tmp/pipeline/jump_015/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/jump_015/jump_015.spec b/dep/pipeline/jump_015/jump_015.spec
new file mode 100644
index 00000000..66bb7245
--- /dev/null
+++ b/dep/pipeline/jump_015/jump_015.spec
@@ -0,0 +1,97 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ipv4 instanceof ipv4_h
+
+struct tcp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<32> seq_num
+ bit<32> ack_num
+ bit<16> hdr_len_flags
+ bit<16> window_size
+ bit<16> checksum
+ bit<16> urg_ptr
+}
+
+header tcp instanceof tcp_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<32> tcp_seq_num
+ bit<16> tcp_dst_port
+ bit<48> eth_src_addr
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table jump_015 {
+ key {
+ }
+
+ actions {
+ drop
+ }
+
+ default_action drop args none const
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ extract h.tcp
+ mov m.tcp_seq_num h.tcp.seq_num
+ mov m.tcp_dst_port h.tcp.dst_port
+ mov m.eth_src_addr h.ethernet.src_addr
+ jmpgt LABEL_0 m.eth_src_addr h.tcp.ack_num // >
+ table jump_015
+ LABEL_0 : jmpgt LABEL_1 m.tcp_seq_num h.tcp.ack_num // =
+ table jump_015
+ LABEL_1 : jmpgt LABEL_2 m.tcp_dst_port h.tcp.ack_num // <
+ table jump_015
+ LABEL_2 : emit h.ethernet
+ emit h.ipv4
+ emit h.tcp
+ tx m.port
+}
diff --git a/dep/pipeline/jump_015/pcap_files/in_1.txt b/dep/pipeline/jump_015/pcap_files/in_1.txt
new file mode 100644
index 00000000..d6838794
--- /dev/null
+++ b/dep/pipeline/jump_015/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 00 10 00 00 00 10 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e be 64 00 00 01 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 0f 00 00 00 0a 50 02
+000030 20 00 59 83 00 00 58 58 58 58 58 58
+# Packet 1
+000000 52 54 00 12 44 57 00 10 00 00 00 10 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e be 64 00 00 01 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 0f 00 00 00 14 50 02
+000030 20 00 59 79 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_015/pcap_files/out_1.txt b/dep/pipeline/jump_015/pcap_files/out_1.txt
new file mode 100644
index 00000000..c99b673d
--- /dev/null
+++ b/dep/pipeline/jump_015/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 00 10 00 00 00 10 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e be 64 00 00 01 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 0f 00 00 00 0a 50 02
+000030 20 00 59 83 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_015/readme.md b/dep/pipeline/jump_015/readme.md
new file mode 100644
index 00000000..814d0127
--- /dev/null
+++ b/dep/pipeline/jump_015/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_jump_015
+------------------------
+
+ Instructions being tested:
+ jmpgt LABEL m.field h.field
+
+ Description:
+ For the received packet, if its tcp acknoledgement number number is smaller than ethernet src addr, tcp sequence number and tcp src port, then transmit the packet back on the same port, else drop it.
+
+ Verification:
+ Verify using input and output pcap files.
diff --git a/dep/pipeline/jump_016/ethdev.io b/dep/pipeline/jump_016/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/jump_016/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/jump_016/jump_016.cli b/dep/pipeline/jump_016/jump_016.cli
new file mode 100644
index 00000000..40b19c4f
--- /dev/null
+++ b/dep/pipeline/jump_016/jump_016.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/jump_016/jump_016.spec /tmp/pipeline/jump_016/jump_016.c
+pipeline libbuild /tmp/pipeline/jump_016/jump_016.c /tmp/pipeline/jump_016/jump_016.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/jump_016/jump_016.so io /tmp/pipeline/jump_016/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/jump_016/jump_016.spec b/dep/pipeline/jump_016/jump_016.spec
new file mode 100644
index 00000000..ee5c2fb8
--- /dev/null
+++ b/dep/pipeline/jump_016/jump_016.spec
@@ -0,0 +1,93 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ipv4 instanceof ipv4_h
+
+struct tcp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<32> seq_num
+ bit<32> ack_num
+ bit<16> hdr_len_flags
+ bit<16> window_size
+ bit<16> checksum
+ bit<16> urg_ptr
+}
+
+header tcp instanceof tcp_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<32> tcp_ack_num
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table jump_016 {
+ key {
+ }
+
+ actions {
+ drop
+ }
+
+ default_action drop args none const
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ extract h.tcp
+ mov m.tcp_ack_num h.tcp.ack_num
+ jmpgt LABEL_0 h.ethernet.src_addr m.tcp_ack_num // >
+ table jump_016
+ LABEL_0 : jmpgt LABEL_1 h.tcp.seq_num m.tcp_ack_num // =
+ table jump_016
+ LABEL_1 : jmpgt LABEL_2 h.tcp.src_port m.tcp_ack_num // <
+ table jump_016
+ LABEL_2 : emit h.ethernet
+ emit h.ipv4
+ emit h.tcp
+ tx m.port
+}
diff --git a/dep/pipeline/jump_016/pcap_files/in_1.txt b/dep/pipeline/jump_016/pcap_files/in_1.txt
new file mode 100644
index 00000000..d6838794
--- /dev/null
+++ b/dep/pipeline/jump_016/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 00 10 00 00 00 10 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e be 64 00 00 01 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 0f 00 00 00 0a 50 02
+000030 20 00 59 83 00 00 58 58 58 58 58 58
+# Packet 1
+000000 52 54 00 12 44 57 00 10 00 00 00 10 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e be 64 00 00 01 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 0f 00 00 00 14 50 02
+000030 20 00 59 79 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_016/pcap_files/out_1.txt b/dep/pipeline/jump_016/pcap_files/out_1.txt
new file mode 100644
index 00000000..c99b673d
--- /dev/null
+++ b/dep/pipeline/jump_016/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 00 10 00 00 00 10 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e be 64 00 00 01 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 0f 00 00 00 0a 50 02
+000030 20 00 59 83 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_016/readme.md b/dep/pipeline/jump_016/readme.md
new file mode 100644
index 00000000..8b72396a
--- /dev/null
+++ b/dep/pipeline/jump_016/readme.md
@@ -0,0 +1,10 @@
+Test Case: test_jump_016
+------------------------
+ Instructions being tested:
+ jmpgt LABEL h.field m.field
+
+ Description:
+ For the received packet, if its tcp acknoledgement number is smaller than ethernet src addr, tcp sequence number and tcp src port, then transmit the packet back on the same port, else drop it.
+
+ Verification:
+ Verify using input and output pcap files.
diff --git a/dep/pipeline/jump_017/ethdev.io b/dep/pipeline/jump_017/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/jump_017/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/jump_017/jump_017.cli b/dep/pipeline/jump_017/jump_017.cli
new file mode 100644
index 00000000..376d10ae
--- /dev/null
+++ b/dep/pipeline/jump_017/jump_017.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/jump_017/jump_017.spec /tmp/pipeline/jump_017/jump_017.c
+pipeline libbuild /tmp/pipeline/jump_017/jump_017.c /tmp/pipeline/jump_017/jump_017.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/jump_017/jump_017.so io /tmp/pipeline/jump_017/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/jump_017/jump_017.spec b/dep/pipeline/jump_017/jump_017.spec
new file mode 100644
index 00000000..8f614d86
--- /dev/null
+++ b/dep/pipeline/jump_017/jump_017.spec
@@ -0,0 +1,75 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table jump_017 {
+ key {
+ }
+
+ actions {
+ drop
+ }
+
+ default_action drop args none const
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ jmpgt LABEL_0 h.ethernet.dst_addr h.ipv4.src_addr // >
+ table jump_017
+ LABEL_0 : jmpgt LABEL_1 h.ethernet.dst_addr h.ethernet.src_addr // =
+ table jump_017
+ LABEL_1 : jmpgt LABEL_2 h.ipv4.dst_addr h.ethernet.src_addr // <
+ table jump_017
+ LABEL_2 : emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/jump_017/pcap_files/in_1.txt b/dep/pipeline/jump_017/pcap_files/in_1.txt
new file mode 100644
index 00000000..baee9ffc
--- /dev/null
+++ b/dep/pipeline/jump_017/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 10 00 00 00 00 02 00 00 00 00 00 10 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b6 64 00 00 09 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 94 00 00 58 58 58 58 58 58
+# Packet 1
+000000 10 00 00 00 00 02 00 10 00 00 00 10 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b6 64 00 00 09 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 94 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_017/pcap_files/out_1.txt b/dep/pipeline/jump_017/pcap_files/out_1.txt
new file mode 100644
index 00000000..a50e4615
--- /dev/null
+++ b/dep/pipeline/jump_017/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 10 00 00 00 00 02 00 00 00 00 00 10 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b6 64 00 00 09 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 94 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_017/readme.md b/dep/pipeline/jump_017/readme.md
new file mode 100644
index 00000000..acb1d3f6
--- /dev/null
+++ b/dep/pipeline/jump_017/readme.md
@@ -0,0 +1,10 @@
+Test Case: test_jump_017
+------------------------
+ Instructions being tested:
+ jmpgt LABEL h.field h.field
+
+ Description:
+ For the received packet, if destination MAC address is greater than IP src address and MAC src address, and IP dst address is grater than MAC src address then, transmit the packet back on the same port, else drop it.
+
+ Verification:
+ Verify using input and output pcap files.
diff --git a/dep/pipeline/jump_018/ethdev.io b/dep/pipeline/jump_018/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/jump_018/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/jump_018/jump_018.cli b/dep/pipeline/jump_018/jump_018.cli
new file mode 100644
index 00000000..23122df8
--- /dev/null
+++ b/dep/pipeline/jump_018/jump_018.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/jump_018/jump_018.spec /tmp/pipeline/jump_018/jump_018.c
+pipeline libbuild /tmp/pipeline/jump_018/jump_018.c /tmp/pipeline/jump_018/jump_018.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/jump_018/jump_018.so io /tmp/pipeline/jump_018/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/jump_018/jump_018.spec b/dep/pipeline/jump_018/jump_018.spec
new file mode 100644
index 00000000..097242cc
--- /dev/null
+++ b/dep/pipeline/jump_018/jump_018.spec
@@ -0,0 +1,76 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ipv4 instanceof ipv4_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<8> ttl_val
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table jump_018 {
+ key {
+ }
+
+ actions {
+ drop
+ }
+
+ default_action drop args none const
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ mov m.ttl_val h.ipv4.ttl
+ jmpgt LABEL_0 m.ttl_val 0x00
+ table jump_018
+ LABEL_0 : sub m.ttl_val 0x01
+ mov h.ipv4.ttl m.ttl_val
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/jump_018/pcap_files/in_1.txt b/dep/pipeline/jump_018/pcap_files/in_1.txt
new file mode 100644
index 00000000..d6c33a0c
--- /dev/null
+++ b/dep/pipeline/jump_018/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 00 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_018/pcap_files/out_1.txt b/dep/pipeline/jump_018/pcap_files/out_1.txt
new file mode 100644
index 00000000..9583c5c0
--- /dev/null
+++ b/dep/pipeline/jump_018/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_018/readme.md b/dep/pipeline/jump_018/readme.md
new file mode 100644
index 00000000..add09c3b
--- /dev/null
+++ b/dep/pipeline/jump_018/readme.md
@@ -0,0 +1,13 @@
+Test Case: test_jump_018
+------------------------
+
+ Instructions being tested:
+ jmpgt LABEL m.field immediate_value
+
+ Description:
+ For the received packet, if the ttl value is greater than 0x00, decrement it and transmit the packet back on the same port. Else drop
+ the packet.
+
+ Verification:
+ If the received packet had the ttl value greater than 0x50, then the transmitted packet should have ttl value one less than it. Else
+ the received packet is dropped.
diff --git a/dep/pipeline/jump_019/ethdev.io b/dep/pipeline/jump_019/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/jump_019/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/jump_019/jump_019.cli b/dep/pipeline/jump_019/jump_019.cli
new file mode 100644
index 00000000..702918d5
--- /dev/null
+++ b/dep/pipeline/jump_019/jump_019.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/jump_019/jump_019.spec /tmp/pipeline/jump_019/jump_019.c
+pipeline libbuild /tmp/pipeline/jump_019/jump_019.c /tmp/pipeline/jump_019/jump_019.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/jump_019/jump_019.so io /tmp/pipeline/jump_019/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/jump_019/jump_019.spec b/dep/pipeline/jump_019/jump_019.spec
new file mode 100644
index 00000000..40f7b4ed
--- /dev/null
+++ b/dep/pipeline/jump_019/jump_019.spec
@@ -0,0 +1,73 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ipv4 instanceof ipv4_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table jump_019 {
+ key {
+ }
+
+ actions {
+ drop
+ }
+
+ default_action drop args none const
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ jmpgt LABEL_0 h.ipv4.ttl 0x00
+ table jump_019
+ LABEL_0 : sub h.ipv4.ttl 0x01
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/jump_019/pcap_files/in_1.txt b/dep/pipeline/jump_019/pcap_files/in_1.txt
new file mode 100644
index 00000000..d6c33a0c
--- /dev/null
+++ b/dep/pipeline/jump_019/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 00 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_019/pcap_files/out_1.txt b/dep/pipeline/jump_019/pcap_files/out_1.txt
new file mode 100644
index 00000000..9583c5c0
--- /dev/null
+++ b/dep/pipeline/jump_019/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_019/readme.md b/dep/pipeline/jump_019/readme.md
new file mode 100644
index 00000000..1da6f2b2
--- /dev/null
+++ b/dep/pipeline/jump_019/readme.md
@@ -0,0 +1,13 @@
+Test Case: test_jump_019
+------------------------
+
+ Instructions being tested:
+ jmpgt LABEL h.field immediate_value
+
+ Description:
+ For the received packet, if the ttl value is greater than 0x00, decrement it and transmit the packet back on the same port. Else
+ drop the packet.
+
+ Verification:
+ If the received packet had the ttl value greater than 0x50, then the transmitted packet should have ttl value one less than it.
+ Else the received packet is dropped.
diff --git a/dep/pipeline/jump_020/ethdev.io b/dep/pipeline/jump_020/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/jump_020/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/jump_020/jump_020.cli b/dep/pipeline/jump_020/jump_020.cli
new file mode 100644
index 00000000..7c0e0dbc
--- /dev/null
+++ b/dep/pipeline/jump_020/jump_020.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/jump_020/jump_020.spec /tmp/pipeline/jump_020/jump_020.c
+pipeline libbuild /tmp/pipeline/jump_020/jump_020.c /tmp/pipeline/jump_020/jump_020.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/jump_020/jump_020.so io /tmp/pipeline/jump_020/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/jump_020/jump_020.spec b/dep/pipeline/jump_020/jump_020.spec
new file mode 100644
index 00000000..7ee7b771
--- /dev/null
+++ b/dep/pipeline/jump_020/jump_020.spec
@@ -0,0 +1,77 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ipv4 instanceof ipv4_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<48> addr
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table jump_020 {
+ key {
+ }
+
+ actions {
+ drop
+ }
+
+ default_action drop args none
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ jmpeq LABEL_1 h.ethernet.src_addr h.ipv4.dst_addr // >
+ table jump_020
+ LABEL_1 : jmpeq LABEL_2 h.ipv4.dst_addr h.ethernet.src_addr // <
+ table jump_020
+ LABEL_2 : jmpeq LABEL_3 h.ipv4.dst_addr h.ipv4.src_addr // =
+ table jump_020
+ LABEL_3 : emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/jump_020/pcap_files/in_1.txt b/dep/pipeline/jump_020/pcap_files/in_1.txt
new file mode 100644
index 00000000..83911ec3
--- /dev/null
+++ b/dep/pipeline/jump_020/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 00 c8 00 00 0a 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 c8 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_020/pcap_files/out_1.txt b/dep/pipeline/jump_020/pcap_files/out_1.txt
new file mode 100644
index 00000000..300715c3
--- /dev/null
+++ b/dep/pipeline/jump_020/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 00 c8 00 00 0a 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 c8 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_020/readme.md b/dep/pipeline/jump_020/readme.md
new file mode 100644
index 00000000..77e803cb
--- /dev/null
+++ b/dep/pipeline/jump_020/readme.md
@@ -0,0 +1,14 @@
+
+Test Case: test_jump_020
+------------------------
+
+ Instructions being tested:
+ jmpeq LABEL h.field h.field
+
+ Description:
+ For the received packet, if it has matching source MAC address,
+ destination ipv4 address and source ipv4 address transmit it as it is
+ back on the same port. Drop all other packets.
+
+ Verification:
+ Verify using input and output pcap files.
diff --git a/dep/pipeline/jump_021/ethdev.io b/dep/pipeline/jump_021/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/jump_021/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/jump_021/jump_021.cli b/dep/pipeline/jump_021/jump_021.cli
new file mode 100644
index 00000000..1ef9955e
--- /dev/null
+++ b/dep/pipeline/jump_021/jump_021.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/jump_021/jump_021.spec /tmp/pipeline/jump_021/jump_021.c
+pipeline libbuild /tmp/pipeline/jump_021/jump_021.c /tmp/pipeline/jump_021/jump_021.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/jump_021/jump_021.so io /tmp/pipeline/jump_021/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/jump_021/jump_021.spec b/dep/pipeline/jump_021/jump_021.spec
new file mode 100644
index 00000000..436fa150
--- /dev/null
+++ b/dep/pipeline/jump_021/jump_021.spec
@@ -0,0 +1,81 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<48> data_48
+ bit<32> data_32
+ bit<16> data_16
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table jump_021 {
+ key {
+ }
+
+ actions {
+ drop
+ }
+
+ default_action drop args none const
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ mov m.data_48 0x0000abcd
+ mov m.data_32 0x0000abcd
+ mov m.data_16 0x0000abcd
+ jmpeq LABEL_1 h.ipv4.dst_addr m.data_48 // <
+ table jump_021
+ LABEL_1 : jmpeq LABEL_2 h.ipv4.dst_addr m.data_32 // =
+ table jump_021
+ LABEL_2 : jmpeq LABEL_3 h.ipv4.dst_addr m.data_16 // >
+ table jump_021
+ LABEL_3 : emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/jump_021/pcap_files/in_1.txt b/dep/pipeline/jump_021/pcap_files/in_1.txt
new file mode 100644
index 00000000..4b030c8e
--- /dev/null
+++ b/dep/pipeline/jump_021/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 00 c8 00 00 0a 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 c8 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a 00 00
+000020 ab cd 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_021/pcap_files/out_1.txt b/dep/pipeline/jump_021/pcap_files/out_1.txt
new file mode 100644
index 00000000..7199e7ed
--- /dev/null
+++ b/dep/pipeline/jump_021/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a 00 00
+000020 ab cd 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_021/readme.md b/dep/pipeline/jump_021/readme.md
new file mode 100644
index 00000000..53a93a8f
--- /dev/null
+++ b/dep/pipeline/jump_021/readme.md
@@ -0,0 +1,14 @@
+
+Test Case: test_jump_021
+------------------------
+
+ Instructions being tested:
+ jmpeq LABEL h.field m.field
+
+ Description:
+ For the received packet, if its ether type is equal to 0x800, transmit
+ it as it is back on the same port. Drop all other packets.
+
+ Verification:
+ Packets with ether type as 0x800 should be transmitted as it is back on
+ the same port. All other packets should be dropped.
diff --git a/dep/pipeline/jump_022/ethdev.io b/dep/pipeline/jump_022/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/jump_022/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/jump_022/jump_022.cli b/dep/pipeline/jump_022/jump_022.cli
new file mode 100644
index 00000000..e2f43242
--- /dev/null
+++ b/dep/pipeline/jump_022/jump_022.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/jump_022/jump_022.spec /tmp/pipeline/jump_022/jump_022.c
+pipeline libbuild /tmp/pipeline/jump_022/jump_022.c /tmp/pipeline/jump_022/jump_022.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/jump_022/jump_022.so io /tmp/pipeline/jump_022/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/jump_022/jump_022.spec b/dep/pipeline/jump_022/jump_022.spec
new file mode 100644
index 00000000..975823fc
--- /dev/null
+++ b/dep/pipeline/jump_022/jump_022.spec
@@ -0,0 +1,81 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<48> data_48
+ bit<32> data_32
+ bit<16> data_16
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table jump_022 {
+ key {
+ }
+
+ actions {
+ drop
+ }
+
+ default_action drop args none const
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ mov m.data_48 0x0000abcd
+ mov m.data_32 0x0000abcd
+ mov m.data_16 0x0000abcd
+ jmpeq LABEL_1 m.data_48 h.ipv4.dst_addr // >
+ table jump_022
+ LABEL_1 : jmpeq LABEL_2 m.data_32 h.ipv4.dst_addr // =
+ table jump_022
+ LABEL_2 : jmpeq LABEL_3 m.data_16 h.ipv4.dst_addr // <
+ table jump_022
+ LABEL_3 : emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/jump_022/pcap_files/in_1.txt b/dep/pipeline/jump_022/pcap_files/in_1.txt
new file mode 100644
index 00000000..4b030c8e
--- /dev/null
+++ b/dep/pipeline/jump_022/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 00 c8 00 00 0a 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 c8 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a 00 00
+000020 ab cd 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_022/pcap_files/out_1.txt b/dep/pipeline/jump_022/pcap_files/out_1.txt
new file mode 100644
index 00000000..7199e7ed
--- /dev/null
+++ b/dep/pipeline/jump_022/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a 00 00
+000020 ab cd 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_022/readme.md b/dep/pipeline/jump_022/readme.md
new file mode 100644
index 00000000..9ab3570d
--- /dev/null
+++ b/dep/pipeline/jump_022/readme.md
@@ -0,0 +1,14 @@
+
+Test Case: test_jump_022
+------------------------
+
+ Instructions being tested:
+ jmpeq LABEL m.field h.field
+
+ Description:
+ For the received packet, if the destination IPv4 address is equal to a
+ predefined value in metadata, transmit it as it is back on the same
+ port. Drop all other packets.
+
+ Verification:
+ Verify using input and output pcap files.
diff --git a/dep/pipeline/jump_023/ethdev.io b/dep/pipeline/jump_023/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/jump_023/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/jump_023/jump_023.cli b/dep/pipeline/jump_023/jump_023.cli
new file mode 100644
index 00000000..02e77ec7
--- /dev/null
+++ b/dep/pipeline/jump_023/jump_023.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/jump_023/jump_023.spec /tmp/pipeline/jump_023/jump_023.c
+pipeline libbuild /tmp/pipeline/jump_023/jump_023.c /tmp/pipeline/jump_023/jump_023.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/jump_023/jump_023.so io /tmp/pipeline/jump_023/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/jump_023/jump_023.spec b/dep/pipeline/jump_023/jump_023.spec
new file mode 100644
index 00000000..ae7da54a
--- /dev/null
+++ b/dep/pipeline/jump_023/jump_023.spec
@@ -0,0 +1,76 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ipv4 instanceof ipv4_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<32> addr_1
+ bit<32> addr_2
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table jump_023 {
+ key {
+ }
+
+ actions {
+ drop
+ }
+
+ default_action drop args none const
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ mov m.addr_1 0xaa0000bb
+ mov m.addr_2 h.ipv4.dst_addr
+ jmpeq LABEL_0 m.addr_1 m.addr_2
+ table jump_023
+ LABEL_0 : emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/jump_023/pcap_files/in_1.txt b/dep/pipeline/jump_023/pcap_files/in_1.txt
new file mode 100644
index 00000000..c7beca10
--- /dev/null
+++ b/dep/pipeline/jump_023/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 b0 b1 b2 b3 b4 b5 08 00 45 00
+000010 00 2e 00 00 00 00 40 11 00 00 c0 c1 c2 c3 d0 d1
+000020 d2 d3 e0 e1 f0 f1 00 1a 00 00 00 01 02 03 04 05
+000030 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11
+# Packet 1
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a aa 00
+000020 00 bb 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_023/pcap_files/out_1.txt b/dep/pipeline/jump_023/pcap_files/out_1.txt
new file mode 100644
index 00000000..42b8a7a7
--- /dev/null
+++ b/dep/pipeline/jump_023/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a aa 00
+000020 00 bb 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_023/readme.md b/dep/pipeline/jump_023/readme.md
new file mode 100644
index 00000000..ee1c408b
--- /dev/null
+++ b/dep/pipeline/jump_023/readme.md
@@ -0,0 +1,12 @@
+Test Case: test_jump_023
+------------------------
+
+ Instructions being tested:
+ jmpeq LABEL m.field m.field
+
+ Description:
+ For packets with destination ipv4 address as 0xaa0000bb, transmit them back on the same port. Drop all other packets.
+
+ Verification:
+ Packets with destination ipv4 address as 0xaa0000bb should be transmitted as it is back on same port. All other packets should
+ be dropped.
diff --git a/dep/pipeline/jump_024/ethdev.io b/dep/pipeline/jump_024/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/jump_024/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/jump_024/jump_024.cli b/dep/pipeline/jump_024/jump_024.cli
new file mode 100644
index 00000000..aa4e7c45
--- /dev/null
+++ b/dep/pipeline/jump_024/jump_024.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/jump_024/jump_024.spec /tmp/pipeline/jump_024/jump_024.c
+pipeline libbuild /tmp/pipeline/jump_024/jump_024.c /tmp/pipeline/jump_024/jump_024.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/jump_024/jump_024.so io /tmp/pipeline/jump_024/ethdev.io numa 0
+pipeline PIPELINE0 table jump_024 add /tmp/pipeline/jump_024/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/jump_024/jump_024.spec b/dep/pipeline/jump_024/jump_024.spec
new file mode 100644
index 00000000..1973da0a
--- /dev/null
+++ b/dep/pipeline/jump_024/jump_024.spec
@@ -0,0 +1,84 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct jump_024_args_t {
+ bit<48> ipv4_ttl
+}
+
+action jump_024_action args instanceof jump_024_args_t {
+ jmpeq LABEL_0 h.ipv4.ttl t.ipv4_ttl
+ sub h.ipv4.ttl 0x01
+ return
+ LABEL_0 : drop
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table jump_024 {
+ key {
+ h.ethernet.ether_type exact
+ }
+
+ actions {
+ jump_024_action
+ drop
+ }
+
+ default_action drop args none const
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ table jump_024
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/jump_024/pcap_files/in_1.txt b/dep/pipeline/jump_024/pcap_files/in_1.txt
new file mode 100644
index 00000000..4ec4f0dd
--- /dev/null
+++ b/dep/pipeline/jump_024/pcap_files/in_1.txt
@@ -0,0 +1,22 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 b0 b1 b2 b3 b4 b5 08 06 45 00
+000010 00 2e 00 00 00 00 40 11 00 00 c0 c1 c2 c3 d0 d1
+000020 d2 d3 e0 e1 f0 f1 00 1a 00 00 00 01 02 03 04 05
+000030 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11
+# Packet 1
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 01 06 4e b5 64 00 00 0a aa 00
+000020 00 bb 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a aa 00
+000020 00 bb 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_024/pcap_files/out_1.txt b/dep/pipeline/jump_024/pcap_files/out_1.txt
new file mode 100644
index 00000000..eaf2f800
--- /dev/null
+++ b/dep/pipeline/jump_024/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 4e b5 64 00 00 0a aa 00
+000020 00 bb 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_024/readme.md b/dep/pipeline/jump_024/readme.md
new file mode 100644
index 00000000..9d8afd74
--- /dev/null
+++ b/dep/pipeline/jump_024/readme.md
@@ -0,0 +1,16 @@
+
+Test Case: test_jump_024
+------------------------
+
+ Instructions being tested:
+ jmpeq LABEL h.field t.field
+
+ Description:
+ Drop packets with ether type other than 0x800. For packets with ipv4
+ ether type 0x800, decrement ttl by one. Drop packets with ttl equal to
+ 0x1.
+
+ Verification:
+ Packets with ether type not equal to 0x800 should be dropped. For other
+ packets, ttl should be decremented by one. Packets with ttl value of
+ 0x1 should be dropped.
diff --git a/dep/pipeline/jump_024/table.txt b/dep/pipeline/jump_024/table.txt
new file mode 100644
index 00000000..f3164bf6
--- /dev/null
+++ b/dep/pipeline/jump_024/table.txt
@@ -0,0 +1 @@
+match 0x800 action jump_024_action ipv4_ttl 0x1
diff --git a/dep/pipeline/jump_025/ethdev.io b/dep/pipeline/jump_025/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/jump_025/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/jump_025/jump_025.cli b/dep/pipeline/jump_025/jump_025.cli
new file mode 100644
index 00000000..c9f64b9a
--- /dev/null
+++ b/dep/pipeline/jump_025/jump_025.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/jump_025/jump_025.spec /tmp/pipeline/jump_025/jump_025.c
+pipeline libbuild /tmp/pipeline/jump_025/jump_025.c /tmp/pipeline/jump_025/jump_025.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/jump_025/jump_025.so io /tmp/pipeline/jump_025/ethdev.io numa 0
+pipeline PIPELINE0 table jump_025 add /tmp/pipeline/jump_025/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/jump_025/jump_025.spec b/dep/pipeline/jump_025/jump_025.spec
new file mode 100644
index 00000000..fc0aa763
--- /dev/null
+++ b/dep/pipeline/jump_025/jump_025.spec
@@ -0,0 +1,84 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ipv4 instanceof ipv4_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct jump_025_args_t {
+ bit<8> ipv4_protocol
+}
+
+action jump_025_action args instanceof jump_025_args_t {
+ jmpeq LABEL_0 h.ipv4.protocol t.ipv4_protocol
+ mov m.port 4
+ LABEL_0 : return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table jump_025 {
+ key {
+ h.ethernet.ether_type exact
+ }
+
+ actions {
+ jump_025_action
+ drop
+ }
+
+ default_action drop args none const
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ table jump_025
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/jump_025/pcap_files/in_1.txt b/dep/pipeline/jump_025/pcap_files/in_1.txt
new file mode 100644
index 00000000..cf0f7704
--- /dev/null
+++ b/dep/pipeline/jump_025/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 b0 b1 b2 b3 b4 b5 08 06 45 00
+000010 00 2e 00 00 00 00 40 11 00 00 c0 c1 c2 c3 d0 d1
+000020 d2 d3 e0 e1 f0 f1 00 1a 00 00 00 01 02 03 04 05
+000030 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11
+# Packet 1
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a aa 00
+000020 00 bb 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_025/pcap_files/out_1.txt b/dep/pipeline/jump_025/pcap_files/out_1.txt
new file mode 100644
index 00000000..42b8a7a7
--- /dev/null
+++ b/dep/pipeline/jump_025/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a aa 00
+000020 00 bb 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_025/readme.md b/dep/pipeline/jump_025/readme.md
new file mode 100644
index 00000000..43863b5d
--- /dev/null
+++ b/dep/pipeline/jump_025/readme.md
@@ -0,0 +1,13 @@
+Test Case: test_jump_025
+------------------------
+
+ Instructions being tested:
+ jmpeq LABEL t.field h.field
+
+ Description:
+ Drop packets other than with ether type 0x0800. If the ipv4 protocol is tcp, transmit the packet as it is back on the same port.
+ Drop all other packets.
+
+ Verification:
+ Packets with ether type not equal to 0x0800 should be dropped. If the ipv4 protocol is tcp, the packet should be transmitted as it
+ is back on the same port. All other packets should be dropped.
diff --git a/dep/pipeline/jump_025/table.txt b/dep/pipeline/jump_025/table.txt
new file mode 100644
index 00000000..0757987e
--- /dev/null
+++ b/dep/pipeline/jump_025/table.txt
@@ -0,0 +1 @@
+match 0x0800 action jump_025_action ipv4_protocol 0x6
diff --git a/dep/pipeline/jump_026/ethdev.io b/dep/pipeline/jump_026/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/jump_026/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/jump_026/jump_026.cli b/dep/pipeline/jump_026/jump_026.cli
new file mode 100644
index 00000000..3139772e
--- /dev/null
+++ b/dep/pipeline/jump_026/jump_026.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/jump_026/jump_026.spec /tmp/pipeline/jump_026/jump_026.c
+pipeline libbuild /tmp/pipeline/jump_026/jump_026.c /tmp/pipeline/jump_026/jump_026.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/jump_026/jump_026.so io /tmp/pipeline/jump_026/ethdev.io numa 0
+pipeline PIPELINE0 table jump_026 add /tmp/pipeline/jump_026/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/jump_026/jump_026.spec b/dep/pipeline/jump_026/jump_026.spec
new file mode 100644
index 00000000..73f00f78
--- /dev/null
+++ b/dep/pipeline/jump_026/jump_026.spec
@@ -0,0 +1,87 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ipv4 instanceof ipv4_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<8> ipv4_ttl
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct jump_026_args_t {
+ bit<8> ipv4_ttl
+}
+
+action jump_026_action args instanceof jump_026_args_t {
+ mov m.ipv4_ttl h.ipv4.ttl
+ jmpeq LABEL_0 m.ipv4_ttl t.ipv4_ttl
+ sub h.ipv4.ttl 0x01
+ return
+ LABEL_0 : drop
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table jump_026 {
+ key {
+ h.ethernet.ether_type exact
+ }
+
+ actions {
+ jump_026_action
+ drop
+ }
+
+ default_action drop args none const
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ table jump_026
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/jump_026/pcap_files/in_1.txt b/dep/pipeline/jump_026/pcap_files/in_1.txt
new file mode 100644
index 00000000..56d85f21
--- /dev/null
+++ b/dep/pipeline/jump_026/pcap_files/in_1.txt
@@ -0,0 +1,22 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 b0 b1 b2 b3 b4 b5 08 06 45 00
+000010 00 2e 00 00 00 00 40 11 00 00 c0 c1 c2 c3 d0 d1
+000020 d2 d3 e0 e1 f0 f1 00 1a 00 00 00 01 02 03 04 05
+000030 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11
+# Packet 1
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 00 06 4e b5 64 00 00 0a aa 00
+000020 00 bb 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a aa 00
+000020 00 bb 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_026/pcap_files/out_1.txt b/dep/pipeline/jump_026/pcap_files/out_1.txt
new file mode 100644
index 00000000..eaf2f800
--- /dev/null
+++ b/dep/pipeline/jump_026/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 4e b5 64 00 00 0a aa 00
+000020 00 bb 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_026/readme.md b/dep/pipeline/jump_026/readme.md
new file mode 100644
index 00000000..19d136e0
--- /dev/null
+++ b/dep/pipeline/jump_026/readme.md
@@ -0,0 +1,13 @@
+Test Case: test_jump_026
+------------------------
+
+ Instructions being tested:
+ jmpeq LABEL m.field t.field
+
+ Description:
+ Drop packets other than with ether type 0x0800. For packets with ipv4 ether type, decrement ttl by one. Drop packets
+ with ttl equal to zero.
+
+ Verification:
+ Packets with ether type not equal to 0x0800 should be dropped. For other packets, ttl should be decremented by one. Packets
+ with zero ttl should be dropped.
diff --git a/dep/pipeline/jump_026/table.txt b/dep/pipeline/jump_026/table.txt
new file mode 100644
index 00000000..063203ca
--- /dev/null
+++ b/dep/pipeline/jump_026/table.txt
@@ -0,0 +1 @@
+match 0x800 action jump_026_action ipv4_ttl 0x0
diff --git a/dep/pipeline/jump_027/ethdev.io b/dep/pipeline/jump_027/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/jump_027/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/jump_027/jump_027.cli b/dep/pipeline/jump_027/jump_027.cli
new file mode 100644
index 00000000..e241ad9e
--- /dev/null
+++ b/dep/pipeline/jump_027/jump_027.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/jump_027/jump_027.spec /tmp/pipeline/jump_027/jump_027.c
+pipeline libbuild /tmp/pipeline/jump_027/jump_027.c /tmp/pipeline/jump_027/jump_027.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/jump_027/jump_027.so io /tmp/pipeline/jump_027/ethdev.io numa 0
+pipeline PIPELINE0 table jump_027_table add /tmp/pipeline/jump_027/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/jump_027/jump_027.spec b/dep/pipeline/jump_027/jump_027.spec
new file mode 100644
index 00000000..986bff3e
--- /dev/null
+++ b/dep/pipeline/jump_027/jump_027.spec
@@ -0,0 +1,86 @@
+;SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port
+ bit<32> ether_type
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct jump_027_args_t {
+ bit<32> ether_type
+}
+
+action jump_027_action args instanceof jump_027_args_t {
+ mov m.ether_type h.ethernet.ethertype
+ jmpeq LABEL_0 t.ether_type m.ether_type
+ mov m.port 4
+ LABEL_0 : mov h.ipv4.src_addr 0x42424242
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+//table
+//
+table jump_027_table {
+ key {
+ h.ethernet.dst_addr exact
+ }
+
+ actions {
+ jump_027_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ table jump_027_table
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/jump_027/pcap_files/in_1.txt b/dep/pipeline/jump_027/pcap_files/in_1.txt
new file mode 100644
index 00000000..174e5f10
--- /dev/null
+++ b/dep/pipeline/jump_027/pcap_files/in_1.txt
@@ -0,0 +1,16 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 06 00 01
+000010 08 00 06 04 00 01 52 54 00 12 34 56 c0 a8 7a 4c
+000020 00 00 00 00 00 00 00 00 00 00 58 58 58 58 58 58
+# Packet 1
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 01 00 00 00 64 50 02
+000030 20 00 59 2e 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_027/pcap_files/out_1.txt b/dep/pipeline/jump_027/pcap_files/out_1.txt
new file mode 100644
index 00000000..f01c22a4
--- /dev/null
+++ b/dep/pipeline/jump_027/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 42 42 42 42 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 01 00 00 00 64 50 02
+000030 20 00 59 2e 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_027/readme.md b/dep/pipeline/jump_027/readme.md
new file mode 100644
index 00000000..feeb16c9
--- /dev/null
+++ b/dep/pipeline/jump_027/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_jump_027
+-----------------------
+
+ Instructions being tested:
+ jmpeq LABEL t.field m.field
+
+
+ Description
+ In this testcase, on the basis of ethernet dst mac address, if the packet ether type is equal to the corrosponding entry in the table then packet is transmitted else packet is dropped.
+ Verification
+ Behavior should be as per the description.
diff --git a/dep/pipeline/jump_027/table.txt b/dep/pipeline/jump_027/table.txt
new file mode 100755
index 00000000..70cbdfe6
--- /dev/null
+++ b/dep/pipeline/jump_027/table.txt
@@ -0,0 +1 @@
+match 0x525400124457 action jump_027_action ether_type 0x800
diff --git a/dep/pipeline/jump_028/ethdev.io b/dep/pipeline/jump_028/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/jump_028/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/jump_028/jump_028.cli b/dep/pipeline/jump_028/jump_028.cli
new file mode 100644
index 00000000..329611f3
--- /dev/null
+++ b/dep/pipeline/jump_028/jump_028.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/jump_028/jump_028.spec /tmp/pipeline/jump_028/jump_028.c
+pipeline libbuild /tmp/pipeline/jump_028/jump_028.c /tmp/pipeline/jump_028/jump_028.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/jump_028/jump_028.so io /tmp/pipeline/jump_028/ethdev.io numa 0
+pipeline PIPELINE0 table jump_028_table add /tmp/pipeline/jump_028/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/jump_028/jump_028.spec b/dep/pipeline/jump_028/jump_028.spec
new file mode 100644
index 00000000..eae7ae47
--- /dev/null
+++ b/dep/pipeline/jump_028/jump_028.spec
@@ -0,0 +1,100 @@
+;SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+struct tcp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<32> seq_num
+ bit<32> ack_num
+ bit<16> hdr_len_flags
+ bit<16> window_size
+ bit<16> checksum
+ bit<16> urg_ptr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+header tcp instanceof tcp_h
+
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct jump_028_args_t {
+ bit<32> seq_num
+ bit<32> ack_num
+}
+
+action jump_028_action args instanceof jump_028_args_t {
+ jmpeq LABEL_0 t.seq_num t.ack_num
+ mov m.port 4
+ LABEL_0 : sub h.ipv4.ttl 1
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+//table
+//
+table jump_028_table {
+ key {
+ h.tcp.dst_port exact
+ }
+
+ actions {
+ jump_028_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ extract h.tcp
+ table jump_028_table
+ emit h.ethernet
+ emit h.ipv4
+ emit h.tcp
+ tx m.port
+}
diff --git a/dep/pipeline/jump_028/pcap_files/in_1.txt b/dep/pipeline/jump_028/pcap_files/in_1.txt
new file mode 100644
index 00000000..fe849c74
--- /dev/null
+++ b/dep/pipeline/jump_028/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c9 00 00 00 01 00 00 00 64 50 02
+000030 20 00 59 2d 00 00 58 58 58 58 58 58
+# Packet 1
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 01 00 00 00 64 50 02
+000030 20 00 59 2e 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_028/pcap_files/out_1.txt b/dep/pipeline/jump_028/pcap_files/out_1.txt
new file mode 100644
index 00000000..4ba02a4d
--- /dev/null
+++ b/dep/pipeline/jump_028/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 01 00 00 00 64 50 02
+000030 20 00 59 2e 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_028/readme.md b/dep/pipeline/jump_028/readme.md
new file mode 100644
index 00000000..7f67f1ce
--- /dev/null
+++ b/dep/pipeline/jump_028/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_jump_028
+-----------------------
+
+ Instructions being tested:
+ jmpeq LABEL t.field t.field
+
+
+ Description
+ In this testcase, for a given tcp destination port mentioned in the table, if the tcp sequence number in that table is equal to the tcp acknoledgement number in the table then packet will be transmitted back to the same port, else packet is dropped.
+ Verification
+ Packets with tcp destination, in the table has tcp sequence no and tcp acknoledgment no are equal are received.
diff --git a/dep/pipeline/jump_028/table.txt b/dep/pipeline/jump_028/table.txt
new file mode 100755
index 00000000..1e2161a3
--- /dev/null
+++ b/dep/pipeline/jump_028/table.txt
@@ -0,0 +1,2 @@
+match 0x00c8 action jump_028_action seq_num 0xf ack_num 0xf
+match 0x00c9 action jump_028_action seq_num 0xf ack_num 0x1
diff --git a/dep/pipeline/jump_029/ethdev.io b/dep/pipeline/jump_029/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/jump_029/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/jump_029/jump_029.cli b/dep/pipeline/jump_029/jump_029.cli
new file mode 100644
index 00000000..82cc6473
--- /dev/null
+++ b/dep/pipeline/jump_029/jump_029.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/jump_029/jump_029.spec /tmp/pipeline/jump_029/jump_029.c
+pipeline libbuild /tmp/pipeline/jump_029/jump_029.c /tmp/pipeline/jump_029/jump_029.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/jump_029/jump_029.so io /tmp/pipeline/jump_029/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/jump_029/jump_029.spec b/dep/pipeline/jump_029/jump_029.spec
new file mode 100644
index 00000000..d0a9a35b
--- /dev/null
+++ b/dep/pipeline/jump_029/jump_029.spec
@@ -0,0 +1,56 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table jump_029 {
+ key {
+ }
+
+ actions {
+ drop
+ }
+
+ default_action drop args none const
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ jmpeq LABEL_0 h.ethernet.ether_type 0x0800
+ table jump_029
+ LABEL_0 : emit h.ethernet
+ tx m.port
+}
diff --git a/dep/pipeline/jump_029/pcap_files/in_1.txt b/dep/pipeline/jump_029/pcap_files/in_1.txt
new file mode 100644
index 00000000..cf0f7704
--- /dev/null
+++ b/dep/pipeline/jump_029/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 b0 b1 b2 b3 b4 b5 08 06 45 00
+000010 00 2e 00 00 00 00 40 11 00 00 c0 c1 c2 c3 d0 d1
+000020 d2 d3 e0 e1 f0 f1 00 1a 00 00 00 01 02 03 04 05
+000030 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11
+# Packet 1
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a aa 00
+000020 00 bb 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_029/pcap_files/out_1.txt b/dep/pipeline/jump_029/pcap_files/out_1.txt
new file mode 100644
index 00000000..42b8a7a7
--- /dev/null
+++ b/dep/pipeline/jump_029/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a aa 00
+000020 00 bb 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_029/readme.md b/dep/pipeline/jump_029/readme.md
new file mode 100644
index 00000000..d606fc68
--- /dev/null
+++ b/dep/pipeline/jump_029/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_jump_029
+------------------------
+
+ Instructions being tested:
+ jmpeq LABEL h.field immediate_value
+
+ Description:
+ For packets with ether type as 0x0800, transmit them back on the same port. Drop all other packets.
+
+ Verification:
+ Packets with ether type as 0x0800 should be transmitted as it is back on same port. All other packets should be dropped.
diff --git a/dep/pipeline/jump_030/ethdev.io b/dep/pipeline/jump_030/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/jump_030/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/jump_030/jump_030.cli b/dep/pipeline/jump_030/jump_030.cli
new file mode 100644
index 00000000..fd569b3e
--- /dev/null
+++ b/dep/pipeline/jump_030/jump_030.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/jump_030/jump_030.spec /tmp/pipeline/jump_030/jump_030.c
+pipeline libbuild /tmp/pipeline/jump_030/jump_030.c /tmp/pipeline/jump_030/jump_030.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/jump_030/jump_030.so io /tmp/pipeline/jump_030/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/jump_030/jump_030.spec b/dep/pipeline/jump_030/jump_030.spec
new file mode 100644
index 00000000..1a1f58e3
--- /dev/null
+++ b/dep/pipeline/jump_030/jump_030.spec
@@ -0,0 +1,75 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ipv4 instanceof ipv4_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<32> addr
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table jump_030 {
+ key {
+ }
+
+ actions {
+ drop
+ }
+
+ default_action drop args none const
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ mov m.addr h.ipv4.dst_addr
+ jmpeq LABEL_0 m.addr 0xaa0000bb
+ table jump_030
+ LABEL_0 : emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/jump_030/pcap_files/in_1.txt b/dep/pipeline/jump_030/pcap_files/in_1.txt
new file mode 100644
index 00000000..c7beca10
--- /dev/null
+++ b/dep/pipeline/jump_030/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 b0 b1 b2 b3 b4 b5 08 00 45 00
+000010 00 2e 00 00 00 00 40 11 00 00 c0 c1 c2 c3 d0 d1
+000020 d2 d3 e0 e1 f0 f1 00 1a 00 00 00 01 02 03 04 05
+000030 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11
+# Packet 1
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a aa 00
+000020 00 bb 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_030/pcap_files/out_1.txt b/dep/pipeline/jump_030/pcap_files/out_1.txt
new file mode 100644
index 00000000..42b8a7a7
--- /dev/null
+++ b/dep/pipeline/jump_030/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a aa 00
+000020 00 bb 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_030/readme.md b/dep/pipeline/jump_030/readme.md
new file mode 100644
index 00000000..de1cdc04
--- /dev/null
+++ b/dep/pipeline/jump_030/readme.md
@@ -0,0 +1,12 @@
+Test Case: test_jump_030
+------------------------
+
+ Instructions being tested:
+ jmpeq LABEL m.field immediate_value
+
+ Description:
+ For packets with destination ipv4 address as 0xaa0000bb, transmit them back on the same port. Drop all other packets.
+
+ Verification:
+ Packets with destination ipv4 address as 0xaa0000bb should be transmitted as it is back on same port. All other packets should
+ be dropped.
diff --git a/dep/pipeline/jump_031/ethdev.io b/dep/pipeline/jump_031/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/jump_031/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/jump_031/jump_031.cli b/dep/pipeline/jump_031/jump_031.cli
new file mode 100644
index 00000000..4f50375b
--- /dev/null
+++ b/dep/pipeline/jump_031/jump_031.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/jump_031/jump_031.spec /tmp/pipeline/jump_031/jump_031.c
+pipeline libbuild /tmp/pipeline/jump_031/jump_031.c /tmp/pipeline/jump_031/jump_031.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/jump_031/jump_031.so io /tmp/pipeline/jump_031/ethdev.io numa 0
+pipeline PIPELINE0 table jump_031_table add /tmp/pipeline/jump_031/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/jump_031/jump_031.spec b/dep/pipeline/jump_031/jump_031.spec
new file mode 100644
index 00000000..ef9b4d59
--- /dev/null
+++ b/dep/pipeline/jump_031/jump_031.spec
@@ -0,0 +1,98 @@
+;SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+struct tcp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<32> seq_num
+ bit<32> ack_num
+ bit<16> hdr_len_flags
+ bit<16> window_size
+ bit<16> checksum
+ bit<16> urg_ptr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+header tcp instanceof tcp_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct jump_031_args_t {
+ bit<32> ip_dst_addr
+}
+
+action jump_031_action args instanceof jump_031_args_t {
+ jmpeq LABEL_0 t.ip_dst_addr 0xc800000a
+ mov m.port 4
+ LABEL_0 : sub h.ipv4.ttl 1
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+//table
+//
+table jump_031_table {
+ key {
+ h.tcp.dst_port exact
+ }
+
+ actions {
+ jump_031_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ extract h.tcp
+ table jump_031_table
+ emit h.ethernet
+ emit h.ipv4
+ emit h.tcp
+ tx m.port
+}
diff --git a/dep/pipeline/jump_031/pcap_files/in_1.txt b/dep/pipeline/jump_031/pcap_files/in_1.txt
new file mode 100644
index 00000000..fe849c74
--- /dev/null
+++ b/dep/pipeline/jump_031/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c9 00 00 00 01 00 00 00 64 50 02
+000030 20 00 59 2d 00 00 58 58 58 58 58 58
+# Packet 1
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 01 00 00 00 64 50 02
+000030 20 00 59 2e 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_031/pcap_files/out_1.txt b/dep/pipeline/jump_031/pcap_files/out_1.txt
new file mode 100644
index 00000000..4ba02a4d
--- /dev/null
+++ b/dep/pipeline/jump_031/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 01 00 00 00 64 50 02
+000030 20 00 59 2e 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_031/readme.md b/dep/pipeline/jump_031/readme.md
new file mode 100644
index 00000000..14199d9e
--- /dev/null
+++ b/dep/pipeline/jump_031/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_jump_031
+-----------------------
+
+ Instructions being tested:
+ jmpeq LABEL t.field immediate_value
+
+
+ Description
+ In this test case, for a given tcp destination port, if the destination ip address in the table is equal to the immediate value then packet is transmitted after decrementing ttl of the packet, else packet is dropped.
+ Verification
+ Behaviour should be as per description
diff --git a/dep/pipeline/jump_031/table.txt b/dep/pipeline/jump_031/table.txt
new file mode 100755
index 00000000..b8d91da3
--- /dev/null
+++ b/dep/pipeline/jump_031/table.txt
@@ -0,0 +1,2 @@
+match 0xc8 action jump_031_action ip_dst_addr 0xc800000a
+match 0xc9 action jump_031_action ip_dst_addr 0xc800000b
diff --git a/dep/pipeline/jump_032/ethdev.io b/dep/pipeline/jump_032/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/jump_032/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/jump_032/jump_032.cli b/dep/pipeline/jump_032/jump_032.cli
new file mode 100644
index 00000000..ea318db7
--- /dev/null
+++ b/dep/pipeline/jump_032/jump_032.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/jump_032/jump_032.spec /tmp/pipeline/jump_032/jump_032.c
+pipeline libbuild /tmp/pipeline/jump_032/jump_032.c /tmp/pipeline/jump_032/jump_032.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/jump_032/jump_032.so io /tmp/pipeline/jump_032/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/jump_032/jump_032.spec b/dep/pipeline/jump_032/jump_032.spec
new file mode 100644
index 00000000..7e48a322
--- /dev/null
+++ b/dep/pipeline/jump_032/jump_032.spec
@@ -0,0 +1,75 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table jump_032 {
+ key {
+ }
+
+ actions {
+ drop
+ }
+
+ default_action drop args none
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ jmpneq LABEL_1 h.ethernet.src_addr h.ipv4.dst_addr // >
+ table jump_032
+ LABEL_1 : jmpneq LABEL_2 h.ipv4.dst_addr h.ethernet.src_addr // <
+ table jump_032
+ LABEL_2 : jmpneq LABEL_3 h.ipv4.dst_addr h.ipv4.src_addr // =
+ table jump_032
+ LABEL_3 : emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/jump_032/pcap_files/in_1.txt b/dep/pipeline/jump_032/pcap_files/in_1.txt
new file mode 100644
index 00000000..378169f6
--- /dev/null
+++ b/dep/pipeline/jump_032/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 12 34 ab cd ef ab 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a ab cd
+000020 ef ab 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 00 11 22 33 44 55 00 00 ab cd ef ab 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 ab cd ef ab ab cd
+000020 ef ab 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_032/pcap_files/out_1.txt b/dep/pipeline/jump_032/pcap_files/out_1.txt
new file mode 100644
index 00000000..2ef30df7
--- /dev/null
+++ b/dep/pipeline/jump_032/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 12 34 ab cd ef ab 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a ab cd
+000020 ef ab 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_032/readme.md b/dep/pipeline/jump_032/readme.md
new file mode 100644
index 00000000..4709aa02
--- /dev/null
+++ b/dep/pipeline/jump_032/readme.md
@@ -0,0 +1,14 @@
+
+Test Case: test_jump_032
+------------------------
+
+ Instructions being tested:
+ jmpneq LABEL h.field h.field
+
+ Description:
+ For the received packet, if its source MAC address, destination IP
+ address and source IP address are different, transmit it as it is back
+ on the same port. Drop all other packets.
+
+ Verification:
+ Verify using input and output pcap files.
diff --git a/dep/pipeline/jump_033/ethdev.io b/dep/pipeline/jump_033/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/jump_033/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/jump_033/jump_033.cli b/dep/pipeline/jump_033/jump_033.cli
new file mode 100644
index 00000000..81a78263
--- /dev/null
+++ b/dep/pipeline/jump_033/jump_033.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/jump_033/jump_033.spec /tmp/pipeline/jump_033/jump_033.c
+pipeline libbuild /tmp/pipeline/jump_033/jump_033.c /tmp/pipeline/jump_033/jump_033.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/jump_033/jump_033.so io /tmp/pipeline/jump_033/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/jump_033/jump_033.spec b/dep/pipeline/jump_033/jump_033.spec
new file mode 100644
index 00000000..c98f2606
--- /dev/null
+++ b/dep/pipeline/jump_033/jump_033.spec
@@ -0,0 +1,81 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<48> data_48
+ bit<32> data_32
+ bit<16> data_16
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table jump_033 {
+ key {
+ }
+
+ actions {
+ drop
+ }
+
+ default_action drop args none const
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ mov m.data_48 0x1234aabbccdd
+ mov m.data_32 0xaabbccdd
+ mov m.data_16 0xaabbccdd
+ jmpneq LABEL_1 h.ipv4.dst_addr m.data_48 // <
+ table jump_033
+ LABEL_1 : jmpneq LABEL_2 h.ipv4.src_addr m.data_32 // =
+ table jump_033
+ LABEL_2 : jmpneq LABEL_3 h.ipv4.dst_addr m.data_16 // >
+ table jump_033
+ LABEL_3 : emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/jump_033/pcap_files/in_1.txt b/dep/pipeline/jump_033/pcap_files/in_1.txt
new file mode 100644
index 00000000..9c37562b
--- /dev/null
+++ b/dep/pipeline/jump_033/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 00 c8 00 00 0a 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 c8 00 00 0a aa bb
+000020 cc dd 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a 00 00
+000020 cc dd 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_033/pcap_files/out_1.txt b/dep/pipeline/jump_033/pcap_files/out_1.txt
new file mode 100644
index 00000000..b95a5cb5
--- /dev/null
+++ b/dep/pipeline/jump_033/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 00 c8 00 00 0a 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 c8 00 00 0a aa bb
+000020 cc dd 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_033/readme.md b/dep/pipeline/jump_033/readme.md
new file mode 100644
index 00000000..4496c6e2
--- /dev/null
+++ b/dep/pipeline/jump_033/readme.md
@@ -0,0 +1,14 @@
+
+Test Case: test_jump_033
+------------------------
+
+ Instructions being tested:
+ jmpneq LABEL h.field m.field
+
+ Description:
+ For a received packet, if its source and destination IP addresses are
+ not equal to a fixed value, transmit the packet back on the same port.
+ Drop all other packets.
+
+ Verification:
+ Verify using input and output pcap files.
diff --git a/dep/pipeline/jump_034/ethdev.io b/dep/pipeline/jump_034/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/jump_034/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/jump_034/jump_034.cli b/dep/pipeline/jump_034/jump_034.cli
new file mode 100644
index 00000000..ef0ff8bd
--- /dev/null
+++ b/dep/pipeline/jump_034/jump_034.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/jump_034/jump_034.spec /tmp/pipeline/jump_034/jump_034.c
+pipeline libbuild /tmp/pipeline/jump_034/jump_034.c /tmp/pipeline/jump_034/jump_034.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/jump_034/jump_034.so io /tmp/pipeline/jump_034/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/jump_034/jump_034.spec b/dep/pipeline/jump_034/jump_034.spec
new file mode 100644
index 00000000..821066c0
--- /dev/null
+++ b/dep/pipeline/jump_034/jump_034.spec
@@ -0,0 +1,81 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<48> data_48
+ bit<32> data_32
+ bit<16> data_16
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table jump_034 {
+ key {
+ }
+
+ actions {
+ drop
+ }
+
+ default_action drop args none
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ mov m.data_48 0x1234aabbccdd
+ mov m.data_32 0xaabbccdd
+ mov m.data_16 0xaabbccdd
+ jmpneq LABEL_1 m.data_48 h.ipv4.dst_addr // >
+ table jump_034
+ LABEL_1 : jmpneq LABEL_2 m.data_32 h.ipv4.src_addr // =
+ table jump_034
+ LABEL_2 : jmpneq LABEL_3 m.data_16 h.ipv4.dst_addr // <
+ table jump_034
+ LABEL_3 : emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/jump_034/pcap_files/in_1.txt b/dep/pipeline/jump_034/pcap_files/in_1.txt
new file mode 100644
index 00000000..c35c3ba9
--- /dev/null
+++ b/dep/pipeline/jump_034/pcap_files/in_1.txt
@@ -0,0 +1,22 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 11 22 33 44 55 08 00 45 00
+000010 00 2e 00 01 00 00 01 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 aa bb cc dd c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a 00 00
+000020 cc dd 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_034/pcap_files/out_1.txt b/dep/pipeline/jump_034/pcap_files/out_1.txt
new file mode 100644
index 00000000..c035e077
--- /dev/null
+++ b/dep/pipeline/jump_034/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 11 22 33 44 55 08 00 45 00
+000010 00 2e 00 01 00 00 01 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_034/readme.md b/dep/pipeline/jump_034/readme.md
new file mode 100644
index 00000000..03b77161
--- /dev/null
+++ b/dep/pipeline/jump_034/readme.md
@@ -0,0 +1,14 @@
+
+Test Case: test_jump_034
+------------------------
+
+ Instructions being tested:
+ jmpneq LABEL m.field h.field
+
+ Description:
+ For the received packet, if the source & destination IPv4 address are
+ not equal to a predefined value in metadata, transmit it as it is back
+ on the same port. Drop all other packets.
+
+ Verification:
+ Verify using input and output pcap files.
diff --git a/dep/pipeline/jump_035/ethdev.io b/dep/pipeline/jump_035/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/jump_035/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/jump_035/jump_035.cli b/dep/pipeline/jump_035/jump_035.cli
new file mode 100644
index 00000000..43f2ef82
--- /dev/null
+++ b/dep/pipeline/jump_035/jump_035.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/jump_035/jump_035.spec /tmp/pipeline/jump_035/jump_035.c
+pipeline libbuild /tmp/pipeline/jump_035/jump_035.c /tmp/pipeline/jump_035/jump_035.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/jump_035/jump_035.so io /tmp/pipeline/jump_035/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/jump_035/jump_035.spec b/dep/pipeline/jump_035/jump_035.spec
new file mode 100644
index 00000000..3342f6da
--- /dev/null
+++ b/dep/pipeline/jump_035/jump_035.spec
@@ -0,0 +1,76 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ipv4 instanceof ipv4_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<32> addr_1
+ bit<32> addr_2
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table jump_035 {
+ key {
+ }
+
+ actions {
+ drop
+ }
+
+ default_action drop args none const
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ mov m.addr_1 0xaa0000bb
+ mov m.addr_2 h.ipv4.dst_addr
+ jmpneq LABEL_0 m.addr_1 m.addr_2
+ table jump_035
+ LABEL_0 : emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/jump_035/pcap_files/in_1.txt b/dep/pipeline/jump_035/pcap_files/in_1.txt
new file mode 100644
index 00000000..ba090b0d
--- /dev/null
+++ b/dep/pipeline/jump_035/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 11 22 33 44 55 08 00 45 00
+000010 00 2e 00 01 00 00 00 06 4e b5 64 00 00 0a aa 00
+000020 00 bb 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_035/pcap_files/out_1.txt b/dep/pipeline/jump_035/pcap_files/out_1.txt
new file mode 100644
index 00000000..75115c15
--- /dev/null
+++ b/dep/pipeline/jump_035/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_035/readme.md b/dep/pipeline/jump_035/readme.md
new file mode 100644
index 00000000..3dcadb15
--- /dev/null
+++ b/dep/pipeline/jump_035/readme.md
@@ -0,0 +1,12 @@
+Test Case: test_jump_035
+------------------------
+
+ Instructions being tested:
+ jmpneq LABEL m.field m.field
+
+ Description:
+ Drop all the packets with destination ipv4 address equal to 0xaa0000bb. Transmit all others back on the same port.
+
+ Verification:
+ Packets with destination ipv4 address equal to 0xaa0000bb should be dropped and others should be transmitted as it is back on
+ the same port.
diff --git a/dep/pipeline/jump_036/ethdev.io b/dep/pipeline/jump_036/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/jump_036/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/jump_036/jump_036.cli b/dep/pipeline/jump_036/jump_036.cli
new file mode 100644
index 00000000..4e056593
--- /dev/null
+++ b/dep/pipeline/jump_036/jump_036.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/jump_036/jump_036.spec /tmp/pipeline/jump_036/jump_036.c
+pipeline libbuild /tmp/pipeline/jump_036/jump_036.c /tmp/pipeline/jump_036/jump_036.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/jump_036/jump_036.so io /tmp/pipeline/jump_036/ethdev.io numa 0
+pipeline PIPELINE0 table jump_036 add /tmp/pipeline/jump_036/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/jump_036/jump_036.spec b/dep/pipeline/jump_036/jump_036.spec
new file mode 100644
index 00000000..abc0e246
--- /dev/null
+++ b/dep/pipeline/jump_036/jump_036.spec
@@ -0,0 +1,85 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct jump_036_args_t {
+ bit<48> ipv4_ttl
+}
+
+action jump_036_action args instanceof jump_036_args_t {
+ jmpneq LABEL_0 h.ipv4.ttl t.ipv4_ttl
+ mov m.port 4
+ return
+ LABEL_0 : sub h.ipv4.ttl 0x01
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table jump_036 {
+ key {
+ h.ethernet.ether_type exact
+ }
+
+ actions {
+ jump_036_action
+ drop
+ }
+
+ default_action drop args none const
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ table jump_036
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/jump_036/pcap_files/in_1.txt b/dep/pipeline/jump_036/pcap_files/in_1.txt
new file mode 100644
index 00000000..4ec4f0dd
--- /dev/null
+++ b/dep/pipeline/jump_036/pcap_files/in_1.txt
@@ -0,0 +1,22 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 b0 b1 b2 b3 b4 b5 08 06 45 00
+000010 00 2e 00 00 00 00 40 11 00 00 c0 c1 c2 c3 d0 d1
+000020 d2 d3 e0 e1 f0 f1 00 1a 00 00 00 01 02 03 04 05
+000030 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11
+# Packet 1
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 01 06 4e b5 64 00 00 0a aa 00
+000020 00 bb 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a aa 00
+000020 00 bb 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_036/pcap_files/out_1.txt b/dep/pipeline/jump_036/pcap_files/out_1.txt
new file mode 100644
index 00000000..eaf2f800
--- /dev/null
+++ b/dep/pipeline/jump_036/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 4e b5 64 00 00 0a aa 00
+000020 00 bb 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_036/readme.md b/dep/pipeline/jump_036/readme.md
new file mode 100644
index 00000000..da6dc80e
--- /dev/null
+++ b/dep/pipeline/jump_036/readme.md
@@ -0,0 +1,16 @@
+
+Test Case: test_jump_036
+------------------------
+
+ Instructions being tested:
+ jmpneq LABEL h.field t.field
+
+ Description:
+ Drop packets other than with ether type 0x800. For packets with ipv4
+ ether type, decrement ttl by one. Drop packets with ttl value equal to
+ 0x1.
+
+ Verification:
+ Packets with ether type not equal to 0x800 should be dropped. For other
+ packets, ttl should be decremented by one. Packets with ttl value equal
+ to 0x1 should be dropped.
diff --git a/dep/pipeline/jump_036/table.txt b/dep/pipeline/jump_036/table.txt
new file mode 100644
index 00000000..a31effd6
--- /dev/null
+++ b/dep/pipeline/jump_036/table.txt
@@ -0,0 +1 @@
+match 0x800 action jump_036_action ipv4_ttl 0x1
diff --git a/dep/pipeline/jump_037/ethdev.io b/dep/pipeline/jump_037/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/jump_037/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/jump_037/jump_037.cli b/dep/pipeline/jump_037/jump_037.cli
new file mode 100644
index 00000000..579c254f
--- /dev/null
+++ b/dep/pipeline/jump_037/jump_037.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/jump_037/jump_037.spec /tmp/pipeline/jump_037/jump_037.c
+pipeline libbuild /tmp/pipeline/jump_037/jump_037.c /tmp/pipeline/jump_037/jump_037.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/jump_037/jump_037.so io /tmp/pipeline/jump_037/ethdev.io numa 0
+pipeline PIPELINE0 table jump_037 add /tmp/pipeline/jump_037/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/jump_037/jump_037.spec b/dep/pipeline/jump_037/jump_037.spec
new file mode 100644
index 00000000..af1b0100
--- /dev/null
+++ b/dep/pipeline/jump_037/jump_037.spec
@@ -0,0 +1,84 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ipv4 instanceof ipv4_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct jump_037_args_t {
+ bit<8> ipv4_protocol
+}
+
+action jump_037_action args instanceof jump_037_args_t {
+ jmpneq LABEL_0 h.ipv4.protocol t.ipv4_protocol
+ return
+ LABEL_0 : drop
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table jump_037 {
+ key {
+ h.ethernet.ether_type exact
+ }
+
+ actions {
+ jump_037_action
+ drop
+ }
+
+ default_action drop args none const
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ table jump_037
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/jump_037/pcap_files/in_1.txt b/dep/pipeline/jump_037/pcap_files/in_1.txt
new file mode 100644
index 00000000..cf0f7704
--- /dev/null
+++ b/dep/pipeline/jump_037/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 b0 b1 b2 b3 b4 b5 08 06 45 00
+000010 00 2e 00 00 00 00 40 11 00 00 c0 c1 c2 c3 d0 d1
+000020 d2 d3 e0 e1 f0 f1 00 1a 00 00 00 01 02 03 04 05
+000030 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11
+# Packet 1
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a aa 00
+000020 00 bb 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_037/pcap_files/out_1.txt b/dep/pipeline/jump_037/pcap_files/out_1.txt
new file mode 100644
index 00000000..42b8a7a7
--- /dev/null
+++ b/dep/pipeline/jump_037/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a aa 00
+000020 00 bb 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_037/readme.md b/dep/pipeline/jump_037/readme.md
new file mode 100644
index 00000000..d6c024c8
--- /dev/null
+++ b/dep/pipeline/jump_037/readme.md
@@ -0,0 +1,13 @@
+Test Case: test_jump_037
+------------------------
+
+ Instructions being tested:
+ jmpneq LABEL t.field h.field
+
+ Description:
+ Drop packets other than with ether type 0x0800. If the ipv4 protocol is tcp, transmit the packet as it is back on the same port.
+ Drop all other packets.
+
+ Verification:
+ Packets with ether type not equal to 0x0800 should be dropped. If the ipv4 protocol is tcp, the packet should be transmitted as it
+ is back on the same port. All other packets should be dropped.
diff --git a/dep/pipeline/jump_037/table.txt b/dep/pipeline/jump_037/table.txt
new file mode 100644
index 00000000..faad9519
--- /dev/null
+++ b/dep/pipeline/jump_037/table.txt
@@ -0,0 +1 @@
+match 0x800 action jump_037_action ipv4_protocol 0x6
diff --git a/dep/pipeline/jump_038/ethdev.io b/dep/pipeline/jump_038/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/jump_038/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/jump_038/jump_038.cli b/dep/pipeline/jump_038/jump_038.cli
new file mode 100644
index 00000000..3d9299b1
--- /dev/null
+++ b/dep/pipeline/jump_038/jump_038.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/jump_038/jump_038.spec /tmp/pipeline/jump_038/jump_038.c
+pipeline libbuild /tmp/pipeline/jump_038/jump_038.c /tmp/pipeline/jump_038/jump_038.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/jump_038/jump_038.so io /tmp/pipeline/jump_038/ethdev.io numa 0
+pipeline PIPELINE0 table jump_038 add /tmp/pipeline/jump_038/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/jump_038/jump_038.spec b/dep/pipeline/jump_038/jump_038.spec
new file mode 100644
index 00000000..b31fbef4
--- /dev/null
+++ b/dep/pipeline/jump_038/jump_038.spec
@@ -0,0 +1,88 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ipv4 instanceof ipv4_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<8> ipv4_ttl
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct jump_038_args_t {
+ bit<8> ipv4_ttl
+}
+
+action jump_038_action args instanceof jump_038_args_t {
+ mov m.ipv4_ttl h.ipv4.ttl
+ jmpneq LABEL_0 m.ipv4_ttl t.ipv4_ttl
+ mov m.port 4
+ return
+ LABEL_0 : sub h.ipv4.ttl 0x01
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table jump_038 {
+ key {
+ h.ethernet.ether_type exact
+ }
+
+ actions {
+ jump_038_action
+ drop
+ }
+
+ default_action drop args none const
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ table jump_038
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/jump_038/pcap_files/in_1.txt b/dep/pipeline/jump_038/pcap_files/in_1.txt
new file mode 100644
index 00000000..56d85f21
--- /dev/null
+++ b/dep/pipeline/jump_038/pcap_files/in_1.txt
@@ -0,0 +1,22 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 b0 b1 b2 b3 b4 b5 08 06 45 00
+000010 00 2e 00 00 00 00 40 11 00 00 c0 c1 c2 c3 d0 d1
+000020 d2 d3 e0 e1 f0 f1 00 1a 00 00 00 01 02 03 04 05
+000030 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11
+# Packet 1
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 00 06 4e b5 64 00 00 0a aa 00
+000020 00 bb 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a aa 00
+000020 00 bb 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_038/pcap_files/out_1.txt b/dep/pipeline/jump_038/pcap_files/out_1.txt
new file mode 100644
index 00000000..eaf2f800
--- /dev/null
+++ b/dep/pipeline/jump_038/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 4e b5 64 00 00 0a aa 00
+000020 00 bb 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_038/readme.md b/dep/pipeline/jump_038/readme.md
new file mode 100644
index 00000000..daf31e3f
--- /dev/null
+++ b/dep/pipeline/jump_038/readme.md
@@ -0,0 +1,13 @@
+Test Case: test_jump_038
+------------------------
+
+ Instructions being tested:
+ jmpneq LABEL m.field t.field
+
+ Description:
+ Drop packets other than with ether type 0x0800. For packets with ipv4 ether type, decrement ttl by one. Drop packets with
+ ttl equal to zero.
+
+ Verification:
+ Packets with ether type not equal to 0x0800 should be dropped. For other packets, ttl should be decremented by one. Packets
+ with zero ttl should be dropped.
diff --git a/dep/pipeline/jump_038/table.txt b/dep/pipeline/jump_038/table.txt
new file mode 100644
index 00000000..f0b5417c
--- /dev/null
+++ b/dep/pipeline/jump_038/table.txt
@@ -0,0 +1 @@
+match 0x0800 action jump_038_action ipv4_ttl 0x0
diff --git a/dep/pipeline/jump_039/ethdev.io b/dep/pipeline/jump_039/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/jump_039/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/jump_039/jump_039.cli b/dep/pipeline/jump_039/jump_039.cli
new file mode 100644
index 00000000..d37d21c8
--- /dev/null
+++ b/dep/pipeline/jump_039/jump_039.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/jump_039/jump_039.spec /tmp/pipeline/jump_039/jump_039.c
+pipeline libbuild /tmp/pipeline/jump_039/jump_039.c /tmp/pipeline/jump_039/jump_039.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/jump_039/jump_039.so io /tmp/pipeline/jump_039/ethdev.io numa 0
+pipeline PIPELINE0 table jump_039_table add /tmp/pipeline/jump_039/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/jump_039/jump_039.spec b/dep/pipeline/jump_039/jump_039.spec
new file mode 100644
index 00000000..ecc9d58f
--- /dev/null
+++ b/dep/pipeline/jump_039/jump_039.spec
@@ -0,0 +1,86 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port
+ bit<16> ether_type
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct jump_039_args_t {
+ bit<16> ether_type
+}
+
+action jump_039_action args instanceof jump_039_args_t {
+ mov m.ether_type h.ethernet.ethertype
+ jmpneq LABEL_0 t.ether_type m.ether_type
+ mov m.port 4
+ LABEL_0 : mov h.ipv4.src_addr 0x42424242
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+//table
+//
+table jump_039_table {
+ key {
+ h.ethernet.dst_addr exact
+ }
+
+ actions {
+ jump_039_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ table jump_039_table
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/jump_039/pcap_files/in_1.txt b/dep/pipeline/jump_039/pcap_files/in_1.txt
new file mode 100644
index 00000000..174e5f10
--- /dev/null
+++ b/dep/pipeline/jump_039/pcap_files/in_1.txt
@@ -0,0 +1,16 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 06 00 01
+000010 08 00 06 04 00 01 52 54 00 12 34 56 c0 a8 7a 4c
+000020 00 00 00 00 00 00 00 00 00 00 58 58 58 58 58 58
+# Packet 1
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 01 00 00 00 64 50 02
+000030 20 00 59 2e 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_039/pcap_files/out_1.txt b/dep/pipeline/jump_039/pcap_files/out_1.txt
new file mode 100644
index 00000000..789e8e00
--- /dev/null
+++ b/dep/pipeline/jump_039/pcap_files/out_1.txt
@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 06 00 01
+000010 08 00 06 04 00 01 52 54 00 12 42 42 42 42 7a 4c
+000020 00 00 00 00 00 00 00 00 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_039/readme.md b/dep/pipeline/jump_039/readme.md
new file mode 100644
index 00000000..26938399
--- /dev/null
+++ b/dep/pipeline/jump_039/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_jump_039
+-----------------------
+
+ Instructions being tested:
+ jmpneq LABEL t.field m.field
+
+
+ Description
+ In this testcase, on the basis of ethernet dst mac address, if the packet ether type is not equal to the corrosponding entry in the table then packet is transmitted else packet is dropped.
+ Verification
+ Behavior should be as per the description.
diff --git a/dep/pipeline/jump_039/table.txt b/dep/pipeline/jump_039/table.txt
new file mode 100755
index 00000000..23576c5e
--- /dev/null
+++ b/dep/pipeline/jump_039/table.txt
@@ -0,0 +1 @@
+match 0x525400124457 action jump_039_action ether_type 0x800
diff --git a/dep/pipeline/jump_040/ethdev.io b/dep/pipeline/jump_040/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/jump_040/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/jump_040/jump_040.cli b/dep/pipeline/jump_040/jump_040.cli
new file mode 100644
index 00000000..934ce148
--- /dev/null
+++ b/dep/pipeline/jump_040/jump_040.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/jump_040/jump_040.spec /tmp/pipeline/jump_040/jump_040.c
+pipeline libbuild /tmp/pipeline/jump_040/jump_040.c /tmp/pipeline/jump_040/jump_040.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/jump_040/jump_040.so io /tmp/pipeline/jump_040/ethdev.io numa 0
+pipeline PIPELINE0 table jump_040_table add /tmp/pipeline/jump_040/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/jump_040/jump_040.spec b/dep/pipeline/jump_040/jump_040.spec
new file mode 100644
index 00000000..c99cae86
--- /dev/null
+++ b/dep/pipeline/jump_040/jump_040.spec
@@ -0,0 +1,100 @@
+;SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+struct tcp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<32> seq_num
+ bit<32> ack_num
+ bit<16> hdr_len_flags
+ bit<16> window_size
+ bit<16> checksum
+ bit<16> urg_ptr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+header tcp instanceof tcp_h
+
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct jump_040_args_t {
+ bit<32> seq_num
+ bit<32> ack_num
+}
+
+action jump_040_action args instanceof jump_040_args_t {
+ jmpneq LABEL_0 t.seq_num t.ack_num
+ mov m.port 4
+ LABEL_0 : sub h.ipv4.ttl 1
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+//table
+//
+table jump_040_table {
+ key {
+ h.tcp.dst_port exact
+ }
+
+ actions {
+ jump_040_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ extract h.tcp
+ table jump_040_table
+ emit h.ethernet
+ emit h.ipv4
+ emit h.tcp
+ tx m.port
+}
diff --git a/dep/pipeline/jump_040/pcap_files/in_1.txt b/dep/pipeline/jump_040/pcap_files/in_1.txt
new file mode 100644
index 00000000..fe849c74
--- /dev/null
+++ b/dep/pipeline/jump_040/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c9 00 00 00 01 00 00 00 64 50 02
+000030 20 00 59 2d 00 00 58 58 58 58 58 58
+# Packet 1
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 01 00 00 00 64 50 02
+000030 20 00 59 2e 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_040/pcap_files/out_1.txt b/dep/pipeline/jump_040/pcap_files/out_1.txt
new file mode 100644
index 00000000..7ee648df
--- /dev/null
+++ b/dep/pipeline/jump_040/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c9 00 00 00 01 00 00 00 64 50 02
+000030 20 00 59 2d 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_040/readme.md b/dep/pipeline/jump_040/readme.md
new file mode 100644
index 00000000..194b9eb3
--- /dev/null
+++ b/dep/pipeline/jump_040/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_jump_040
+-----------------------
+
+ Instructions being tested:
+ jmpneq LABEL t.field t.field
+
+
+ Description
+ In this testcase, for a given tcp destination port mentioned in the table, if the tcp sequence number in that table is not equal to the tcp acknoledgement number in the table then packet will be transmitted back to the same port, else packet is dropped.
+ Verification
+ Behavior should be as per the description.
diff --git a/dep/pipeline/jump_040/table.txt b/dep/pipeline/jump_040/table.txt
new file mode 100755
index 00000000..b1578cc7
--- /dev/null
+++ b/dep/pipeline/jump_040/table.txt
@@ -0,0 +1,2 @@
+match 0xc8 action jump_040_action seq_num 0xf ack_num 0xf
+match 0xc9 action jump_040_action seq_num 0xf ack_num 0x1
diff --git a/dep/pipeline/jump_041/ethdev.io b/dep/pipeline/jump_041/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/jump_041/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/jump_041/jump_041.cli b/dep/pipeline/jump_041/jump_041.cli
new file mode 100644
index 00000000..b594cec1
--- /dev/null
+++ b/dep/pipeline/jump_041/jump_041.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/jump_041/jump_041.spec /tmp/pipeline/jump_041/jump_041.c
+pipeline libbuild /tmp/pipeline/jump_041/jump_041.c /tmp/pipeline/jump_041/jump_041.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/jump_041/jump_041.so io /tmp/pipeline/jump_041/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/jump_041/jump_041.spec b/dep/pipeline/jump_041/jump_041.spec
new file mode 100644
index 00000000..00282b80
--- /dev/null
+++ b/dep/pipeline/jump_041/jump_041.spec
@@ -0,0 +1,71 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ipv4 instanceof ipv4_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+action jump_041_action args none {
+ emit h.ethernet
+ tx m.port
+}
+
+//
+// Tables.
+//
+table jump_041 {
+ key {
+ }
+
+ actions {
+ jump_041_action
+ }
+
+ default_action jump_041_action args none const
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ jmpneq LABEL_0 h.ethernet.ether_type 0x0800
+ table jump_041
+ LABEL_0 : drop
+}
diff --git a/dep/pipeline/jump_041/pcap_files/in_1.txt b/dep/pipeline/jump_041/pcap_files/in_1.txt
new file mode 100644
index 00000000..c3f5d8d2
--- /dev/null
+++ b/dep/pipeline/jump_041/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 11 22 33 44 55 08 06 45 00
+000010 00 2e 00 01 00 00 00 06 4e b5 64 00 00 0a aa 00
+000020 00 bb 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_041/pcap_files/out_1.txt b/dep/pipeline/jump_041/pcap_files/out_1.txt
new file mode 100644
index 00000000..75115c15
--- /dev/null
+++ b/dep/pipeline/jump_041/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_041/readme.md b/dep/pipeline/jump_041/readme.md
new file mode 100644
index 00000000..f6bd7cb7
--- /dev/null
+++ b/dep/pipeline/jump_041/readme.md
@@ -0,0 +1,12 @@
+Test Case: test_jump_041
+------------------------
+
+ Instructions being tested:
+ jmpneq LABEL h.field immediate_value
+
+ Description:
+ Drop all the packets with ether type not equal to 0x0800. Transmit all others back on the same port.
+
+ Verification:
+ Packets with ether type not equal to 0x0800 should be dropped and others should be transmitted as it is back on the
+ same port.
diff --git a/dep/pipeline/jump_042/ethdev.io b/dep/pipeline/jump_042/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/jump_042/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/jump_042/jump_042.cli b/dep/pipeline/jump_042/jump_042.cli
new file mode 100644
index 00000000..03189b87
--- /dev/null
+++ b/dep/pipeline/jump_042/jump_042.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/jump_042/jump_042.spec /tmp/pipeline/jump_042/jump_042.c
+pipeline libbuild /tmp/pipeline/jump_042/jump_042.c /tmp/pipeline/jump_042/jump_042.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/jump_042/jump_042.so io /tmp/pipeline/jump_042/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/jump_042/jump_042.spec b/dep/pipeline/jump_042/jump_042.spec
new file mode 100644
index 00000000..407b9bc9
--- /dev/null
+++ b/dep/pipeline/jump_042/jump_042.spec
@@ -0,0 +1,75 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ipv4 instanceof ipv4_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<32> addr
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table jump_042 {
+ key {
+ }
+
+ actions {
+ drop
+ }
+
+ default_action drop args none const
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ mov m.addr h.ipv4.dst_addr
+ jmpneq LABEL_0 m.addr 0xaa0000bb
+ table jump_042
+ LABEL_0 : emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/jump_042/pcap_files/in_1.txt b/dep/pipeline/jump_042/pcap_files/in_1.txt
new file mode 100644
index 00000000..ba090b0d
--- /dev/null
+++ b/dep/pipeline/jump_042/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 11 22 33 44 55 08 00 45 00
+000010 00 2e 00 01 00 00 00 06 4e b5 64 00 00 0a aa 00
+000020 00 bb 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_042/pcap_files/out_1.txt b/dep/pipeline/jump_042/pcap_files/out_1.txt
new file mode 100644
index 00000000..75115c15
--- /dev/null
+++ b/dep/pipeline/jump_042/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_042/readme.md b/dep/pipeline/jump_042/readme.md
new file mode 100644
index 00000000..1fc3e8b7
--- /dev/null
+++ b/dep/pipeline/jump_042/readme.md
@@ -0,0 +1,12 @@
+Test Case: test_jump_042
+------------------------
+
+ Instructions being tested:
+ jmpneq LABEL m.field immediate_value
+
+ Description:
+ Drop all the packets with destination ipv4 address equal to 0xaa0000bb. Transmit all others back on the same port.
+
+ Verification:
+ Packets with destination ipv4 address equal to 0xaa0000bb should be dropped and others should be transmitted as it is back on
+ the same port.
diff --git a/dep/pipeline/jump_043/ethdev.io b/dep/pipeline/jump_043/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/jump_043/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/jump_043/jump_043.cli b/dep/pipeline/jump_043/jump_043.cli
new file mode 100644
index 00000000..a9717c86
--- /dev/null
+++ b/dep/pipeline/jump_043/jump_043.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/jump_043/jump_043.spec /tmp/pipeline/jump_043/jump_043.c
+pipeline libbuild /tmp/pipeline/jump_043/jump_043.c /tmp/pipeline/jump_043/jump_043.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/jump_043/jump_043.so io /tmp/pipeline/jump_043/ethdev.io numa 0
+pipeline PIPELINE0 table jump_043_table add /tmp/pipeline/jump_043/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/jump_043/jump_043.spec b/dep/pipeline/jump_043/jump_043.spec
new file mode 100644
index 00000000..ff51f5ad
--- /dev/null
+++ b/dep/pipeline/jump_043/jump_043.spec
@@ -0,0 +1,98 @@
+;SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+struct tcp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<32> seq_num
+ bit<32> ack_num
+ bit<16> hdr_len_flags
+ bit<16> window_size
+ bit<16> checksum
+ bit<16> urg_ptr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+header tcp instanceof tcp_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct jump_043_args_t {
+ bit<32> ip_dst_addr
+}
+
+action jump_043_action args instanceof jump_043_args_t {
+ jmpneq LABEL_0 t.ip_dst_addr 0xc800000a
+ mov m.port 4
+ LABEL_0 : sub h.ipv4.ttl 1
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+//table
+//
+table jump_043_table {
+ key {
+ h.tcp.dst_port exact
+ }
+
+ actions {
+ jump_043_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ extract h.tcp
+ table jump_043_table
+ emit h.ethernet
+ emit h.ipv4
+ emit h.tcp
+ tx m.port
+}
diff --git a/dep/pipeline/jump_043/pcap_files/in_1.txt b/dep/pipeline/jump_043/pcap_files/in_1.txt
new file mode 100644
index 00000000..79a2b16f
--- /dev/null
+++ b/dep/pipeline/jump_043/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 01 00 00 00 64 50 02
+000030 20 00 59 2e 00 00 58 58 58 58 58 58
+# Packet 1
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c9 00 00 00 01 00 00 00 64 50 02
+000030 20 00 59 2d 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_043/pcap_files/out_1.txt b/dep/pipeline/jump_043/pcap_files/out_1.txt
new file mode 100644
index 00000000..7ee648df
--- /dev/null
+++ b/dep/pipeline/jump_043/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c9 00 00 00 01 00 00 00 64 50 02
+000030 20 00 59 2d 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_043/readme.md b/dep/pipeline/jump_043/readme.md
new file mode 100644
index 00000000..ab065575
--- /dev/null
+++ b/dep/pipeline/jump_043/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_jump_043
+-----------------------
+
+ Instructions being tested:
+ jmpneq LABEL t.field immediate_value
+
+
+ Description
+ In this test case, for a given tcp destination port, if the destination ip address in the table entry is not equal to the immediate value then packet is transmitted after decrementing the ttl, else packet is dropped.
+ Verification
+ Behaviour should be as per description
diff --git a/dep/pipeline/jump_043/table.txt b/dep/pipeline/jump_043/table.txt
new file mode 100755
index 00000000..66375131
--- /dev/null
+++ b/dep/pipeline/jump_043/table.txt
@@ -0,0 +1,2 @@
+match 0x00c8 action jump_043_action ip_dst_addr 0xc800000a
+match 0x00c9 action jump_043_action ip_dst_addr 0xc800000b
diff --git a/dep/pipeline/jump_044/ethdev.io b/dep/pipeline/jump_044/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/jump_044/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/jump_044/jump_044.cli b/dep/pipeline/jump_044/jump_044.cli
new file mode 100644
index 00000000..6729e668
--- /dev/null
+++ b/dep/pipeline/jump_044/jump_044.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/jump_044/jump_044.spec /tmp/pipeline/jump_044/jump_044.c
+pipeline libbuild /tmp/pipeline/jump_044/jump_044.c /tmp/pipeline/jump_044/jump_044.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/jump_044/jump_044.so io /tmp/pipeline/jump_044/ethdev.io numa 0
+pipeline PIPELINE0 table jump_044_table add /tmp/pipeline/jump_044/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/jump_044/jump_044.spec b/dep/pipeline/jump_044/jump_044.spec
new file mode 100644
index 00000000..0cb9a538
--- /dev/null
+++ b/dep/pipeline/jump_044/jump_044.spec
@@ -0,0 +1,84 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct jump_044_args_t {
+ bit<32> src_addr_add
+}
+
+action jump_044_action args instanceof jump_044_args_t {
+ jmplt LABEL_0 h.ipv4.src_addr t.src_addr_add
+ mov m.port 4
+ LABEL_0 : sub h.ipv4.ttl 1
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+//table
+//
+table jump_044_table {
+ key {
+ h.ethernet.dst_addr exact
+ }
+
+ actions {
+ jump_044_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ table jump_044_table
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/jump_044/pcap_files/in_1.txt b/dep/pipeline/jump_044/pcap_files/in_1.txt
new file mode 100644
index 00000000..e174b01f
--- /dev/null
+++ b/dep/pipeline/jump_044/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e bf 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 64 00 00 00 0a 50 02
+000030 20 00 59 2f 00 00 58 58 58 58 58 58
+# Packet 1
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 c8 00 00 02 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 64 00 00 00 0a 50 02
+000030 20 00 59 25 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_044/pcap_files/out_1.txt b/dep/pipeline/jump_044/pcap_files/out_1.txt
new file mode 100644
index 00000000..b86cbe65
--- /dev/null
+++ b/dep/pipeline/jump_044/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 4e bf 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 64 00 00 00 0a 50 02
+000030 20 00 59 2f 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_044/readme.md b/dep/pipeline/jump_044/readme.md
new file mode 100644
index 00000000..eb8b9d11
--- /dev/null
+++ b/dep/pipeline/jump_044/readme.md
@@ -0,0 +1,12 @@
+Test Case: test_jump_044
+-----------------------
+
+ Instructions being tested:
+ jmplt LABEL h.field t.field
+
+
+ Description
+ In this testcase, for a given destiantion mac address of the packet if the source ip address is the less than the entry in the table then packet will be transmitted back to the same port with by decrementing ttl. else packet is dropped.
+
+ Verification
+ only packets with ip source address less than table entry will be received.
diff --git a/dep/pipeline/jump_044/table.txt b/dep/pipeline/jump_044/table.txt
new file mode 100755
index 00000000..98fbaff2
--- /dev/null
+++ b/dep/pipeline/jump_044/table.txt
@@ -0,0 +1 @@
+match 0x525400124457 action jump_044_action src_addr_add 0xc8000001
diff --git a/dep/pipeline/jump_045/ethdev.io b/dep/pipeline/jump_045/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/jump_045/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/jump_045/jump_045.cli b/dep/pipeline/jump_045/jump_045.cli
new file mode 100644
index 00000000..70912349
--- /dev/null
+++ b/dep/pipeline/jump_045/jump_045.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/jump_045/jump_045.spec /tmp/pipeline/jump_045/jump_045.c
+pipeline libbuild /tmp/pipeline/jump_045/jump_045.c /tmp/pipeline/jump_045/jump_045.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/jump_045/jump_045.so io /tmp/pipeline/jump_045/ethdev.io numa 0
+pipeline PIPELINE0 table jump_045_table add /tmp/pipeline/jump_045/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/jump_045/jump_045.spec b/dep/pipeline/jump_045/jump_045.spec
new file mode 100644
index 00000000..2c36c2f4
--- /dev/null
+++ b/dep/pipeline/jump_045/jump_045.spec
@@ -0,0 +1,99 @@
+;SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+struct tcp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<32> seq_num
+ bit<32> ack_num
+ bit<16> hdr_len_flags
+ bit<16> window_size
+ bit<16> checksum
+ bit<16> urg_ptr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+header tcp instanceof tcp_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct jump_045_args_t {
+ bit<32> seq_num_thr
+}
+
+action jump_045_action args instanceof jump_045_args_t {
+ jmplt LABEL_0 t.seq_num_thr h.tcp.seq_num
+ mov m.port 4
+ LABEL_0 : sub h.ipv4.ttl 1
+ return
+}
+
+
+action drop args none {
+ drop
+}
+
+//
+//table
+//
+table jump_045_table {
+ key {
+ h.ethernet.dst_addr exact
+ }
+
+ actions {
+ jump_045_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ extract h.tcp
+ table jump_045_table
+ emit h.ethernet
+ emit h.ipv4
+ emit h.tcp
+ tx m.port
+}
diff --git a/dep/pipeline/jump_045/pcap_files/in_1.txt b/dep/pipeline/jump_045/pcap_files/in_1.txt
new file mode 100644
index 00000000..11d041c7
--- /dev/null
+++ b/dep/pipeline/jump_045/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e be 64 00 00 01 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 32 00 00 00 00 50 02
+000030 20 00 59 6a 00 00 58 58 58 58 58 58
+# Packet 1
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e be 64 00 00 01 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 28 00 00 00 00 50 02
+000030 20 00 59 74 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_045/pcap_files/out_1.txt b/dep/pipeline/jump_045/pcap_files/out_1.txt
new file mode 100644
index 00000000..5d80afd0
--- /dev/null
+++ b/dep/pipeline/jump_045/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 4e be 64 00 00 01 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 32 00 00 00 00 50 02
+000030 20 00 59 6a 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_045/readme.md b/dep/pipeline/jump_045/readme.md
new file mode 100644
index 00000000..2aeb63e5
--- /dev/null
+++ b/dep/pipeline/jump_045/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_jump_045
+-----------------------
+
+ Instructions being tested:
+ jmplt LABEL t.field h.field
+
+
+ Description:
+ For a packet with matching destination MAC address, if the TCP sequence number in the table is less than the packet TCP sequence number then packet will be transmitted back on the same port by decrementing its TTL. Else the packet is dropped.
+ Verification:
+ Only packets with tcp sequence no more than the table entry will be received.
diff --git a/dep/pipeline/jump_045/table.txt b/dep/pipeline/jump_045/table.txt
new file mode 100755
index 00000000..98309500
--- /dev/null
+++ b/dep/pipeline/jump_045/table.txt
@@ -0,0 +1 @@
+match 0x525400124457 action jump_045_action seq_num_thr 0x31
diff --git a/dep/pipeline/jump_046/ethdev.io b/dep/pipeline/jump_046/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/jump_046/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/jump_046/jump_046.cli b/dep/pipeline/jump_046/jump_046.cli
new file mode 100644
index 00000000..217bcc61
--- /dev/null
+++ b/dep/pipeline/jump_046/jump_046.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/jump_046/jump_046.spec /tmp/pipeline/jump_046/jump_046.c
+pipeline libbuild /tmp/pipeline/jump_046/jump_046.c /tmp/pipeline/jump_046/jump_046.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/jump_046/jump_046.so io /tmp/pipeline/jump_046/ethdev.io numa 0
+pipeline PIPELINE0 table jump_046_table add /tmp/pipeline/jump_046/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/jump_046/jump_046.spec b/dep/pipeline/jump_046/jump_046.spec
new file mode 100644
index 00000000..87b3fe84
--- /dev/null
+++ b/dep/pipeline/jump_046/jump_046.spec
@@ -0,0 +1,98 @@
+;SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+struct tcp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<32> seq_num
+ bit<32> ack_num
+ bit<16> hdr_len_flags
+ bit<16> window_size
+ bit<16> checksum
+ bit<16> urg_ptr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+header tcp instanceof tcp_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct jump_046_args_t {
+ bit<32> ack_num
+}
+
+action jump_046_action args instanceof jump_046_args_t {
+ jmplt LABEL_0 t.ack_num 0x0000ffff
+ mov m.port 4
+ LABEL_0 : sub h.ipv4.ttl 1
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+//table
+//
+table jump_046_table {
+ key {
+ h.ipv4.dst_addr exact
+ }
+
+ actions {
+ jump_046_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ extract h.tcp
+ table jump_046_table
+ emit h.ethernet
+ emit h.ipv4
+ emit h.tcp
+ tx m.port
+}
diff --git a/dep/pipeline/jump_046/pcap_files/in_1.txt b/dep/pipeline/jump_046/pcap_files/in_1.txt
new file mode 100644
index 00000000..98efccbc
--- /dev/null
+++ b/dep/pipeline/jump_046/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e bd 64 00 00 01 c8 00
+000020 00 0b 00 64 00 c8 00 00 00 64 00 00 00 0a 50 02
+000030 20 00 59 2d 00 00 58 58 58 58 58 58
+# Packet 1
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e be 64 00 00 01 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 64 00 00 00 0a 50 02
+000030 20 00 59 2e 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_046/pcap_files/out_1.txt b/dep/pipeline/jump_046/pcap_files/out_1.txt
new file mode 100644
index 00000000..862e6c4c
--- /dev/null
+++ b/dep/pipeline/jump_046/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 4e be 64 00 00 01 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 64 00 00 00 0a 50 02
+000030 20 00 59 2e 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_046/readme.md b/dep/pipeline/jump_046/readme.md
new file mode 100644
index 00000000..38b328b5
--- /dev/null
+++ b/dep/pipeline/jump_046/readme.md
@@ -0,0 +1,12 @@
+Test Case: test_jump_046
+-----------------------
+
+ Instructions being tested:
+ jmplt LABEL t.field immediate_data
+
+
+ Description
+ In this testcase, for a given destiantion ip address of the packet if the tcp acknoledgement no in the table is the less than immediate value then packet will be transmitted back to the same port with by decrementing ttl. else packet is dropped.
+
+ Verification
+ Behaviour should be as per description
diff --git a/dep/pipeline/jump_046/table.txt b/dep/pipeline/jump_046/table.txt
new file mode 100755
index 00000000..ab547270
--- /dev/null
+++ b/dep/pipeline/jump_046/table.txt
@@ -0,0 +1,2 @@
+match 0xc800000a action jump_046_action ack_num 0x1
+match 0xc800000b action jump_046_action ack_num 0xfffff
diff --git a/dep/pipeline/jump_047/ethdev.io b/dep/pipeline/jump_047/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/jump_047/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/jump_047/jump_047.cli b/dep/pipeline/jump_047/jump_047.cli
new file mode 100644
index 00000000..0e659295
--- /dev/null
+++ b/dep/pipeline/jump_047/jump_047.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/jump_047/jump_047.spec /tmp/pipeline/jump_047/jump_047.c
+pipeline libbuild /tmp/pipeline/jump_047/jump_047.c /tmp/pipeline/jump_047/jump_047.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/jump_047/jump_047.so io /tmp/pipeline/jump_047/ethdev.io numa 0
+pipeline PIPELINE0 table jump_047_table add /tmp/pipeline/jump_047/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/jump_047/jump_047.spec b/dep/pipeline/jump_047/jump_047.spec
new file mode 100644
index 00000000..ee429be2
--- /dev/null
+++ b/dep/pipeline/jump_047/jump_047.spec
@@ -0,0 +1,86 @@
+;SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port
+ bit<16> pkt_ether_type
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct jump_047_args_t {
+ bit<16> ether_type
+}
+
+action jump_047_action args instanceof jump_047_args_t {
+ mov m.pkt_ether_type h.ethernet.ethertype
+ jmplt LABEL_0 m.pkt_ether_type t.ether_type
+ mov m.port 4
+ LABEL_0 : sub h.ipv4.ttl 1
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+//table
+//
+table jump_047_table {
+ key {
+ h.ethernet.dst_addr exact
+ }
+
+ actions {
+ jump_047_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ table jump_047_table
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/jump_047/pcap_files/in_1.txt b/dep/pipeline/jump_047/pcap_files/in_1.txt
new file mode 100644
index 00000000..2e975d05
--- /dev/null
+++ b/dep/pipeline/jump_047/pcap_files/in_1.txt
@@ -0,0 +1,16 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e be 64 00 00 01 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 0f 00 00 00 0a 50 02
+000030 20 00 59 83 00 00 58 58 58 58 58 58
+# Packet 1
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 06 00 01
+000010 08 00 06 04 00 01 52 54 00 12 34 56 c0 a8 7a 4c
+000020 00 00 00 00 00 00 00 00 00 00
diff --git a/dep/pipeline/jump_047/pcap_files/out_1.txt b/dep/pipeline/jump_047/pcap_files/out_1.txt
new file mode 100644
index 00000000..195be9f5
--- /dev/null
+++ b/dep/pipeline/jump_047/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 4e be 64 00 00 01 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 0f 00 00 00 0a 50 02
+000030 20 00 59 83 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_047/readme.md b/dep/pipeline/jump_047/readme.md
new file mode 100644
index 00000000..b1ce411b
--- /dev/null
+++ b/dep/pipeline/jump_047/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_jump_047
+-----------------------
+
+ Instructions being tested:
+ jmplt LABEL m.field t.field
+
+
+ Description:
+ For a packet with matching destination IP address, if the Ethertype of the packet is less than the entry in the table, then packet will be transmitted back to the same port after decrementing its ttl, else the packet is dropped.
+ Verification:
+ Packets with ethertype less than table entry are received.
diff --git a/dep/pipeline/jump_047/table.txt b/dep/pipeline/jump_047/table.txt
new file mode 100755
index 00000000..66d33162
--- /dev/null
+++ b/dep/pipeline/jump_047/table.txt
@@ -0,0 +1 @@
+match 0x525400124457 action jump_047_action ether_type 0x0803
diff --git a/dep/pipeline/jump_048/ethdev.io b/dep/pipeline/jump_048/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/jump_048/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/jump_048/jump_048.cli b/dep/pipeline/jump_048/jump_048.cli
new file mode 100644
index 00000000..ce2eb4c5
--- /dev/null
+++ b/dep/pipeline/jump_048/jump_048.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/jump_048/jump_048.spec /tmp/pipeline/jump_048/jump_048.c
+pipeline libbuild /tmp/pipeline/jump_048/jump_048.c /tmp/pipeline/jump_048/jump_048.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/jump_048/jump_048.so io /tmp/pipeline/jump_048/ethdev.io numa 0
+pipeline PIPELINE0 table jump_048_table add /tmp/pipeline/jump_048/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/jump_048/jump_048.spec b/dep/pipeline/jump_048/jump_048.spec
new file mode 100644
index 00000000..51625ce9
--- /dev/null
+++ b/dep/pipeline/jump_048/jump_048.spec
@@ -0,0 +1,101 @@
+;SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+struct tcp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<32> seq_num
+ bit<32> ack_num
+ bit<16> hdr_len_flags
+ bit<16> window_size
+ bit<16> checksum
+ bit<16> urg_ptr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+header tcp instanceof tcp_h
+
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port
+ bit<32> pkt_seq_num
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct jump_048_args_t {
+ bit<32> seq_num
+}
+
+action jump_048_action args instanceof jump_048_args_t {
+ mov m.pkt_seq_num h.tcp.seq_num
+ jmplt LABEL_0 t.seq_num m.pkt_seq_num
+ mov m.port 4
+ LABEL_0 : sub h.ipv4.ttl 1
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+//table
+//
+table jump_048_table {
+ key {
+ h.ipv4.dst_addr exact
+ }
+
+ actions {
+ jump_048_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ extract h.tcp
+ table jump_048_table
+ emit h.ethernet
+ emit h.ipv4
+ emit h.tcp
+ tx m.port
+}
\ No newline at end of file
diff --git a/dep/pipeline/jump_048/pcap_files/in_1.txt b/dep/pipeline/jump_048/pcap_files/in_1.txt
new file mode 100644
index 00000000..0dbe4650
--- /dev/null
+++ b/dep/pipeline/jump_048/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 69 00 00 00 64 50 02
+000030 20 00 58 c6 00 00 58 58 58 58 58 58
+# Packet 1
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 01 00 00 00 64 50 02
+000030 20 00 59 2e 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_048/pcap_files/out_1.txt b/dep/pipeline/jump_048/pcap_files/out_1.txt
new file mode 100644
index 00000000..0689caed
--- /dev/null
+++ b/dep/pipeline/jump_048/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 69 00 00 00 64 50 02
+000030 20 00 58 c6 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_048/readme.md b/dep/pipeline/jump_048/readme.md
new file mode 100644
index 00000000..6400742b
--- /dev/null
+++ b/dep/pipeline/jump_048/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_jump_048
+-----------------------
+
+ Instructions being tested:
+ jmplt LABEL t.field m.field
+
+
+ Description:
+ For a packet with matching destination IP address, if the TCP sequence number is of the packet is more than table entry then packet will be transmitted to the same port after decrementing its TTL, else packet is dropped.
+ Verification:
+ Packets with table entry less than TCP sequence no are received.
diff --git a/dep/pipeline/jump_048/table.txt b/dep/pipeline/jump_048/table.txt
new file mode 100755
index 00000000..b1acfb72
--- /dev/null
+++ b/dep/pipeline/jump_048/table.txt
@@ -0,0 +1 @@
+match 0xc800000a action jump_048_action seq_num 0xf
diff --git a/dep/pipeline/jump_049/ethdev.io b/dep/pipeline/jump_049/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/jump_049/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/jump_049/jump_049.cli b/dep/pipeline/jump_049/jump_049.cli
new file mode 100644
index 00000000..df0164f2
--- /dev/null
+++ b/dep/pipeline/jump_049/jump_049.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/jump_049/jump_049.spec /tmp/pipeline/jump_049/jump_049.c
+pipeline libbuild /tmp/pipeline/jump_049/jump_049.c /tmp/pipeline/jump_049/jump_049.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/jump_049/jump_049.so io /tmp/pipeline/jump_049/ethdev.io numa 0
+pipeline PIPELINE0 table jump_049_table add /tmp/pipeline/jump_049/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/jump_049/jump_049.spec b/dep/pipeline/jump_049/jump_049.spec
new file mode 100644
index 00000000..4d1fe602
--- /dev/null
+++ b/dep/pipeline/jump_049/jump_049.spec
@@ -0,0 +1,100 @@
+;SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+struct tcp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<32> seq_num
+ bit<32> ack_num
+ bit<16> hdr_len_flags
+ bit<16> window_size
+ bit<16> checksum
+ bit<16> urg_ptr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+header tcp instanceof tcp_h
+
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct jump_049_args_t {
+ bit<32> seq_num
+ bit<32> ack_num
+}
+
+action jump_049_action args instanceof jump_049_args_t {
+ jmplt LABEL_0 t.seq_num t.ack_num
+ mov m.port 4
+ LABEL_0 : sub h.ipv4.ttl 1
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+//table
+//
+table jump_049_table {
+ key {
+ h.ipv4.dst_addr exact
+ }
+
+ actions {
+ jump_049_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ extract h.tcp
+ table jump_049_table
+ emit h.ethernet
+ emit h.ipv4
+ emit h.tcp
+ tx m.port
+}
diff --git a/dep/pipeline/jump_049/pcap_files/in_1.txt b/dep/pipeline/jump_049/pcap_files/in_1.txt
new file mode 100644
index 00000000..5af2aac3
--- /dev/null
+++ b/dep/pipeline/jump_049/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e be 64 00 00 01 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 64 00 00 00 0a 50 02
+000030 20 00 59 2e 00 00 58 58 58 58 58 58
+# Packet 1
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e bd 64 00 00 01 c8 00
+000020 00 0b 00 64 00 c8 00 00 00 64 00 00 00 0a 50 02
+000030 20 00 59 2d 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_049/pcap_files/out_1.txt b/dep/pipeline/jump_049/pcap_files/out_1.txt
new file mode 100644
index 00000000..862e6c4c
--- /dev/null
+++ b/dep/pipeline/jump_049/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 4e be 64 00 00 01 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 64 00 00 00 0a 50 02
+000030 20 00 59 2e 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_049/readme.md b/dep/pipeline/jump_049/readme.md
new file mode 100644
index 00000000..42fa2b55
--- /dev/null
+++ b/dep/pipeline/jump_049/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_jump_049
+-----------------------
+
+ Instructions being tested:
+ jmplt LABEL t.field t.field
+
+
+ Description:
+ For a packet with matching destination IP address, if the TCP sequence number in the table entry is less than the TCP acknoledgement number in the same enrty, then packet will be transmitted back to the same port, after decrementing its TTL, else packet is dropped.
+ Verification:
+ Behaviour should be as per description.
diff --git a/dep/pipeline/jump_049/table.txt b/dep/pipeline/jump_049/table.txt
new file mode 100755
index 00000000..1cd95a31
--- /dev/null
+++ b/dep/pipeline/jump_049/table.txt
@@ -0,0 +1,2 @@
+match 0xc800000a action jump_049_action seq_num 0xf ack_num 0xff
+match 0xc800000b action jump_049_action seq_num 0xf ack_num 0x1
diff --git a/dep/pipeline/jump_050/ethdev.io b/dep/pipeline/jump_050/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/jump_050/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/jump_050/jump_050.cli b/dep/pipeline/jump_050/jump_050.cli
new file mode 100644
index 00000000..742b2126
--- /dev/null
+++ b/dep/pipeline/jump_050/jump_050.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/jump_050/jump_050.spec /tmp/pipeline/jump_050/jump_050.c
+pipeline libbuild /tmp/pipeline/jump_050/jump_050.c /tmp/pipeline/jump_050/jump_050.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/jump_050/jump_050.so io /tmp/pipeline/jump_050/ethdev.io numa 0
+pipeline PIPELINE0 table jump_050_table add /tmp/pipeline/jump_050/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/jump_050/jump_050.spec b/dep/pipeline/jump_050/jump_050.spec
new file mode 100644
index 00000000..d176bc4b
--- /dev/null
+++ b/dep/pipeline/jump_050/jump_050.spec
@@ -0,0 +1,84 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct jump_050_args_t {
+ bit<32> src_addr_add
+}
+
+action jump_050_action args instanceof jump_050_args_t {
+ jmpgt LABEL_0 h.ipv4.src_addr t.src_addr_add
+ mov m.port 4
+ LABEL_0 : sub h.ipv4.ttl 1
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+//table
+//
+table jump_050_table {
+ key {
+ h.ethernet.dst_addr exact
+ }
+
+ actions {
+ jump_050_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ table jump_050_table
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/jump_050/pcap_files/in_1.txt b/dep/pipeline/jump_050/pcap_files/in_1.txt
new file mode 100644
index 00000000..4caac1c9
--- /dev/null
+++ b/dep/pipeline/jump_050/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e bf c9 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 64 00 00 00 0a 50 02
+000030 20 00 59 2f 00 00 58 58 58 58 58 58
+# Packet 1
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 64 00 00 00 0a 50 02
+000030 20 00 59 25 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_050/pcap_files/out_1.txt b/dep/pipeline/jump_050/pcap_files/out_1.txt
new file mode 100644
index 00000000..7c91edf3
--- /dev/null
+++ b/dep/pipeline/jump_050/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 4e bf c9 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 64 00 00 00 0a 50 02
+000030 20 00 59 2f 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_050/readme.md b/dep/pipeline/jump_050/readme.md
new file mode 100644
index 00000000..10d456d1
--- /dev/null
+++ b/dep/pipeline/jump_050/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_jump_050
+-----------------------
+
+ Instructions being tested:
+ jmpgt LABEL h.field t.field
+
+
+ Description:
+ For a packet with matching destination MAC address, if the source IP address is the more than the entry in the table then packet will be transmitted back to the same port after decrementing its TTL. else packet is dropped.
+ Verification:
+ Only packets with IP source address more than table entry will be received.
diff --git a/dep/pipeline/jump_050/table.txt b/dep/pipeline/jump_050/table.txt
new file mode 100755
index 00000000..db655f7d
--- /dev/null
+++ b/dep/pipeline/jump_050/table.txt
@@ -0,0 +1 @@
+match 0x525400124457 action jump_050_action src_addr_add 0xc8000001
diff --git a/dep/pipeline/jump_051/ethdev.io b/dep/pipeline/jump_051/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/jump_051/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/jump_051/jump_051.cli b/dep/pipeline/jump_051/jump_051.cli
new file mode 100644
index 00000000..2f20f8bd
--- /dev/null
+++ b/dep/pipeline/jump_051/jump_051.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/jump_051/jump_051.spec /tmp/pipeline/jump_051/jump_051.c
+pipeline libbuild /tmp/pipeline/jump_051/jump_051.c /tmp/pipeline/jump_051/jump_051.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/jump_051/jump_051.so io /tmp/pipeline/jump_051/ethdev.io numa 0
+pipeline PIPELINE0 table jump_051_table add /tmp/pipeline/jump_051/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/jump_051/jump_051.spec b/dep/pipeline/jump_051/jump_051.spec
new file mode 100644
index 00000000..aa01ed1d
--- /dev/null
+++ b/dep/pipeline/jump_051/jump_051.spec
@@ -0,0 +1,99 @@
+;SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+struct tcp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<32> seq_num
+ bit<32> ack_num
+ bit<16> hdr_len_flags
+ bit<16> window_size
+ bit<16> checksum
+ bit<16> urg_ptr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+header tcp instanceof tcp_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct jump_051_args_t {
+ bit<32> seq_num_thr
+}
+
+action jump_051_action args instanceof jump_051_args_t {
+ jmpgt LABEL_0 t.seq_num_thr h.tcp.seq_num
+ mov m.port 4
+ LABEL_0 : sub h.ipv4.ttl 1
+ return
+}
+
+
+action drop args none {
+ drop
+}
+
+//
+//table
+//
+table jump_051_table {
+ key {
+ h.ethernet.dst_addr exact
+ }
+
+ actions {
+ jump_051_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ extract h.tcp
+ table jump_051_table
+ emit h.ethernet
+ emit h.ipv4
+ emit h.tcp
+ tx m.port
+}
diff --git a/dep/pipeline/jump_051/pcap_files/in_1.txt b/dep/pipeline/jump_051/pcap_files/in_1.txt
new file mode 100644
index 00000000..1398005f
--- /dev/null
+++ b/dep/pipeline/jump_051/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e bf 64 00 00 00 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 01 00 00 00 0a 50 02
+000030 20 00 59 92 00 00 58 58 58 58 58 58
+# Packet 1
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e bf 64 00 00 00 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 64 00 00 00 0a 50 02
+000030 20 00 59 2f 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_051/pcap_files/out_1.txt b/dep/pipeline/jump_051/pcap_files/out_1.txt
new file mode 100644
index 00000000..5d91919a
--- /dev/null
+++ b/dep/pipeline/jump_051/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 4e bf 64 00 00 00 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 01 00 00 00 0a 50 02
+000030 20 00 59 92 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_051/readme.md b/dep/pipeline/jump_051/readme.md
new file mode 100644
index 00000000..6e0f5c8d
--- /dev/null
+++ b/dep/pipeline/jump_051/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_jump_051
+-----------------------
+
+ Instructions being tested:
+ jmpgt LABEL t.field h.field
+
+
+ Description:
+ For a packet with matching destination MAC address, if TCP sequence mentioned in the table is the more than the TCP sequence no. of the packet, then packet will be transmitted back to the same port after decrementing its TTL. else packet is dropped.
+ Verification:
+ Only packets with table entry more than TCP sequence no will be received.
diff --git a/dep/pipeline/jump_051/table.txt b/dep/pipeline/jump_051/table.txt
new file mode 100755
index 00000000..bb9e038e
--- /dev/null
+++ b/dep/pipeline/jump_051/table.txt
@@ -0,0 +1 @@
+match 0x525400124457 action jump_051_action seq_num_thr 0x31
diff --git a/dep/pipeline/jump_052/ethdev.io b/dep/pipeline/jump_052/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/jump_052/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/jump_052/jump_052.cli b/dep/pipeline/jump_052/jump_052.cli
new file mode 100644
index 00000000..1f8745e9
--- /dev/null
+++ b/dep/pipeline/jump_052/jump_052.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/jump_052/jump_052.spec /tmp/pipeline/jump_052/jump_052.c
+pipeline libbuild /tmp/pipeline/jump_052/jump_052.c /tmp/pipeline/jump_052/jump_052.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/jump_052/jump_052.so io /tmp/pipeline/jump_052/ethdev.io numa 0
+pipeline PIPELINE0 table jump_052_table add /tmp/pipeline/jump_052/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/jump_052/jump_052.spec b/dep/pipeline/jump_052/jump_052.spec
new file mode 100644
index 00000000..e59f123b
--- /dev/null
+++ b/dep/pipeline/jump_052/jump_052.spec
@@ -0,0 +1,98 @@
+;SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+struct tcp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<32> seq_num
+ bit<32> ack_num
+ bit<16> hdr_len_flags
+ bit<16> window_size
+ bit<16> checksum
+ bit<16> urg_ptr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+header tcp instanceof tcp_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct jump_052_args_t {
+ bit<32> ack_num
+}
+
+action jump_052_action args instanceof jump_052_args_t {
+ jmpgt LABEL_0 t.ack_num 0x0000ffff
+ mov m.port 4
+ LABEL_0 : sub h.ipv4.ttl 1
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+//table
+//
+table jump_052_table {
+ key {
+ h.ipv4.dst_addr exact
+ }
+
+ actions {
+ jump_052_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ extract h.tcp
+ table jump_052_table
+ emit h.ethernet
+ emit h.ipv4
+ emit h.tcp
+ tx m.port
+}
diff --git a/dep/pipeline/jump_052/pcap_files/in_1.txt b/dep/pipeline/jump_052/pcap_files/in_1.txt
new file mode 100644
index 00000000..44eb1b7d
--- /dev/null
+++ b/dep/pipeline/jump_052/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b3 64 00 00 0b c8 00
+000020 00 0b 00 64 00 c8 00 00 00 01 00 00 00 0a 50 02
+000030 20 00 59 86 00 00 58 58 58 58 58 58
+# Packet 1
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b4 64 00 00 0b c8 00
+000020 00 0a 00 64 00 c8 00 00 00 01 00 00 00 0a 50 02
+000030 20 00 59 87 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_052/pcap_files/out_1.txt b/dep/pipeline/jump_052/pcap_files/out_1.txt
new file mode 100644
index 00000000..a38ff5d4
--- /dev/null
+++ b/dep/pipeline/jump_052/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 4e b3 64 00 00 0b c8 00
+000020 00 0b 00 64 00 c8 00 00 00 01 00 00 00 0a 50 02
+000030 20 00 59 86 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_052/readme.md b/dep/pipeline/jump_052/readme.md
new file mode 100644
index 00000000..9606cd28
--- /dev/null
+++ b/dep/pipeline/jump_052/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_jump_052
+-----------------------
+
+ Instructions being tested:
+ jmpgt LABEL t.field immediate_data
+
+
+ Description:
+ For a packet with matching destination IP address, if the TCP acknoledgement no in the table is the more than immediate value then packet will be transmitted back to the same port after decrementing its TTL. else packet is dropped.
+ Verification:
+ Behaviour should be as per description.
diff --git a/dep/pipeline/jump_052/table.txt b/dep/pipeline/jump_052/table.txt
new file mode 100755
index 00000000..61f13014
--- /dev/null
+++ b/dep/pipeline/jump_052/table.txt
@@ -0,0 +1,2 @@
+match 0xc800000a action jump_052_action ack_num 0x1
+match 0xc800000b action jump_052_action ack_num 0xfffff
diff --git a/dep/pipeline/jump_053/ethdev.io b/dep/pipeline/jump_053/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/jump_053/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/jump_053/jump_053.cli b/dep/pipeline/jump_053/jump_053.cli
new file mode 100644
index 00000000..b6f056ee
--- /dev/null
+++ b/dep/pipeline/jump_053/jump_053.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/jump_053/jump_053.spec /tmp/pipeline/jump_053/jump_053.c
+pipeline libbuild /tmp/pipeline/jump_053/jump_053.c /tmp/pipeline/jump_053/jump_053.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/jump_053/jump_053.so io /tmp/pipeline/jump_053/ethdev.io numa 0
+pipeline PIPELINE0 table jump_053_table add /tmp/pipeline/jump_053/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/jump_053/jump_053.spec b/dep/pipeline/jump_053/jump_053.spec
new file mode 100644
index 00000000..32fed7ac
--- /dev/null
+++ b/dep/pipeline/jump_053/jump_053.spec
@@ -0,0 +1,86 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port
+ bit<16> ether_type
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct jump_053_args_t {
+ bit<16> ether_type
+}
+
+action jump_053_action args instanceof jump_053_args_t {
+ mov m.ether_type h.ethernet.ethertype
+ jmpgt LABEL_0 m.ether_type t.ether_type
+ mov m.port 4
+ LABEL_0 : sub h.ipv4.ttl 1
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Table
+//
+table jump_053_table {
+ key {
+ h.ethernet.dst_addr exact
+ }
+
+ actions {
+ jump_053_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ table jump_053_table
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/jump_053/pcap_files/in_1.txt b/dep/pipeline/jump_053/pcap_files/in_1.txt
new file mode 100644
index 00000000..e9d13e1e
--- /dev/null
+++ b/dep/pipeline/jump_053/pcap_files/in_1.txt
@@ -0,0 +1,16 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 06 00 01
+000010 08 00 06 04 00 01 52 54 00 12 34 56 c0 a8 7a 4c
+000020 00 00 00 00 00 00 00 00 00 00 58 58 58 58 58 58
+# Packet 1
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e be 64 00 00 01 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 0f 00 00 00 0a 50 02
+000030 20 00 59 83 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_053/pcap_files/out_1.txt b/dep/pipeline/jump_053/pcap_files/out_1.txt
new file mode 100644
index 00000000..49711d0a
--- /dev/null
+++ b/dep/pipeline/jump_053/pcap_files/out_1.txt
@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 06 00 01
+000010 08 00 06 04 00 01 51 54 00 12 34 56 c0 a8 7a 4c
+000020 00 00 00 00 00 00 00 00 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_053/readme.md b/dep/pipeline/jump_053/readme.md
new file mode 100644
index 00000000..754d983f
--- /dev/null
+++ b/dep/pipeline/jump_053/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_jump_053
+-----------------------
+
+ Instructions being tested:
+ jmpgt LABEL m.field t.field
+
+
+ Description:
+ For a packet with matching destination MAC address, if packet ethertype is more than the entry in the table, then packet will be transmitted back to the same port and its TTL is decremented, else the packet is dropped.
+ Verification:
+ Packets with ethertype more than table entry are received.
diff --git a/dep/pipeline/jump_053/table.txt b/dep/pipeline/jump_053/table.txt
new file mode 100755
index 00000000..20017dc9
--- /dev/null
+++ b/dep/pipeline/jump_053/table.txt
@@ -0,0 +1 @@
+match 0x525400124457 action jump_053_action ether_type 0x0803
diff --git a/dep/pipeline/jump_054/ethdev.io b/dep/pipeline/jump_054/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/jump_054/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/jump_054/jump_054.cli b/dep/pipeline/jump_054/jump_054.cli
new file mode 100644
index 00000000..08c833b8
--- /dev/null
+++ b/dep/pipeline/jump_054/jump_054.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/jump_054/jump_054.spec /tmp/pipeline/jump_054/jump_054.c
+pipeline libbuild /tmp/pipeline/jump_054/jump_054.c /tmp/pipeline/jump_054/jump_054.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/jump_054/jump_054.so io /tmp/pipeline/jump_054/ethdev.io numa 0
+pipeline PIPELINE0 table jump_054_table add /tmp/pipeline/jump_054/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/jump_054/jump_054.spec b/dep/pipeline/jump_054/jump_054.spec
new file mode 100644
index 00000000..93003115
--- /dev/null
+++ b/dep/pipeline/jump_054/jump_054.spec
@@ -0,0 +1,101 @@
+;SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+struct tcp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<32> seq_num
+ bit<32> ack_num
+ bit<16> hdr_len_flags
+ bit<16> window_size
+ bit<16> checksum
+ bit<16> urg_ptr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+header tcp instanceof tcp_h
+
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port
+ bit<32> pkt_seq_num
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct jump_054_args_t {
+ bit<32> seq_num
+}
+
+action jump_054_action args instanceof jump_054_args_t {
+ mov m.pkt_seq_num h.tcp.seq_num
+ jmpgt LABEL_0 t.seq_num m.pkt_seq_num
+ mov m.port 4
+ LABEL_0 : sub h.ipv4.ttl 1
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+//table
+//
+table jump_054_table {
+ key {
+ h.ipv4.dst_addr exact
+ }
+
+ actions {
+ jump_054_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ extract h.tcp
+ table jump_054_table
+ emit h.ethernet
+ emit h.ipv4
+ emit h.tcp
+ tx m.port
+}
diff --git a/dep/pipeline/jump_054/pcap_files/in_1.txt b/dep/pipeline/jump_054/pcap_files/in_1.txt
new file mode 100644
index 00000000..9e9c261d
--- /dev/null
+++ b/dep/pipeline/jump_054/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 0a 00 00 00 64 50 02
+000030 20 00 59 25 00 00 58 58 58 58 58 58
+# Packet 1
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 69 00 00 00 64 50 02
+000030 20 00 58 c6 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_054/pcap_files/out_1.txt b/dep/pipeline/jump_054/pcap_files/out_1.txt
new file mode 100644
index 00000000..d72a6774
--- /dev/null
+++ b/dep/pipeline/jump_054/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 0a 00 00 00 64 50 02
+000030 20 00 59 25 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_054/readme.md b/dep/pipeline/jump_054/readme.md
new file mode 100644
index 00000000..9f35c23a
--- /dev/null
+++ b/dep/pipeline/jump_054/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_jump_054
+-----------------------
+
+ Instructions being tested:
+ jmpgt LABEL t.field m.field
+
+
+ Description:
+ For a packet with matching destination IP address, if the table entry is more than TCP sequence number of the packet then packet will be transmitted to the same port after decrementing the TTL, else packet is dropped.
+ Verification:
+ Behaviour should be as per description.
diff --git a/dep/pipeline/jump_054/table.txt b/dep/pipeline/jump_054/table.txt
new file mode 100755
index 00000000..8ce4ba4b
--- /dev/null
+++ b/dep/pipeline/jump_054/table.txt
@@ -0,0 +1 @@
+match 0xc800000a action jump_054_action seq_num 0xf
diff --git a/dep/pipeline/jump_055/ethdev.io b/dep/pipeline/jump_055/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/jump_055/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/jump_055/jump_055.cli b/dep/pipeline/jump_055/jump_055.cli
new file mode 100644
index 00000000..c077e915
--- /dev/null
+++ b/dep/pipeline/jump_055/jump_055.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/jump_055/jump_055.spec /tmp/pipeline/jump_055/jump_055.c
+pipeline libbuild /tmp/pipeline/jump_055/jump_055.c /tmp/pipeline/jump_055/jump_055.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/jump_055/jump_055.so io /tmp/pipeline/jump_055/ethdev.io numa 0
+pipeline PIPELINE0 table jump_055_table add /tmp/pipeline/jump_055/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/jump_055/jump_055.spec b/dep/pipeline/jump_055/jump_055.spec
new file mode 100644
index 00000000..daec34bc
--- /dev/null
+++ b/dep/pipeline/jump_055/jump_055.spec
@@ -0,0 +1,100 @@
+;SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+struct tcp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<32> seq_num
+ bit<32> ack_num
+ bit<16> hdr_len_flags
+ bit<16> window_size
+ bit<16> checksum
+ bit<16> urg_ptr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+header tcp instanceof tcp_h
+
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct jump_055_args_t {
+ bit<32> seq_num
+ bit<32> ack_num
+}
+
+action jump_055_action args instanceof jump_055_args_t {
+ jmpgt LABEL_0 t.seq_num t.ack_num
+ mov m.port 4
+ LABEL_0 : sub h.ipv4.ttl 1
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+//table
+//
+table jump_055_table {
+ key {
+ h.ipv4.dst_addr exact
+ }
+
+ actions {
+ jump_055_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ extract h.tcp
+ table jump_055_table
+ emit h.ethernet
+ emit h.ipv4
+ emit h.tcp
+ tx m.port
+}
diff --git a/dep/pipeline/jump_055/pcap_files/in_1.txt b/dep/pipeline/jump_055/pcap_files/in_1.txt
new file mode 100644
index 00000000..fc99ae17
--- /dev/null
+++ b/dep/pipeline/jump_055/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b4 64 00 00 0a c8 00
+000020 00 0b 00 64 00 c8 00 00 00 01 00 00 00 64 50 02
+000030 20 00 59 2d 00 00 58 58 58 58 58 58
+# Packet 1
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 01 00 00 00 64 50 02
+000030 20 00 59 2e 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_055/pcap_files/out_1.txt b/dep/pipeline/jump_055/pcap_files/out_1.txt
new file mode 100644
index 00000000..0e789182
--- /dev/null
+++ b/dep/pipeline/jump_055/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 4e b4 64 00 00 0a c8 00
+000020 00 0b 00 64 00 c8 00 00 00 01 00 00 00 64 50 02
+000030 20 00 59 2d 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/jump_055/readme.md b/dep/pipeline/jump_055/readme.md
new file mode 100644
index 00000000..76360938
--- /dev/null
+++ b/dep/pipeline/jump_055/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_jump_055
+-----------------------
+
+ Instructions being tested:
+ jmpgt LABEL t.field t.field
+
+
+ Description:
+ For a packet with matching destination IP address, if the TCP sequence number in the table is more than the TCP acknoledgement number in the table then packet will be transmitted back to the same port after decrementing its TTL value, else packet is dropped.
+ Verification
+ Behaviour should be as per description.
diff --git a/dep/pipeline/jump_055/table.txt b/dep/pipeline/jump_055/table.txt
new file mode 100755
index 00000000..3a203e7a
--- /dev/null
+++ b/dep/pipeline/jump_055/table.txt
@@ -0,0 +1,2 @@
+match 0xc800000a action jump_055_action seq_num 0xf ack_num 0xff
+match 0xc800000b action jump_055_action seq_num 0xf ack_num 0x1
diff --git a/dep/pipeline/learner_001/ethdev.io b/dep/pipeline/learner_001/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/learner_001/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/learner_001/learner_001.cli b/dep/pipeline/learner_001/learner_001.cli
new file mode 100644
index 00000000..f74e55d3
--- /dev/null
+++ b/dep/pipeline/learner_001/learner_001.cli
@@ -0,0 +1,29 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/learner_001/learner_001.spec /tmp/pipeline/learner_001/learner_001.c
+pipeline libbuild /tmp/pipeline/learner_001/learner_001.c /tmp/pipeline/learner_001/learner_001.so
+
+;
+; Customize the LINK parameters to match your setup.
+;
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+;
+; PIPELINE0 setup.
+;
+
+pipeline PIPELINE0 build lib /tmp/pipeline/learner_001/learner_001.so io /tmp/pipeline/learner_001/ethdev.io numa 0
+
+;
+; Pipelines-to-threads mapping.
+;
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/learner_001/learner_001.spec b/dep/pipeline/learner_001/learner_001.spec
new file mode 100644
index 00000000..4c2cec26
--- /dev/null
+++ b/dep/pipeline/learner_001/learner_001.spec
@@ -0,0 +1,97 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port_in
+ bit<32> port_out
+ bit<32> timeout_id
+ bit<32> learn_001_action_01_arg
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct learn_001_action_01_args_t {
+ bit<32> port_out
+}
+
+action learn_001_action_01 args instanceof learn_001_action_01_args_t {
+ mov m.port_out t.port_out
+ rearm
+ return
+}
+
+action learn_001_action_02 args none {
+ mov m.learn_001_action_01_arg m.port_in
+ mov m.timeout_id 0
+ learn learn_001_action_01 m.learn_001_action_01_arg m.timeout_id
+ return
+}
+
+//
+// Tables.
+//
+learner learn_001 {
+ key {
+ h.ipv4.dst_addr
+ }
+
+ actions {
+ learn_001_action_01
+
+ learn_001_action_02
+ }
+
+ default_action learn_001_action_02 args none
+
+ size 1048576
+
+ timeout {
+ 120
+ }
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port_in
+ extract h.ethernet
+ extract h.ipv4
+ table learn_001
+ jmpa DROP learn_001_action_02
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port_out
+ DROP : drop
+}
\ No newline at end of file
diff --git a/dep/pipeline/learner_001/pcap_files/in_1.txt b/dep/pipeline/learner_001/pcap_files/in_1.txt
new file mode 100644
index 00000000..54a27c34
--- /dev/null
+++ b/dep/pipeline/learner_001/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 8d 64 00 00 0a c8 00
+000020 00 31 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 6b 00 00 58 58 58 58 58 58
+# Packet 1
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 8d 64 00 00 0a c8 00
+000020 00 31 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 6b 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/learner_001/pcap_files/in_2.txt b/dep/pipeline/learner_001/pcap_files/in_2.txt
new file mode 100644
index 00000000..c60a9acd
--- /dev/null
+++ b/dep/pipeline/learner_001/pcap_files/in_2.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 8d 64 00 00 0a c8 00
+000020 00 32 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 6b 00 00 58 58 58 58 58 58
+# Packet 1
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 8d 64 00 00 0a c8 00
+000020 00 32 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 6b 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/learner_001/pcap_files/in_3.txt b/dep/pipeline/learner_001/pcap_files/in_3.txt
new file mode 100644
index 00000000..43426926
--- /dev/null
+++ b/dep/pipeline/learner_001/pcap_files/in_3.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 8d 64 00 00 0a c8 00
+000020 00 33 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 6b 00 00 58 58 58 58 58 58
+# Packet 1
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 8d 64 00 00 0a c8 00
+000020 00 33 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 6b 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/learner_001/pcap_files/in_4.txt b/dep/pipeline/learner_001/pcap_files/in_4.txt
new file mode 100644
index 00000000..35b74565
--- /dev/null
+++ b/dep/pipeline/learner_001/pcap_files/in_4.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 8d 64 00 00 0a c8 00
+000020 00 34 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 6b 00 00 58 58 58 58 58 58
+# Packet 1
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 8d 64 00 00 0a c8 00
+000020 00 34 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 6b 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/learner_001/pcap_files/out_1.txt b/dep/pipeline/learner_001/pcap_files/out_1.txt
new file mode 100644
index 00000000..4581825d
--- /dev/null
+++ b/dep/pipeline/learner_001/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 8d 64 00 00 0a c8 00
+000020 00 31 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 6b 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/learner_001/pcap_files/out_2.txt b/dep/pipeline/learner_001/pcap_files/out_2.txt
new file mode 100644
index 00000000..494f8145
--- /dev/null
+++ b/dep/pipeline/learner_001/pcap_files/out_2.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 8d 64 00 00 0a c8 00
+000020 00 32 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 6b 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/learner_001/pcap_files/out_3.txt b/dep/pipeline/learner_001/pcap_files/out_3.txt
new file mode 100644
index 00000000..f5414110
--- /dev/null
+++ b/dep/pipeline/learner_001/pcap_files/out_3.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 8d 64 00 00 0a c8 00
+000020 00 33 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 6b 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/learner_001/pcap_files/out_4.txt b/dep/pipeline/learner_001/pcap_files/out_4.txt
new file mode 100644
index 00000000..625e0dce
--- /dev/null
+++ b/dep/pipeline/learner_001/pcap_files/out_4.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 8d 64 00 00 0a c8 00
+000020 00 34 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 6b 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/learner_001/readme.md b/dep/pipeline/learner_001/readme.md
new file mode 100644
index 00000000..7c79bb62
--- /dev/null
+++ b/dep/pipeline/learner_001/readme.md
@@ -0,0 +1,13 @@
+Test Case: test_learner_001
+-----------------------
+
+ Instruction being tested:
+ learner TABLE_NAME
+
+ Description:
+ If lookup miss then rule should be added and packet is dropped.
+ The rule added will be to transmit the packet back to the same port.
+ If the same key is looked upon again then the packet will follow the added rule.
+
+ Verification:
+ Simulate the test as per the description. Behaviour should be as described.
diff --git a/dep/pipeline/learner_002/ethdev.io b/dep/pipeline/learner_002/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/learner_002/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/learner_002/learner_002.cli b/dep/pipeline/learner_002/learner_002.cli
new file mode 100644
index 00000000..7055d623
--- /dev/null
+++ b/dep/pipeline/learner_002/learner_002.cli
@@ -0,0 +1,29 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/learner_002/learner_002.spec /tmp/pipeline/learner_002/learner_002.c
+pipeline libbuild /tmp/pipeline/learner_002/learner_002.c /tmp/pipeline/learner_002/learner_002.so
+
+;
+; Customize the LINK parameters to match your setup.
+;
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+;
+; PIPELINE0 setup.
+;
+
+pipeline PIPELINE0 build lib /tmp/pipeline/learner_002/learner_002.so io /tmp/pipeline/learner_002/ethdev.io numa 0
+
+;
+; Pipelines-to-threads mapping.
+;
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/learner_002/learner_002.spec b/dep/pipeline/learner_002/learner_002.spec
new file mode 100644
index 00000000..564ef6c3
--- /dev/null
+++ b/dep/pipeline/learner_002/learner_002.spec
@@ -0,0 +1,99 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port_in
+ bit<32> port_out
+ bit<32> timeout_id
+ bit<32> learn_002_action_01_arg
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct learn_002_action_01_args_t {
+ bit<32> port_out
+}
+
+action learn_002_action_01 args instanceof learn_002_action_01_args_t {
+ mov m.port_out t.port_out
+ rearm
+ forget
+ return
+}
+
+action learn_002_action_02 args none {
+ mov m.learn_002_action_01_arg m.port_in
+ mov m.timeout_id 0
+ learn learn_002_action_01 m.learn_002_action_01_arg m.timeout_id
+ mov m.port_out m.port_in
+ return
+}
+
+//
+// Tables.
+//
+learner learn_002 {
+ key {
+ h.ipv4.dst_addr
+ }
+
+ actions {
+ learn_002_action_01
+
+ learn_002_action_02
+ }
+
+ default_action learn_002_action_02 args none
+
+ size 1048576
+
+ timeout {
+ 120
+ }
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port_in
+ extract h.ethernet
+ extract h.ipv4
+ table learn_002
+ jmpa DROP learn_002_action_01
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port_out
+ DROP : drop
+}
\ No newline at end of file
diff --git a/dep/pipeline/learner_002/pcap_files/in_1.txt b/dep/pipeline/learner_002/pcap_files/in_1.txt
new file mode 100644
index 00000000..a41e117b
--- /dev/null
+++ b/dep/pipeline/learner_002/pcap_files/in_1.txt
@@ -0,0 +1,22 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 8d 64 00 00 0a c8 00
+000020 00 31 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 6b 00 00 58 58 58 58 58 58
+# Packet 1
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 8d 64 00 00 0a c8 00
+000020 00 31 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 6b 00 00 58 58 58 58 58 58
+# Packet 2
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 8d 64 00 00 0a c8 00
+000020 00 31 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 6b 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/learner_002/pcap_files/in_2.txt b/dep/pipeline/learner_002/pcap_files/in_2.txt
new file mode 100644
index 00000000..77117c8f
--- /dev/null
+++ b/dep/pipeline/learner_002/pcap_files/in_2.txt
@@ -0,0 +1,22 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 8d 64 00 00 0a c8 00
+000020 00 32 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 6b 00 00 58 58 58 58 58 58
+# Packet 1
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 8d 64 00 00 0a c8 00
+000020 00 32 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 6b 00 00 58 58 58 58 58 58
+# Packet 2
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 8d 64 00 00 0a c8 00
+000020 00 32 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 6b 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/learner_002/pcap_files/in_3.txt b/dep/pipeline/learner_002/pcap_files/in_3.txt
new file mode 100644
index 00000000..c7f94e30
--- /dev/null
+++ b/dep/pipeline/learner_002/pcap_files/in_3.txt
@@ -0,0 +1,22 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 8d 64 00 00 0a c8 00
+000020 00 33 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 6b 00 00 58 58 58 58 58 58
+# Packet 1
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 8d 64 00 00 0a c8 00
+000020 00 33 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 6b 00 00 58 58 58 58 58 58
+# Packet 2
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 8d 64 00 00 0a c8 00
+000020 00 33 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 6b 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/learner_002/pcap_files/in_4.txt b/dep/pipeline/learner_002/pcap_files/in_4.txt
new file mode 100644
index 00000000..cbee3373
--- /dev/null
+++ b/dep/pipeline/learner_002/pcap_files/in_4.txt
@@ -0,0 +1,22 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 8d 64 00 00 0a c8 00
+000020 00 34 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 6b 00 00 58 58 58 58 58 58
+# Packet 1
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 8d 64 00 00 0a c8 00
+000020 00 34 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 6b 00 00 58 58 58 58 58 58
+# Packet 2
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 8d 64 00 00 0a c8 00
+000020 00 34 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 6b 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/learner_002/pcap_files/out_1.txt b/dep/pipeline/learner_002/pcap_files/out_1.txt
new file mode 100644
index 00000000..54a27c34
--- /dev/null
+++ b/dep/pipeline/learner_002/pcap_files/out_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 8d 64 00 00 0a c8 00
+000020 00 31 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 6b 00 00 58 58 58 58 58 58
+# Packet 1
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 8d 64 00 00 0a c8 00
+000020 00 31 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 6b 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/learner_002/pcap_files/out_2.txt b/dep/pipeline/learner_002/pcap_files/out_2.txt
new file mode 100644
index 00000000..c60a9acd
--- /dev/null
+++ b/dep/pipeline/learner_002/pcap_files/out_2.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 8d 64 00 00 0a c8 00
+000020 00 32 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 6b 00 00 58 58 58 58 58 58
+# Packet 1
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 8d 64 00 00 0a c8 00
+000020 00 32 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 6b 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/learner_002/pcap_files/out_3.txt b/dep/pipeline/learner_002/pcap_files/out_3.txt
new file mode 100644
index 00000000..43426926
--- /dev/null
+++ b/dep/pipeline/learner_002/pcap_files/out_3.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 8d 64 00 00 0a c8 00
+000020 00 33 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 6b 00 00 58 58 58 58 58 58
+# Packet 1
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 8d 64 00 00 0a c8 00
+000020 00 33 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 6b 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/learner_002/pcap_files/out_4.txt b/dep/pipeline/learner_002/pcap_files/out_4.txt
new file mode 100644
index 00000000..35b74565
--- /dev/null
+++ b/dep/pipeline/learner_002/pcap_files/out_4.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 8d 64 00 00 0a c8 00
+000020 00 34 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 6b 00 00 58 58 58 58 58 58
+# Packet 1
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 8d 64 00 00 0a c8 00
+000020 00 34 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 6b 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/learner_002/readme.md b/dep/pipeline/learner_002/readme.md
new file mode 100644
index 00000000..bb83b5c4
--- /dev/null
+++ b/dep/pipeline/learner_002/readme.md
@@ -0,0 +1,12 @@
+Test Case: test_learner_006
+-----------------------
+
+ Instruction being tested:
+ forget
+
+ Description:
+ If lookup miss then rule should be added and packet is trasmitted back to the same port.
+ When the lookup hit then rule is forgetten and packet is dropped.
+
+ Verification:
+ Simulate the test as per the description. Behaviour should be as described.
diff --git a/dep/pipeline/learner_003/ethdev.io b/dep/pipeline/learner_003/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/learner_003/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/learner_003/learner_003.cli b/dep/pipeline/learner_003/learner_003.cli
new file mode 100644
index 00000000..dcd0d30d
--- /dev/null
+++ b/dep/pipeline/learner_003/learner_003.cli
@@ -0,0 +1,29 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/learner_003/learner_003.spec /tmp/pipeline/learner_003/learner_003.c
+pipeline libbuild /tmp/pipeline/learner_003/learner_003.c /tmp/pipeline/learner_003/learner_003.so
+
+;
+; Customize the LINK parameters to match your setup.
+;
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+;
+; PIPELINE0 setup.
+;
+
+pipeline PIPELINE0 build lib /tmp/pipeline/learner_003/learner_003.so io /tmp/pipeline/learner_003/ethdev.io numa 0
+
+;
+; Pipelines-to-threads mapping.
+;
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/learner_003/learner_003.spec b/dep/pipeline/learner_003/learner_003.spec
new file mode 100644
index 00000000..2af95a62
--- /dev/null
+++ b/dep/pipeline/learner_003/learner_003.spec
@@ -0,0 +1,101 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port_in
+ bit<32> port_out
+ bit<32> timeout_id
+ bit<32> learn_003_action_01_arg
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct learn_003_action_01_args_t {
+ bit<32> port_out
+}
+
+action learn_003_action_01 args instanceof learn_003_action_01_args_t {
+ mov m.port_out t.port_out
+ rearm
+ return
+}
+
+struct learn_003_action_02_args_t {
+ bit<48> src_addr
+}
+
+action learn_003_action_02 args instanceof learn_003_action_02_args_t {
+ mov m.learn_003_action_01_arg m.port_in
+ mov h.ethernet.src_addr t.src_addr
+ mov m.timeout_id 0
+ learn learn_003_action_01 m.learn_003_action_01_arg m.timeout_id
+ mov m.port_out m.port_in
+ return
+}
+
+//
+// Tables.
+//
+learner learn_003 {
+ key {
+ h.ipv4.dst_addr
+ }
+
+ actions {
+ learn_003_action_01
+
+ learn_003_action_02
+ }
+
+ default_action learn_003_action_02 args src_addr 0x123456123456
+
+ size 1048576
+
+ timeout {
+ 120
+ }
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port_in
+ extract h.ethernet
+ extract h.ipv4
+ table learn_003
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port_out
+}
\ No newline at end of file
diff --git a/dep/pipeline/learner_003/pcap_files/in_1.txt b/dep/pipeline/learner_003/pcap_files/in_1.txt
new file mode 100644
index 00000000..54a27c34
--- /dev/null
+++ b/dep/pipeline/learner_003/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 8d 64 00 00 0a c8 00
+000020 00 31 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 6b 00 00 58 58 58 58 58 58
+# Packet 1
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 8d 64 00 00 0a c8 00
+000020 00 31 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 6b 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/learner_003/pcap_files/in_2.txt b/dep/pipeline/learner_003/pcap_files/in_2.txt
new file mode 100644
index 00000000..c60a9acd
--- /dev/null
+++ b/dep/pipeline/learner_003/pcap_files/in_2.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 8d 64 00 00 0a c8 00
+000020 00 32 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 6b 00 00 58 58 58 58 58 58
+# Packet 1
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 8d 64 00 00 0a c8 00
+000020 00 32 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 6b 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/learner_003/pcap_files/in_3.txt b/dep/pipeline/learner_003/pcap_files/in_3.txt
new file mode 100644
index 00000000..43426926
--- /dev/null
+++ b/dep/pipeline/learner_003/pcap_files/in_3.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 8d 64 00 00 0a c8 00
+000020 00 33 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 6b 00 00 58 58 58 58 58 58
+# Packet 1
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 8d 64 00 00 0a c8 00
+000020 00 33 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 6b 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/learner_003/pcap_files/in_4.txt b/dep/pipeline/learner_003/pcap_files/in_4.txt
new file mode 100644
index 00000000..35b74565
--- /dev/null
+++ b/dep/pipeline/learner_003/pcap_files/in_4.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 8d 64 00 00 0a c8 00
+000020 00 34 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 6b 00 00 58 58 58 58 58 58
+# Packet 1
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 8d 64 00 00 0a c8 00
+000020 00 34 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 6b 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/learner_003/pcap_files/out_1.txt b/dep/pipeline/learner_003/pcap_files/out_1.txt
new file mode 100644
index 00000000..37c2537b
--- /dev/null
+++ b/dep/pipeline/learner_003/pcap_files/out_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 12 34 56 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 8d 64 00 00 0a c8 00
+000020 00 31 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 6b 00 00 58 58 58 58 58 58
+# Packet 1
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 8d 64 00 00 0a c8 00
+000020 00 31 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 6b 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/learner_003/pcap_files/out_2.txt b/dep/pipeline/learner_003/pcap_files/out_2.txt
new file mode 100644
index 00000000..fe34c031
--- /dev/null
+++ b/dep/pipeline/learner_003/pcap_files/out_2.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 12 34 56 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 8d 64 00 00 0a c8 00
+000020 00 32 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 6b 00 00 58 58 58 58 58 58
+# Packet 1
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 8d 64 00 00 0a c8 00
+000020 00 32 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 6b 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/learner_003/pcap_files/out_3.txt b/dep/pipeline/learner_003/pcap_files/out_3.txt
new file mode 100644
index 00000000..b5794f01
--- /dev/null
+++ b/dep/pipeline/learner_003/pcap_files/out_3.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 12 34 56 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 8d 64 00 00 0a c8 00
+000020 00 33 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 6b 00 00 58 58 58 58 58 58
+# Packet 1
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 8d 64 00 00 0a c8 00
+000020 00 33 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 6b 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/learner_003/pcap_files/out_4.txt b/dep/pipeline/learner_003/pcap_files/out_4.txt
new file mode 100644
index 00000000..8b5640b6
--- /dev/null
+++ b/dep/pipeline/learner_003/pcap_files/out_4.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 12 34 56 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 8d 64 00 00 0a c8 00
+000020 00 34 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 6b 00 00 58 58 58 58 58 58
+# Packet 1
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 8d 64 00 00 0a c8 00
+000020 00 34 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 6b 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/learner_003/readme.md b/dep/pipeline/learner_003/readme.md
new file mode 100644
index 00000000..b03064f0
--- /dev/null
+++ b/dep/pipeline/learner_003/readme.md
@@ -0,0 +1,12 @@
+Test Case: test_learner_003
+-----------------------
+
+ Instruction being tested:
+ learner TABLE_NAME (default_action ACTION_NAME args none | ARGS_BYTE_ARRAY [ const ])
+
+ Description:
+ The testcase verify the parametrized default action. A packet is sent that miss
+ the table lookup. The received packet will have updated value of MAC source address.
+
+ Verification:
+ Simulate the test as per the description. Behaviour should be as described.
diff --git a/dep/pipeline/learner_004/ethdev.io b/dep/pipeline/learner_004/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/learner_004/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/learner_004/learner_004.cli b/dep/pipeline/learner_004/learner_004.cli
new file mode 100644
index 00000000..f1920068
--- /dev/null
+++ b/dep/pipeline/learner_004/learner_004.cli
@@ -0,0 +1,29 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/learner_004/learner_004.spec /tmp/pipeline/learner_004/learner_004.c
+pipeline libbuild /tmp/pipeline/learner_004/learner_004.c /tmp/pipeline/learner_004/learner_004.so
+
+;
+; Customize the LINK parameters to match your setup.
+;
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+;
+; PIPELINE0 setup.
+;
+
+pipeline PIPELINE0 build lib /tmp/pipeline/learner_004/learner_004.so io /tmp/pipeline/learner_004/ethdev.io numa 0
+
+;
+; Pipelines-to-threads mapping.
+;
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/learner_004/learner_004.spec b/dep/pipeline/learner_004/learner_004.spec
new file mode 100644
index 00000000..5fa1f4cf
--- /dev/null
+++ b/dep/pipeline/learner_004/learner_004.spec
@@ -0,0 +1,187 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+struct udp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<16> length
+ bit<16> checksum
+}
+
+struct vxlan_h {
+ bit<8> flags
+ bit<24> reserved
+ bit<24> vni
+ bit<8> reserved2
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+header outer_ethernet instanceof ethernet_h
+header outer_ipv4 instanceof ipv4_h
+header outer_udp instanceof udp_h
+header outer_vxlan instanceof vxlan_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port_in
+ bit<32> port_out
+ bit<32> timeout_id
+ bit<32> learn_004_action_01_arg
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct learn_004_action_01_args_t {
+ bit<32> port_out
+}
+
+action learn_004_action_01 args instanceof learn_004_action_01_args_t {
+ mov m.port_out t.port_out
+ rearm
+ return
+}
+
+struct learn_004_action_02_args_t {
+ bit<48> ethernet_dst_addr
+ bit<48> ethernet_src_addr
+ bit<16> ethernet_ethertype
+ bit<8> ipv4_ver_ihl
+ bit<8> ipv4_diffserv
+ bit<16> ipv4_total_len
+ bit<16> ipv4_identification
+ bit<16> ipv4_flags_offset
+ bit<8> ipv4_ttl
+ bit<8> ipv4_protocol
+ bit<16> ipv4_hdr_checksum
+ bit<32> ipv4_src_addr
+ bit<32> ipv4_dst_addr
+ bit<16> udp_src_port
+ bit<16> udp_dst_port
+ bit<16> udp_length
+ bit<16> udp_checksum
+ bit<8> vxlan_flags
+ bit<24> vxlan_reserved
+ bit<24> vxlan_vni
+ bit<8> vxlan_reserved2
+ bit<32> port_out
+}
+
+action learn_004_action_02 args instanceof learn_004_action_02_args_t {
+ //Set the outer Ethernet header.
+ validate h.outer_ethernet
+ mov h.outer_ethernet.dst_addr t.ethernet_dst_addr
+ mov h.outer_ethernet.src_addr t.ethernet_src_addr
+ mov h.outer_ethernet.ethertype t.ethernet_ethertype
+
+ //Set the outer IPv4 header.
+ validate h.outer_ipv4
+ mov h.outer_ipv4.ver_ihl t.ipv4_ver_ihl
+ mov h.outer_ipv4.diffserv t.ipv4_diffserv
+ mov h.outer_ipv4.total_len t.ipv4_total_len
+ mov h.outer_ipv4.identification t.ipv4_identification
+ mov h.outer_ipv4.flags_offset t.ipv4_flags_offset
+ mov h.outer_ipv4.ttl t.ipv4_ttl
+ mov h.outer_ipv4.protocol t.ipv4_protocol
+ mov h.outer_ipv4.hdr_checksum t.ipv4_hdr_checksum
+ mov h.outer_ipv4.src_addr t.ipv4_src_addr
+ mov h.outer_ipv4.dst_addr t.ipv4_dst_addr
+
+ //Set the outer UDP header.
+ validate h.outer_udp
+ mov h.outer_udp.src_port t.udp_src_port
+ mov h.outer_udp.dst_port t.udp_dst_port
+ mov h.outer_udp.length t.udp_length
+ mov h.outer_udp.checksum t.udp_checksum
+
+ //Set the outer VXLAN header.
+ validate h.outer_vxlan
+ mov h.outer_vxlan.flags t.vxlan_flags
+ mov h.outer_vxlan.reserved t.vxlan_reserved
+ mov h.outer_vxlan.vni t.vxlan_vni
+ mov h.outer_vxlan.reserved2 t.vxlan_reserved2
+
+ //Set the output port.
+ mov m.port_out t.port_out
+
+ //Update h.outer_ipv4.total_len field.
+ add h.outer_ipv4.total_len h.ipv4.total_len
+
+ //Update h.outer_ipv4.hdr_checksum field.
+ ckadd h.outer_ipv4.hdr_checksum h.ipv4.total_len
+
+ //Update h.outer_udp.length field.
+ add h.outer_udp.length h.ipv4.total_len
+
+ mov m.learn_004_action_01_arg m.port_in
+ mov m.timeout_id 0
+ learn learn_004_action_01 m.learn_004_action_01_arg m.timeout_id
+ return
+}
+
+//
+// Tables.
+//
+learner learn_004 {
+ key {
+ h.ipv4.dst_addr
+ }
+
+ actions {
+ learn_004_action_01
+
+ learn_004_action_02
+ }
+
+ default_action learn_004_action_02 args ethernet_dst_addr 0xa0a1a2a30000 ethernet_src_addr 0xb0b1b2b30000 ethernet_ethertype 0x0800 ipv4_ver_ihl 0x45 ipv4_diffserv 0 ipv4_total_len 50 ipv4_identification 0 ipv4_flags_offset 0 ipv4_ttl 64 ipv4_protocol 17 ipv4_hdr_checksum 0xe928 ipv4_src_addr 0xc0c10000 ipv4_dst_addr 0xd0d10000 udp_src_port 0xe000 udp_dst_port 4789 udp_length 30 udp_checksum 0 vxlan_flags 0 vxlan_reserved 0 vxlan_vni 0 vxlan_reserved2 0 port_out 0
+
+ size 1048576
+
+ timeout {
+ 120
+ }
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port_in
+ extract h.ethernet
+ extract h.ipv4
+ table learn_004
+ emit h.outer_ethernet
+ emit h.outer_ipv4
+ emit h.outer_udp
+ emit h.outer_vxlan
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port_out
+}
diff --git a/dep/pipeline/learner_004/pcap_files/in_1.txt b/dep/pipeline/learner_004/pcap_files/in_1.txt
new file mode 100644
index 00000000..54a27c34
--- /dev/null
+++ b/dep/pipeline/learner_004/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 8d 64 00 00 0a c8 00
+000020 00 31 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 6b 00 00 58 58 58 58 58 58
+# Packet 1
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 8d 64 00 00 0a c8 00
+000020 00 31 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 6b 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/learner_004/pcap_files/out_1.txt b/dep/pipeline/learner_004/pcap_files/out_1.txt
new file mode 100644
index 00000000..389fa500
--- /dev/null
+++ b/dep/pipeline/learner_004/pcap_files/out_1.txt
@@ -0,0 +1,15 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 a0 a1 a2 a3 00 00 b0 b1 b2 b3 00 00 08 00 45 00
+000010 00 60 00 00 00 00 40 11 e8 fa c0 c1 00 00 d0 d1
+000020 00 00 e0 00 12 b5 00 4c 00 00 00 00 00 00 00 00
+000030 00 00 52 54 00 12 44 57 52 54 00 12 34 56 08 00
+000040 45 00 00 2e 00 01 00 00 40 06 4e 8d 64 00 00 0a
+000050 c8 00 00 31 00 64 00 c8 00 00 00 00 00 00 00 00
+000060 50 02 20 00 59 6b 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/learner_004/pcap_files/out_2.txt b/dep/pipeline/learner_004/pcap_files/out_2.txt
new file mode 100644
index 00000000..4581825d
--- /dev/null
+++ b/dep/pipeline/learner_004/pcap_files/out_2.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 8d 64 00 00 0a c8 00
+000020 00 31 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 6b 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/learner_004/readme.md b/dep/pipeline/learner_004/readme.md
new file mode 100644
index 00000000..75d5f6e1
--- /dev/null
+++ b/dep/pipeline/learner_004/readme.md
@@ -0,0 +1,16 @@
+Test Case: test_learner_004
+-----------------------
+
+ Instruction being tested:
+ learner TABLE_NAME (default_action ACTION_NAME args none | ARGS_BYTE_ARRAY [ const ])
+
+ Description:
+ In this testcase we verify the default action parameters value. This testcase verify
+ endianess of the action parameters. The packet which miss the table lookup will be
+ updated with a vxlan header. The default action have parameter that need to convert
+ into network byte order also there are some parameters which no need to convert.
+ This will verify the endianess conversion of the action data.
+
+ Verification:
+ The packet are sent which will miss the table lookup. The received packet will have
+ vxlan header on the top of the packet.
diff --git a/dep/pipeline/learner_005/cmd_files/cmd_1.txt b/dep/pipeline/learner_005/cmd_files/cmd_1.txt
new file mode 100644
index 00000000..c08207f0
--- /dev/null
+++ b/dep/pipeline/learner_005/cmd_files/cmd_1.txt
@@ -0,0 +1 @@
+action learn_005_action_03 mac_src 0x123456123456
diff --git a/dep/pipeline/learner_005/ethdev.io b/dep/pipeline/learner_005/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/learner_005/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/learner_005/learner_005.cli b/dep/pipeline/learner_005/learner_005.cli
new file mode 100644
index 00000000..cd92f23a
--- /dev/null
+++ b/dep/pipeline/learner_005/learner_005.cli
@@ -0,0 +1,29 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/learner_005/learner_005.spec /tmp/pipeline/learner_005/learner_005.c
+pipeline libbuild /tmp/pipeline/learner_005/learner_005.c /tmp/pipeline/learner_005/learner_005.so
+
+;
+; Customize the LINK parameters to match your setup.
+;
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+;
+; PIPELINE0 setup.
+;
+
+pipeline PIPELINE0 build lib /tmp/pipeline/learner_005/learner_005.so io /tmp/pipeline/learner_005/ethdev.io numa 0
+
+;
+; Pipelines-to-threads mapping.
+;
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/learner_005/learner_005.spec b/dep/pipeline/learner_005/learner_005.spec
new file mode 100644
index 00000000..9c71dca2
--- /dev/null
+++ b/dep/pipeline/learner_005/learner_005.spec
@@ -0,0 +1,199 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+struct udp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<16> length
+ bit<16> checksum
+}
+
+struct vxlan_h {
+ bit<8> flags
+ bit<24> reserved
+ bit<24> vni
+ bit<8> reserved2
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+header outer_ethernet instanceof ethernet_h
+header outer_ipv4 instanceof ipv4_h
+header outer_udp instanceof udp_h
+header outer_vxlan instanceof vxlan_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port_in
+ bit<32> port_out
+ bit<32> timeout_id
+ bit<32> learn_005_action_01_arg
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct learn_005_action_01_args_t {
+ bit<32> port_out
+}
+
+action learn_005_action_01 args instanceof learn_005_action_01_args_t {
+ mov m.port_out t.port_out
+ rearm
+ return
+}
+
+struct learn_005_action_02_args_t {
+ bit<48> ethernet_dst_addr
+ bit<48> ethernet_src_addr
+ bit<16> ethernet_ethertype
+ bit<8> ipv4_ver_ihl
+ bit<8> ipv4_diffserv
+ bit<16> ipv4_total_len
+ bit<16> ipv4_identification
+ bit<16> ipv4_flags_offset
+ bit<8> ipv4_ttl
+ bit<8> ipv4_protocol
+ bit<16> ipv4_hdr_checksum
+ bit<32> ipv4_src_addr
+ bit<32> ipv4_dst_addr
+ bit<16> udp_src_port
+ bit<16> udp_dst_port
+ bit<16> udp_length
+ bit<16> udp_checksum
+ bit<8> vxlan_flags
+ bit<24> vxlan_reserved
+ bit<24> vxlan_vni
+ bit<8> vxlan_reserved2
+ bit<32> port_out
+}
+
+action learn_005_action_02 args instanceof learn_005_action_02_args_t {
+ //Set the outer Ethernet header.
+ validate h.outer_ethernet
+ mov h.outer_ethernet.dst_addr t.ethernet_dst_addr
+ mov h.outer_ethernet.src_addr t.ethernet_src_addr
+ mov h.outer_ethernet.ethertype t.ethernet_ethertype
+
+ //Set the outer IPv4 header.
+ validate h.outer_ipv4
+ mov h.outer_ipv4.ver_ihl t.ipv4_ver_ihl
+ mov h.outer_ipv4.diffserv t.ipv4_diffserv
+ mov h.outer_ipv4.total_len t.ipv4_total_len
+ mov h.outer_ipv4.identification t.ipv4_identification
+ mov h.outer_ipv4.flags_offset t.ipv4_flags_offset
+ mov h.outer_ipv4.ttl t.ipv4_ttl
+ mov h.outer_ipv4.protocol t.ipv4_protocol
+ mov h.outer_ipv4.hdr_checksum t.ipv4_hdr_checksum
+ mov h.outer_ipv4.src_addr t.ipv4_src_addr
+ mov h.outer_ipv4.dst_addr t.ipv4_dst_addr
+
+ //Set the outer UDP header.
+ validate h.outer_udp
+ mov h.outer_udp.src_port t.udp_src_port
+ mov h.outer_udp.dst_port t.udp_dst_port
+ mov h.outer_udp.length t.udp_length
+ mov h.outer_udp.checksum t.udp_checksum
+
+ //Set the outer VXLAN header.
+ validate h.outer_vxlan
+ mov h.outer_vxlan.flags t.vxlan_flags
+ mov h.outer_vxlan.reserved t.vxlan_reserved
+ mov h.outer_vxlan.vni t.vxlan_vni
+ mov h.outer_vxlan.reserved2 t.vxlan_reserved2
+
+ //Set the output port.
+ mov m.port_out t.port_out
+
+ //Update h.outer_ipv4.total_len field.
+ add h.outer_ipv4.total_len h.ipv4.total_len
+
+ //Update h.outer_ipv4.hdr_checksum field.
+ ckadd h.outer_ipv4.hdr_checksum h.ipv4.total_len
+
+ //Update h.outer_udp.length field.
+ add h.outer_udp.length h.ipv4.total_len
+
+ mov m.learn_005_action_01_arg m.port_in
+ mov m.timeout_id 0
+ learn learn_005_action_01 m.learn_005_action_01_arg m.timeout_id
+ return
+}
+
+struct learn_005_action_03_args_t {
+ bit<48> mac_src
+}
+
+action learn_005_action_03 args instanceof learn_005_action_03_args_t {
+ mov h.ethernet.src_addr t.mac_src
+ mov m.learn_005_action_01_arg 0x2
+ mov m.timeout_id 0
+ learn learn_005_action_01 m.learn_005_action_01_arg m.timeout_id
+ mov m.port_out m.learn_005_action_01_arg
+ return
+}
+//
+// Tables.
+//
+learner learn_005 {
+ key {
+ h.ipv4.dst_addr
+ }
+
+ actions {
+ learn_005_action_01
+ learn_005_action_02
+ learn_005_action_03
+ }
+
+ default_action learn_005_action_02 args ethernet_dst_addr 0xa0a1a2a30000 ethernet_src_addr 0xb0b1b2b30000 ethernet_ethertype 0x0800 ipv4_ver_ihl 0x45 ipv4_diffserv 0 ipv4_total_len 50 ipv4_identification 0 ipv4_flags_offset 0 ipv4_ttl 64 ipv4_protocol 17 ipv4_hdr_checksum 0xe928 ipv4_src_addr 0xc0c10000 ipv4_dst_addr 0xd0d10000 udp_src_port 0xe000 udp_dst_port 4789 udp_length 30 udp_checksum 0 vxlan_flags 0 vxlan_reserved 0 vxlan_vni 0 vxlan_reserved2 0 port_out 0
+
+ size 1048576
+
+ timeout {
+ 120
+ }
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port_in
+ extract h.ethernet
+ extract h.ipv4
+ table learn_005
+ emit h.outer_ethernet
+ emit h.outer_ipv4
+ emit h.outer_udp
+ emit h.outer_vxlan
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port_out
+}
diff --git a/dep/pipeline/learner_005/pcap_files/in_1.txt b/dep/pipeline/learner_005/pcap_files/in_1.txt
new file mode 100644
index 00000000..54a27c34
--- /dev/null
+++ b/dep/pipeline/learner_005/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 8d 64 00 00 0a c8 00
+000020 00 31 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 6b 00 00 58 58 58 58 58 58
+# Packet 1
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 8d 64 00 00 0a c8 00
+000020 00 31 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 6b 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/learner_005/pcap_files/in_2.txt b/dep/pipeline/learner_005/pcap_files/in_2.txt
new file mode 100644
index 00000000..c60a9acd
--- /dev/null
+++ b/dep/pipeline/learner_005/pcap_files/in_2.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 8d 64 00 00 0a c8 00
+000020 00 32 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 6b 00 00 58 58 58 58 58 58
+# Packet 1
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 8d 64 00 00 0a c8 00
+000020 00 32 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 6b 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/learner_005/pcap_files/out_1.txt b/dep/pipeline/learner_005/pcap_files/out_1.txt
new file mode 100644
index 00000000..389fa500
--- /dev/null
+++ b/dep/pipeline/learner_005/pcap_files/out_1.txt
@@ -0,0 +1,15 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 a0 a1 a2 a3 00 00 b0 b1 b2 b3 00 00 08 00 45 00
+000010 00 60 00 00 00 00 40 11 e8 fa c0 c1 00 00 d0 d1
+000020 00 00 e0 00 12 b5 00 4c 00 00 00 00 00 00 00 00
+000030 00 00 52 54 00 12 44 57 52 54 00 12 34 56 08 00
+000040 45 00 00 2e 00 01 00 00 40 06 4e 8d 64 00 00 0a
+000050 c8 00 00 31 00 64 00 c8 00 00 00 00 00 00 00 00
+000060 50 02 20 00 59 6b 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/learner_005/pcap_files/out_2.txt b/dep/pipeline/learner_005/pcap_files/out_2.txt
new file mode 100644
index 00000000..4581825d
--- /dev/null
+++ b/dep/pipeline/learner_005/pcap_files/out_2.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 8d 64 00 00 0a c8 00
+000020 00 31 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 6b 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/learner_005/pcap_files/out_3.txt b/dep/pipeline/learner_005/pcap_files/out_3.txt
new file mode 100644
index 00000000..fe34c031
--- /dev/null
+++ b/dep/pipeline/learner_005/pcap_files/out_3.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 12 34 56 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 8d 64 00 00 0a c8 00
+000020 00 32 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 6b 00 00 58 58 58 58 58 58
+# Packet 1
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 8d 64 00 00 0a c8 00
+000020 00 32 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 6b 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/learner_005/readme.md b/dep/pipeline/learner_005/readme.md
new file mode 100644
index 00000000..8ebc44e2
--- /dev/null
+++ b/dep/pipeline/learner_005/readme.md
@@ -0,0 +1,12 @@
+Test Case: test_learner_005
+-----------------------
+
+ Instruction being tested:
+ learner TABLE_NAME (default_action ACTION_NAME args none | ARGS_BYTE_ARRAY [ const ])
+
+ Description:
+ The testcase will verify the default action. In this testcase, default action of
+ the table is updated at runtime.
+
+ Verification:
+ Simulate the test as per the description. Behaviour should be as described.
diff --git a/dep/pipeline/learner_006/ethdev.io b/dep/pipeline/learner_006/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/learner_006/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/learner_006/learner_006.cli b/dep/pipeline/learner_006/learner_006.cli
new file mode 100644
index 00000000..8a4897ba
--- /dev/null
+++ b/dep/pipeline/learner_006/learner_006.cli
@@ -0,0 +1,7 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/learner_006/learner_006.spec /tmp/pipeline/learner_006/learner_006.c
diff --git a/dep/pipeline/learner_006/learner_006.spec b/dep/pipeline/learner_006/learner_006.spec
new file mode 100644
index 00000000..fe21b8ac
--- /dev/null
+++ b/dep/pipeline/learner_006/learner_006.spec
@@ -0,0 +1,101 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port_in
+ bit<32> port_out
+ bit<32> timeout_id
+ bit<32> learn_006_action_01_arg
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct learn_006_action_01_args_t {
+ bit<32> port_out
+}
+
+action learn_006_action_01 args instanceof learn_006_action_01_args_t {
+ mov m.port_out t.port_out
+ rearm
+ return
+}
+
+struct learn_006_action_02_args_t {
+ bit<48> src_addr
+}
+
+action learn_006_action_02 args instanceof learn_006_action_02_args_t {
+ mov m.learn_006_action_01_arg m.port_in
+ mov h.ethernet.src_addr t.src_addr
+ mov m.timeout_id 0
+ learn learn_006_action_01 m.learn_003_action_01_arg m.timeout_id
+ mov m.port_out m.port_in
+ return
+}
+
+//
+// Tables.
+//
+learner learn_006 {
+ key {
+ h.ipv4.dst_addr
+ }
+
+ actions {
+ learn_006_action_01
+
+ learn_006_action_02
+ }
+
+ default_action learn_006_action_02 args const
+
+ size 1048576
+
+ timeout {
+ 120
+ }
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port_in
+ extract h.ethernet
+ extract h.ipv4
+ table learn_006
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port_out
+}
\ No newline at end of file
diff --git a/dep/pipeline/learner_006/readme.md b/dep/pipeline/learner_006/readme.md
new file mode 100644
index 00000000..03daa859
--- /dev/null
+++ b/dep/pipeline/learner_006/readme.md
@@ -0,0 +1,12 @@
+Test Case: test_learner_006
+-----------------------
+
+ Instruction being tested:
+ learner TABLE_NAME (default_action ACTION_NAME args none | ARGS_BYTE_ARRAY [ const ])
+
+ Description:
+ The application .spec file will have incorrect default action format defination.
+ Application will validate the spec file and verify the error message.
+
+ Verification:
+ Simulate the test as per the description. Behaviour should be as described.
diff --git a/dep/pipeline/learner_007/ethdev.io b/dep/pipeline/learner_007/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/learner_007/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/learner_007/learner_007.cli b/dep/pipeline/learner_007/learner_007.cli
new file mode 100644
index 00000000..21756505
--- /dev/null
+++ b/dep/pipeline/learner_007/learner_007.cli
@@ -0,0 +1,29 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/learner_007/learner_007.spec /tmp/pipeline/learner_007/learner_007.c
+pipeline libbuild /tmp/pipeline/learner_007/learner_007.c /tmp/pipeline/learner_007/learner_007.so
+
+;
+; Customize the LINK parameters to match your setup.
+;
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+;
+; PIPELINE0 setup.
+;
+
+pipeline PIPELINE0 build lib /tmp/pipeline/learner_007/learner_007.so io /tmp/pipeline/learner_007/ethdev.io numa 0
+
+;
+; Pipelines-to-threads mapping.
+;
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/learner_007/learner_007.spec b/dep/pipeline/learner_007/learner_007.spec
new file mode 100644
index 00000000..50bb7f60
--- /dev/null
+++ b/dep/pipeline/learner_007/learner_007.spec
@@ -0,0 +1,98 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port_in
+ bit<32> port_out
+ bit<32> timeout_id
+ bit<32> learn_007_action_01_arg
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct learn_007_action_01_args_t {
+ bit<32> port_out
+}
+
+action learn_007_action_01 args instanceof learn_007_action_01_args_t {
+ mov m.port_out t.port_out
+ rearm
+ return
+}
+
+action learn_007_action_02 args none {
+ mov m.port_out 0
+ mov m.learn_007_action_01_arg 1
+ mov m.timeout_id 0
+ learn learn_007_action_01 m.learn_007_action_01_arg m.timeout_id
+ return
+}
+
+//
+// Tables.
+//
+learner learn_007 {
+ key {
+ h.ipv4.dst_addr
+ }
+
+ actions {
+ learn_007_action_01
+
+ learn_007_action_02
+ }
+
+ default_action learn_007_action_02 args none
+
+ size 1048576
+
+ timeout {
+ 30
+ 60
+ 120
+ }
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port_in
+ extract h.ethernet
+ extract h.ipv4
+ table learn_007
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port_out
+}
\ No newline at end of file
diff --git a/dep/pipeline/learner_007/pcap_files/in_1.txt b/dep/pipeline/learner_007/pcap_files/in_1.txt
new file mode 100644
index 00000000..f7bb73d5
--- /dev/null
+++ b/dep/pipeline/learner_007/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc de 00 00 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 b2 be 64 00 00 01 64 00
+000020 00 0a 00 64 00 c8 00 00 00 0f 00 00 00 0a 50 02
+000030 20 00 bd 83 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/learner_007/pcap_files/out_1.txt b/dep/pipeline/learner_007/pcap_files/out_1.txt
new file mode 100644
index 00000000..f7bb73d5
--- /dev/null
+++ b/dep/pipeline/learner_007/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc de 00 00 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 b2 be 64 00 00 01 64 00
+000020 00 0a 00 64 00 c8 00 00 00 0f 00 00 00 0a 50 02
+000030 20 00 bd 83 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/learner_007/readme.md b/dep/pipeline/learner_007/readme.md
new file mode 100644
index 00000000..5d5fb0ab
--- /dev/null
+++ b/dep/pipeline/learner_007/readme.md
@@ -0,0 +1,18 @@
+Test Case: test_learner_007
+-----------------------
+
+ Scenario being tested:
+ learn <action_name> <action_argument:optional> m.field
+
+ Description:
+ The learner table, has timeout configurations as 30,60 and 120 seconds.
+ For the first packet, the application expects a miss, a default action will
+ be taken place. The default action will add/learn entry with timeout as 30 seconds.
+ The default action will transmit packet to port 0.
+ The same packet is sent again, this time we expect the learnt action to take place.
+ The learnt action will transmit the packet to port 1.
+ The testcase waits for 30 seconds to expire the added time. The packet is sent again
+ with the expectation of a Miss and a default action course with output port as 0.
+
+ Verification:
+ The packet verification for the testcase should happen according to the description.
\ No newline at end of file
diff --git a/dep/pipeline/learner_008/ethdev.io b/dep/pipeline/learner_008/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/learner_008/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/learner_008/learner_008.cli b/dep/pipeline/learner_008/learner_008.cli
new file mode 100644
index 00000000..97e9ae1e
--- /dev/null
+++ b/dep/pipeline/learner_008/learner_008.cli
@@ -0,0 +1,29 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/learner_008/learner_008.spec /tmp/pipeline/learner_008/learner_008.c
+pipeline libbuild /tmp/pipeline/learner_008/learner_008.c /tmp/pipeline/learner_008/learner_008.so
+
+;
+; Customize the LINK parameters to match your setup.
+;
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+;
+; PIPELINE0 setup.
+;
+
+pipeline PIPELINE0 build lib /tmp/pipeline/learner_008/learner_008.so io /tmp/pipeline/learner_008/ethdev.io numa 0
+
+;
+; Pipelines-to-threads mapping.
+;
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/learner_008/learner_008.spec b/dep/pipeline/learner_008/learner_008.spec
new file mode 100644
index 00000000..abea7bc3
--- /dev/null
+++ b/dep/pipeline/learner_008/learner_008.spec
@@ -0,0 +1,99 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port_in
+ bit<32> port_out
+ bit<32> timeout_id
+ bit<32> learn_008_action_01_arg
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct learn_008_action_01_args_t {
+ bit<32> port_out
+}
+
+action learn_008_action_01 args instanceof learn_008_action_01_args_t {
+ mov m.port_out t.port_out
+ mov m.timeout_id 2
+ rearm m.timeout_id
+ return
+}
+
+action learn_008_action_02 args none {
+ mov m.port_out 0
+ mov m.learn_008_action_01_arg 1
+ mov m.timeout_id 0
+ learn learn_008_action_01 m.learn_008_action_01_arg m.timeout_id
+ return
+}
+
+//
+// Tables.
+//
+learner learn_008 {
+ key {
+ h.ipv4.dst_addr
+ }
+
+ actions {
+ learn_008_action_01
+
+ learn_008_action_02
+ }
+
+ default_action learn_008_action_02 args none
+
+ size 1048576
+
+ timeout {
+ 30
+ 60
+ 120
+ }
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port_in
+ extract h.ethernet
+ extract h.ipv4
+ table learn_008
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port_out
+}
diff --git a/dep/pipeline/learner_008/pcap_files/in_1.txt b/dep/pipeline/learner_008/pcap_files/in_1.txt
new file mode 100644
index 00000000..f7bb73d5
--- /dev/null
+++ b/dep/pipeline/learner_008/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc de 00 00 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 b2 be 64 00 00 01 64 00
+000020 00 0a 00 64 00 c8 00 00 00 0f 00 00 00 0a 50 02
+000030 20 00 bd 83 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/learner_008/pcap_files/in_2.txt b/dep/pipeline/learner_008/pcap_files/in_2.txt
new file mode 100644
index 00000000..3e7c8465
--- /dev/null
+++ b/dep/pipeline/learner_008/pcap_files/in_2.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc de 00 00 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 b2 be 64 00 00 01 64 00
+000020 00 0a 00 64 00 c8 00 00 00 0f 00 00 00 0a 50 02
+000030 20 00 bd 83 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc de 00 00 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 b2 c8 64 00 00 01 64 00
+000020 00 00 00 64 00 c8 00 00 00 0f 00 00 00 0a 50 02
+000030 20 00 bd 8d 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/learner_008/pcap_files/out_1.txt b/dep/pipeline/learner_008/pcap_files/out_1.txt
new file mode 100644
index 00000000..f7bb73d5
--- /dev/null
+++ b/dep/pipeline/learner_008/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc de 00 00 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 b2 be 64 00 00 01 64 00
+000020 00 0a 00 64 00 c8 00 00 00 0f 00 00 00 0a 50 02
+000030 20 00 bd 83 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/learner_008/pcap_files/out_21.txt b/dep/pipeline/learner_008/pcap_files/out_21.txt
new file mode 100644
index 00000000..f7bb73d5
--- /dev/null
+++ b/dep/pipeline/learner_008/pcap_files/out_21.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc de 00 00 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 b2 be 64 00 00 01 64 00
+000020 00 0a 00 64 00 c8 00 00 00 0f 00 00 00 0a 50 02
+000030 20 00 bd 83 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/learner_008/pcap_files/out_22.txt b/dep/pipeline/learner_008/pcap_files/out_22.txt
new file mode 100644
index 00000000..6ecf2b96
--- /dev/null
+++ b/dep/pipeline/learner_008/pcap_files/out_22.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc de 00 00 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 b2 c8 64 00 00 01 64 00
+000020 00 00 00 64 00 c8 00 00 00 0f 00 00 00 0a 50 02
+000030 20 00 bd 8d 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/learner_008/readme.md b/dep/pipeline/learner_008/readme.md
new file mode 100644
index 00000000..3e577339
--- /dev/null
+++ b/dep/pipeline/learner_008/readme.md
@@ -0,0 +1,23 @@
+Test Case: test_learner_008
+-----------------------
+
+ Scenario being tested:
+ learn <action_name> <action_argument:optional> m.field
+ rearm m.field
+
+ Description:
+ The learner table, has timeout configurations as 30,60 and 120 seconds.
+ For the first packet, the application expects a miss, a default action will
+ be taken place. The default action will add/learn entry with timeout as 30 seconds.
+ The default action will transmit packet to port 0.
+ The same packet is sent again, this time we expect the learnt action to take place.
+ The learn action will update the existing learnt timer with 120 seconds using 'rearm
+ m.field' instruction. The learnt action will transmit the packet to port 1.
+ The testcase waits for 60 seconds to validate the updated time.
+ Two packets, one with similar match key for which the timer was updated along with a
+ new packet is sent, with the expectations of learnt action to take place for the existing
+ packet and default action to take place for new packet, by emitting packets on output port
+ as 1 and 0 respectively.
+
+ Verification:
+ The packet verification for the testcase should happen according to the description.
\ No newline at end of file
diff --git a/dep/pipeline/learner_009/ethdev.io b/dep/pipeline/learner_009/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/learner_009/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/learner_009/learner_009.cli b/dep/pipeline/learner_009/learner_009.cli
new file mode 100644
index 00000000..7b494d65
--- /dev/null
+++ b/dep/pipeline/learner_009/learner_009.cli
@@ -0,0 +1,29 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/learner_009/learner_009.spec /tmp/pipeline/learner_009/learner_009.c
+pipeline libbuild /tmp/pipeline/learner_009/learner_009.c /tmp/pipeline/learner_009/learner_009.so
+
+;
+; Customize the LINK parameters to match your setup.
+;
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+;
+; PIPELINE0 setup.
+;
+
+pipeline PIPELINE0 build lib /tmp/pipeline/learner_009/learner_009.so io /tmp/pipeline/learner_009/ethdev.io numa 0
+
+;
+; Pipelines-to-threads mapping.
+;
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/learner_009/learner_009.spec b/dep/pipeline/learner_009/learner_009.spec
new file mode 100644
index 00000000..f5657aac
--- /dev/null
+++ b/dep/pipeline/learner_009/learner_009.spec
@@ -0,0 +1,97 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port_in
+ bit<32> port_out
+ bit<32> timeout_id
+ bit<32> learn_009_action_01_arg
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct learn_009_action_01_args_t {
+ bit<32> port_out
+}
+
+action learn_009_action_01 args instanceof learn_009_action_01_args_t {
+ mov m.port_out t.port_out
+ return
+}
+
+action learn_009_action_02 args none {
+ mov m.port_out 0
+ mov m.learn_009_action_01_arg 1
+ mov m.timeout_id 1
+ learn learn_009_action_01 m.learn_009_action_01_arg m.timeout_id
+ return
+}
+
+//
+// Tables.
+//
+learner learn_009 {
+ key {
+ h.ipv4.dst_addr
+ }
+
+ actions {
+ learn_009_action_01
+
+ learn_009_action_02
+ }
+
+ default_action learn_009_action_02 args none
+
+ size 1048576
+
+ timeout {
+ 30
+ 60
+ 120
+ }
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port_in
+ extract h.ethernet
+ extract h.ipv4
+ table learn_009
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port_out
+}
\ No newline at end of file
diff --git a/dep/pipeline/learner_009/pcap_files/in_1.txt b/dep/pipeline/learner_009/pcap_files/in_1.txt
new file mode 100644
index 00000000..f7bb73d5
--- /dev/null
+++ b/dep/pipeline/learner_009/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc de 00 00 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 b2 be 64 00 00 01 64 00
+000020 00 0a 00 64 00 c8 00 00 00 0f 00 00 00 0a 50 02
+000030 20 00 bd 83 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/learner_009/pcap_files/out_1.txt b/dep/pipeline/learner_009/pcap_files/out_1.txt
new file mode 100644
index 00000000..f7bb73d5
--- /dev/null
+++ b/dep/pipeline/learner_009/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc de 00 00 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 b2 be 64 00 00 01 64 00
+000020 00 0a 00 64 00 c8 00 00 00 0f 00 00 00 0a 50 02
+000030 20 00 bd 83 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/learner_009/readme.md b/dep/pipeline/learner_009/readme.md
new file mode 100644
index 00000000..6b32f484
--- /dev/null
+++ b/dep/pipeline/learner_009/readme.md
@@ -0,0 +1,21 @@
+Test Case: test_learner_009
+-----------------------
+
+ Scenario being tested:
+ The learnt action is not provided with rearm instuction.
+
+ Description:
+ The learner table, has timeout configurations as 30,60 and 120 seconds.
+ For the first packet, the application expects a miss, a default action will
+ be taken place. The default action will add/learn entry with timeout as 60 seconds.
+ The default action will transmit packet to port 0.
+ The testcase waits for 30 seconds time.
+ The same packet is sent again, this time we expect the learnt action to take place.
+ The learnt action will transmit the packet to port 1. Even though, the same packet is
+ hit, as Rearm instruction is not mentioned in learnt action, the expectation is the timer
+ should not be updated.
+ The testcase then waits for 40 seconds more to expire the added time. The packet is sent again
+ with the expectation of a Miss and a default action course with output port as 0.
+
+ Verification:
+ The packet verification for the testcase should happen according to the description.
\ No newline at end of file
diff --git a/dep/pipeline/learner_010/ethdev.io b/dep/pipeline/learner_010/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/learner_010/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/learner_010/learner_010.cli b/dep/pipeline/learner_010/learner_010.cli
new file mode 100644
index 00000000..546dd3d0
--- /dev/null
+++ b/dep/pipeline/learner_010/learner_010.cli
@@ -0,0 +1,29 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/learner_010/learner_010.spec /tmp/pipeline/learner_010/learner_010.c
+pipeline libbuild /tmp/pipeline/learner_010/learner_010.c /tmp/pipeline/learner_010/learner_010.so
+
+;
+; Customize the LINK parameters to match your setup.
+;
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+;
+; PIPELINE0 setup.
+;
+
+pipeline PIPELINE0 build lib /tmp/pipeline/learner_010/learner_010.so io /tmp/pipeline/learner_010/ethdev.io numa 0
+
+;
+; Pipelines-to-threads mapping.
+;
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/learner_010/learner_010.spec b/dep/pipeline/learner_010/learner_010.spec
new file mode 100644
index 00000000..3783468b
--- /dev/null
+++ b/dep/pipeline/learner_010/learner_010.spec
@@ -0,0 +1,93 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port_in
+ bit<32> port_out
+ bit<32> timeout_id
+ bit<32> learn_010_action_01_arg
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+action learn_010_action_01 args none {
+ mov m.port_out 1
+ rearm
+ return
+}
+
+action learn_010_action_02 args none {
+ mov m.port_out 0
+ mov m.timeout_id 0
+ learn learn_010_action_01 m.timeout_id
+ return
+}
+
+//
+// Tables.
+//
+learner learn_010 {
+ key {
+ h.ipv4.dst_addr
+ }
+
+ actions {
+ learn_010_action_01
+
+ learn_010_action_02
+ }
+
+ default_action learn_010_action_02 args none
+
+ size 1048576
+
+ timeout {
+ 30
+ 60
+ 120
+ }
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port_in
+ extract h.ethernet
+ extract h.ipv4
+ table learn_010
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port_out
+}
diff --git a/dep/pipeline/learner_010/pcap_files/in_1.txt b/dep/pipeline/learner_010/pcap_files/in_1.txt
new file mode 100644
index 00000000..f7bb73d5
--- /dev/null
+++ b/dep/pipeline/learner_010/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc de 00 00 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 b2 be 64 00 00 01 64 00
+000020 00 0a 00 64 00 c8 00 00 00 0f 00 00 00 0a 50 02
+000030 20 00 bd 83 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/learner_010/pcap_files/out_1.txt b/dep/pipeline/learner_010/pcap_files/out_1.txt
new file mode 100644
index 00000000..f7bb73d5
--- /dev/null
+++ b/dep/pipeline/learner_010/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc de 00 00 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 b2 be 64 00 00 01 64 00
+000020 00 0a 00 64 00 c8 00 00 00 0f 00 00 00 0a 50 02
+000030 20 00 bd 83 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/learner_010/readme.md b/dep/pipeline/learner_010/readme.md
new file mode 100644
index 00000000..6ec03b50
--- /dev/null
+++ b/dep/pipeline/learner_010/readme.md
@@ -0,0 +1,19 @@
+Test Case: test_learner_010
+-----------------------
+
+ Scenario being tested:
+ The learn action does not require action parameters.
+
+ Description:
+ The learner table, has timeout configurations as 30,60 and 120 seconds.
+ For the first packet, the application expects a miss, a default action will
+ be taken place. The default action will add/learn entry with timeout as 30 seconds.
+ The default action will transmit packet to port 0.
+ The same packet is sent again, this time we expect the learnt action to take place.
+ The learnt action will transmit the packet to port 1.
+ The testcase then waits for 30 seconds to expire the added time.
+ The packet is sent again with the expectation of a Miss and a default action course with output port as 0.
+ The same packet is sent again with the expectation of a Hit and a learnt action course with output port as 1.
+
+ Verification:
+ The packet verification for the testcase should happen according to the description.
\ No newline at end of file
diff --git a/dep/pipeline/learner_011/ethdev.io b/dep/pipeline/learner_011/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/learner_011/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/learner_011/learner_011.cli b/dep/pipeline/learner_011/learner_011.cli
new file mode 100644
index 00000000..390830a2
--- /dev/null
+++ b/dep/pipeline/learner_011/learner_011.cli
@@ -0,0 +1,30 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/learner_011/learner_011.spec /tmp/pipeline/learner_011/learner_011.c
+pipeline libbuild /tmp/pipeline/learner_011/learner_011.c /tmp/pipeline/learner_011/learner_011.so
+
+;
+; Customize the LINK parameters to match your setup.
+;
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+;
+; PIPELINE0 setup.
+;
+
+pipeline PIPELINE0 build lib /tmp/pipeline/learner_011/learner_011.so io /tmp/pipeline/learner_011/ethdev.io numa 0
+
+;
+; Pipelines-to-threads mapping.
+;
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/learner_011/learner_011.spec b/dep/pipeline/learner_011/learner_011.spec
new file mode 100644
index 00000000..84460db6
--- /dev/null
+++ b/dep/pipeline/learner_011/learner_011.spec
@@ -0,0 +1,133 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+struct tcp_t {
+ bit<16> srcPort
+ bit<16> dstPort
+ bit<32> seqNo
+ bit<32> ackNo
+ bit<8> dataOffset_res
+ bit<8> flags
+ bit<16> window
+ bit<16> checksum
+ bit<16> urgentPtr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+header tcp instanceof tcp_t
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<8> timeout_id
+ bit<32> port_out
+ bit<32> port_in
+ bit<8> ipv4_protocol
+ bit<32> ipv4_dst_addr
+ bit<16> tcp_src_port
+ bit<16> tcp_dst_port
+ bit<32> ipv4_src_addr
+ bit<32> learn_011_action_01_arg
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct learn_011_action_01_args_t {
+ bit<32> port_out
+}
+
+action learn_011_action_01 args instanceof learn_011_action_01_args_t {
+ mov m.port_out t.port_out
+ mov m.timeout_id 2
+ rearm m.timeout_id
+ return
+}
+
+action learn_011_action_02 args none {
+ mov m.port_out 0
+ mov m.learn_011_action_01_arg 1
+ mov m.timeout_id 0
+ learn learn_011_action_01 m.learn_011_action_01_arg m.timeout_id
+ return
+}
+
+//
+// Tables.
+//
+learner learn_011 {
+ key {
+ m.ipv4_src_addr
+ m.ipv4_dst_addr
+ m.ipv4_protocol
+ m.tcp_src_port
+ m.tcp_dst_port
+ }
+
+ actions {
+ learn_011_action_01
+
+ learn_011_action_02
+ }
+
+ default_action learn_011_action_02 args none
+
+ size 1048576
+
+ timeout {
+ 30
+ 60
+ 120
+ 120
+ 120
+ 120
+ 120
+ 120
+ }
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port_in
+ extract h.ethernet
+ extract h.ipv4
+ extract h.tcp
+ mov m.ipv4_src_addr h.ipv4.src_addr
+ mov m.ipv4_dst_addr h.ipv4.dst_addr
+ mov m.ipv4_protocol h.ipv4.protocol
+ mov m.tcp_src_port h.tcp.srcPort
+ mov m.tcp_dst_port h.tcp.dstPort
+ table learn_011
+ emit h.ethernet
+ emit h.ipv4
+ emit h.tcp
+ tx m.port_out
+}
diff --git a/dep/pipeline/learner_011/pcap_files/in_1.txt b/dep/pipeline/learner_011/pcap_files/in_1.txt
new file mode 100644
index 00000000..ddc0eda7
--- /dev/null
+++ b/dep/pipeline/learner_011/pcap_files/in_1.txt
@@ -0,0 +1,15 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 00 00 aa aa aa 00 1b 00 09 c5 80 08 00 45 00
+000010 00 5a 00 01 00 00 40 06 f8 87 0a 0a 0a 01 0a 0a
+000020 64 01 4e 21 27 10 00 00 00 00 00 00 00 00 50 02
+000030 20 00 e3 b4 00 00 30 30 30 30 30 30 30 30 30 30
+000040 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
+000050 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
+000060 30 30 30 30 30 30 30 30
diff --git a/dep/pipeline/learner_011/pcap_files/in_2.txt b/dep/pipeline/learner_011/pcap_files/in_2.txt
new file mode 100644
index 00000000..f252ea80
--- /dev/null
+++ b/dep/pipeline/learner_011/pcap_files/in_2.txt
@@ -0,0 +1,23 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 00 00 aa aa aa 00 1b 00 09 c5 80 08 00 45 00
+000010 00 5a 00 01 00 00 40 06 f8 87 0a 0a 0a 01 0a 0a
+000020 64 01 4e 21 27 10 00 00 00 00 00 00 00 00 50 02
+000030 20 00 e3 b4 00 00 30 30 30 30 30 30 30 30 30 30
+000040 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
+000050 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
+000060 30 30 30 30 30 30 30 30
+# Packet 1
+000000 00 00 00 aa aa aa 00 1b 00 09 c5 80 08 00 45 00
+000010 00 5a 00 01 00 00 40 06 f8 88 0a 0a 0a 01 0a 0a
+000020 64 00 4e 21 27 10 00 00 00 00 00 00 00 00 50 02
+000030 20 00 e3 b5 00 00 30 30 30 30 30 30 30 30 30 30
+000040 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
+000050 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
+000060 30 30 30 30 30 30 30 30
diff --git a/dep/pipeline/learner_011/pcap_files/out_1.txt b/dep/pipeline/learner_011/pcap_files/out_1.txt
new file mode 100644
index 00000000..ddc0eda7
--- /dev/null
+++ b/dep/pipeline/learner_011/pcap_files/out_1.txt
@@ -0,0 +1,15 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 00 00 aa aa aa 00 1b 00 09 c5 80 08 00 45 00
+000010 00 5a 00 01 00 00 40 06 f8 87 0a 0a 0a 01 0a 0a
+000020 64 01 4e 21 27 10 00 00 00 00 00 00 00 00 50 02
+000030 20 00 e3 b4 00 00 30 30 30 30 30 30 30 30 30 30
+000040 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
+000050 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
+000060 30 30 30 30 30 30 30 30
diff --git a/dep/pipeline/learner_011/pcap_files/out_21.txt b/dep/pipeline/learner_011/pcap_files/out_21.txt
new file mode 100644
index 00000000..ddc0eda7
--- /dev/null
+++ b/dep/pipeline/learner_011/pcap_files/out_21.txt
@@ -0,0 +1,15 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 00 00 aa aa aa 00 1b 00 09 c5 80 08 00 45 00
+000010 00 5a 00 01 00 00 40 06 f8 87 0a 0a 0a 01 0a 0a
+000020 64 01 4e 21 27 10 00 00 00 00 00 00 00 00 50 02
+000030 20 00 e3 b4 00 00 30 30 30 30 30 30 30 30 30 30
+000040 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
+000050 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
+000060 30 30 30 30 30 30 30 30
diff --git a/dep/pipeline/learner_011/pcap_files/out_22.txt b/dep/pipeline/learner_011/pcap_files/out_22.txt
new file mode 100644
index 00000000..5f7e0c97
--- /dev/null
+++ b/dep/pipeline/learner_011/pcap_files/out_22.txt
@@ -0,0 +1,15 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 00 00 aa aa aa 00 1b 00 09 c5 80 08 00 45 00
+000010 00 5a 00 01 00 00 40 06 f8 88 0a 0a 0a 01 0a 0a
+000020 64 00 4e 21 27 10 00 00 00 00 00 00 00 00 50 02
+000030 20 00 e3 b5 00 00 30 30 30 30 30 30 30 30 30 30
+000040 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
+000050 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30
+000060 30 30 30 30 30 30 30 30
diff --git a/dep/pipeline/learner_011/readme.md b/dep/pipeline/learner_011/readme.md
new file mode 100644
index 00000000..791e46a3
--- /dev/null
+++ b/dep/pipeline/learner_011/readme.md
@@ -0,0 +1,23 @@
+Test Case: test_learner_011
+-----------------------
+
+ Scenario being tested:
+ Testing the non-contiguous key fields for learner table.
+
+ Description:
+ The learner table has 5-tuple non-contiguous key fields mentioned in the metadata structure.
+ The learner table, has timeout configurations as 30,60 and 120 seconds.
+ For the first packet, the application expects a miss, a default action will
+ be taken place. The default action will add/learn entry with timeout as 30 seconds.
+ The default action will transmit packet to port 0.
+ The same packet is sent again, this time we expect the learnt action to take place.
+ The learn action will update the existing learnt timer with 120 seconds using 'rearm
+ m.field' instruction. The learnt action will transmit the packet to port 1.
+ The testcase waits for 60 seconds to validate the updated time.
+ Two packets, one with similar match key for which the timer was updated along with a
+ new packet is sent, with the expectations of learnt action to take place for the existing
+ packet and default action to take place for new packet, by emitting packets on output port
+ as 1 and 0 respectively.
+
+ Verification:
+ The packet verification for the testcase should happen according to the description.
diff --git a/dep/pipeline/learner_012/ethdev.io b/dep/pipeline/learner_012/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/learner_012/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/learner_012/learner_012.cli b/dep/pipeline/learner_012/learner_012.cli
new file mode 100644
index 00000000..c07df389
--- /dev/null
+++ b/dep/pipeline/learner_012/learner_012.cli
@@ -0,0 +1,18 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+pipeline codegen /tmp/pipeline/learner_012/learner_012.spec /tmp/pipeline/learner_012/learner_012.c
+pipeline libbuild /tmp/pipeline/learner_012/learner_012.c /tmp/pipeline/learner_012/learner_012.so
+
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/learner_012/learner_012.so io /tmp/pipeline/learner_012/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/learner_012/learner_012.spec b/dep/pipeline/learner_012/learner_012.spec
new file mode 100644
index 00000000..debf4a14
--- /dev/null
+++ b/dep/pipeline/learner_012/learner_012.spec
@@ -0,0 +1,164 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+// IPv4 Header
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+// UDP Header
+struct udp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<16> length
+ bit<16> checksum
+}
+
+// VXLAN Header
+struct vxlan_h {
+ bit<8> flags
+ bit<24> reserved
+ bit<24> vni
+ bit<8> reserved2
+}
+
+struct vlan_key_h {
+ bit<32> outer_ipv4_src_addr
+ bit<32> outer_ipv4_dst_addr
+ bit<16> outer_udp_src_port
+ bit<16> outer_udp_dst_port
+ bit<24> vni
+ bit<8> protocol
+ bit<32> inner_ipv4_src_addr
+ bit<32> inner_ipv4_dst_addr
+ bit<16> inner_udp_src_port
+ bit<16> inner_udp_dst_port
+}
+
+// Header instances
+header outer_ethernet instanceof ethernet_h
+header outer_ipv4 instanceof ipv4_h
+header outer_udp instanceof udp_h
+header vxlan instanceof vxlan_h
+header inner_ethernet instanceof ethernet_h
+header inner_ipv4 instanceof ipv4_h
+header inner_udp instanceof udp_h
+header vlan_key_header instanceof vlan_key_h
+
+struct metadata_t {
+ bit<32> port
+ bit<32> timeout_id
+}
+
+metadata instanceof metadata_t
+
+// Action 01: Update field in the header data
+action learner_012_action_01 args none {
+ mov h.vxlan.vni 200
+ return
+}
+
+// Action 02: Decapsulation
+action learner_012_action_02 args none {
+ mov m.timeout_id 0
+ learn learner_012_action_01 m.timeout_id
+ invalidate h.outer_ethernet
+ invalidate h.outer_ipv4
+ invalidate h.outer_udp
+ invalidate h.vxlan
+ return
+}
+
+learner learner_012 {
+
+ key {
+ h.vlan_key_header.outer_ipv4_src_addr
+ h.vlan_key_header.outer_ipv4_dst_addr
+ h.vlan_key_header.outer_udp_src_port
+ h.vlan_key_header.outer_udp_dst_port
+ h.vlan_key_header.vni
+ h.vlan_key_header.protocol
+ h.vlan_key_header.inner_ipv4_src_addr
+ h.vlan_key_header.inner_ipv4_dst_addr
+ h.vlan_key_header.inner_udp_src_port
+ h.vlan_key_header.inner_udp_dst_port
+ }
+
+ actions {
+ learner_012_action_01
+ learner_012_action_02
+ }
+
+ default_action learner_012_action_02 args none const
+ size 1048576
+ timeout {
+ 60
+ 120
+ 180
+ }
+}
+
+apply {
+ // Receive packet
+ rx m.port
+ extract h.outer_ethernet
+ // Verify if packets are arrived in correct
+ // order. If not, go to END.
+ // Ethernet -> IPv4 -> UDP -> VXLAN ->
+ // Ethernet -> IPv4 -> UDP
+ jmpneq END h.outer_ethernet.ether_type 0x0800
+ extract h.outer_ipv4
+ jmpneq END h.outer_ipv4.protocol 0x11
+ extract h.outer_udp
+ jmpneq END h.outer_udp.dst_port 4789
+ extract h.vxlan
+ extract h.inner_ethernet
+ jmpneq END h.inner_ethernet.ether_type 0x0800
+ extract h.inner_ipv4
+ jmpneq END h.inner_ipv4.protocol 0x11
+ extract h.inner_udp
+
+ // Copy the required key data fields from header
+ // into the metadata key fields.
+ mov h.vlan_key_header.outer_ipv4_src_addr h.outer_ipv4.src_addr
+ mov h.vlan_key_header.outer_ipv4_dst_addr h.outer_ipv4.dst_addr
+ mov h.vlan_key_header.outer_udp_src_port h.outer_udp.src_port
+ mov h.vlan_key_header.outer_udp_dst_port h.outer_udp.dst_port
+ mov h.vlan_key_header.vni h.vxlan.vni
+ mov h.vlan_key_header.protocol h.inner_ipv4.protocol
+ mov h.vlan_key_header.inner_ipv4_src_addr h.inner_ipv4.src_addr
+ mov h.vlan_key_header.inner_ipv4_dst_addr h.inner_ipv4.dst_addr
+ mov h.vlan_key_header.inner_udp_src_port h.inner_udp.src_port
+ mov h.vlan_key_header.inner_udp_dst_port h.inner_udp.dst_port
+
+ // Table operations
+ table learner_012
+
+ // Transmit packets
+ END : emit h.outer_ethernet
+ emit h.outer_ipv4
+ emit h.outer_udp
+ emit h.vxlan
+ emit h.inner_ethernet
+ emit h.inner_ipv4
+ emit h.inner_udp
+ tx m.port
+}
diff --git a/dep/pipeline/learner_012/pcap_files/in_1.txt b/dep/pipeline/learner_012/pcap_files/in_1.txt
new file mode 100644
index 00000000..b700ecd7
--- /dev/null
+++ b/dep/pipeline/learner_012/pcap_files/in_1.txt
@@ -0,0 +1,15 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc de 10 00 cc ee cc de 01 02 08 00 45 00
+000010 00 58 00 01 00 00 40 11 4e 92 64 00 00 01 c8 00
+000020 00 01 00 64 12 b5 00 44 53 58 0c 00 00 03 00 00
+000030 64 00 12 23 34 56 00 00 aa bb cc de 01 02 08 00
+000040 45 00 00 26 00 01 00 00 40 11 b0 c3 65 00 00 01
+000050 65 00 00 02 55 55 00 c8 00 12 25 f0 58 58 58 58
+000060 58 58 58 58 58 58
\ No newline at end of file
diff --git a/dep/pipeline/learner_012/pcap_files/out_1.txt b/dep/pipeline/learner_012/pcap_files/out_1.txt
new file mode 100644
index 00000000..26e917e0
--- /dev/null
+++ b/dep/pipeline/learner_012/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 12 23 34 56 00 00 aa bb cc de 01 02 08 00 45 00
+000010 00 26 00 01 00 00 40 11 b0 c3 65 00 00 01 65 00
+000020 00 02 55 55 00 c8 00 12 25 f0 58 58 58 58 58 58
+000030 58 58 58 58
diff --git a/dep/pipeline/learner_012/pcap_files/out_2.txt b/dep/pipeline/learner_012/pcap_files/out_2.txt
new file mode 100644
index 00000000..177a0e7c
--- /dev/null
+++ b/dep/pipeline/learner_012/pcap_files/out_2.txt
@@ -0,0 +1,15 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc de 10 00 cc ee cc de 01 02 08 00 45 00
+000010 00 58 00 01 00 00 40 11 4e 92 64 00 00 01 c8 00
+000020 00 01 00 64 12 b5 00 44 53 58 0c 00 00 03 00 00
+000030 c8 00 12 23 34 56 00 00 aa bb cc de 01 02 08 00
+000040 45 00 00 26 00 01 00 00 40 11 b0 c3 65 00 00 01
+000050 65 00 00 02 55 55 00 c8 00 12 25 f0 58 58 58 58
+000060 58 58 58 58 58 58
diff --git a/dep/pipeline/learner_012/readme.md b/dep/pipeline/learner_012/readme.md
new file mode 100644
index 00000000..23269a8c
--- /dev/null
+++ b/dep/pipeline/learner_012/readme.md
@@ -0,0 +1,15 @@
+Test Case: test_learner_012
+-----------------------
+
+ Scenario being tested:
+ Learner table with key structure type as a header, key element alignment as
+ contiguous and key size < 64 bytes.
+
+ Description:
+ The test case receives Ethernet -> IPv4 -> UDP -> VXLAN -> Ethernet -> IPv4 -> UDP
+ packet sequence as an input. The first packet will take the default action and learn
+ the respective action. The second packet is resent before the expiration of timeout,
+ executing the learnt action.
+
+ Verification:
+ The packet verification for the testcase should happen according to the description.
\ No newline at end of file
diff --git a/dep/pipeline/learner_013/ethdev.io b/dep/pipeline/learner_013/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/learner_013/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/learner_013/learner_013.cli b/dep/pipeline/learner_013/learner_013.cli
new file mode 100644
index 00000000..ba46a365
--- /dev/null
+++ b/dep/pipeline/learner_013/learner_013.cli
@@ -0,0 +1,18 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+pipeline codegen /tmp/pipeline/learner_013/learner_013.spec /tmp/pipeline/learner_013/learner_013.c
+pipeline libbuild /tmp/pipeline/learner_013/learner_013.c /tmp/pipeline/learner_013/learner_013.so
+
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/learner_013/learner_013.so io /tmp/pipeline/learner_013/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/learner_013/learner_013.spec b/dep/pipeline/learner_013/learner_013.spec
new file mode 100644
index 00000000..f72c085f
--- /dev/null
+++ b/dep/pipeline/learner_013/learner_013.spec
@@ -0,0 +1,165 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+// IPv4 Header
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+// UDP Header
+struct udp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<16> length
+ bit<16> checksum
+}
+
+// VXLAN Header
+struct vxlan_h {
+ bit<8> flags
+ bit<24> reserved
+ bit<24> vni
+ bit<8> reserved2
+}
+
+// Header instances
+header outer_ethernet instanceof ethernet_h
+header outer_ipv4 instanceof ipv4_h
+header outer_udp instanceof udp_h
+header vxlan instanceof vxlan_h
+header inner_ethernet instanceof ethernet_h
+header inner_ipv4 instanceof ipv4_h
+header inner_udp instanceof udp_h
+
+
+//
+// Packet meta-data.
+//
+
+struct metadata_t {
+ bit<32> port
+ bit<32> timeout_id
+ bit<32> outer_ipv4_src_addr
+ bit<32> outer_ipv4_dst_addr
+ bit<16> outer_udp_src_port
+ bit<16> outer_udp_dst_port
+ bit<24> vni
+ bit<8> protocol
+ bit<32> inner_ipv4_src_addr
+ bit<32> inner_ipv4_dst_addr
+ bit<16> inner_udp_src_port
+ bit<16> inner_udp_dst_port
+}
+
+metadata instanceof metadata_t
+
+// Action 01: Update field in the header data
+action learner_013_action_01 args none {
+ mov h.vxlan.vni 200
+ return
+}
+
+// Action 02: Decapsulation
+action learner_013_action_02 args none {
+ mov m.timeout_id 0
+ learn learner_013_action_01 m.timeout_id
+ invalidate h.outer_ethernet
+ invalidate h.outer_ipv4
+ invalidate h.outer_udp
+ invalidate h.vxlan
+ return
+}
+
+learner learner_013 {
+
+ key {
+ m.outer_ipv4_src_addr
+ m.outer_ipv4_dst_addr
+ m.outer_udp_src_port
+ m.outer_udp_dst_port
+ m.vni
+ m.protocol
+ m.inner_ipv4_src_addr
+ m.inner_ipv4_dst_addr
+ m.inner_udp_src_port
+ m.inner_udp_dst_port
+ }
+
+ actions {
+ learner_013_action_01
+ learner_013_action_02
+ }
+
+ default_action learner_013_action_02 args none const
+ size 1048576
+ timeout {
+ 60
+ 120
+ 180
+ }
+}
+
+apply {
+ // Receive packet
+ rx m.port
+ extract h.outer_ethernet
+ // Verify if packets are arrived in correct
+ // order. If not, go to END.
+ // Ethernet -> IPv4 -> UDP -> VXLAN ->
+ // Ethernet -> IPv4 -> UDP
+ jmpneq END h.outer_ethernet.ether_type 0x0800
+ extract h.outer_ipv4
+ jmpneq END h.outer_ipv4.protocol 0x11
+ extract h.outer_udp
+ jmpneq END h.outer_udp.dst_port 4789
+ extract h.vxlan
+ extract h.inner_ethernet
+ jmpneq END h.inner_ethernet.ether_type 0x0800
+ extract h.inner_ipv4
+ jmpneq END h.inner_ipv4.protocol 0x11
+ extract h.inner_udp
+
+ // Copy the required key data fields from header
+ // into the metadata key fields.
+ mov m.outer_ipv4_src_addr h.outer_ipv4.src_addr
+ mov m.outer_ipv4_dst_addr h.outer_ipv4.dst_addr
+ mov m.outer_udp_src_port h.outer_udp.src_port
+ mov m.outer_udp_dst_port h.outer_udp.dst_port
+ mov m.vni h.vxlan.vni
+ mov m.protocol h.inner_ipv4.protocol
+ mov m.inner_ipv4_src_addr h.inner_ipv4.src_addr
+ mov m.inner_ipv4_dst_addr h.inner_ipv4.dst_addr
+ mov m.inner_udp_src_port h.inner_udp.src_port
+ mov m.inner_udp_dst_port h.inner_udp.dst_port
+
+ // Table operations
+ table learner_013
+
+ // Transmit packets
+ END : emit h.outer_ethernet
+ emit h.outer_ipv4
+ emit h.outer_udp
+ emit h.vxlan
+ emit h.inner_ethernet
+ emit h.inner_ipv4
+ emit h.inner_udp
+ tx m.port
+}
diff --git a/dep/pipeline/learner_013/pcap_files/in_1.txt b/dep/pipeline/learner_013/pcap_files/in_1.txt
new file mode 100644
index 00000000..b700ecd7
--- /dev/null
+++ b/dep/pipeline/learner_013/pcap_files/in_1.txt
@@ -0,0 +1,15 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc de 10 00 cc ee cc de 01 02 08 00 45 00
+000010 00 58 00 01 00 00 40 11 4e 92 64 00 00 01 c8 00
+000020 00 01 00 64 12 b5 00 44 53 58 0c 00 00 03 00 00
+000030 64 00 12 23 34 56 00 00 aa bb cc de 01 02 08 00
+000040 45 00 00 26 00 01 00 00 40 11 b0 c3 65 00 00 01
+000050 65 00 00 02 55 55 00 c8 00 12 25 f0 58 58 58 58
+000060 58 58 58 58 58 58
\ No newline at end of file
diff --git a/dep/pipeline/learner_013/pcap_files/out_1.txt b/dep/pipeline/learner_013/pcap_files/out_1.txt
new file mode 100644
index 00000000..26e917e0
--- /dev/null
+++ b/dep/pipeline/learner_013/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 12 23 34 56 00 00 aa bb cc de 01 02 08 00 45 00
+000010 00 26 00 01 00 00 40 11 b0 c3 65 00 00 01 65 00
+000020 00 02 55 55 00 c8 00 12 25 f0 58 58 58 58 58 58
+000030 58 58 58 58
diff --git a/dep/pipeline/learner_013/pcap_files/out_2.txt b/dep/pipeline/learner_013/pcap_files/out_2.txt
new file mode 100644
index 00000000..177a0e7c
--- /dev/null
+++ b/dep/pipeline/learner_013/pcap_files/out_2.txt
@@ -0,0 +1,15 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc de 10 00 cc ee cc de 01 02 08 00 45 00
+000010 00 58 00 01 00 00 40 11 4e 92 64 00 00 01 c8 00
+000020 00 01 00 64 12 b5 00 44 53 58 0c 00 00 03 00 00
+000030 c8 00 12 23 34 56 00 00 aa bb cc de 01 02 08 00
+000040 45 00 00 26 00 01 00 00 40 11 b0 c3 65 00 00 01
+000050 65 00 00 02 55 55 00 c8 00 12 25 f0 58 58 58 58
+000060 58 58 58 58 58 58
diff --git a/dep/pipeline/learner_013/readme.md b/dep/pipeline/learner_013/readme.md
new file mode 100644
index 00000000..c8254082
--- /dev/null
+++ b/dep/pipeline/learner_013/readme.md
@@ -0,0 +1,15 @@
+Test Case: test_learner_013
+-----------------------
+
+ Scenario being tested:
+ Learner table with key structure type as a metadata, key element alignment as
+ contiguous and key size < 64 bytes.
+
+ Description:
+ The test case receives Ethernet -> IPv4 -> UDP -> VXLAN -> Ethernet -> IPv4 -> UDP
+ packet sequence as an input. The first packet will take the default action and learn
+ the respective action. The second packet is resent before the expiration of timeout,
+ executing the learnt action.
+
+ Verification:
+ The packet verification for the testcase should happen according to the description.
\ No newline at end of file
diff --git a/dep/pipeline/learner_014/ethdev.io b/dep/pipeline/learner_014/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/learner_014/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/learner_014/learner_014.cli b/dep/pipeline/learner_014/learner_014.cli
new file mode 100644
index 00000000..e9df82e0
--- /dev/null
+++ b/dep/pipeline/learner_014/learner_014.cli
@@ -0,0 +1,18 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+pipeline codegen /tmp/pipeline/learner_014/learner_014.spec /tmp/pipeline/learner_014/learner_014.c
+pipeline libbuild /tmp/pipeline/learner_014/learner_014.c /tmp/pipeline/learner_014/learner_014.so
+
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/learner_014/learner_014.so io /tmp/pipeline/learner_014/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/learner_014/learner_014.spec b/dep/pipeline/learner_014/learner_014.spec
new file mode 100644
index 00000000..a9c9e4c1
--- /dev/null
+++ b/dep/pipeline/learner_014/learner_014.spec
@@ -0,0 +1,160 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+// IPv6 Header
+struct ipv6_h {
+ bit<32> ver_tc_label
+ bit<16> payload_length
+ bit<8> next_header
+ bit<8> hop_limit
+ bit<128> src_addr
+ bit<128> dst_addr
+}
+
+// UDP Header
+struct udp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<16> length
+ bit<16> checksum
+}
+
+// VXLAN Header
+struct vxlan_h {
+ bit<8> flags
+ bit<24> reserved
+ bit<24> vni
+ bit<8> reserved2
+}
+
+struct vlan_key_h {
+ bit<128> outer_ipv6_src_addr
+ bit<128> outer_ipv6_dst_addr
+ bit<16> outer_udp_src_port
+ bit<16> outer_udp_dst_port
+ bit<24> vni
+ bit<8> next_header
+ bit<128> inner_ipv6_src_addr
+ bit<128> inner_ipv6_dst_addr
+ bit<16> inner_udp_src_port
+ bit<16> inner_udp_dst_port
+}
+
+// Header instances
+header outer_ethernet instanceof ethernet_h
+header outer_ipv6 instanceof ipv6_h
+header outer_udp instanceof udp_h
+header vxlan instanceof vxlan_h
+header inner_ethernet instanceof ethernet_h
+header inner_ipv6 instanceof ipv6_h
+header inner_udp instanceof udp_h
+header vlan_key_header instanceof vlan_key_h
+
+struct metadata_t {
+ bit<32> port
+ bit<32> timeout_id
+}
+
+metadata instanceof metadata_t
+
+// Action 01: Update field in the header data
+action learner_014_action_01 args none {
+ mov h.vxlan.vni 200
+ return
+}
+
+// Action 02: Decapsulation
+action learner_014_action_02 args none {
+ mov m.timeout_id 0
+ learn learner_014_action_01 m.timeout_id
+ invalidate h.outer_ethernet
+ invalidate h.outer_ipv6
+ invalidate h.outer_udp
+ invalidate h.vxlan
+ return
+}
+
+learner learner_014 {
+
+ key {
+ h.vlan_key_header.outer_ipv6_src_addr
+ h.vlan_key_header.outer_ipv6_dst_addr
+ h.vlan_key_header.outer_udp_src_port
+ h.vlan_key_header.outer_udp_dst_port
+ h.vlan_key_header.vni
+ h.vlan_key_header.next_header
+ h.vlan_key_header.inner_ipv6_src_addr
+ h.vlan_key_header.inner_ipv6_dst_addr
+ h.vlan_key_header.inner_udp_src_port
+ h.vlan_key_header.inner_udp_dst_port
+ }
+
+ actions {
+ learner_014_action_01
+ learner_014_action_02
+ }
+
+ default_action learner_014_action_02 args none const
+ size 1048576
+ timeout {
+ 60
+ 120
+ 180
+ }
+}
+
+apply {
+ // Receive packet
+ rx m.port
+ extract h.outer_ethernet
+ // Verify if packets are arrived in correct
+ // order. If not, go to END.
+ // Ethernet -> IPv6 -> UDP -> VXLAN ->
+ // Ethernet -> IPv6 -> UDP
+ jmpneq END h.outer_ethernet.ether_type 0x86dd
+ extract h.outer_ipv6
+ jmpneq END h.outer_ipv6.next_header 0x11
+ extract h.outer_udp
+ jmpneq END h.outer_udp.dst_port 4789
+ extract h.vxlan
+ extract h.inner_ethernet
+ jmpneq END h.inner_ethernet.ether_type 0x86dd
+ extract h.inner_ipv6
+ jmpneq END h.inner_ipv6.next_header 0x11
+ extract h.inner_udp
+
+ // Copy the required key data fields from header
+ // into the metadata key fields.
+ mov h.vlan_key_header.outer_ipv6_src_addr h.outer_ipv6.src_addr
+ mov h.vlan_key_header.outer_ipv6_dst_addr h.outer_ipv6.dst_addr
+ mov h.vlan_key_header.outer_udp_src_port h.outer_udp.src_port
+ mov h.vlan_key_header.outer_udp_dst_port h.outer_udp.dst_port
+ mov h.vlan_key_header.vni h.vxlan.vni
+ mov h.vlan_key_header.next_header h.inner_ipv6.next_header
+ mov h.vlan_key_header.inner_ipv6_src_addr h.inner_ipv6.src_addr
+ mov h.vlan_key_header.inner_ipv6_dst_addr h.inner_ipv6.dst_addr
+ mov h.vlan_key_header.inner_udp_src_port h.inner_udp.src_port
+ mov h.vlan_key_header.inner_udp_dst_port h.inner_udp.dst_port
+
+ // Table operations
+ table learner_014
+
+ // Transmit packets
+ END : emit h.outer_ethernet
+ emit h.outer_ipv6
+ emit h.outer_udp
+ emit h.vxlan
+ emit h.inner_ethernet
+ emit h.inner_ipv6
+ emit h.inner_udp
+ tx m.port
+}
diff --git a/dep/pipeline/learner_014/pcap_files/in_1.txt b/dep/pipeline/learner_014/pcap_files/in_1.txt
new file mode 100644
index 00000000..2afb50c7
--- /dev/null
+++ b/dep/pipeline/learner_014/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc de 00 00 cc ee cc de 11 22 86 dd 60 00
+000010 00 00 00 58 11 40 40 00 00 00 00 00 00 00 00 00
+000020 00 00 00 00 00 01 50 00 00 00 00 00 00 00 00 00
+000030 00 00 00 00 00 01 00 64 12 b5 00 58 31 fc 0c 00
+000040 00 03 00 00 64 00 12 23 34 56 00 02 aa bb cc de
+000050 04 01 86 dd 60 00 00 00 00 12 11 40 20 00 00 00
+000060 00 00 00 00 00 00 00 00 00 00 01 00 20 00 00 00
+000070 00 00 00 00 00 00 00 00 00 00 01 01 55 55 00 c8
+000080 00 12 ad f2 58 58 58 58 58 58 58 58 58 58
\ No newline at end of file
diff --git a/dep/pipeline/learner_014/pcap_files/out_1.txt b/dep/pipeline/learner_014/pcap_files/out_1.txt
new file mode 100644
index 00000000..7acc6b25
--- /dev/null
+++ b/dep/pipeline/learner_014/pcap_files/out_1.txt
@@ -0,0 +1,13 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 12 23 34 56 00 02 aa bb cc de 04 01 86 dd 60 00
+000010 00 00 00 12 11 40 20 00 00 00 00 00 00 00 00 00
+000020 00 00 00 00 01 00 20 00 00 00 00 00 00 00 00 00
+000030 00 00 00 00 01 01 55 55 00 c8 00 12 ad f2 58 58
+000040 58 58 58 58 58 58 58 58
diff --git a/dep/pipeline/learner_014/pcap_files/out_2.txt b/dep/pipeline/learner_014/pcap_files/out_2.txt
new file mode 100644
index 00000000..cd29cf06
--- /dev/null
+++ b/dep/pipeline/learner_014/pcap_files/out_2.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc de 00 00 cc ee cc de 11 22 86 dd 60 00
+000010 00 00 00 58 11 40 40 00 00 00 00 00 00 00 00 00
+000020 00 00 00 00 00 01 50 00 00 00 00 00 00 00 00 00
+000030 00 00 00 00 00 01 00 64 12 b5 00 58 31 fc 0c 00
+000040 00 03 00 00 c8 00 12 23 34 56 00 02 aa bb cc de
+000050 04 01 86 dd 60 00 00 00 00 12 11 40 20 00 00 00
+000060 00 00 00 00 00 00 00 00 00 00 01 00 20 00 00 00
+000070 00 00 00 00 00 00 00 00 00 00 01 01 55 55 00 c8
+000080 00 12 ad f2 58 58 58 58 58 58 58 58 58 58
diff --git a/dep/pipeline/learner_014/readme.md b/dep/pipeline/learner_014/readme.md
new file mode 100644
index 00000000..5e7af4ad
--- /dev/null
+++ b/dep/pipeline/learner_014/readme.md
@@ -0,0 +1,15 @@
+Test Case: test_learner_014
+-----------------------
+
+ Scenario being tested:
+ Learner table with key structure type as a header, key element alignment as
+ contiguous and key size > 64 bytes.
+
+ Description:
+ The test case receives Ethernet -> IPv6 -> UDP -> VXLAN -> Ethernet -> IPv6 -> UDP
+ packet sequence as an input. The first packet will take the default action and learn
+ the respective action. The second packet is resent before the expiration of timeout,
+ executing the learnt action.
+
+ Verification:
+ The packet verification for the testcase should happen according to the description.
\ No newline at end of file
diff --git a/dep/pipeline/learner_015/ethdev.io b/dep/pipeline/learner_015/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/learner_015/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/learner_015/learner_015.cli b/dep/pipeline/learner_015/learner_015.cli
new file mode 100644
index 00000000..c13eab53
--- /dev/null
+++ b/dep/pipeline/learner_015/learner_015.cli
@@ -0,0 +1,18 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+pipeline codegen /tmp/pipeline/learner_015/learner_015.spec /tmp/pipeline/learner_015/learner_015.c
+pipeline libbuild /tmp/pipeline/learner_015/learner_015.c /tmp/pipeline/learner_015/learner_015.so
+
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/learner_015/learner_015.so io /tmp/pipeline/learner_015/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/learner_015/learner_015.spec b/dep/pipeline/learner_015/learner_015.spec
new file mode 100644
index 00000000..32278eae
--- /dev/null
+++ b/dep/pipeline/learner_015/learner_015.spec
@@ -0,0 +1,161 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+// IPv6 Header
+struct ipv6_h {
+ bit<32> ver_tc_label
+ bit<16> payload_length
+ bit<8> next_header
+ bit<8> hop_limit
+ bit<128> src_addr
+ bit<128> dst_addr
+}
+
+// UDP Header
+struct udp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<16> length
+ bit<16> checksum
+}
+
+// VXLAN Header
+struct vxlan_h {
+ bit<8> flags
+ bit<24> reserved
+ bit<24> vni
+ bit<8> reserved2
+}
+
+// Header instances
+header outer_ethernet instanceof ethernet_h
+header outer_ipv6 instanceof ipv6_h
+header outer_udp instanceof udp_h
+header vxlan instanceof vxlan_h
+header inner_ethernet instanceof ethernet_h
+header inner_ipv6 instanceof ipv6_h
+header inner_udp instanceof udp_h
+
+
+//
+// Packet meta-data.
+//
+
+struct metadata_t {
+ bit<32> port
+ bit<32> timeout_id
+ bit<128> outer_ipv6_src_addr
+ bit<128> outer_ipv6_dst_addr
+ bit<16> outer_udp_src_port
+ bit<16> outer_udp_dst_port
+ bit<24> vni
+ bit<8> next_header
+ bit<128> inner_ipv6_src_addr
+ bit<128> inner_ipv6_dst_addr
+ bit<16> inner_udp_src_port
+ bit<16> inner_udp_dst_port
+}
+
+metadata instanceof metadata_t
+
+// Action 01: Update field in the header data
+action learner_015_action_01 args none {
+ mov h.vxlan.vni 200
+ return
+}
+
+// Action 02: Decapsulation
+action learner_015_action_02 args none {
+ mov m.timeout_id 0
+ learn learner_015_action_01 m.timeout_id
+ invalidate h.outer_ethernet
+ invalidate h.outer_ipv6
+ invalidate h.outer_udp
+ invalidate h.vxlan
+ return
+}
+
+learner learner_015 {
+
+ key {
+ m.outer_ipv6_src_addr
+ m.outer_ipv6_dst_addr
+ m.outer_udp_src_port
+ m.outer_udp_dst_port
+ m.vni
+ m.next_header
+ m.inner_ipv6_src_addr
+ m.inner_ipv6_dst_addr
+ m.inner_udp_src_port
+ m.inner_udp_dst_port
+ }
+
+ actions {
+ learner_015_action_01
+ learner_015_action_02
+ }
+
+ default_action learner_015_action_02 args none const
+ size 1048576
+ timeout {
+ 60
+ 120
+ 180
+ }
+}
+
+apply {
+ // Receive packet
+ rx m.port
+ extract h.outer_ethernet
+ // Verify if packets are arrived in correct
+ // order. If not, go to END.
+ // Ethernet -> IPv6 -> UDP -> VXLAN ->
+ // Ethernet -> IPv6 -> UDP
+ jmpneq END h.outer_ethernet.ether_type 0x86dd
+ extract h.outer_ipv6
+ jmpneq END h.outer_ipv6.next_header 0x11
+ extract h.outer_udp
+ jmpneq END h.outer_udp.dst_port 4789
+ extract h.vxlan
+ extract h.inner_ethernet
+ jmpneq END h.inner_ethernet.ether_type 0x86dd
+ extract h.inner_ipv6
+ jmpneq END h.inner_ipv6.next_header 0x11
+ extract h.inner_udp
+
+ // Copy the required key data fields from header
+ // into the metadata key fields.
+ mov m.outer_ipv6_src_addr h.outer_ipv6.src_addr
+ mov m.outer_ipv6_dst_addr h.outer_ipv6.dst_addr
+ mov m.outer_udp_src_port h.outer_udp.src_port
+ mov m.outer_udp_dst_port h.outer_udp.dst_port
+ mov m.vni h.vxlan.vni
+ mov m.next_header h.inner_ipv6.next_header
+ mov m.inner_ipv6_src_addr h.inner_ipv6.src_addr
+ mov m.inner_ipv6_dst_addr h.inner_ipv6.dst_addr
+ mov m.inner_udp_src_port h.inner_udp.src_port
+ mov m.inner_udp_dst_port h.inner_udp.dst_port
+
+ // Table operations
+ table learner_015
+
+ // Transmit packets
+ END : emit h.outer_ethernet
+ emit h.outer_ipv6
+ emit h.outer_udp
+ emit h.vxlan
+ emit h.inner_ethernet
+ emit h.inner_ipv6
+ emit h.inner_udp
+ tx m.port
+}
diff --git a/dep/pipeline/learner_015/pcap_files/in_1.txt b/dep/pipeline/learner_015/pcap_files/in_1.txt
new file mode 100644
index 00000000..ff506db8
--- /dev/null
+++ b/dep/pipeline/learner_015/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc de 00 00 cc ee cc de 11 22 86 dd 60 00
+000010 00 00 00 58 11 40 40 00 00 00 00 00 00 00 00 00
+000020 00 00 00 00 00 01 50 00 00 00 00 00 00 00 00 00
+000030 00 00 00 00 00 01 00 64 12 b5 00 58 31 fc 0c 00
+000040 00 03 00 00 64 00 12 23 34 56 00 02 aa bb cc de
+000050 04 01 86 dd 60 00 00 00 00 12 11 40 20 00 00 00
+000060 00 00 00 00 00 00 00 00 00 00 01 00 20 00 00 00
+000070 00 00 00 00 00 00 00 00 00 00 01 01 55 55 00 c8
+000080 00 12 ad f2 58 58 58 58 58 58 58 58 58 58
diff --git a/dep/pipeline/learner_015/pcap_files/out_1.txt b/dep/pipeline/learner_015/pcap_files/out_1.txt
new file mode 100644
index 00000000..7acc6b25
--- /dev/null
+++ b/dep/pipeline/learner_015/pcap_files/out_1.txt
@@ -0,0 +1,13 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 12 23 34 56 00 02 aa bb cc de 04 01 86 dd 60 00
+000010 00 00 00 12 11 40 20 00 00 00 00 00 00 00 00 00
+000020 00 00 00 00 01 00 20 00 00 00 00 00 00 00 00 00
+000030 00 00 00 00 01 01 55 55 00 c8 00 12 ad f2 58 58
+000040 58 58 58 58 58 58 58 58
diff --git a/dep/pipeline/learner_015/pcap_files/out_2.txt b/dep/pipeline/learner_015/pcap_files/out_2.txt
new file mode 100644
index 00000000..cd29cf06
--- /dev/null
+++ b/dep/pipeline/learner_015/pcap_files/out_2.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc de 00 00 cc ee cc de 11 22 86 dd 60 00
+000010 00 00 00 58 11 40 40 00 00 00 00 00 00 00 00 00
+000020 00 00 00 00 00 01 50 00 00 00 00 00 00 00 00 00
+000030 00 00 00 00 00 01 00 64 12 b5 00 58 31 fc 0c 00
+000040 00 03 00 00 c8 00 12 23 34 56 00 02 aa bb cc de
+000050 04 01 86 dd 60 00 00 00 00 12 11 40 20 00 00 00
+000060 00 00 00 00 00 00 00 00 00 00 01 00 20 00 00 00
+000070 00 00 00 00 00 00 00 00 00 00 01 01 55 55 00 c8
+000080 00 12 ad f2 58 58 58 58 58 58 58 58 58 58
diff --git a/dep/pipeline/learner_015/readme.md b/dep/pipeline/learner_015/readme.md
new file mode 100644
index 00000000..bfe87947
--- /dev/null
+++ b/dep/pipeline/learner_015/readme.md
@@ -0,0 +1,15 @@
+Test Case: test_learner_015
+-----------------------
+
+ Scenario being tested:
+ Learner table with key structure type as a metadata, key element alignment as
+ contiguous and key size > 64 bytes.
+
+ Description:
+ The test case receives Ethernet -> IPv6 -> UDP -> VXLAN -> Ethernet -> IPv6 -> UDP
+ packet sequence as an input. The first packet will take the default action and learn
+ the respective action. The second packet is resent before the expiration of timeout,
+ executing the learnt action.
+
+ Verification:
+ The packet verification for the testcase should happen according to the description.
\ No newline at end of file
diff --git a/dep/pipeline/learner_016/ethdev.io b/dep/pipeline/learner_016/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/learner_016/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/learner_016/learner_016.cli b/dep/pipeline/learner_016/learner_016.cli
new file mode 100644
index 00000000..91d0e9ac
--- /dev/null
+++ b/dep/pipeline/learner_016/learner_016.cli
@@ -0,0 +1,4 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+pipeline codegen /tmp/pipeline/learner_016/learner_016.spec /tmp/pipeline/learner_016/learner_016.c
diff --git a/dep/pipeline/learner_016/learner_016.spec b/dep/pipeline/learner_016/learner_016.spec
new file mode 100644
index 00000000..ce825778
--- /dev/null
+++ b/dep/pipeline/learner_016/learner_016.spec
@@ -0,0 +1,160 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+// IPv4 Header
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+// UDP Header
+struct udp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<16> length
+ bit<16> checksum
+}
+
+// VXLAN Header
+struct vxlan_h {
+ bit<8> flags
+ bit<24> reserved
+ bit<24> vni
+ bit<8> reserved2
+}
+
+struct vlan_key_h {
+ bit<32> outer_ipv4_src_addr
+ bit<32> outer_ipv4_dst_addr
+ bit<16> outer_udp_src_port
+ bit<16> outer_udp_dst_port
+ bit<24> vni
+ bit<8> protocol
+ bit<32> inner_ipv4_src_addr
+ bit<32> inner_ipv4_dst_addr
+ bit<16> inner_udp_src_port
+ bit<16> inner_udp_dst_port
+}
+
+// Header instances
+header outer_ethernet instanceof ethernet_h
+header outer_ipv4 instanceof ipv4_h
+header outer_udp instanceof udp_h
+header vxlan instanceof vxlan_h
+header inner_ethernet instanceof ethernet_h
+header inner_ipv4 instanceof ipv4_h
+header inner_udp instanceof udp_h
+header vlan_key_header instanceof vlan_key_h
+
+struct metadata_t {
+ bit<32> port
+ bit<32> timeout_id
+}
+
+metadata instanceof metadata_t
+
+// Action 01: Update field in the header data
+action learner_016_action_01 args none {
+ mov h.vxlan.vni 200
+ return
+}
+
+// Action 02: Decapsulation
+action learner_016_action_02 args none {
+ mov m.timeout_id 0
+ learn learner_016_action_01 m.timeout_id
+ invalidate h.outer_ethernet
+ invalidate h.outer_ipv4
+ invalidate h.outer_udp
+ invalidate h.vxlan
+ return
+}
+
+learner learner_016 {
+
+ key {
+ h.vlan_key_header.outer_ipv4_src_addr
+ h.vlan_key_header.outer_ipv4_dst_addr
+ h.vlan_key_header.vni
+ h.vlan_key_header.protocol
+ h.vlan_key_header.inner_ipv4_src_addr
+ h.vlan_key_header.inner_ipv4_dst_addr
+ h.vlan_key_header.inner_udp_src_port
+ h.vlan_key_header.inner_udp_dst_port
+ }
+
+ actions {
+ learner_016_action_01
+ learner_016_action_02
+ }
+
+ default_action learner_016_action_02 args none const
+ size 1048576
+ timeout {
+ 60
+ 120
+ 180
+ }
+}
+
+apply {
+ // Receive packet
+ rx m.port
+ extract h.outer_ethernet
+ // Verify if packets are arrived in correct
+ // order. If not, go to END.
+ // Ethernet -> IPv4 -> UDP -> VXLAN ->
+ // Ethernet -> IPv4 -> UDP
+ jmpneq END h.outer_ethernet.ether_type 0x0800
+ extract h.outer_ipv4
+ jmpneq END h.outer_ipv4.protocol 0x11
+ extract h.outer_udp
+ jmpneq END h.outer_udp.dst_port 4789
+ extract h.vxlan
+ extract h.inner_ethernet
+ jmpneq END h.inner_ethernet.ether_type 0x0800
+ extract h.inner_ipv4
+ jmpneq END h.inner_ipv4.protocol 0x11
+ extract h.inner_udp
+
+ // Copy the required key data fields from header
+ // into the metadata key fields.
+ mov h.vlan_key_header.outer_ipv4_src_addr h.outer_ipv4.src_addr
+ mov h.vlan_key_header.outer_ipv4_dst_addr h.outer_ipv4.dst_addr
+ mov h.vlan_key_header.vni h.vxlan.vni
+ mov h.vlan_key_header.protocol h.inner_ipv4.protocol
+ mov h.vlan_key_header.inner_ipv4_src_addr h.inner_ipv4.src_addr
+ mov h.vlan_key_header.inner_ipv4_dst_addr h.inner_ipv4.dst_addr
+ mov h.vlan_key_header.inner_udp_src_port h.inner_udp.src_port
+ mov h.vlan_key_header.inner_udp_dst_port h.inner_udp.dst_port
+
+ // Table operations
+ table learner_016
+
+ // Transmit packets
+ END : emit h.outer_ethernet
+ emit h.outer_ipv4
+ emit h.outer_udp
+ emit h.vxlan
+ emit h.inner_ethernet
+ emit h.inner_ipv4
+ emit h.inner_udp
+ tx m.port
+}
diff --git a/dep/pipeline/learner_016/readme.md b/dep/pipeline/learner_016/readme.md
new file mode 100644
index 00000000..74a58c35
--- /dev/null
+++ b/dep/pipeline/learner_016/readme.md
@@ -0,0 +1,14 @@
+Test Case: test_learner_016
+-----------------------
+
+ Scenario being tested:
+ Learner table with key structure type as a header, key element alignment as
+ non-contiguous and key size < 64 bytes.
+
+ Description:
+ The test case is a error-validation scenario. The application should throw a
+ 'Learner table configuration error' as non-contiguous key alignment in Learner
+ table is a non-valid scenario.
+
+ Verification:
+ The application should throw an error mentioned in the description.
\ No newline at end of file
diff --git a/dep/pipeline/learner_017/ethdev.io b/dep/pipeline/learner_017/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/learner_017/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/learner_017/learner_017.cli b/dep/pipeline/learner_017/learner_017.cli
new file mode 100644
index 00000000..6af327a9
--- /dev/null
+++ b/dep/pipeline/learner_017/learner_017.cli
@@ -0,0 +1,4 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+pipeline codegen /tmp/pipeline/learner_017/learner_017.spec /tmp/pipeline/learner_017/learner_017.c
diff --git a/dep/pipeline/learner_017/learner_017.spec b/dep/pipeline/learner_017/learner_017.spec
new file mode 100644
index 00000000..7b58e721
--- /dev/null
+++ b/dep/pipeline/learner_017/learner_017.spec
@@ -0,0 +1,163 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+// IPv4 Header
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+// UDP Header
+struct udp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<16> length
+ bit<16> checksum
+}
+
+// VXLAN Header
+struct vxlan_h {
+ bit<8> flags
+ bit<24> reserved
+ bit<24> vni
+ bit<8> reserved2
+}
+
+// Header instances
+header outer_ethernet instanceof ethernet_h
+header outer_ipv4 instanceof ipv4_h
+header outer_udp instanceof udp_h
+header vxlan instanceof vxlan_h
+header inner_ethernet instanceof ethernet_h
+header inner_ipv4 instanceof ipv4_h
+header inner_udp instanceof udp_h
+
+
+//
+// Packet meta-data.
+//
+
+struct metadata_t {
+ bit<32> port
+ bit<32> timeout_id
+ bit<32> outer_ipv4_src_addr
+ bit<32> outer_ipv4_dst_addr
+ bit<16> outer_udp_src_port
+ bit<16> outer_udp_dst_port
+ bit<24> vni
+ bit<8> protocol
+ bit<32> inner_ipv4_src_addr
+ bit<32> inner_ipv4_dst_addr
+ bit<16> inner_udp_src_port
+ bit<16> inner_udp_dst_port
+}
+
+metadata instanceof metadata_t
+
+// Action 01: Update field in the header data
+action learner_017_action_01 args none {
+ mov h.vxlan.vni 200
+ return
+}
+
+// Action 02: Decapsulation
+action learner_017_action_02 args none {
+ mov m.timeout_id 0
+ learn learner_017_action_01 m.timeout_id
+ invalidate h.outer_ethernet
+ invalidate h.outer_ipv4
+ invalidate h.outer_udp
+ invalidate h.vxlan
+ return
+}
+
+learner learner_017 {
+
+ key {
+ m.outer_ipv4_src_addr
+ m.outer_ipv4_dst_addr
+ m.vni
+ m.protocol
+ m.inner_ipv4_src_addr
+ m.inner_ipv4_dst_addr
+ m.inner_udp_src_port
+ m.inner_udp_dst_port
+ }
+
+ actions {
+ learner_017_action_01
+ learner_017_action_02
+ }
+
+ default_action learner_017_action_02 args none const
+ size 1048576
+ timeout {
+ 60
+ 120
+ 180
+ }
+}
+
+apply {
+ // Receive packet
+ rx m.port
+ extract h.outer_ethernet
+ // Verify if packets are arrived in correct
+ // order. If not, go to END.
+ // Ethernet -> IPv4 -> UDP -> VXLAN ->
+ // Ethernet -> IPv4 -> UDP
+ jmpneq END h.outer_ethernet.ether_type 0x0800
+ extract h.outer_ipv4
+ jmpneq END h.outer_ipv4.protocol 0x11
+ extract h.outer_udp
+ jmpneq END h.outer_udp.dst_port 4789
+ extract h.vxlan
+ extract h.inner_ethernet
+ jmpneq END h.inner_ethernet.ether_type 0x0800
+ extract h.inner_ipv4
+ jmpneq END h.inner_ipv4.protocol 0x11
+ extract h.inner_udp
+
+ // Copy the required key data fields from header
+ // into the metadata key fields.
+ mov m.outer_ipv4_src_addr h.outer_ipv4.src_addr
+ mov m.outer_ipv4_dst_addr h.outer_ipv4.dst_addr
+ mov m.outer_udp_src_port h.outer_udp.src_port
+ mov m.outer_udp_dst_port h.outer_udp.dst_port
+ mov m.vni h.vxlan.vni
+ mov m.protocol h.inner_ipv4.protocol
+ mov m.inner_ipv4_src_addr h.inner_ipv4.src_addr
+ mov m.inner_ipv4_dst_addr h.inner_ipv4.dst_addr
+ mov m.inner_udp_src_port h.inner_udp.src_port
+ mov m.inner_udp_dst_port h.inner_udp.dst_port
+
+ // Table operations
+ table learner_017
+
+ // Transmit packets
+ END : emit h.outer_ethernet
+ emit h.outer_ipv4
+ emit h.outer_udp
+ emit h.vxlan
+ emit h.inner_ethernet
+ emit h.inner_ipv4
+ emit h.inner_udp
+ tx m.port
+}
diff --git a/dep/pipeline/learner_017/readme.md b/dep/pipeline/learner_017/readme.md
new file mode 100644
index 00000000..8547ac87
--- /dev/null
+++ b/dep/pipeline/learner_017/readme.md
@@ -0,0 +1,14 @@
+Test Case: test_learner_017
+-----------------------
+
+ Scenario being tested:
+ Learner table with key structure type as a metadata, key element alignment as
+ non-contiguous and key size < 64 bytes.
+
+ Description:
+ The test case is a error-validation scenario. The application should throw a
+ 'Learner table configuration error' as non-contiguous key alignment in Learner
+ table is a non-valid scenario.
+
+ Verification:
+ The application should throw an error mentioned in the description.
\ No newline at end of file
diff --git a/dep/pipeline/learner_018/ethdev.io b/dep/pipeline/learner_018/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/learner_018/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/learner_018/learner_018.cli b/dep/pipeline/learner_018/learner_018.cli
new file mode 100644
index 00000000..54f771bc
--- /dev/null
+++ b/dep/pipeline/learner_018/learner_018.cli
@@ -0,0 +1,4 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+pipeline codegen /tmp/pipeline/learner_018/learner_018.spec /tmp/pipeline/learner_018/learner_018.c
diff --git a/dep/pipeline/learner_018/learner_018.spec b/dep/pipeline/learner_018/learner_018.spec
new file mode 100644
index 00000000..428324a0
--- /dev/null
+++ b/dep/pipeline/learner_018/learner_018.spec
@@ -0,0 +1,156 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+// IPv6 Header
+struct ipv6_h {
+ bit<32> ver_tc_label
+ bit<16> payload_length
+ bit<8> next_header
+ bit<8> hop_limit
+ bit<128> src_addr
+ bit<128> dst_addr
+}
+
+// UDP Header
+struct udp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<16> length
+ bit<16> checksum
+}
+
+// VXLAN Header
+struct vxlan_h {
+ bit<8> flags
+ bit<24> reserved
+ bit<24> vni
+ bit<8> reserved2
+}
+
+struct vlan_key_h {
+ bit<128> outer_ipv6_src_addr
+ bit<128> outer_ipv6_dst_addr
+ bit<16> outer_udp_src_port
+ bit<16> outer_udp_dst_port
+ bit<24> vni
+ bit<8> next_header
+ bit<128> inner_ipv6_src_addr
+ bit<128> inner_ipv6_dst_addr
+ bit<16> inner_udp_src_port
+ bit<16> inner_udp_dst_port
+}
+
+// Header instances
+header outer_ethernet instanceof ethernet_h
+header outer_ipv6 instanceof ipv6_h
+header outer_udp instanceof udp_h
+header vxlan instanceof vxlan_h
+header inner_ethernet instanceof ethernet_h
+header inner_ipv6 instanceof ipv6_h
+header inner_udp instanceof udp_h
+header vlan_key_header instanceof vlan_key_h
+
+struct metadata_t {
+ bit<32> port
+ bit<32> timeout_id
+}
+
+metadata instanceof metadata_t
+
+// Action 01: Update field in the header data
+action learner_018_action_01 args none {
+ mov h.vxlan.vni 200
+ return
+}
+
+// Action 02: Decapsulation
+action learner_018_action_02 args none {
+ mov m.timeout_id 0
+ learn learner_018_action_01 m.timeout_id
+ invalidate h.outer_ethernet
+ invalidate h.outer_ipv6
+ invalidate h.outer_udp
+ invalidate h.vxlan
+ return
+}
+
+learner learner_018 {
+
+ key {
+ h.vlan_key_header.outer_ipv6_src_addr
+ h.vlan_key_header.outer_ipv6_dst_addr
+ h.vlan_key_header.vni
+ h.vlan_key_header.next_header
+ h.vlan_key_header.inner_ipv6_src_addr
+ h.vlan_key_header.inner_ipv6_dst_addr
+ h.vlan_key_header.inner_udp_src_port
+ h.vlan_key_header.inner_udp_dst_port
+ }
+
+ actions {
+ learner_018_action_01
+ learner_018_action_02
+ }
+
+ default_action learner_018_action_02 args none const
+ size 1048576
+ timeout {
+ 60
+ 120
+ 180
+ }
+}
+
+apply {
+ // Receive packet
+ rx m.port
+ extract h.outer_ethernet
+ // Verify if packets are arrived in correct
+ // order. If not, go to END.
+ // Ethernet -> IPv6 -> UDP -> VXLAN ->
+ // Ethernet -> IPv6 -> UDP
+ jmpneq END h.outer_ethernet.ether_type 0x86dd
+ extract h.outer_ipv6
+ jmpneq END h.outer_ipv6.next_header 0x11
+ extract h.outer_udp
+ jmpneq END h.outer_udp.dst_port 4789
+ extract h.vxlan
+ extract h.inner_ethernet
+ jmpneq END h.inner_ethernet.ether_type 0x86dd
+ extract h.inner_ipv6
+ jmpneq END h.inner_ipv6.next_header 0x11
+ extract h.inner_udp
+
+ // Copy the required key data fields from header
+ // into the metadata key fields.
+ mov h.vlan_key_header.outer_ipv6_src_addr h.outer_ipv6.src_addr
+ mov h.vlan_key_header.outer_ipv6_dst_addr h.outer_ipv6.dst_addr
+ mov h.vlan_key_header.vni h.vxlan.vni
+ mov h.vlan_key_header.next_header h.inner_ipv6.next_header
+ mov h.vlan_key_header.inner_ipv6_src_addr h.inner_ipv6.src_addr
+ mov h.vlan_key_header.inner_ipv6_dst_addr h.inner_ipv6.dst_addr
+ mov h.vlan_key_header.inner_udp_src_port h.inner_udp.src_port
+ mov h.vlan_key_header.inner_udp_dst_port h.inner_udp.dst_port
+
+ // Table operations
+ table learner_018
+
+ // Transmit packets
+ END : emit h.outer_ethernet
+ emit h.outer_ipv6
+ emit h.outer_udp
+ emit h.vxlan
+ emit h.inner_ethernet
+ emit h.inner_ipv6
+ emit h.inner_udp
+ tx m.port
+}
diff --git a/dep/pipeline/learner_018/readme.md b/dep/pipeline/learner_018/readme.md
new file mode 100644
index 00000000..726d9e8b
--- /dev/null
+++ b/dep/pipeline/learner_018/readme.md
@@ -0,0 +1,14 @@
+Test Case: test_learner_018
+-----------------------
+
+ Scenario being tested:
+ Learner table with key structure type as a header, key element alignment as
+ non-contiguous and key size > 64 bytes.
+
+ Description:
+ The test case is a error-validation scenario. The application should throw a
+ 'Learner table configuration error' as non-contiguous key alignment in Learner
+ table is a non-valid scenario.
+
+ Verification:
+ The application should throw an error mentioned in the description.
\ No newline at end of file
diff --git a/dep/pipeline/learner_019/ethdev.io b/dep/pipeline/learner_019/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/learner_019/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/learner_019/learner_019.cli b/dep/pipeline/learner_019/learner_019.cli
new file mode 100644
index 00000000..37b64d3d
--- /dev/null
+++ b/dep/pipeline/learner_019/learner_019.cli
@@ -0,0 +1,4 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+pipeline codegen /tmp/pipeline/learner_019/learner_019.spec /tmp/pipeline/learner_019/learner_019.c
diff --git a/dep/pipeline/learner_019/learner_019.spec b/dep/pipeline/learner_019/learner_019.spec
new file mode 100644
index 00000000..1c9b50fe
--- /dev/null
+++ b/dep/pipeline/learner_019/learner_019.spec
@@ -0,0 +1,157 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+// IPv6 Header
+struct ipv6_h {
+ bit<32> ver_tc_label
+ bit<16> payload_length
+ bit<8> next_header
+ bit<8> hop_limit
+ bit<128> src_addr
+ bit<128> dst_addr
+}
+
+// UDP Header
+struct udp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<16> length
+ bit<16> checksum
+}
+
+// VXLAN Header
+struct vxlan_h {
+ bit<8> flags
+ bit<24> reserved
+ bit<24> vni
+ bit<8> reserved2
+}
+
+// Header instances
+header outer_ethernet instanceof ethernet_h
+header outer_ipv6 instanceof ipv6_h
+header outer_udp instanceof udp_h
+header vxlan instanceof vxlan_h
+header inner_ethernet instanceof ethernet_h
+header inner_ipv6 instanceof ipv6_h
+header inner_udp instanceof udp_h
+
+
+//
+// Packet meta-data.
+//
+
+struct metadata_t {
+ bit<32> port
+ bit<32> timeout_id
+ bit<128> outer_ipv6_src_addr
+ bit<128> outer_ipv6_dst_addr
+ bit<16> outer_udp_src_port
+ bit<16> outer_udp_dst_port
+ bit<24> vni
+ bit<8> next_header
+ bit<128> inner_ipv6_src_addr
+ bit<128> inner_ipv6_dst_addr
+ bit<16> inner_udp_src_port
+ bit<16> inner_udp_dst_port
+}
+
+metadata instanceof metadata_t
+
+// Action 01: Update field in the header data
+action learner_019_action_01 args none {
+ mov h.vxlan.vni 200
+ return
+}
+
+// Action 02: Decapsulation
+action learner_019_action_02 args none {
+ mov m.timeout_id 0
+ learn learner_019_action_01 m.timeout_id
+ invalidate h.outer_ethernet
+ invalidate h.outer_ipv6
+ invalidate h.outer_udp
+ invalidate h.vxlan
+ return
+}
+
+learner learner_019 {
+
+ key {
+ m.outer_ipv6_src_addr
+ m.outer_ipv6_dst_addr
+ m.vni
+ m.next_header
+ m.inner_ipv6_src_addr
+ m.inner_ipv6_dst_addr
+ m.inner_udp_src_port
+ m.inner_udp_dst_port
+ }
+
+ actions {
+ learner_019_action_01
+ learner_019_action_02
+ }
+
+ default_action learner_019_action_02 args none const
+ size 1048576
+ timeout {
+ 60
+ 120
+ 180
+ }
+}
+
+apply {
+ // Receive packet
+ rx m.port
+ extract h.outer_ethernet
+ // Verify if packets are arrived in correct
+ // order. If not, go to END.
+ // Ethernet -> IPv6 -> UDP -> VXLAN ->
+ // Ethernet -> IPv6 -> UDP
+ jmpneq END h.outer_ethernet.ether_type 0x86dd
+ extract h.outer_ipv6
+ jmpneq END h.outer_ipv6.next_header 0x11
+ extract h.outer_udp
+ jmpneq END h.outer_udp.dst_port 4789
+ extract h.vxlan
+ extract h.inner_ethernet
+ jmpneq END h.inner_ethernet.ether_type 0x86dd
+ extract h.inner_ipv6
+ jmpneq END h.inner_ipv6.next_header 0x11
+ extract h.inner_udp
+
+ // Copy the required key data fields from header
+ // into the metadata key fields.
+ mov m.outer_ipv6_src_addr h.outer_ipv6.src_addr
+ mov m.outer_ipv6_dst_addr h.outer_ipv6.dst_addr
+ mov m.vni h.vxlan.vni
+ mov m.next_header h.inner_ipv6.next_header
+ mov m.inner_ipv6_src_addr h.inner_ipv6.src_addr
+ mov m.inner_ipv6_dst_addr h.inner_ipv6.dst_addr
+ mov m.inner_udp_src_port h.inner_udp.src_port
+ mov m.inner_udp_dst_port h.inner_udp.dst_port
+
+ // Table operations
+ table learner_019
+
+ // Transmit packets
+ END : emit h.outer_ethernet
+ emit h.outer_ipv6
+ emit h.outer_udp
+ emit h.vxlan
+ emit h.inner_ethernet
+ emit h.inner_ipv6
+ emit h.inner_udp
+ tx m.port
+}
diff --git a/dep/pipeline/learner_019/readme.md b/dep/pipeline/learner_019/readme.md
new file mode 100644
index 00000000..d3b944c0
--- /dev/null
+++ b/dep/pipeline/learner_019/readme.md
@@ -0,0 +1,14 @@
+Test Case: test_learner_019
+-----------------------
+
+ Scenario being tested:
+ Learner table with key structure type as a metadata, key element alignment as
+ non-contiguous and key size > 64 bytes.
+
+ Description:
+ The test case is a error-validation scenario. The application should throw a
+ 'Learner table configuration error' as non-contiguous key alignment in Learner
+ table is a non-valid scenario.
+
+ Verification:
+ The application should throw an error mentioned in the description.
\ No newline at end of file
diff --git a/dep/pipeline/lpm_001/cmd_files/cmd_2.txt b/dep/pipeline/lpm_001/cmd_files/cmd_2.txt
new file mode 100644
index 00000000..ef525fb4
--- /dev/null
+++ b/dep/pipeline/lpm_001/cmd_files/cmd_2.txt
@@ -0,0 +1 @@
+match 0xc80a0b00/0xffffff00 action lpm_001_action_01 ipv4_dst_addr 0xa0a1a2a3 ipv4_src_addr 0xb0b1b2b3
diff --git a/dep/pipeline/lpm_001/cmd_files/cmd_3.txt b/dep/pipeline/lpm_001/cmd_files/cmd_3.txt
new file mode 100644
index 00000000..6f5f8615
--- /dev/null
+++ b/dep/pipeline/lpm_001/cmd_files/cmd_3.txt
@@ -0,0 +1 @@
+match 0xc90a0b00/0xffffff00 action lpm_001_action_01 ipv4_dst_addr 0xc0c1c2c3 ipv4_src_addr 0xd0d1d2d3
diff --git a/dep/pipeline/lpm_001/cmd_files/cmd_4.txt b/dep/pipeline/lpm_001/cmd_files/cmd_4.txt
new file mode 100644
index 00000000..7f27aae5
--- /dev/null
+++ b/dep/pipeline/lpm_001/cmd_files/cmd_4.txt
@@ -0,0 +1,2 @@
+match 0xc80a0b00/0xffffff00 action lpm_001_action_02 ipv4_dst_addr 0xa0a1a2a3 ipv4_src_addr 0xb0b1b2b3
+match 0xc90a0b00/0xffffff00 action lpm_001_action_02 ipv4_dst_addr 0xc0c1c2c3 ipv4_src_addr 0xd0d1d2d3
diff --git a/dep/pipeline/lpm_001/cmd_files/cmd_5.txt b/dep/pipeline/lpm_001/cmd_files/cmd_5.txt
new file mode 100644
index 00000000..cc9d4950
--- /dev/null
+++ b/dep/pipeline/lpm_001/cmd_files/cmd_5.txt
@@ -0,0 +1 @@
+match 0xc80a0b00/0xffffff00 action lpm_001_action_02 ipv4_dst_addr 0xa0a1a2a3 ipv4_src_addr 0xb0b1b2b3
diff --git a/dep/pipeline/lpm_001/cmd_files/cmd_6.txt b/dep/pipeline/lpm_001/cmd_files/cmd_6.txt
new file mode 100644
index 00000000..78bf9e00
--- /dev/null
+++ b/dep/pipeline/lpm_001/cmd_files/cmd_6.txt
@@ -0,0 +1 @@
+match 0xc90a0b00/0xffffff00 action lpm_001_action_02 ipv4_dst_addr 0xc0c1c2c3 ipv4_src_addr 0xd0d1d2d3
diff --git a/dep/pipeline/lpm_001/ethdev.io b/dep/pipeline/lpm_001/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/lpm_001/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/lpm_001/lpm_001.cli b/dep/pipeline/lpm_001/lpm_001.cli
new file mode 100644
index 00000000..59ef6362
--- /dev/null
+++ b/dep/pipeline/lpm_001/lpm_001.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/lpm_001/lpm_001.spec /tmp/pipeline/lpm_001/lpm_001.c
+pipeline libbuild /tmp/pipeline/lpm_001/lpm_001.c /tmp/pipeline/lpm_001/lpm_001.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/lpm_001/lpm_001.so io /tmp/pipeline/lpm_001/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/lpm_001/lpm_001.spec b/dep/pipeline/lpm_001/lpm_001.spec
new file mode 100644
index 00000000..bbc8289c
--- /dev/null
+++ b/dep/pipeline/lpm_001/lpm_001.spec
@@ -0,0 +1,91 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> version_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_frag_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port
+}
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct lpm_001_args_t {
+ bit<32> ipv4_dst_addr
+ bit<32> ipv4_src_addr
+}
+
+action lpm_001_action_01 args instanceof lpm_001_args_t {
+ mov h.ipv4.dst_addr t.ipv4_dst_addr
+ mov h.ipv4.src_addr t.ipv4_src_addr
+ return
+}
+
+action lpm_001_action_02 args instanceof lpm_001_args_t {
+ mov h.ipv4.dst_addr t.ipv4_dst_addr
+ mov h.ipv4.src_addr t.ipv4_src_addr
+ xor m.port 1
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table lpm_001_table {
+ key {
+ h.ipv4.dst_addr lpm
+ }
+
+ actions {
+ lpm_001_action_01
+ lpm_001_action_02
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ table lpm_001_table
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/lpm_001/pcap_files/in_1.txt b/dep/pipeline/lpm_001/pcap_files/in_1.txt
new file mode 100644
index 00000000..f453a4d0
--- /dev/null
+++ b/dep/pipeline/lpm_001/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 0a
+000020 0b 00 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c9 0a
+000020 0b 00 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/lpm_001/pcap_files/in_2.txt b/dep/pipeline/lpm_001/pcap_files/in_2.txt
new file mode 100644
index 00000000..399057c5
--- /dev/null
+++ b/dep/pipeline/lpm_001/pcap_files/in_2.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 0a
+000020 0b 01 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c9 0a
+000020 0b 00 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/lpm_001/pcap_files/in_3.txt b/dep/pipeline/lpm_001/pcap_files/in_3.txt
new file mode 100644
index 00000000..1e7f8d4d
--- /dev/null
+++ b/dep/pipeline/lpm_001/pcap_files/in_3.txt
@@ -0,0 +1,27 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 0a
+000020 0b 02 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c9 0a
+000020 0b 02 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c9 0a
+000020 0c 00 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 3
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 0a
+000020 0c 00 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/lpm_001/pcap_files/in_4.txt b/dep/pipeline/lpm_001/pcap_files/in_4.txt
new file mode 100644
index 00000000..1e7f8d4d
--- /dev/null
+++ b/dep/pipeline/lpm_001/pcap_files/in_4.txt
@@ -0,0 +1,27 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 0a
+000020 0b 02 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c9 0a
+000020 0b 02 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c9 0a
+000020 0c 00 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 3
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 0a
+000020 0c 00 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/lpm_001/pcap_files/in_5.txt b/dep/pipeline/lpm_001/pcap_files/in_5.txt
new file mode 100644
index 00000000..1e7f8d4d
--- /dev/null
+++ b/dep/pipeline/lpm_001/pcap_files/in_5.txt
@@ -0,0 +1,27 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 0a
+000020 0b 02 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c9 0a
+000020 0b 02 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c9 0a
+000020 0c 00 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 3
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 0a
+000020 0c 00 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/lpm_001/pcap_files/in_6.txt b/dep/pipeline/lpm_001/pcap_files/in_6.txt
new file mode 100644
index 00000000..1e7f8d4d
--- /dev/null
+++ b/dep/pipeline/lpm_001/pcap_files/in_6.txt
@@ -0,0 +1,27 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 0a
+000020 0b 02 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c9 0a
+000020 0b 02 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c9 0a
+000020 0c 00 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 3
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 0a
+000020 0c 00 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/lpm_001/pcap_files/out_1.txt b/dep/pipeline/lpm_001/pcap_files/out_1.txt
new file mode 100644
index 00000000..af0fc303
--- /dev/null
+++ b/dep/pipeline/lpm_001/pcap_files/out_1.txt
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
diff --git a/dep/pipeline/lpm_001/pcap_files/out_2.txt b/dep/pipeline/lpm_001/pcap_files/out_2.txt
new file mode 100644
index 00000000..b89069ea
--- /dev/null
+++ b/dep/pipeline/lpm_001/pcap_files/out_2.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 b0 b1 b2 b3 a0 a1
+000020 a2 a3 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/lpm_001/pcap_files/out_3.txt b/dep/pipeline/lpm_001/pcap_files/out_3.txt
new file mode 100644
index 00000000..84ab7dd1
--- /dev/null
+++ b/dep/pipeline/lpm_001/pcap_files/out_3.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 b0 b1 b2 b3 a0 a1
+000020 a2 a3 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 d0 d1 d2 d3 c0 c1
+000020 c2 c3 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/lpm_001/pcap_files/out_4.txt b/dep/pipeline/lpm_001/pcap_files/out_4.txt
new file mode 100644
index 00000000..84ab7dd1
--- /dev/null
+++ b/dep/pipeline/lpm_001/pcap_files/out_4.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 b0 b1 b2 b3 a0 a1
+000020 a2 a3 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 d0 d1 d2 d3 c0 c1
+000020 c2 c3 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/lpm_001/pcap_files/out_5.txt b/dep/pipeline/lpm_001/pcap_files/out_5.txt
new file mode 100644
index 00000000..3e39d4d7
--- /dev/null
+++ b/dep/pipeline/lpm_001/pcap_files/out_5.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 d0 d1 d2 d3 c0 c1
+000020 c2 c3 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/lpm_001/pcap_files/out_6.txt b/dep/pipeline/lpm_001/pcap_files/out_6.txt
new file mode 100644
index 00000000..af0fc303
--- /dev/null
+++ b/dep/pipeline/lpm_001/pcap_files/out_6.txt
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
diff --git a/dep/pipeline/lpm_001/readme.md b/dep/pipeline/lpm_001/readme.md
new file mode 100644
index 00000000..e56cac5b
--- /dev/null
+++ b/dep/pipeline/lpm_001/readme.md
@@ -0,0 +1,38 @@
+
+Test Case: test_lpm_001
+-------------------------
+
+ Description:
+ Testing the table update scenarios with LPM match type
+
+ Scenario: Empty Table
+ Test: Lookup miss for any packet.
+ CMD_FILE: None
+ PCAP Files: in_1.txt, out_1.txt
+
+ Scenario: Table with a Single Key
+ Test: Lookup hit for the right packet, lookup miss with any other packet.
+ CMD_FILE: cmd_2.txt
+ PCAP Files: in_2.txt, out_2.txt
+
+ Scenario: Table with 2 Keys
+ Test: Lookup hit for the right packets (hitting key A or key B), lookup miss for any other packet. To check whether
+ adding key B does not (incorrectly) override key A in the table.
+ CMD_FILE: cmd_3.txt
+ PCAP Files: in_3.txt, out_3.txt
+
+ Scenario: Key Deletion
+ Test: Table with 2 rules (key A first, key B second), lookup hit for both.
+ Delete key A => lookup MISS for key A (deleted), lookup HIT for key B (still in the table).
+ Delete key B => lookup MISS for both keys A and B (deleted).
+ CMD_FILE: cmd_4_1.txt, cmd_4_2.txt
+ PCAP Files: in_4_1.txt, out_4_1.txt, in_4_2.txt, out_4_2.txt, in_4_3.txt, out_4_3.txt
+
+ Scenario: Action update
+ Test: Add key A with action X => lookup hit for key A with action X executed. Add the same key A with action Y =>
+ lookup hit for key A with action Y being executed at this point.
+
+ Scenario: Default Entry Test
+ Empty table => lookup MISS with default action executed.
+ Add key A => lookup hit for the right packet with the specific key associated action executed, lookup miss for
+ any other packets with default action executed.
diff --git a/dep/pipeline/lpm_002/cmd_files/cmd_1.txt b/dep/pipeline/lpm_002/cmd_files/cmd_1.txt
new file mode 100644
index 00000000..ad619b3e
--- /dev/null
+++ b/dep/pipeline/lpm_002/cmd_files/cmd_1.txt
@@ -0,0 +1,4 @@
+match 0/0xC0000000 action lpm_002_action port_out 0
+match 0x40000000/0xC0000000 action lpm_002_action port_out 1
+match 0x80000000/0xC0000000 action lpm_002_action port_out 2
+match 0xC0000000/0xC0000000 action lpm_002_action port_out 3
diff --git a/dep/pipeline/lpm_002/cmd_files/cmd_2.txt b/dep/pipeline/lpm_002/cmd_files/cmd_2.txt
new file mode 100644
index 00000000..68db3798
--- /dev/null
+++ b/dep/pipeline/lpm_002/cmd_files/cmd_2.txt
@@ -0,0 +1,4 @@
+match 0/0 action lpm_002_action port_out 0
+match 0/0x80000000 action lpm_002_action port_out 1
+match 0/0xC0000000 action lpm_002_action port_out 2
+match 0/0xE0000000 action lpm_002_action port_out 3
diff --git a/dep/pipeline/lpm_002/ethdev.io b/dep/pipeline/lpm_002/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/lpm_002/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/lpm_002/lpm_002.cli b/dep/pipeline/lpm_002/lpm_002.cli
new file mode 100644
index 00000000..5386ff6b
--- /dev/null
+++ b/dep/pipeline/lpm_002/lpm_002.cli
@@ -0,0 +1,23 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/lpm_002/lpm_002.spec /tmp/pipeline/lpm_002/lpm_002.c
+pipeline libbuild /tmp/pipeline/lpm_002/lpm_002.c /tmp/pipeline/lpm_002/lpm_002.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/lpm_002/lpm_002.so io /tmp/pipeline/lpm_002/ethdev.io numa 0
+
+pipeline PIPELINE0 table lpm_002_table add /tmp/pipeline/lpm_002/cmd_files/cmd_1.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/lpm_002/lpm_002.spec b/dep/pipeline/lpm_002/lpm_002.spec
new file mode 100644
index 00000000..fa718da7
--- /dev/null
+++ b/dep/pipeline/lpm_002/lpm_002.spec
@@ -0,0 +1,82 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> version_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_frag_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port_in
+ bit<32> port_out
+}
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct lpm_001_args_t {
+ bit<32> port_out
+}
+
+action lpm_002_action args instanceof lpm_001_args_t {
+ mov m.port_out t.port_out
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table lpm_002_table {
+ key {
+ h.ipv4.dst_addr lpm
+ }
+
+ actions {
+ lpm_002_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port_in
+ extract h.ethernet
+ extract h.ipv4
+ table lpm_002_table
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port_out
+}
diff --git a/dep/pipeline/lpm_002/pcap_files/in_1.txt b/dep/pipeline/lpm_002/pcap_files/in_1.txt
new file mode 100644
index 00000000..f19566dd
--- /dev/null
+++ b/dep/pipeline/lpm_002/pcap_files/in_1.txt
@@ -0,0 +1,27 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 e4 b5 64 00 00 0a 32 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 ef 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 b2 b5 64 00 00 0a 64 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 bd 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 80 b5 64 00 00 0a 96 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 8b 93 00 00 58 58 58 58 58 58
+# Packet 3
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/lpm_002/pcap_files/in_2.txt b/dep/pipeline/lpm_002/pcap_files/in_2.txt
new file mode 100644
index 00000000..bf88e568
--- /dev/null
+++ b/dep/pipeline/lpm_002/pcap_files/in_2.txt
@@ -0,0 +1,27 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 94 b5 64 00 00 0a 82 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 9f 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 99 b5 64 00 00 0a 7d 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 a4 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 e4 b5 64 00 00 0a 32 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 ef 93 00 00 58 58 58 58 58 58
+# Packet 3
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 02 b6 64 00 00 0a 14 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 0d 94 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/lpm_002/pcap_files/out_11.txt b/dep/pipeline/lpm_002/pcap_files/out_11.txt
new file mode 100644
index 00000000..903c3de3
--- /dev/null
+++ b/dep/pipeline/lpm_002/pcap_files/out_11.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 e4 b5 64 00 00 0a 32 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 ef 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/lpm_002/pcap_files/out_12.txt b/dep/pipeline/lpm_002/pcap_files/out_12.txt
new file mode 100644
index 00000000..34d2fe6c
--- /dev/null
+++ b/dep/pipeline/lpm_002/pcap_files/out_12.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 b2 b5 64 00 00 0a 64 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 bd 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/lpm_002/pcap_files/out_13.txt b/dep/pipeline/lpm_002/pcap_files/out_13.txt
new file mode 100644
index 00000000..6ae8eaa2
--- /dev/null
+++ b/dep/pipeline/lpm_002/pcap_files/out_13.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 80 b5 64 00 00 0a 96 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 8b 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/lpm_002/pcap_files/out_14.txt b/dep/pipeline/lpm_002/pcap_files/out_14.txt
new file mode 100644
index 00000000..d24bd71c
--- /dev/null
+++ b/dep/pipeline/lpm_002/pcap_files/out_14.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/lpm_002/pcap_files/out_21.txt b/dep/pipeline/lpm_002/pcap_files/out_21.txt
new file mode 100644
index 00000000..6c64b4b6
--- /dev/null
+++ b/dep/pipeline/lpm_002/pcap_files/out_21.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 94 b5 64 00 00 0a 82 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 9f 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/lpm_002/pcap_files/out_22.txt b/dep/pipeline/lpm_002/pcap_files/out_22.txt
new file mode 100644
index 00000000..ca2e0bfd
--- /dev/null
+++ b/dep/pipeline/lpm_002/pcap_files/out_22.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 99 b5 64 00 00 0a 7d 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 a4 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/lpm_002/pcap_files/out_23.txt b/dep/pipeline/lpm_002/pcap_files/out_23.txt
new file mode 100644
index 00000000..903c3de3
--- /dev/null
+++ b/dep/pipeline/lpm_002/pcap_files/out_23.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 e4 b5 64 00 00 0a 32 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 ef 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/lpm_002/pcap_files/out_24.txt b/dep/pipeline/lpm_002/pcap_files/out_24.txt
new file mode 100644
index 00000000..5b2e36ce
--- /dev/null
+++ b/dep/pipeline/lpm_002/pcap_files/out_24.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 02 b6 64 00 00 0a 14 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 0d 94 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/lpm_002/readme.md b/dep/pipeline/lpm_002/readme.md
new file mode 100644
index 00000000..969d9fd9
--- /dev/null
+++ b/dep/pipeline/lpm_002/readme.md
@@ -0,0 +1,22 @@
+
+Test Case: test_lpm_002
+-------------------------
+
+ Description: Test routing scenarios with LPM match type
+
+ # Scenario 1
+ Input packets on ports 0 .. 3:
+ IPv4 dest_addr has all bits randomized (mask is 0.0.0.0)
+
+ Expected output packet distribution on ports 0 .. 3:
+ Port 0 = 25%; Port 1 = 25%; Port 2 = 25%; Port 3 = 25%
+
+ # Scenario 2
+ Input packets on ports 0 .. 3:
+ IPv4 dest_addr has all bits randomized (mask is 0.0.0.0)
+
+ Expected output packet distribution on ports 0 .. 3:
+ Port 0 = 50%; Port 1 = 25%; Port 2 = 12.5%; Port 3 = 12.5%
+
+ Verification
+ Actual output packet distribution on ports 0 .. 3 should the expected.
diff --git a/dep/pipeline/lpm_003/cmd_files/cmd_1.txt b/dep/pipeline/lpm_003/cmd_files/cmd_1.txt
new file mode 100644
index 00000000..2772a2c8
--- /dev/null
+++ b/dep/pipeline/lpm_003/cmd_files/cmd_1.txt
@@ -0,0 +1,9 @@
+match 0 0x00000000/0xC0000000 action lpm_003_action port_out 0
+match 0 0x40000000/0xC0000000 action lpm_003_action port_out 1
+match 0 0x80000000/0xC0000000 action lpm_003_action port_out 2
+match 0 0xC0000000/0xC0000000 action lpm_003_action port_out 3
+
+match 1 0x00000000/0x00000000 action lpm_003_action port_out 0
+match 1 0x00000000/0x80000000 action lpm_003_action port_out 1
+match 1 0x00000000/0xC0000000 action lpm_003_action port_out 2
+match 1 0x00000000/0xE0000000 action lpm_003_action port_out 3
diff --git a/dep/pipeline/lpm_003/ethdev.io b/dep/pipeline/lpm_003/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/lpm_003/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/lpm_003/lpm_003.cli b/dep/pipeline/lpm_003/lpm_003.cli
new file mode 100644
index 00000000..78396eff
--- /dev/null
+++ b/dep/pipeline/lpm_003/lpm_003.cli
@@ -0,0 +1,23 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/lpm_003/lpm_003.spec /tmp/pipeline/lpm_003/lpm_003.c
+pipeline libbuild /tmp/pipeline/lpm_003/lpm_003.c /tmp/pipeline/lpm_003/lpm_003.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/lpm_003/lpm_003.so io /tmp/pipeline/lpm_003/ethdev.io numa 0
+
+pipeline PIPELINE0 table lpm_003_table add /tmp/pipeline/lpm_003/cmd_files/cmd_1.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/lpm_003/lpm_003.spec b/dep/pipeline/lpm_003/lpm_003.spec
new file mode 100644
index 00000000..b1dedff0
--- /dev/null
+++ b/dep/pipeline/lpm_003/lpm_003.spec
@@ -0,0 +1,87 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> version_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_frag_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port_in
+ bit<32> port_out
+ bit<32> vrf_id
+ bit<32> dst_addr
+}
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct lpm_003_args_t {
+ bit<32> port_out
+}
+
+action lpm_003_action args instanceof lpm_003_args_t {
+ mov m.port_out t.port_out
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table lpm_003_table {
+ key {
+ m.vrf_id exact
+ m.dst_addr lpm
+ }
+
+ actions {
+ lpm_003_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port_in
+ extract h.ethernet
+ extract h.ipv4
+ mov m.vrf_id h.ipv4.src_addr
+ mov m.dst_addr h.ipv4.dst_addr
+ table lpm_003_table
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port_out
+}
diff --git a/dep/pipeline/lpm_003/pcap_files/in_1.txt b/dep/pipeline/lpm_003/pcap_files/in_1.txt
new file mode 100644
index 00000000..a9d022ec
--- /dev/null
+++ b/dep/pipeline/lpm_003/pcap_files/in_1.txt
@@ -0,0 +1,47 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 48 c0 00 00 00 00 32 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 53 9e 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 f8 be 00 00 00 01 82 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 03 9d 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 16 c0 00 00 00 00 64 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 21 9e 00 00 58 58 58 58 58 58
+# Packet 3
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 fd be 00 00 00 01 7d 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 08 9d 00 00 58 58 58 58 58 58
+# Packet 4
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 e4 bf 00 00 00 00 96 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 ef 9d 00 00 58 58 58 58 58 58
+# Packet 5
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 48 bf 00 00 00 01 32 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 53 9d 00 00 58 58 58 58 58 58
+# Packet 6
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 b2 bf 00 00 00 00 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 bd 9d 00 00 58 58 58 58 58 58
+# Packet 7
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 66 bf 00 00 00 01 14 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 71 9d 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/lpm_003/pcap_files/out_11.txt b/dep/pipeline/lpm_003/pcap_files/out_11.txt
new file mode 100644
index 00000000..fa1b4555
--- /dev/null
+++ b/dep/pipeline/lpm_003/pcap_files/out_11.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 48 c0 00 00 00 00 32 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 53 9e 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 f8 be 00 00 00 01 82 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 03 9d 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/lpm_003/pcap_files/out_12.txt b/dep/pipeline/lpm_003/pcap_files/out_12.txt
new file mode 100644
index 00000000..a0316337
--- /dev/null
+++ b/dep/pipeline/lpm_003/pcap_files/out_12.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 16 c0 00 00 00 00 64 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 21 9e 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 fd be 00 00 00 01 7d 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 08 9d 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/lpm_003/pcap_files/out_13.txt b/dep/pipeline/lpm_003/pcap_files/out_13.txt
new file mode 100644
index 00000000..e0c05a02
--- /dev/null
+++ b/dep/pipeline/lpm_003/pcap_files/out_13.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 e4 bf 00 00 00 00 96 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 ef 9d 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 48 bf 00 00 00 01 32 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 53 9d 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/lpm_003/pcap_files/out_14.txt b/dep/pipeline/lpm_003/pcap_files/out_14.txt
new file mode 100644
index 00000000..0d099412
--- /dev/null
+++ b/dep/pipeline/lpm_003/pcap_files/out_14.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 b2 bf 00 00 00 00 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 bd 9d 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 66 bf 00 00 00 01 14 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 71 9d 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/lpm_003/readme.md b/dep/pipeline/lpm_003/readme.md
new file mode 100644
index 00000000..b0f34ae0
--- /dev/null
+++ b/dep/pipeline/lpm_003/readme.md
@@ -0,0 +1,17 @@
+
+Test Case: test_lpm_003
+-------------------------
+
+ Description: Test routing scenarios with LPM match type
+
+ Input packets on ports 0 .. 3:
+ IPv4 dest_addr has all bits randomized (mask is 0.0.0.0)
+
+ Expected output packet distribution on ports 0 .. 3:
+ Port 0 = 12.5% + 25% = 37.5% (i.e. 3/8 = 6/16)
+ Port 1 = 12.5% + 12.5% = 25% (i.e. 1/4 = 4/16)
+ Port 2 = 12.5% + 6.25% = 18.75% (i.e. 3/16)
+ Port 3 = 12.5% + 6.25% = 18.75% (i.e. 3/16)
+
+ Verification
+ Actual output packet distribution on ports 0 .. 3 should match the expected.
diff --git a/dep/pipeline/lpm_004/cmd_files/cmd_1.txt b/dep/pipeline/lpm_004/cmd_files/cmd_1.txt
new file mode 100644
index 00000000..24c9c82a
--- /dev/null
+++ b/dep/pipeline/lpm_004/cmd_files/cmd_1.txt
@@ -0,0 +1,4 @@
+match 0 0x00000000/0x80000000 action lpm_004_action port_out 0
+match 0 0x80000000/0x80000000 action lpm_004_action port_out 1
+match 1 0x00000000/0x00000000 action lpm_004_action port_out 2
+match 1 0x00000000/0xC0000000 action lpm_004_action port_out 3
diff --git a/dep/pipeline/lpm_004/ethdev.io b/dep/pipeline/lpm_004/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/lpm_004/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/lpm_004/lpm_004.cli b/dep/pipeline/lpm_004/lpm_004.cli
new file mode 100644
index 00000000..4b72e829
--- /dev/null
+++ b/dep/pipeline/lpm_004/lpm_004.cli
@@ -0,0 +1,23 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/lpm_004/lpm_004.spec /tmp/pipeline/lpm_004/lpm_004.c
+pipeline libbuild /tmp/pipeline/lpm_004/lpm_004.c /tmp/pipeline/lpm_004/lpm_004.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/lpm_004/lpm_004.so io /tmp/pipeline/lpm_004/ethdev.io numa 0
+
+pipeline PIPELINE0 table lpm_004_table add /tmp/pipeline/lpm_004/cmd_files/cmd_1.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/lpm_004/lpm_004.spec b/dep/pipeline/lpm_004/lpm_004.spec
new file mode 100644
index 00000000..2ddc1b5b
--- /dev/null
+++ b/dep/pipeline/lpm_004/lpm_004.spec
@@ -0,0 +1,87 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> version_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_frag_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port_in
+ bit<32> port_out
+ bit<32> vrf_id
+ bit<32> dst_addr
+}
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct lpm_004_args_t {
+ bit<32> port_out
+}
+
+action lpm_004_action args instanceof lpm_004_args_t {
+ mov m.port_out t.port_out
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table lpm_004_table {
+ key {
+ m.vrf_id exact
+ m.dst_addr lpm
+ }
+
+ actions {
+ lpm_004_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port_in
+ extract h.ethernet
+ extract h.ipv4
+ mov m.vrf_id h.ipv4.src_addr
+ mov m.dst_addr h.ipv4.dst_addr
+ table lpm_004_table
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port_out
+}
diff --git a/dep/pipeline/lpm_004/pcap_files/in_1.txt b/dep/pipeline/lpm_004/pcap_files/in_1.txt
new file mode 100644
index 00000000..8ea2a9f4
--- /dev/null
+++ b/dep/pipeline/lpm_004/pcap_files/in_1.txt
@@ -0,0 +1,27 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 fd bf 00 00 00 00 7d 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 08 9e 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 f8 bf 00 00 00 00 82 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 03 9e 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 16 bf 00 00 00 01 64 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 21 9d 00 00 58 58 58 58 58 58
+# Packet 3
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 3e bf 00 00 00 01 3c 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 49 9d 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/lpm_004/pcap_files/out_11.txt b/dep/pipeline/lpm_004/pcap_files/out_11.txt
new file mode 100644
index 00000000..10316500
--- /dev/null
+++ b/dep/pipeline/lpm_004/pcap_files/out_11.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 fd bf 00 00 00 00 7d 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 08 9e 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/lpm_004/pcap_files/out_12.txt b/dep/pipeline/lpm_004/pcap_files/out_12.txt
new file mode 100644
index 00000000..cf9cfc80
--- /dev/null
+++ b/dep/pipeline/lpm_004/pcap_files/out_12.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 f8 bf 00 00 00 00 82 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 03 9e 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/lpm_004/pcap_files/out_13.txt b/dep/pipeline/lpm_004/pcap_files/out_13.txt
new file mode 100644
index 00000000..90dd50bf
--- /dev/null
+++ b/dep/pipeline/lpm_004/pcap_files/out_13.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 16 bf 00 00 00 01 64 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 21 9d 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/lpm_004/pcap_files/out_14.txt b/dep/pipeline/lpm_004/pcap_files/out_14.txt
new file mode 100644
index 00000000..14296bb7
--- /dev/null
+++ b/dep/pipeline/lpm_004/pcap_files/out_14.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 3e bf 00 00 00 01 3c 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 49 9d 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/lpm_004/readme.md b/dep/pipeline/lpm_004/readme.md
new file mode 100644
index 00000000..89f2153c
--- /dev/null
+++ b/dep/pipeline/lpm_004/readme.md
@@ -0,0 +1,17 @@
+
+Test Case: test_lpm_004
+-----------------------
+
+ Description: Test routing scenarios with LPM match type
+
+ Input packets on ports 0 .. 3:
+ IPv4 dest_addr has all bits randomized (mask is 0.0.0.0)
+
+ Expected output packet distribution on ports 0 .. 3:
+ Port 0 = 25%
+ Port 1 = 25%
+ Port 2 = 37.5%
+ Port 3 = 12.5%
+
+ Verification
+ Actual output packet distribution on output ports 0 .. 3 should match the expected.
diff --git a/dep/pipeline/lpm_005/cmd_files/cmd_1.txt b/dep/pipeline/lpm_005/cmd_files/cmd_1.txt
new file mode 100644
index 00000000..2fd5386b
--- /dev/null
+++ b/dep/pipeline/lpm_005/cmd_files/cmd_1.txt
@@ -0,0 +1 @@
+match 0xa0a1a2a3a4a5a6a7a8a9aaabacadaeaf/0xffffffffffffffffffffffffffffffff action lpm_005_action_01
\ No newline at end of file
diff --git a/dep/pipeline/lpm_005/ethdev.io b/dep/pipeline/lpm_005/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/lpm_005/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/lpm_005/lpm_005.cli b/dep/pipeline/lpm_005/lpm_005.cli
new file mode 100644
index 00000000..32ac85ce
--- /dev/null
+++ b/dep/pipeline/lpm_005/lpm_005.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/lpm_005/lpm_005.spec /tmp/pipeline/lpm_005/lpm_005.c
+pipeline libbuild /tmp/pipeline/lpm_005/lpm_005.c /tmp/pipeline/lpm_005/lpm_005.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/lpm_005/lpm_005.so io /tmp/pipeline/lpm_005/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/lpm_005/lpm_005.spec b/dep/pipeline/lpm_005/lpm_005.spec
new file mode 100644
index 00000000..c8fc8ebb
--- /dev/null
+++ b/dep/pipeline/lpm_005/lpm_005.spec
@@ -0,0 +1,75 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+struct ipv6_h {
+ bit<32> ver_tc_label
+ bit<16> payload_length
+ bit<8> next_header
+ bit<8> hop_limit
+ bit<128> src_addr
+ bit<128> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv6 instanceof ipv6_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions.
+//
+action lpm_005_action_01 args none {
+ mov h.ethernet.src_addr h.ethernet.dst_addr
+ return
+}
+
+action lpm_005_action_02 args none {
+ mov h.ethernet.dst_addr h.ethernet.src_addr
+ return
+}
+
+//
+// Tables.
+//
+table lpm_005 {
+ key {
+ h.ipv6.dst_addr lpm
+ }
+
+ actions {
+ lpm_005_action_01
+ lpm_005_action_02
+ }
+
+ default_action lpm_005_action_02 args none const
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv6
+ table lpm_005
+ emit h.ethernet
+ emit h.ipv6
+ tx m.port
+}
diff --git a/dep/pipeline/lpm_005/pcap_files/in_1.txt b/dep/pipeline/lpm_005/pcap_files/in_1.txt
new file mode 100644
index 00000000..f4d47ee2
--- /dev/null
+++ b/dep/pipeline/lpm_005/pcap_files/in_1.txt
@@ -0,0 +1,19 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc de 00 00 00 00 00 00 00 00 86 dd 60 00
+000010 00 00 00 1a 06 40 10 00 20 00 30 00 40 00 50 00
+000020 60 00 70 00 80 00 a0 a1 a2 a3 a4 a5 a6 a7 a8 a9
+000030 aa ab ac ad ae af 00 64 00 c8 00 00 00 0f 00 00
+000040 00 0a 50 02 20 00 08 48 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc de 00 00 00 00 00 00 00 00 86 dd 60 00
+000010 00 00 00 1a 06 40 10 00 0d b8 00 00 00 01 02 07
+000020 3f ff fe 68 df 11 20 01 0d b8 00 00 00 01 02 07
+000030 3f ff fe 68 df 44 00 64 00 c8 00 00 00 0f 00 00
+000040 00 0a 50 02 20 00 fa e6 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/lpm_005/pcap_files/out_1.txt b/dep/pipeline/lpm_005/pcap_files/out_1.txt
new file mode 100644
index 00000000..615dc7c0
--- /dev/null
+++ b/dep/pipeline/lpm_005/pcap_files/out_1.txt
@@ -0,0 +1,19 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc de 00 00 aa bb cc de 00 00 86 dd 60 00
+000010 00 00 00 1a 06 40 10 00 20 00 30 00 40 00 50 00
+000020 60 00 70 00 80 00 a0 a1 a2 a3 a4 a5 a6 a7 a8 a9
+000030 aa ab ac ad ae af 00 64 00 c8 00 00 00 0f 00 00
+000040 00 0a 50 02 20 00 08 48 00 00 58 58 58 58 58 58
+# Packet 1
+000000 00 00 00 00 00 00 00 00 00 00 00 00 86 dd 60 00
+000010 00 00 00 1a 06 40 10 00 0d b8 00 00 00 01 02 07
+000020 3f ff fe 68 df 11 20 01 0d b8 00 00 00 01 02 07
+000030 3f ff fe 68 df 44 00 64 00 c8 00 00 00 0f 00 00
+000040 00 0a 50 02 20 00 fa e6 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/lpm_005/readme.md b/dep/pipeline/lpm_005/readme.md
new file mode 100644
index 00000000..d87271e5
--- /dev/null
+++ b/dep/pipeline/lpm_005/readme.md
@@ -0,0 +1,14 @@
+Test Case: test_lpm_005
+-------------------------
+
+ Scenario being tested:
+ To test IPv6 address as table key field for LPM.
+
+ Description:
+ Copy the destination MAC address of the received packet into the source MAC address
+ and transmit the packet back on the same port for the matched action.
+ Copy the source MAC address of the received packet into the destination MAC address
+ and transmit the packet back on the same port for the unmatched action.
+
+ Verification:
+ Packet verification should happen according to the description.
\ No newline at end of file
diff --git a/dep/pipeline/met_001/ethdev.io b/dep/pipeline/met_001/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/met_001/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/met_001/met_001.cli b/dep/pipeline/met_001/met_001.cli
new file mode 100644
index 00000000..7fb8dba9
--- /dev/null
+++ b/dep/pipeline/met_001/met_001.cli
@@ -0,0 +1,23 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/met_001/met_001.spec /tmp/pipeline/met_001/met_001.c
+pipeline libbuild /tmp/pipeline/met_001/met_001.c /tmp/pipeline/met_001/met_001.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/met_001/met_001.so io /tmp/pipeline/met_001/ethdev.io numa 0
+
+pipeline PIPELINE0 meter profile platinum add cir 460 pir 1380 cbs 100 pbs 200
+pipeline PIPELINE0 meter MET_ARRAY_1 set profile platinum index from 0 to 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/met_001/met_001.spec b/dep/pipeline/met_001/met_001.spec
new file mode 100644
index 00000000..ebebd9d2
--- /dev/null
+++ b/dep/pipeline/met_001/met_001.spec
@@ -0,0 +1,60 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2021 Intel Corporation
+
+//
+// Headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port_in
+ bit<32> port_out
+ bit<8> color_in
+}
+
+metadata instanceof metadata_t
+
+//
+// Meters.
+//
+metarray MET_ARRAY_1 size 64
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port_in
+ extract h.ethernet
+ extract h.ipv4
+ jmpeq L1 h.ethernet.dst_addr 0xaabbccdd0000
+ mov m.port_out m.port_in
+ jmp L2
+ L1 : mov m.color_in 0x0
+ meter MET_ARRAY_1 h.ipv4.diffserv h.ipv4.total_len m.color_in m.port_out
+ L2 : emit h.ethernet
+ emit h.ipv4
+ tx m.port_out
+}
diff --git a/dep/pipeline/met_001/pcap_files/in_1.txt b/dep/pipeline/met_001/pcap_files/in_1.txt
new file mode 100644
index 00000000..bda9815d
--- /dev/null
+++ b/dep/pipeline/met_001/pcap_files/in_1.txt
@@ -0,0 +1,32 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 3
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 4
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_001/pcap_files/out_11.txt b/dep/pipeline/met_001/pcap_files/out_11.txt
new file mode 100644
index 00000000..8536c501
--- /dev/null
+++ b/dep/pipeline/met_001/pcap_files/out_11.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_001/pcap_files/out_12.txt b/dep/pipeline/met_001/pcap_files/out_12.txt
new file mode 100644
index 00000000..8536c501
--- /dev/null
+++ b/dep/pipeline/met_001/pcap_files/out_12.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_001/pcap_files/out_13.txt b/dep/pipeline/met_001/pcap_files/out_13.txt
new file mode 100644
index 00000000..cf9cbb7a
--- /dev/null
+++ b/dep/pipeline/met_001/pcap_files/out_13.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_001/pcap_files/out_21.txt b/dep/pipeline/met_001/pcap_files/out_21.txt
new file mode 100644
index 00000000..bda9815d
--- /dev/null
+++ b/dep/pipeline/met_001/pcap_files/out_21.txt
@@ -0,0 +1,32 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 3
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 4
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_001/pcap_files/out_22.txt b/dep/pipeline/met_001/pcap_files/out_22.txt
new file mode 100644
index 00000000..af0fc303
--- /dev/null
+++ b/dep/pipeline/met_001/pcap_files/out_22.txt
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
diff --git a/dep/pipeline/met_001/pcap_files/out_23.txt b/dep/pipeline/met_001/pcap_files/out_23.txt
new file mode 100644
index 00000000..af0fc303
--- /dev/null
+++ b/dep/pipeline/met_001/pcap_files/out_23.txt
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
diff --git a/dep/pipeline/met_001/pcap_files/out_31.txt b/dep/pipeline/met_001/pcap_files/out_31.txt
new file mode 100644
index 00000000..8536c501
--- /dev/null
+++ b/dep/pipeline/met_001/pcap_files/out_31.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_001/pcap_files/out_32.txt b/dep/pipeline/met_001/pcap_files/out_32.txt
new file mode 100644
index 00000000..cf9cbb7a
--- /dev/null
+++ b/dep/pipeline/met_001/pcap_files/out_32.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_001/pcap_files/out_33.txt b/dep/pipeline/met_001/pcap_files/out_33.txt
new file mode 100644
index 00000000..8536c501
--- /dev/null
+++ b/dep/pipeline/met_001/pcap_files/out_33.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_001/pcap_files/out_41.txt b/dep/pipeline/met_001/pcap_files/out_41.txt
new file mode 100644
index 00000000..bda9815d
--- /dev/null
+++ b/dep/pipeline/met_001/pcap_files/out_41.txt
@@ -0,0 +1,32 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 3
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 4
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_001/pcap_files/out_42.txt b/dep/pipeline/met_001/pcap_files/out_42.txt
new file mode 100644
index 00000000..af0fc303
--- /dev/null
+++ b/dep/pipeline/met_001/pcap_files/out_42.txt
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
diff --git a/dep/pipeline/met_001/pcap_files/out_43.txt b/dep/pipeline/met_001/pcap_files/out_43.txt
new file mode 100644
index 00000000..af0fc303
--- /dev/null
+++ b/dep/pipeline/met_001/pcap_files/out_43.txt
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
diff --git a/dep/pipeline/met_001/readme.md b/dep/pipeline/met_001/readme.md
new file mode 100644
index 00000000..950cf957
--- /dev/null
+++ b/dep/pipeline/met_001/readme.md
@@ -0,0 +1,25 @@
+
+Test Case: test_met_001
+-----------------------
+
+ Instruction being tested:
+ meter METARRAY m.field h.field imm_val m.field
+
+ CLI commands being tested:
+ pipeline <pipeline_name> meter profile <profile_name> add cir <cir> pir <pir> cbs <cbs> pbs <pbs>
+ pipeline <pipeline_name> meter profile <profile_name> delete
+ pipeline <pipeline_name> meter <meter_array_name> from <index0> to <index1> reset
+ pipeline <pipeline_name> meter <meter_array_name> from <index0> to <index1> set profile <profile_name>
+
+ Description:
+ Use a meter of certain size. Assign a particular incoming flow (packets
+ having a certain destination MAC address) to a meter index. Set a meter
+ profile to that same meter index. Send packet burst to DUT at a rate
+ more than the supported CBS + PBS as well as at a rate less than
+ CBS + PBS. Change the meter profile and repeat the same test. Now reset
+ that meter index and check the default profile using the same test.
+
+ Verification:
+ Packets received on Port 0 (Green packets), Port 1 (Yellow packets) &
+ Port 2 (Red packets) should comply with the meter profile used in
+ the DUT.
diff --git a/dep/pipeline/met_002/ethdev.io b/dep/pipeline/met_002/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/met_002/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/met_002/met_002.cli b/dep/pipeline/met_002/met_002.cli
new file mode 100644
index 00000000..9a6bd3b6
--- /dev/null
+++ b/dep/pipeline/met_002/met_002.cli
@@ -0,0 +1,23 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/met_002/met_002.spec /tmp/pipeline/met_002/met_002.c
+pipeline libbuild /tmp/pipeline/met_002/met_002.c /tmp/pipeline/met_002/met_002.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/met_002/met_002.so io /tmp/pipeline/met_002/ethdev.io numa 0
+
+pipeline PIPELINE0 meter profile platinum add cir 460 pir 1380 cbs 100 pbs 200
+pipeline PIPELINE0 meter MET_ARRAY_1 set profile platinum index from 0 to 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/met_002/met_002.spec b/dep/pipeline/met_002/met_002.spec
new file mode 100644
index 00000000..80da7bf7
--- /dev/null
+++ b/dep/pipeline/met_002/met_002.spec
@@ -0,0 +1,58 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2021 Intel Corporation
+
+//
+// Headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port_in
+ bit<32> port_out
+}
+
+metadata instanceof metadata_t
+
+//
+// Meters.
+//
+metarray MET_ARRAY_1 size 64
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port_in
+ extract h.ethernet
+ extract h.ipv4
+ jmpeq L1 h.ethernet.dst_addr 0xaabbccdd0000
+ mov m.port_out m.port_in
+ jmp L2
+ L1 : meter MET_ARRAY_1 h.ipv4.diffserv h.ipv4.total_len 0x0 m.port_out
+ L2 : emit h.ethernet
+ emit h.ipv4
+ tx m.port_out
+}
diff --git a/dep/pipeline/met_002/pcap_files/in_1.txt b/dep/pipeline/met_002/pcap_files/in_1.txt
new file mode 100644
index 00000000..bda9815d
--- /dev/null
+++ b/dep/pipeline/met_002/pcap_files/in_1.txt
@@ -0,0 +1,32 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 3
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 4
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_002/pcap_files/out_11.txt b/dep/pipeline/met_002/pcap_files/out_11.txt
new file mode 100644
index 00000000..8536c501
--- /dev/null
+++ b/dep/pipeline/met_002/pcap_files/out_11.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_002/pcap_files/out_12.txt b/dep/pipeline/met_002/pcap_files/out_12.txt
new file mode 100644
index 00000000..8536c501
--- /dev/null
+++ b/dep/pipeline/met_002/pcap_files/out_12.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_002/pcap_files/out_13.txt b/dep/pipeline/met_002/pcap_files/out_13.txt
new file mode 100644
index 00000000..cf9cbb7a
--- /dev/null
+++ b/dep/pipeline/met_002/pcap_files/out_13.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_002/pcap_files/out_21.txt b/dep/pipeline/met_002/pcap_files/out_21.txt
new file mode 100644
index 00000000..bda9815d
--- /dev/null
+++ b/dep/pipeline/met_002/pcap_files/out_21.txt
@@ -0,0 +1,32 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 3
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 4
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_002/pcap_files/out_22.txt b/dep/pipeline/met_002/pcap_files/out_22.txt
new file mode 100644
index 00000000..af0fc303
--- /dev/null
+++ b/dep/pipeline/met_002/pcap_files/out_22.txt
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
diff --git a/dep/pipeline/met_002/pcap_files/out_23.txt b/dep/pipeline/met_002/pcap_files/out_23.txt
new file mode 100644
index 00000000..af0fc303
--- /dev/null
+++ b/dep/pipeline/met_002/pcap_files/out_23.txt
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
diff --git a/dep/pipeline/met_002/readme.md b/dep/pipeline/met_002/readme.md
new file mode 100644
index 00000000..6d18b46e
--- /dev/null
+++ b/dep/pipeline/met_002/readme.md
@@ -0,0 +1,18 @@
+
+Test Case: test_met_002
+-----------------------
+
+ Instruction being tested:
+ meter METARRAY h.field h.field imm_val m.field
+
+ Description:
+ Use a meter of certain size. Assign a particular incoming flow (packets
+ having a certain destination MAC address) to a meter index. Set a meter
+ profile to that same meter index. Send packet burst to DUT at a rate
+ more than the supported CBS + PBS as well as at a rate less than
+ CBS + PBS.
+
+ Verification:
+ Packets received on Port 0 (Green packets), Port 1 (Yellow packets) &
+ Port 2 (Red packets) should comply with the meter profile used in
+ the DUT.
diff --git a/dep/pipeline/met_003/ethdev.io b/dep/pipeline/met_003/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/met_003/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/met_003/met_003.cli b/dep/pipeline/met_003/met_003.cli
new file mode 100644
index 00000000..cc2cf120
--- /dev/null
+++ b/dep/pipeline/met_003/met_003.cli
@@ -0,0 +1,23 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/met_003/met_003.spec /tmp/pipeline/met_003/met_003.c
+pipeline libbuild /tmp/pipeline/met_003/met_003.c /tmp/pipeline/met_003/met_003.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/met_003/met_003.so io /tmp/pipeline/met_003/ethdev.io numa 0
+
+pipeline PIPELINE0 meter profile platinum add cir 460 pir 1380 cbs 100 pbs 200
+pipeline PIPELINE0 meter MET_ARRAY_1 set profile platinum index from 0 to 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/met_003/met_003.spec b/dep/pipeline/met_003/met_003.spec
new file mode 100644
index 00000000..e75e00f3
--- /dev/null
+++ b/dep/pipeline/met_003/met_003.spec
@@ -0,0 +1,62 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2021 Intel Corporation
+
+//
+// Headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port_in
+ bit<32> port_out
+ bit<16> ip_byte_count
+ bit<8> color_in
+}
+
+metadata instanceof metadata_t
+
+//
+// Meters.
+//
+metarray MET_ARRAY_1 size 64
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port_in
+ extract h.ethernet
+ extract h.ipv4
+ jmpeq L1 h.ethernet.dst_addr 0xaabbccdd0000
+ mov m.port_out m.port_in
+ jmp L2
+ L1 : mov m.ip_byte_count h.ipv4.total_len
+ mov m.color_in 0x0
+ meter MET_ARRAY_1 h.ipv4.diffserv m.ip_byte_count m.color_in m.port_out
+ L2 : emit h.ethernet
+ emit h.ipv4
+ tx m.port_out
+}
diff --git a/dep/pipeline/met_003/pcap_files/in_1.txt b/dep/pipeline/met_003/pcap_files/in_1.txt
new file mode 100644
index 00000000..bda9815d
--- /dev/null
+++ b/dep/pipeline/met_003/pcap_files/in_1.txt
@@ -0,0 +1,32 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 3
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 4
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_003/pcap_files/out_11.txt b/dep/pipeline/met_003/pcap_files/out_11.txt
new file mode 100644
index 00000000..8536c501
--- /dev/null
+++ b/dep/pipeline/met_003/pcap_files/out_11.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_003/pcap_files/out_12.txt b/dep/pipeline/met_003/pcap_files/out_12.txt
new file mode 100644
index 00000000..8536c501
--- /dev/null
+++ b/dep/pipeline/met_003/pcap_files/out_12.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_003/pcap_files/out_13.txt b/dep/pipeline/met_003/pcap_files/out_13.txt
new file mode 100644
index 00000000..cf9cbb7a
--- /dev/null
+++ b/dep/pipeline/met_003/pcap_files/out_13.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_003/pcap_files/out_21.txt b/dep/pipeline/met_003/pcap_files/out_21.txt
new file mode 100644
index 00000000..bda9815d
--- /dev/null
+++ b/dep/pipeline/met_003/pcap_files/out_21.txt
@@ -0,0 +1,32 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 3
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 4
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_003/pcap_files/out_22.txt b/dep/pipeline/met_003/pcap_files/out_22.txt
new file mode 100644
index 00000000..af0fc303
--- /dev/null
+++ b/dep/pipeline/met_003/pcap_files/out_22.txt
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
diff --git a/dep/pipeline/met_003/pcap_files/out_23.txt b/dep/pipeline/met_003/pcap_files/out_23.txt
new file mode 100644
index 00000000..af0fc303
--- /dev/null
+++ b/dep/pipeline/met_003/pcap_files/out_23.txt
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
diff --git a/dep/pipeline/met_003/readme.md b/dep/pipeline/met_003/readme.md
new file mode 100644
index 00000000..f65864ca
--- /dev/null
+++ b/dep/pipeline/met_003/readme.md
@@ -0,0 +1,18 @@
+
+Test Case: test_met_003
+-----------------------
+
+ Instruction being tested:
+ meter METARRAY h.field m.field m.field m.field
+
+ Description:
+ Use a meter of certain size. Assign a particular incoming flow (packets
+ having a certain destination MAC address) to a meter index. Set a meter
+ profile to that same meter index. Send packet burst to DUT at a rate
+ more than the supported CBS + PBS as well as at a rate less than
+ CBS + PBS.
+
+ Verification:
+ Packets received on Port 0 (Green packets), Port 1 (Yellow packets) &
+ Port 2 (Red packets) should comply with the meter profile used in
+ the DUT.
diff --git a/dep/pipeline/met_004/ethdev.io b/dep/pipeline/met_004/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/met_004/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/met_004/met_004.cli b/dep/pipeline/met_004/met_004.cli
new file mode 100644
index 00000000..9d15afe0
--- /dev/null
+++ b/dep/pipeline/met_004/met_004.cli
@@ -0,0 +1,23 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/met_004/met_004.spec /tmp/pipeline/met_004/met_004.c
+pipeline libbuild /tmp/pipeline/met_004/met_004.c /tmp/pipeline/met_004/met_004.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/met_004/met_004.so io /tmp/pipeline/met_004/ethdev.io numa 0
+
+pipeline PIPELINE0 meter profile platinum add cir 460 pir 1380 cbs 100 pbs 200
+pipeline PIPELINE0 meter MET_ARRAY_1 set profile platinum index from 0 to 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/met_004/met_004.spec b/dep/pipeline/met_004/met_004.spec
new file mode 100644
index 00000000..6d9e8f10
--- /dev/null
+++ b/dep/pipeline/met_004/met_004.spec
@@ -0,0 +1,60 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2021 Intel Corporation
+
+//
+// Headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port_in
+ bit<32> port_out
+ bit<16> ip_byte_count
+}
+
+metadata instanceof metadata_t
+
+//
+// Meters.
+//
+metarray MET_ARRAY_1 size 64
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port_in
+ extract h.ethernet
+ extract h.ipv4
+ jmpeq L1 h.ethernet.dst_addr 0xaabbccdd0000
+ mov m.port_out m.port_in
+ jmp L2
+ L1 : mov m.ip_byte_count h.ipv4.total_len
+ meter MET_ARRAY_1 h.ipv4.diffserv m.ip_byte_count 0x0 m.port_out
+ L2 : emit h.ethernet
+ emit h.ipv4
+ tx m.port_out
+}
diff --git a/dep/pipeline/met_004/pcap_files/in_1.txt b/dep/pipeline/met_004/pcap_files/in_1.txt
new file mode 100644
index 00000000..bda9815d
--- /dev/null
+++ b/dep/pipeline/met_004/pcap_files/in_1.txt
@@ -0,0 +1,32 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 3
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 4
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_004/pcap_files/out_11.txt b/dep/pipeline/met_004/pcap_files/out_11.txt
new file mode 100644
index 00000000..8536c501
--- /dev/null
+++ b/dep/pipeline/met_004/pcap_files/out_11.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_004/pcap_files/out_12.txt b/dep/pipeline/met_004/pcap_files/out_12.txt
new file mode 100644
index 00000000..8536c501
--- /dev/null
+++ b/dep/pipeline/met_004/pcap_files/out_12.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_004/pcap_files/out_13.txt b/dep/pipeline/met_004/pcap_files/out_13.txt
new file mode 100644
index 00000000..cf9cbb7a
--- /dev/null
+++ b/dep/pipeline/met_004/pcap_files/out_13.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_004/pcap_files/out_21.txt b/dep/pipeline/met_004/pcap_files/out_21.txt
new file mode 100644
index 00000000..bda9815d
--- /dev/null
+++ b/dep/pipeline/met_004/pcap_files/out_21.txt
@@ -0,0 +1,32 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 3
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 4
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_004/pcap_files/out_22.txt b/dep/pipeline/met_004/pcap_files/out_22.txt
new file mode 100644
index 00000000..d4bff8e1
--- /dev/null
+++ b/dep/pipeline/met_004/pcap_files/out_22.txt
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
\ No newline at end of file
diff --git a/dep/pipeline/met_004/pcap_files/out_23.txt b/dep/pipeline/met_004/pcap_files/out_23.txt
new file mode 100644
index 00000000..d4bff8e1
--- /dev/null
+++ b/dep/pipeline/met_004/pcap_files/out_23.txt
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
\ No newline at end of file
diff --git a/dep/pipeline/met_004/readme.md b/dep/pipeline/met_004/readme.md
new file mode 100644
index 00000000..87c9166b
--- /dev/null
+++ b/dep/pipeline/met_004/readme.md
@@ -0,0 +1,18 @@
+
+Test Case: test_met_004
+-----------------------
+
+ Instruction being tested:
+ meter METARRAY h.field m.field imm_val m.field
+
+ Description:
+ Use a meter of certain size. Assign a particular incoming flow (packets
+ having a certain destination MAC address) to a meter index. Set a meter
+ profile to that same meter index. Send packet burst to DUT at a rate
+ more than the supported CBS + PBS as well as at a rate less than
+ CBS + PBS.
+
+ Verification:
+ Packets received on Port 0 (Green packets), Port 1 (Yellow packets) &
+ Port 2 (Red packets) should comply with the meter profile used in
+ the DUT.
diff --git a/dep/pipeline/met_005/ethdev.io b/dep/pipeline/met_005/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/met_005/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/met_005/met_005.cli b/dep/pipeline/met_005/met_005.cli
new file mode 100644
index 00000000..7d1957a1
--- /dev/null
+++ b/dep/pipeline/met_005/met_005.cli
@@ -0,0 +1,23 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/met_005/met_005.spec /tmp/pipeline/met_005/met_005.c
+pipeline libbuild /tmp/pipeline/met_005/met_005.c /tmp/pipeline/met_005/met_005.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/met_005/met_005.so io /tmp/pipeline/met_005/ethdev.io numa 0
+
+pipeline PIPELINE0 meter profile platinum add cir 460 pir 1380 cbs 100 pbs 200
+pipeline PIPELINE0 meter MET_ARRAY_1 set profile platinum index from 0 to 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/met_005/met_005.spec b/dep/pipeline/met_005/met_005.spec
new file mode 100644
index 00000000..0d7222f7
--- /dev/null
+++ b/dep/pipeline/met_005/met_005.spec
@@ -0,0 +1,62 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2021 Intel Corporation
+
+//
+// Headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port_in
+ bit<32> port_out
+ bit<8> metarray_idx
+ bit<8> color_in
+}
+
+metadata instanceof metadata_t
+
+//
+// Meters.
+//
+metarray MET_ARRAY_1 size 64
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port_in
+ extract h.ethernet
+ extract h.ipv4
+ jmpeq L1 h.ethernet.dst_addr 0xaabbccdd0000
+ mov m.port_out m.port_in
+ jmp L2
+ L1 : mov m.metarray_idx h.ipv4.diffserv
+ mov m.color_in 0x0
+ meter MET_ARRAY_1 m.metarray_idx h.ipv4.total_len m.color_in m.port_out
+ L2 : emit h.ethernet
+ emit h.ipv4
+ tx m.port_out
+}
diff --git a/dep/pipeline/met_005/pcap_files/in_1.txt b/dep/pipeline/met_005/pcap_files/in_1.txt
new file mode 100644
index 00000000..bda9815d
--- /dev/null
+++ b/dep/pipeline/met_005/pcap_files/in_1.txt
@@ -0,0 +1,32 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 3
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 4
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_005/pcap_files/out_11.txt b/dep/pipeline/met_005/pcap_files/out_11.txt
new file mode 100644
index 00000000..8536c501
--- /dev/null
+++ b/dep/pipeline/met_005/pcap_files/out_11.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_005/pcap_files/out_12.txt b/dep/pipeline/met_005/pcap_files/out_12.txt
new file mode 100644
index 00000000..8536c501
--- /dev/null
+++ b/dep/pipeline/met_005/pcap_files/out_12.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_005/pcap_files/out_13.txt b/dep/pipeline/met_005/pcap_files/out_13.txt
new file mode 100644
index 00000000..cf9cbb7a
--- /dev/null
+++ b/dep/pipeline/met_005/pcap_files/out_13.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_005/pcap_files/out_21.txt b/dep/pipeline/met_005/pcap_files/out_21.txt
new file mode 100644
index 00000000..bda9815d
--- /dev/null
+++ b/dep/pipeline/met_005/pcap_files/out_21.txt
@@ -0,0 +1,32 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 3
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 4
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_005/pcap_files/out_22.txt b/dep/pipeline/met_005/pcap_files/out_22.txt
new file mode 100644
index 00000000..af0fc303
--- /dev/null
+++ b/dep/pipeline/met_005/pcap_files/out_22.txt
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
diff --git a/dep/pipeline/met_005/pcap_files/out_23.txt b/dep/pipeline/met_005/pcap_files/out_23.txt
new file mode 100644
index 00000000..af0fc303
--- /dev/null
+++ b/dep/pipeline/met_005/pcap_files/out_23.txt
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
diff --git a/dep/pipeline/met_005/readme.md b/dep/pipeline/met_005/readme.md
new file mode 100644
index 00000000..b1f08b62
--- /dev/null
+++ b/dep/pipeline/met_005/readme.md
@@ -0,0 +1,18 @@
+
+Test Case: test_met_005
+-----------------------
+
+ Instruction being tested:
+ meter METARRAY m.field h.field m.field m.field
+
+ Description:
+ Use a meter of certain size. Assign a particular incoming flow (packets
+ having a certain destination MAC address) to a meter index. Set a meter
+ profile to that same meter index. Send packet burst to DUT at a rate
+ more than the supported CBS + PBS as well as at a rate less than
+ CBS + PBS.
+
+ Verification:
+ Packets received on Port 0 (Green packets), Port 1 (Yellow packets) &
+ Port 2 (Red packets) should comply with the meter profile used in
+ the DUT.
diff --git a/dep/pipeline/met_006/ethdev.io b/dep/pipeline/met_006/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/met_006/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/met_006/met_006.cli b/dep/pipeline/met_006/met_006.cli
new file mode 100644
index 00000000..b6035177
--- /dev/null
+++ b/dep/pipeline/met_006/met_006.cli
@@ -0,0 +1,23 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/met_006/met_006.spec /tmp/pipeline/met_006/met_006.c
+pipeline libbuild /tmp/pipeline/met_006/met_006.c /tmp/pipeline/met_006/met_006.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/met_006/met_006.so io /tmp/pipeline/met_006/ethdev.io numa 0
+
+pipeline PIPELINE0 meter profile platinum add cir 460 pir 1380 cbs 100 pbs 200
+pipeline PIPELINE0 meter MET_ARRAY_1 set profile platinum index from 0 to 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/met_006/met_006.spec b/dep/pipeline/met_006/met_006.spec
new file mode 100644
index 00000000..b6eac157
--- /dev/null
+++ b/dep/pipeline/met_006/met_006.spec
@@ -0,0 +1,60 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2021 Intel Corporation
+
+//
+// Headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port_in
+ bit<32> port_out
+ bit<8> metarray_idx
+}
+
+metadata instanceof metadata_t
+
+//
+// Meters.
+//
+metarray MET_ARRAY_1 size 64
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port_in
+ extract h.ethernet
+ extract h.ipv4
+ jmpeq L1 h.ethernet.dst_addr 0xaabbccdd0000
+ mov m.port_out m.port_in
+ jmp L2
+ L1 : mov m.metarray_idx h.ipv4.diffserv
+ meter MET_ARRAY_1 m.metarray_idx h.ipv4.total_len 0x0 m.port_out
+ L2 : emit h.ethernet
+ emit h.ipv4
+ tx m.port_out
+}
diff --git a/dep/pipeline/met_006/pcap_files/in_1.txt b/dep/pipeline/met_006/pcap_files/in_1.txt
new file mode 100644
index 00000000..bda9815d
--- /dev/null
+++ b/dep/pipeline/met_006/pcap_files/in_1.txt
@@ -0,0 +1,32 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 3
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 4
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_006/pcap_files/out_11.txt b/dep/pipeline/met_006/pcap_files/out_11.txt
new file mode 100644
index 00000000..8536c501
--- /dev/null
+++ b/dep/pipeline/met_006/pcap_files/out_11.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_006/pcap_files/out_12.txt b/dep/pipeline/met_006/pcap_files/out_12.txt
new file mode 100644
index 00000000..8536c501
--- /dev/null
+++ b/dep/pipeline/met_006/pcap_files/out_12.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_006/pcap_files/out_13.txt b/dep/pipeline/met_006/pcap_files/out_13.txt
new file mode 100644
index 00000000..cf9cbb7a
--- /dev/null
+++ b/dep/pipeline/met_006/pcap_files/out_13.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_006/pcap_files/out_21.txt b/dep/pipeline/met_006/pcap_files/out_21.txt
new file mode 100644
index 00000000..bda9815d
--- /dev/null
+++ b/dep/pipeline/met_006/pcap_files/out_21.txt
@@ -0,0 +1,32 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 3
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 4
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_006/pcap_files/out_22.txt b/dep/pipeline/met_006/pcap_files/out_22.txt
new file mode 100644
index 00000000..af0fc303
--- /dev/null
+++ b/dep/pipeline/met_006/pcap_files/out_22.txt
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
diff --git a/dep/pipeline/met_006/pcap_files/out_23.txt b/dep/pipeline/met_006/pcap_files/out_23.txt
new file mode 100644
index 00000000..af0fc303
--- /dev/null
+++ b/dep/pipeline/met_006/pcap_files/out_23.txt
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
diff --git a/dep/pipeline/met_006/readme.md b/dep/pipeline/met_006/readme.md
new file mode 100644
index 00000000..c6d313c4
--- /dev/null
+++ b/dep/pipeline/met_006/readme.md
@@ -0,0 +1,18 @@
+
+Test Case: test_met_006
+-----------------------
+
+ Instruction being tested:
+ meter METARRAY m.field h.field imm_val m.field
+
+ Description:
+ Use a meter of certain size. Assign a particular incoming flow (packets
+ having a certain destination MAC address) to a meter index. Set a meter
+ profile to that same meter index. Send packet burst to DUT at a rate
+ more than the supported CBS + PBS as well as at a rate less than
+ CBS + PBS.
+
+ Verification:
+ Packets received on Port 0 (Green packets), Port 1 (Yellow packets) &
+ Port 2 (Red packets) should comply with the meter profile used in
+ the DUT.
diff --git a/dep/pipeline/met_007/ethdev.io b/dep/pipeline/met_007/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/met_007/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/met_007/met_007.cli b/dep/pipeline/met_007/met_007.cli
new file mode 100644
index 00000000..cbcc77a0
--- /dev/null
+++ b/dep/pipeline/met_007/met_007.cli
@@ -0,0 +1,23 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/met_007/met_007.spec /tmp/pipeline/met_007/met_007.c
+pipeline libbuild /tmp/pipeline/met_007/met_007.c /tmp/pipeline/met_007/met_007.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/met_007/met_007.so io /tmp/pipeline/met_007/ethdev.io numa 0
+
+pipeline PIPELINE0 meter profile platinum add cir 460 pir 1380 cbs 100 pbs 200
+pipeline PIPELINE0 meter MET_ARRAY_1 set profile platinum index from 0 to 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/met_007/met_007.spec b/dep/pipeline/met_007/met_007.spec
new file mode 100644
index 00000000..4e799907
--- /dev/null
+++ b/dep/pipeline/met_007/met_007.spec
@@ -0,0 +1,64 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2021 Intel Corporation
+
+//
+// Headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port_in
+ bit<32> port_out
+ bit<16> ip_byte_count
+ bit<8> metarray_idx
+ bit<8> color_in
+}
+
+metadata instanceof metadata_t
+
+//
+// Meters.
+//
+metarray MET_ARRAY_1 size 64
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port_in
+ extract h.ethernet
+ extract h.ipv4
+ jmpeq L1 h.ethernet.dst_addr 0xaabbccdd0000
+ mov m.port_out m.port_in
+ jmp L2
+ L1 : mov m.metarray_idx h.ipv4.diffserv
+ mov m.ip_byte_count h.ipv4.total_len
+ mov m.color_in 0x0
+ meter MET_ARRAY_1 m.metarray_idx m.ip_byte_count m.color_in m.port_out
+ L2 : emit h.ethernet
+ emit h.ipv4
+ tx m.port_out
+}
diff --git a/dep/pipeline/met_007/pcap_files/in_1.txt b/dep/pipeline/met_007/pcap_files/in_1.txt
new file mode 100644
index 00000000..bda9815d
--- /dev/null
+++ b/dep/pipeline/met_007/pcap_files/in_1.txt
@@ -0,0 +1,32 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 3
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 4
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_007/pcap_files/out_11.txt b/dep/pipeline/met_007/pcap_files/out_11.txt
new file mode 100644
index 00000000..8536c501
--- /dev/null
+++ b/dep/pipeline/met_007/pcap_files/out_11.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_007/pcap_files/out_12.txt b/dep/pipeline/met_007/pcap_files/out_12.txt
new file mode 100644
index 00000000..8536c501
--- /dev/null
+++ b/dep/pipeline/met_007/pcap_files/out_12.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_007/pcap_files/out_13.txt b/dep/pipeline/met_007/pcap_files/out_13.txt
new file mode 100644
index 00000000..cf9cbb7a
--- /dev/null
+++ b/dep/pipeline/met_007/pcap_files/out_13.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_007/pcap_files/out_21.txt b/dep/pipeline/met_007/pcap_files/out_21.txt
new file mode 100644
index 00000000..bda9815d
--- /dev/null
+++ b/dep/pipeline/met_007/pcap_files/out_21.txt
@@ -0,0 +1,32 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 3
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 4
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_007/pcap_files/out_22.txt b/dep/pipeline/met_007/pcap_files/out_22.txt
new file mode 100644
index 00000000..af0fc303
--- /dev/null
+++ b/dep/pipeline/met_007/pcap_files/out_22.txt
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
diff --git a/dep/pipeline/met_007/pcap_files/out_23.txt b/dep/pipeline/met_007/pcap_files/out_23.txt
new file mode 100644
index 00000000..af0fc303
--- /dev/null
+++ b/dep/pipeline/met_007/pcap_files/out_23.txt
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
diff --git a/dep/pipeline/met_007/readme.md b/dep/pipeline/met_007/readme.md
new file mode 100644
index 00000000..d9f97e60
--- /dev/null
+++ b/dep/pipeline/met_007/readme.md
@@ -0,0 +1,18 @@
+
+Test Case: test_met_007
+-----------------------
+
+ Instruction being tested:
+ meter METARRAY m.field m.field m.field m.field
+
+ Description:
+ Use a meter of certain size. Assign a particular incoming flow (packets
+ having a certain destination MAC address) to a meter index. Set a meter
+ profile to that same meter index. Send packet burst to DUT at a rate
+ more than the supported CBS + PBS as well as at a rate less than
+ CBS + PBS.
+
+ Verification:
+ Packets received on Port 0 (Green packets), Port 1 (Yellow packets) &
+ Port 2 (Red packets) should comply with the meter profile used in
+ the DUT.
diff --git a/dep/pipeline/met_008/ethdev.io b/dep/pipeline/met_008/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/met_008/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/met_008/met_008.cli b/dep/pipeline/met_008/met_008.cli
new file mode 100644
index 00000000..c2585d45
--- /dev/null
+++ b/dep/pipeline/met_008/met_008.cli
@@ -0,0 +1,23 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/met_008/met_008.spec /tmp/pipeline/met_008/met_008.c
+pipeline libbuild /tmp/pipeline/met_008/met_008.c /tmp/pipeline/met_008/met_008.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/met_008/met_008.so io /tmp/pipeline/met_008/ethdev.io numa 0
+
+pipeline PIPELINE0 meter profile platinum add cir 460 pir 1380 cbs 100 pbs 200
+pipeline PIPELINE0 meter MET_ARRAY_1 set profile platinum index from 0 to 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/met_008/met_008.spec b/dep/pipeline/met_008/met_008.spec
new file mode 100644
index 00000000..56af8fee
--- /dev/null
+++ b/dep/pipeline/met_008/met_008.spec
@@ -0,0 +1,62 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2021 Intel Corporation
+
+//
+// Headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port_in
+ bit<32> port_out
+ bit<16> ip_byte_count
+ bit<8> metarray_idx
+}
+
+metadata instanceof metadata_t
+
+//
+// Meters.
+//
+metarray MET_ARRAY_1 size 64
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port_in
+ extract h.ethernet
+ extract h.ipv4
+ jmpeq L1 h.ethernet.dst_addr 0xaabbccdd0000
+ mov m.port_out m.port_in
+ jmp L2
+ L1 : mov m.metarray_idx h.ipv4.diffserv
+ mov m.ip_byte_count h.ipv4.total_len
+ meter MET_ARRAY_1 m.metarray_idx m.ip_byte_count 0x0 m.port_out
+ L2 : emit h.ethernet
+ emit h.ipv4
+ tx m.port_out
+}
diff --git a/dep/pipeline/met_008/pcap_files/in_1.txt b/dep/pipeline/met_008/pcap_files/in_1.txt
new file mode 100644
index 00000000..bda9815d
--- /dev/null
+++ b/dep/pipeline/met_008/pcap_files/in_1.txt
@@ -0,0 +1,32 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 3
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 4
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_008/pcap_files/out_11.txt b/dep/pipeline/met_008/pcap_files/out_11.txt
new file mode 100644
index 00000000..8536c501
--- /dev/null
+++ b/dep/pipeline/met_008/pcap_files/out_11.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_008/pcap_files/out_12.txt b/dep/pipeline/met_008/pcap_files/out_12.txt
new file mode 100644
index 00000000..8536c501
--- /dev/null
+++ b/dep/pipeline/met_008/pcap_files/out_12.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_008/pcap_files/out_13.txt b/dep/pipeline/met_008/pcap_files/out_13.txt
new file mode 100644
index 00000000..cf9cbb7a
--- /dev/null
+++ b/dep/pipeline/met_008/pcap_files/out_13.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_008/pcap_files/out_21.txt b/dep/pipeline/met_008/pcap_files/out_21.txt
new file mode 100644
index 00000000..bda9815d
--- /dev/null
+++ b/dep/pipeline/met_008/pcap_files/out_21.txt
@@ -0,0 +1,32 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 3
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 4
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_008/pcap_files/out_22.txt b/dep/pipeline/met_008/pcap_files/out_22.txt
new file mode 100644
index 00000000..af0fc303
--- /dev/null
+++ b/dep/pipeline/met_008/pcap_files/out_22.txt
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
diff --git a/dep/pipeline/met_008/pcap_files/out_23.txt b/dep/pipeline/met_008/pcap_files/out_23.txt
new file mode 100644
index 00000000..af0fc303
--- /dev/null
+++ b/dep/pipeline/met_008/pcap_files/out_23.txt
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
diff --git a/dep/pipeline/met_008/readme.md b/dep/pipeline/met_008/readme.md
new file mode 100644
index 00000000..255efe57
--- /dev/null
+++ b/dep/pipeline/met_008/readme.md
@@ -0,0 +1,18 @@
+
+Test Case: test_met_008
+-----------------------
+
+ Instruction being tested:
+ meter METARRAY m.field m.field imm_val m.field
+
+ Description:
+ Use a meter of certain size. Assign a particular incoming flow (packets
+ having a certain destination MAC address) to a meter index. Set a meter
+ profile to that same meter index. Send packet burst to DUT at a rate
+ more than the supported CBS + PBS as well as at a rate less than
+ CBS + PBS.
+
+ Verification:
+ Packets received on Port 0 (Green packets), Port 1 (Yellow packets) &
+ Port 2 (Red packets) should comply with the meter profile used in
+ the DUT.
diff --git a/dep/pipeline/met_009/ethdev.io b/dep/pipeline/met_009/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/met_009/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/met_009/met_009.cli b/dep/pipeline/met_009/met_009.cli
new file mode 100644
index 00000000..4db067f7
--- /dev/null
+++ b/dep/pipeline/met_009/met_009.cli
@@ -0,0 +1,23 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/met_009/met_009.spec /tmp/pipeline/met_009/met_009.c
+pipeline libbuild /tmp/pipeline/met_009/met_009.c /tmp/pipeline/met_009/met_009.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/met_009/met_009.so io /tmp/pipeline/met_009/ethdev.io numa 0
+
+pipeline PIPELINE0 meter profile platinum add cir 460 pir 1380 cbs 100 pbs 200
+pipeline PIPELINE0 meter MET_ARRAY_1 set profile platinum index from 0 to 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/met_009/met_009.spec b/dep/pipeline/met_009/met_009.spec
new file mode 100644
index 00000000..dfbc8cee
--- /dev/null
+++ b/dep/pipeline/met_009/met_009.spec
@@ -0,0 +1,60 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2021 Intel Corporation
+
+//
+// Headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port_in
+ bit<32> port_out
+ bit<8> color_in
+}
+
+metadata instanceof metadata_t
+
+//
+// Meters.
+//
+metarray MET_ARRAY_1 size 64
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port_in
+ extract h.ethernet
+ extract h.ipv4
+ jmpeq L1 h.ethernet.dst_addr 0xaabbccdd0000
+ mov m.port_out m.port_in
+ jmp L2
+ L1 : mov m.color_in 0x0
+ meter MET_ARRAY_1 0x0 h.ipv4.total_len m.color_in m.port_out
+ L2 : emit h.ethernet
+ emit h.ipv4
+ tx m.port_out
+}
diff --git a/dep/pipeline/met_009/pcap_files/in_1.txt b/dep/pipeline/met_009/pcap_files/in_1.txt
new file mode 100644
index 00000000..bda9815d
--- /dev/null
+++ b/dep/pipeline/met_009/pcap_files/in_1.txt
@@ -0,0 +1,32 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 3
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 4
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_009/pcap_files/out_11.txt b/dep/pipeline/met_009/pcap_files/out_11.txt
new file mode 100644
index 00000000..8536c501
--- /dev/null
+++ b/dep/pipeline/met_009/pcap_files/out_11.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_009/pcap_files/out_12.txt b/dep/pipeline/met_009/pcap_files/out_12.txt
new file mode 100644
index 00000000..8536c501
--- /dev/null
+++ b/dep/pipeline/met_009/pcap_files/out_12.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_009/pcap_files/out_13.txt b/dep/pipeline/met_009/pcap_files/out_13.txt
new file mode 100644
index 00000000..cf9cbb7a
--- /dev/null
+++ b/dep/pipeline/met_009/pcap_files/out_13.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_009/pcap_files/out_21.txt b/dep/pipeline/met_009/pcap_files/out_21.txt
new file mode 100644
index 00000000..bda9815d
--- /dev/null
+++ b/dep/pipeline/met_009/pcap_files/out_21.txt
@@ -0,0 +1,32 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 3
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 4
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_009/pcap_files/out_22.txt b/dep/pipeline/met_009/pcap_files/out_22.txt
new file mode 100644
index 00000000..af0fc303
--- /dev/null
+++ b/dep/pipeline/met_009/pcap_files/out_22.txt
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
diff --git a/dep/pipeline/met_009/pcap_files/out_23.txt b/dep/pipeline/met_009/pcap_files/out_23.txt
new file mode 100644
index 00000000..af0fc303
--- /dev/null
+++ b/dep/pipeline/met_009/pcap_files/out_23.txt
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
diff --git a/dep/pipeline/met_009/readme.md b/dep/pipeline/met_009/readme.md
new file mode 100644
index 00000000..60cf0f88
--- /dev/null
+++ b/dep/pipeline/met_009/readme.md
@@ -0,0 +1,18 @@
+
+Test Case: test_met_009
+-----------------------
+
+ Instruction being tested:
+ meter METARRAY imm_val h.field m.field m.field
+
+ Description:
+ Use a meter of certain size. Assign a particular incoming flow (packets
+ having a certain destination MAC address) to a meter index. Set a meter
+ profile to that same meter index. Send packet burst to DUT at a rate
+ more than the supported CBS + PBS as well as at a rate less than
+ CBS + PBS.
+
+ Verification:
+ Packets received on Port 0 (Green packets), Port 1 (Yellow packets) &
+ Port 2 (Red packets) should comply with the meter profile used in
+ the DUT.
diff --git a/dep/pipeline/met_010/ethdev.io b/dep/pipeline/met_010/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/met_010/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/met_010/met_010.cli b/dep/pipeline/met_010/met_010.cli
new file mode 100644
index 00000000..c06157a6
--- /dev/null
+++ b/dep/pipeline/met_010/met_010.cli
@@ -0,0 +1,23 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/met_010/met_010.spec /tmp/pipeline/met_010/met_010.c
+pipeline libbuild /tmp/pipeline/met_010/met_010.c /tmp/pipeline/met_010/met_010.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/met_010/met_010.so io /tmp/pipeline/met_010/ethdev.io numa 0
+
+pipeline PIPELINE0 meter profile platinum add cir 460 pir 1380 cbs 100 pbs 200
+pipeline PIPELINE0 meter MET_ARRAY_1 set profile platinum index from 0 to 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/met_010/met_010.spec b/dep/pipeline/met_010/met_010.spec
new file mode 100644
index 00000000..c78f4f5e
--- /dev/null
+++ b/dep/pipeline/met_010/met_010.spec
@@ -0,0 +1,58 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2021 Intel Corporation
+
+//
+// Headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port_in
+ bit<32> port_out
+}
+
+metadata instanceof metadata_t
+
+//
+// Meters.
+//
+metarray MET_ARRAY_1 size 64
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port_in
+ extract h.ethernet
+ extract h.ipv4
+ jmpeq L1 h.ethernet.dst_addr 0xaabbccdd0000
+ mov m.port_out m.port_in
+ jmp L2
+ L1 : meter MET_ARRAY_1 0x0 h.ipv4.total_len 0x0 m.port_out
+ L2 : emit h.ethernet
+ emit h.ipv4
+ tx m.port_out
+}
diff --git a/dep/pipeline/met_010/pcap_files/in_1.txt b/dep/pipeline/met_010/pcap_files/in_1.txt
new file mode 100644
index 00000000..bda9815d
--- /dev/null
+++ b/dep/pipeline/met_010/pcap_files/in_1.txt
@@ -0,0 +1,32 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 3
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 4
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_010/pcap_files/out_11.txt b/dep/pipeline/met_010/pcap_files/out_11.txt
new file mode 100644
index 00000000..8536c501
--- /dev/null
+++ b/dep/pipeline/met_010/pcap_files/out_11.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_010/pcap_files/out_12.txt b/dep/pipeline/met_010/pcap_files/out_12.txt
new file mode 100644
index 00000000..8536c501
--- /dev/null
+++ b/dep/pipeline/met_010/pcap_files/out_12.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_010/pcap_files/out_13.txt b/dep/pipeline/met_010/pcap_files/out_13.txt
new file mode 100644
index 00000000..cf9cbb7a
--- /dev/null
+++ b/dep/pipeline/met_010/pcap_files/out_13.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_010/pcap_files/out_21.txt b/dep/pipeline/met_010/pcap_files/out_21.txt
new file mode 100644
index 00000000..bda9815d
--- /dev/null
+++ b/dep/pipeline/met_010/pcap_files/out_21.txt
@@ -0,0 +1,32 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 3
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 4
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_010/pcap_files/out_22.txt b/dep/pipeline/met_010/pcap_files/out_22.txt
new file mode 100644
index 00000000..d4bff8e1
--- /dev/null
+++ b/dep/pipeline/met_010/pcap_files/out_22.txt
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
\ No newline at end of file
diff --git a/dep/pipeline/met_010/pcap_files/out_23.txt b/dep/pipeline/met_010/pcap_files/out_23.txt
new file mode 100644
index 00000000..d4bff8e1
--- /dev/null
+++ b/dep/pipeline/met_010/pcap_files/out_23.txt
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
\ No newline at end of file
diff --git a/dep/pipeline/met_010/readme.md b/dep/pipeline/met_010/readme.md
new file mode 100644
index 00000000..c5a64792
--- /dev/null
+++ b/dep/pipeline/met_010/readme.md
@@ -0,0 +1,18 @@
+
+Test Case: test_met_010
+-----------------------
+
+ Instruction being tested:
+ meter METARRAY imm_val h.field imm_val m.field
+
+ Description:
+ Use a meter of certain size. Assign a particular incoming flow (packets
+ having a certain destination MAC address) to a meter index. Set a meter
+ profile to that same meter index. Send packet burst to DUT at a rate
+ more than the supported CBS + PBS as well as at a rate less than
+ CBS + PBS.
+
+ Verification:
+ Packets received on Port 0 (Green packets), Port 1 (Yellow packets) &
+ Port 2 (Red packets) should comply with the meter profile used in
+ the DUT.
diff --git a/dep/pipeline/met_011/ethdev.io b/dep/pipeline/met_011/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/met_011/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/met_011/met_011.cli b/dep/pipeline/met_011/met_011.cli
new file mode 100644
index 00000000..cd3c2a81
--- /dev/null
+++ b/dep/pipeline/met_011/met_011.cli
@@ -0,0 +1,23 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/met_011/met_011.spec /tmp/pipeline/met_011/met_011.c
+pipeline libbuild /tmp/pipeline/met_011/met_011.c /tmp/pipeline/met_011/met_011.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/met_011/met_011.so io /tmp/pipeline/met_011/ethdev.io numa 0
+
+pipeline PIPELINE0 meter profile platinum add cir 460 pir 1380 cbs 100 pbs 200
+pipeline PIPELINE0 meter MET_ARRAY_1 set profile platinum index from 0 to 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/met_011/met_011.spec b/dep/pipeline/met_011/met_011.spec
new file mode 100644
index 00000000..361fc31b
--- /dev/null
+++ b/dep/pipeline/met_011/met_011.spec
@@ -0,0 +1,62 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2021 Intel Corporation
+
+//
+// Headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port_in
+ bit<32> port_out
+ bit<16> ip_byte_count
+ bit<8> color_in
+}
+
+metadata instanceof metadata_t
+
+//
+// Meters.
+//
+metarray MET_ARRAY_1 size 64
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port_in
+ extract h.ethernet
+ extract h.ipv4
+ jmpeq L1 h.ethernet.dst_addr 0xaabbccdd0000
+ mov m.port_out m.port_in
+ jmp L2
+ L1 : mov m.ip_byte_count h.ipv4.total_len
+ mov m.color_in 0x0
+ meter MET_ARRAY_1 0x0 m.ip_byte_count m.color_in m.port_out
+ L2 : emit h.ethernet
+ emit h.ipv4
+ tx m.port_out
+}
diff --git a/dep/pipeline/met_011/pcap_files/in_1.txt b/dep/pipeline/met_011/pcap_files/in_1.txt
new file mode 100644
index 00000000..bda9815d
--- /dev/null
+++ b/dep/pipeline/met_011/pcap_files/in_1.txt
@@ -0,0 +1,32 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 3
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 4
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_011/pcap_files/out_11.txt b/dep/pipeline/met_011/pcap_files/out_11.txt
new file mode 100644
index 00000000..8536c501
--- /dev/null
+++ b/dep/pipeline/met_011/pcap_files/out_11.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_011/pcap_files/out_12.txt b/dep/pipeline/met_011/pcap_files/out_12.txt
new file mode 100644
index 00000000..8536c501
--- /dev/null
+++ b/dep/pipeline/met_011/pcap_files/out_12.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_011/pcap_files/out_13.txt b/dep/pipeline/met_011/pcap_files/out_13.txt
new file mode 100644
index 00000000..cf9cbb7a
--- /dev/null
+++ b/dep/pipeline/met_011/pcap_files/out_13.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_011/pcap_files/out_21.txt b/dep/pipeline/met_011/pcap_files/out_21.txt
new file mode 100644
index 00000000..bda9815d
--- /dev/null
+++ b/dep/pipeline/met_011/pcap_files/out_21.txt
@@ -0,0 +1,32 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 3
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 4
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_011/pcap_files/out_22.txt b/dep/pipeline/met_011/pcap_files/out_22.txt
new file mode 100644
index 00000000..af0fc303
--- /dev/null
+++ b/dep/pipeline/met_011/pcap_files/out_22.txt
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
diff --git a/dep/pipeline/met_011/pcap_files/out_23.txt b/dep/pipeline/met_011/pcap_files/out_23.txt
new file mode 100644
index 00000000..af0fc303
--- /dev/null
+++ b/dep/pipeline/met_011/pcap_files/out_23.txt
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
diff --git a/dep/pipeline/met_011/readme.md b/dep/pipeline/met_011/readme.md
new file mode 100644
index 00000000..2b84dee6
--- /dev/null
+++ b/dep/pipeline/met_011/readme.md
@@ -0,0 +1,18 @@
+
+Test Case: test_met_011
+-----------------------
+
+ Instruction being tested:
+ meter METARRAY imm_val m.field m.field m.field
+
+ Description:
+ Use a meter of certain size. Assign a particular incoming flow (packets
+ having a certain destination MAC address) to a meter index. Set a meter
+ profile to that same meter index. Send packet burst to DUT at a rate
+ more than the supported CBS + PBS as well as at a rate less than
+ CBS + PBS.
+
+ Verification:
+ Packets received on Port 0 (Green packets), Port 1 (Yellow packets) &
+ Port 2 (Red packets) should comply with the meter profile used in
+ the DUT.
diff --git a/dep/pipeline/met_012/ethdev.io b/dep/pipeline/met_012/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/met_012/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/met_012/met_012.cli b/dep/pipeline/met_012/met_012.cli
new file mode 100644
index 00000000..0241d073
--- /dev/null
+++ b/dep/pipeline/met_012/met_012.cli
@@ -0,0 +1,23 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/met_012/met_012.spec /tmp/pipeline/met_012/met_012.c
+pipeline libbuild /tmp/pipeline/met_012/met_012.c /tmp/pipeline/met_012/met_012.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/met_012/met_012.so io /tmp/pipeline/met_012/ethdev.io numa 0
+
+pipeline PIPELINE0 meter profile platinum add cir 460 pir 1380 cbs 100 pbs 200
+pipeline PIPELINE0 meter MET_ARRAY_1 set profile platinum index from 0 to 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/met_012/met_012.spec b/dep/pipeline/met_012/met_012.spec
new file mode 100644
index 00000000..e214e16f
--- /dev/null
+++ b/dep/pipeline/met_012/met_012.spec
@@ -0,0 +1,60 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2021 Intel Corporation
+
+//
+// Headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port_in
+ bit<32> port_out
+ bit<16> ip_byte_count
+}
+
+metadata instanceof metadata_t
+
+//
+// Meters.
+//
+metarray MET_ARRAY_1 size 64
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port_in
+ extract h.ethernet
+ extract h.ipv4
+ jmpeq L1 h.ethernet.dst_addr 0xaabbccdd0000
+ mov m.port_out m.port_in
+ jmp L2
+ L1 : mov m.ip_byte_count h.ipv4.total_len
+ meter MET_ARRAY_1 0x0 m.ip_byte_count 0x0 m.port_out
+ L2 : emit h.ethernet
+ emit h.ipv4
+ tx m.port_out
+}
diff --git a/dep/pipeline/met_012/pcap_files/in_1.txt b/dep/pipeline/met_012/pcap_files/in_1.txt
new file mode 100644
index 00000000..bda9815d
--- /dev/null
+++ b/dep/pipeline/met_012/pcap_files/in_1.txt
@@ -0,0 +1,32 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 3
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 4
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_012/pcap_files/out_11.txt b/dep/pipeline/met_012/pcap_files/out_11.txt
new file mode 100644
index 00000000..8536c501
--- /dev/null
+++ b/dep/pipeline/met_012/pcap_files/out_11.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_012/pcap_files/out_12.txt b/dep/pipeline/met_012/pcap_files/out_12.txt
new file mode 100644
index 00000000..8536c501
--- /dev/null
+++ b/dep/pipeline/met_012/pcap_files/out_12.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_012/pcap_files/out_13.txt b/dep/pipeline/met_012/pcap_files/out_13.txt
new file mode 100644
index 00000000..cf9cbb7a
--- /dev/null
+++ b/dep/pipeline/met_012/pcap_files/out_13.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_012/pcap_files/out_21.txt b/dep/pipeline/met_012/pcap_files/out_21.txt
new file mode 100644
index 00000000..bda9815d
--- /dev/null
+++ b/dep/pipeline/met_012/pcap_files/out_21.txt
@@ -0,0 +1,32 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 3
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 4
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_012/pcap_files/out_22.txt b/dep/pipeline/met_012/pcap_files/out_22.txt
new file mode 100644
index 00000000..af0fc303
--- /dev/null
+++ b/dep/pipeline/met_012/pcap_files/out_22.txt
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
diff --git a/dep/pipeline/met_012/pcap_files/out_23.txt b/dep/pipeline/met_012/pcap_files/out_23.txt
new file mode 100644
index 00000000..af0fc303
--- /dev/null
+++ b/dep/pipeline/met_012/pcap_files/out_23.txt
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
diff --git a/dep/pipeline/met_012/readme.md b/dep/pipeline/met_012/readme.md
new file mode 100644
index 00000000..76e28182
--- /dev/null
+++ b/dep/pipeline/met_012/readme.md
@@ -0,0 +1,18 @@
+
+Test Case: test_met_012
+-----------------------
+
+ Instruction being tested:
+ meter METARRAY imm_val m.field imm_val m.field
+
+ Description:
+ Use a meter of certain size. Assign a particular incoming flow (packets
+ having a certain destination MAC address) to a meter index. Set a meter
+ profile to that same meter index. Send packet burst to DUT at a rate
+ more than the supported CBS + PBS as well as at a rate less than
+ CBS + PBS.
+
+ Verification:
+ Packets received on Port 0 (Green packets), Port 1 (Yellow packets) &
+ Port 2 (Red packets) should comply with the meter profile used in
+ the DUT.
diff --git a/dep/pipeline/met_013/ethdev.io b/dep/pipeline/met_013/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/met_013/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/met_013/met_013.cli b/dep/pipeline/met_013/met_013.cli
new file mode 100644
index 00000000..16e27ca7
--- /dev/null
+++ b/dep/pipeline/met_013/met_013.cli
@@ -0,0 +1,23 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/met_013/met_013.spec /tmp/pipeline/met_013/met_013.c
+pipeline libbuild /tmp/pipeline/met_013/met_013.c /tmp/pipeline/met_013/met_013.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/met_013/met_013.so io /tmp/pipeline/met_013/ethdev.io numa 0
+
+pipeline PIPELINE0 meter profile platinum add cir 460 pir 1380 cbs 100 pbs 200
+pipeline PIPELINE0 meter MET_ARRAY_1 set profile platinum index from 0 to 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/met_013/met_013.spec b/dep/pipeline/met_013/met_013.spec
new file mode 100644
index 00000000..045d393a
--- /dev/null
+++ b/dep/pipeline/met_013/met_013.spec
@@ -0,0 +1,61 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2021 Intel Corporation
+
+//
+// Headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port_in
+ bit<32> port_out
+ bit<8> color_in
+}
+
+metadata instanceof metadata_t
+
+//
+// Meters.
+//
+metarray MET_ARRAY_1 size 64
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port_in
+ extract h.ethernet
+ extract h.ipv4
+ jmpeq L1 h.ethernet.dst_addr 0xaabbccdd0000
+ mov m.port_out m.port_in
+ jmp L2
+ L1 : metprefetch MET_ARRAY_1 h.ipv4.diffserv
+ mov m.color_in 0x0
+ meter MET_ARRAY_1 h.ipv4.diffserv h.ipv4.total_len m.color_in m.port_out
+ L2 : emit h.ethernet
+ emit h.ipv4
+ tx m.port_out
+}
diff --git a/dep/pipeline/met_013/pcap_files/in_1.txt b/dep/pipeline/met_013/pcap_files/in_1.txt
new file mode 100644
index 00000000..bda9815d
--- /dev/null
+++ b/dep/pipeline/met_013/pcap_files/in_1.txt
@@ -0,0 +1,32 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 3
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 4
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_013/pcap_files/out_11.txt b/dep/pipeline/met_013/pcap_files/out_11.txt
new file mode 100644
index 00000000..8536c501
--- /dev/null
+++ b/dep/pipeline/met_013/pcap_files/out_11.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_013/pcap_files/out_12.txt b/dep/pipeline/met_013/pcap_files/out_12.txt
new file mode 100644
index 00000000..8536c501
--- /dev/null
+++ b/dep/pipeline/met_013/pcap_files/out_12.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_013/pcap_files/out_13.txt b/dep/pipeline/met_013/pcap_files/out_13.txt
new file mode 100644
index 00000000..cf9cbb7a
--- /dev/null
+++ b/dep/pipeline/met_013/pcap_files/out_13.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_013/readme.md b/dep/pipeline/met_013/readme.md
new file mode 100644
index 00000000..ee23b8fc
--- /dev/null
+++ b/dep/pipeline/met_013/readme.md
@@ -0,0 +1,18 @@
+
+Test Case: test_met_013
+-----------------------
+
+ Instruction being tested:
+ metprefetch METARRAY h.field
+
+ Description:
+ Use a meter of certain size. Assign a particular incoming flow (packets
+ having a certain destination MAC address) to a meter index. Set a meter
+ profile to that same meter index. Send packet burst to DUT at a rate
+ more than the supported CBS + PBS as well as at a rate less than
+ CBS + PBS.
+
+ Verification:
+ Packets received on Port 0 (Green packets), Port 1 (Yellow packets) &
+ Port 2 (Red packets) should comply with the meter profile used in
+ the DUT.
diff --git a/dep/pipeline/met_014/ethdev.io b/dep/pipeline/met_014/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/met_014/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/met_014/met_014.cli b/dep/pipeline/met_014/met_014.cli
new file mode 100644
index 00000000..29c32279
--- /dev/null
+++ b/dep/pipeline/met_014/met_014.cli
@@ -0,0 +1,23 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/met_014/met_014.spec /tmp/pipeline/met_014/met_014.c
+pipeline libbuild /tmp/pipeline/met_014/met_014.c /tmp/pipeline/met_014/met_014.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/met_014/met_014.so io /tmp/pipeline/met_014/ethdev.io numa 0
+
+pipeline PIPELINE0 meter profile platinum add cir 460 pir 1380 cbs 100 pbs 200
+pipeline PIPELINE0 meter MET_ARRAY_1 set profile platinum index from 0 to 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/met_014/met_014.spec b/dep/pipeline/met_014/met_014.spec
new file mode 100644
index 00000000..fef9e9ba
--- /dev/null
+++ b/dep/pipeline/met_014/met_014.spec
@@ -0,0 +1,63 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2021 Intel Corporation
+
+//
+// Headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port_in
+ bit<32> port_out
+ bit<8> metarray_idx
+ bit<8> color_in
+}
+
+metadata instanceof metadata_t
+
+//
+// Meters.
+//
+metarray MET_ARRAY_1 size 64
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port_in
+ extract h.ethernet
+ extract h.ipv4
+ jmpeq L1 h.ethernet.dst_addr 0xaabbccdd0000
+ mov m.port_out m.port_in
+ jmp L2
+ L1 : mov m.metarray_idx h.ipv4.diffserv
+ metprefetch MET_ARRAY_1 m.metarray_idx
+ mov m.color_in 0x0
+ meter MET_ARRAY_1 m.metarray_idx h.ipv4.total_len m.color_in m.port_out
+ L2 : emit h.ethernet
+ emit h.ipv4
+ tx m.port_out
+}
diff --git a/dep/pipeline/met_014/pcap_files/in_1.txt b/dep/pipeline/met_014/pcap_files/in_1.txt
new file mode 100644
index 00000000..bda9815d
--- /dev/null
+++ b/dep/pipeline/met_014/pcap_files/in_1.txt
@@ -0,0 +1,32 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 3
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 4
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_014/pcap_files/out_11.txt b/dep/pipeline/met_014/pcap_files/out_11.txt
new file mode 100644
index 00000000..8536c501
--- /dev/null
+++ b/dep/pipeline/met_014/pcap_files/out_11.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_014/pcap_files/out_12.txt b/dep/pipeline/met_014/pcap_files/out_12.txt
new file mode 100644
index 00000000..8536c501
--- /dev/null
+++ b/dep/pipeline/met_014/pcap_files/out_12.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_014/pcap_files/out_13.txt b/dep/pipeline/met_014/pcap_files/out_13.txt
new file mode 100644
index 00000000..cf9cbb7a
--- /dev/null
+++ b/dep/pipeline/met_014/pcap_files/out_13.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_014/readme.md b/dep/pipeline/met_014/readme.md
new file mode 100644
index 00000000..673382b1
--- /dev/null
+++ b/dep/pipeline/met_014/readme.md
@@ -0,0 +1,18 @@
+
+Test Case: test_met_014
+-----------------------
+
+ Instruction being tested:
+ metprefetch METARRAY m.field
+
+ Description:
+ Use a meter of certain size. Assign a particular incoming flow (packets
+ having a certain destination MAC address) to a meter index. Set a meter
+ profile to that same meter index. Send packet burst to DUT at a rate
+ more than the supported CBS + PBS as well as at a rate less than
+ CBS + PBS.
+
+ Verification:
+ Packets received on Port 0 (Green packets), Port 1 (Yellow packets) &
+ Port 2 (Red packets) should comply with the meter profile used in
+ the DUT.
diff --git a/dep/pipeline/met_015/ethdev.io b/dep/pipeline/met_015/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/met_015/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/met_015/met_015.cli b/dep/pipeline/met_015/met_015.cli
new file mode 100644
index 00000000..b0fecc3c
--- /dev/null
+++ b/dep/pipeline/met_015/met_015.cli
@@ -0,0 +1,23 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/met_015/met_015.spec /tmp/pipeline/met_015/met_015.c
+pipeline libbuild /tmp/pipeline/met_015/met_015.c /tmp/pipeline/met_015/met_015.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/met_015/met_015.so io /tmp/pipeline/met_015/ethdev.io numa 0
+
+pipeline PIPELINE0 meter profile platinum add cir 460 pir 1380 cbs 100 pbs 200
+pipeline PIPELINE0 meter MET_ARRAY_1 set profile platinum index from 0 to 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/met_015/met_015.spec b/dep/pipeline/met_015/met_015.spec
new file mode 100644
index 00000000..39f15b3f
--- /dev/null
+++ b/dep/pipeline/met_015/met_015.spec
@@ -0,0 +1,61 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2021 Intel Corporation
+
+//
+// Headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port_in
+ bit<32> port_out
+ bit<8> color_in
+}
+
+metadata instanceof metadata_t
+
+//
+// Meters.
+//
+metarray MET_ARRAY_1 size 64
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port_in
+ extract h.ethernet
+ extract h.ipv4
+ jmpeq L1 h.ethernet.dst_addr 0xaabbccdd0000
+ mov m.port_out m.port_in
+ jmp L2
+ L1 : metprefetch MET_ARRAY_1 0x0
+ mov m.color_in 0x0
+ meter MET_ARRAY_1 0x0 h.ipv4.total_len m.color_in m.port_out
+ L2 : emit h.ethernet
+ emit h.ipv4
+ tx m.port_out
+}
diff --git a/dep/pipeline/met_015/pcap_files/in_1.txt b/dep/pipeline/met_015/pcap_files/in_1.txt
new file mode 100644
index 00000000..bda9815d
--- /dev/null
+++ b/dep/pipeline/met_015/pcap_files/in_1.txt
@@ -0,0 +1,32 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 3
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 4
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_015/pcap_files/out_11.txt b/dep/pipeline/met_015/pcap_files/out_11.txt
new file mode 100644
index 00000000..8536c501
--- /dev/null
+++ b/dep/pipeline/met_015/pcap_files/out_11.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_015/pcap_files/out_12.txt b/dep/pipeline/met_015/pcap_files/out_12.txt
new file mode 100644
index 00000000..8536c501
--- /dev/null
+++ b/dep/pipeline/met_015/pcap_files/out_12.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_015/pcap_files/out_13.txt b/dep/pipeline/met_015/pcap_files/out_13.txt
new file mode 100644
index 00000000..cf9cbb7a
--- /dev/null
+++ b/dep/pipeline/met_015/pcap_files/out_13.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/met_015/readme.md b/dep/pipeline/met_015/readme.md
new file mode 100644
index 00000000..e8164a20
--- /dev/null
+++ b/dep/pipeline/met_015/readme.md
@@ -0,0 +1,18 @@
+
+Test Case: test_met_015
+-----------------------
+
+ Instruction being tested:
+ metprefetch METARRAY imm_val
+
+ Description:
+ Use a meter of certain size. Assign a particular incoming flow (packets
+ having a certain destination MAC address) to a meter index. Set a meter
+ profile to that same meter index. Send packet burst to DUT at a rate
+ more than the supported CBS + PBS as well as at a rate less than
+ CBS + PBS.
+
+ Verification:
+ Packets received on Port 0 (Green packets), Port 1 (Yellow packets) &
+ Port 2 (Red packets) should comply with the meter profile used in
+ the DUT.
diff --git a/dep/pipeline/mirror_001/ethdev.io b/dep/pipeline/mirror_001/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/mirror_001/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/mirror_001/mirror_001.cli b/dep/pipeline/mirror_001/mirror_001.cli
new file mode 100644
index 00000000..f328e21d
--- /dev/null
+++ b/dep/pipeline/mirror_001/mirror_001.cli
@@ -0,0 +1,35 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/mirror_001/mirror_001.spec /tmp/pipeline/mirror_001/mirror_001.c
+pipeline libbuild /tmp/pipeline/mirror_001/mirror_001.c /tmp/pipeline/mirror_001/mirror_001.so
+
+;
+; Customize the LINK parameters to match your setup.
+;
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+;
+; PIPELINE0 setup.
+;
+
+pipeline PIPELINE0 mirror slots 4 sessions 16
+pipeline PIPELINE0 build lib /tmp/pipeline/mirror_001/mirror_001.so io /tmp/pipeline/mirror_001/ethdev.io numa 0
+
+pipeline PIPELINE0 mirror session 0 port 0 clone fast truncate 0
+pipeline PIPELINE0 mirror session 1 port 1 clone fast truncate 0
+pipeline PIPELINE0 mirror session 2 port 2 clone fast truncate 0
+pipeline PIPELINE0 mirror session 3 port 3 clone fast truncate 0
+
+;
+; Pipelines-to-threads mapping.
+;
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/mirror_001/mirror_001.spec b/dep/pipeline/mirror_001/mirror_001.spec
new file mode 100644
index 00000000..25724726
--- /dev/null
+++ b/dep/pipeline/mirror_001/mirror_001.spec
@@ -0,0 +1,82 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+; This simple example illustrates how to perform packet mirroring. The "mirror" instruction is used
+; to flag the current packet for mirroring, which means that at TX time, before the current packet
+; is sent out, it will first be cloned (using either the fast or the slow/deep cloning method) and
+; the clone packet sent out on the output port specified by the mirror session.
+;
+; In this example, the UDP packets with destination port 5000 are mirrored to the output port
+; specified by the mirror session x (x:<mirror_session_id>), while the rest of the packets are not mirrored. Therefore, for
+; every UDP input packet with this specific destination port there will be two output packets (the
+; current packet and its clone packet), while for every other input packet there will be a single
+; output packet.
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+struct udp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<16> length
+ bit<16> checksum
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+header udp instanceof udp_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<32> mirror_slot
+ bit<32> mirror_session
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ extract h.udp
+
+ //
+ // Mark for mirroring all packets with UDP destination port of 5000.
+ //
+ MIRROR_UDP_DST_PORT_5000 : jmpneq EMIT h.udp.dst_port 5000
+ mov m.mirror_slot 1
+ mov m.mirror_session m.port
+ add m.mirror_session 1
+ and m.mirror_session 3
+ mirror m.mirror_slot m.mirror_session
+
+ EMIT : emit h.ethernet
+ emit h.ipv4
+ emit h.udp
+ tx m.port
+}
diff --git a/dep/pipeline/mirror_001/pcap_files/in_1.txt b/dep/pipeline/mirror_001/pcap_files/in_1.txt
new file mode 100644
index 00000000..f91c68a2
--- /dev/null
+++ b/dep/pipeline/mirror_001/pcap_files/in_1.txt
@@ -0,0 +1,19 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 9c 00 01 00 00 40 11 ad 39 64 00 00 01 64 00
+000020 05 16 00 64 13 88 00 88 f2 7e 73 7a 4b 63 76 6f
+000030 46 61 74 68 52 6e 32 48 42 64 76 68 77 7a 31 64
+000040 79 35 6a 4d 35 78 59 44 6b 52 4e 53 46 4d 4c 4c
+000050 7a 77 54 78 38 74 65 64 55 32 7a 51 33 70 33 77
+000060 6b 68 78 53 78 65 67 4e 75 53 36 39 36 31 34 37
+000070 6b 68 43 57 49 47 59 36 66 6a 66 72 6b 47 6c 55
+000080 41 5a 6d 63 34 41 35 66 50 42 34 78 50 51 46 31
+000090 31 4d 47 6b 6a 39 37 32 69 6d 65 50 51 76 37 55
+0000a0 34 4f 54 6e 36 4c 7a 48 45 73
diff --git a/dep/pipeline/mirror_001/pcap_files/out_11.txt b/dep/pipeline/mirror_001/pcap_files/out_11.txt
new file mode 100644
index 00000000..f91c68a2
--- /dev/null
+++ b/dep/pipeline/mirror_001/pcap_files/out_11.txt
@@ -0,0 +1,19 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 9c 00 01 00 00 40 11 ad 39 64 00 00 01 64 00
+000020 05 16 00 64 13 88 00 88 f2 7e 73 7a 4b 63 76 6f
+000030 46 61 74 68 52 6e 32 48 42 64 76 68 77 7a 31 64
+000040 79 35 6a 4d 35 78 59 44 6b 52 4e 53 46 4d 4c 4c
+000050 7a 77 54 78 38 74 65 64 55 32 7a 51 33 70 33 77
+000060 6b 68 78 53 78 65 67 4e 75 53 36 39 36 31 34 37
+000070 6b 68 43 57 49 47 59 36 66 6a 66 72 6b 47 6c 55
+000080 41 5a 6d 63 34 41 35 66 50 42 34 78 50 51 46 31
+000090 31 4d 47 6b 6a 39 37 32 69 6d 65 50 51 76 37 55
+0000a0 34 4f 54 6e 36 4c 7a 48 45 73
diff --git a/dep/pipeline/mirror_001/pcap_files/out_12.txt b/dep/pipeline/mirror_001/pcap_files/out_12.txt
new file mode 100644
index 00000000..f91c68a2
--- /dev/null
+++ b/dep/pipeline/mirror_001/pcap_files/out_12.txt
@@ -0,0 +1,19 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 9c 00 01 00 00 40 11 ad 39 64 00 00 01 64 00
+000020 05 16 00 64 13 88 00 88 f2 7e 73 7a 4b 63 76 6f
+000030 46 61 74 68 52 6e 32 48 42 64 76 68 77 7a 31 64
+000040 79 35 6a 4d 35 78 59 44 6b 52 4e 53 46 4d 4c 4c
+000050 7a 77 54 78 38 74 65 64 55 32 7a 51 33 70 33 77
+000060 6b 68 78 53 78 65 67 4e 75 53 36 39 36 31 34 37
+000070 6b 68 43 57 49 47 59 36 66 6a 66 72 6b 47 6c 55
+000080 41 5a 6d 63 34 41 35 66 50 42 34 78 50 51 46 31
+000090 31 4d 47 6b 6a 39 37 32 69 6d 65 50 51 76 37 55
+0000a0 34 4f 54 6e 36 4c 7a 48 45 73
diff --git a/dep/pipeline/mirror_001/readme.md b/dep/pipeline/mirror_001/readme.md
new file mode 100644
index 00000000..8ed928df
--- /dev/null
+++ b/dep/pipeline/mirror_001/readme.md
@@ -0,0 +1,18 @@
+Test Case: test_mirror_001
+-----------------------
+
+ CLI being tested:
+ pipeline PIPELINE0 mirror slots <max_slots> sessions <max_sessions>
+ pipeline PIPELINE0 mirror session <session_id> port <port_id> clone [fast] truncate <truncate_length>
+
+ Instruction being tested:
+ mirror m.field m.field
+
+ Description:
+ Mirror(clone) all the packet that are received with UDP destination port 5000.
+ The mirroring type is fast(reference of buffer).
+
+ Verification:
+ The packet should be sent out on the same port that it received.
+ The mirror copy of the packet should be sent out on the configured mirror port.
+ The mirrored packet content, should be same as the original transmitted packet.
\ No newline at end of file
diff --git a/dep/pipeline/mirror_002/ethdev.io b/dep/pipeline/mirror_002/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/mirror_002/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/mirror_002/mirror_002.cli b/dep/pipeline/mirror_002/mirror_002.cli
new file mode 100644
index 00000000..9c1a508a
--- /dev/null
+++ b/dep/pipeline/mirror_002/mirror_002.cli
@@ -0,0 +1,35 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/mirror_002/mirror_002.spec /tmp/pipeline/mirror_002/mirror_002.c
+pipeline libbuild /tmp/pipeline/mirror_002/mirror_002.c /tmp/pipeline/mirror_002/mirror_002.so
+
+;
+; Customize the LINK parameters to match your setup.
+;
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+;
+; PIPELINE0 setup.
+;
+
+pipeline PIPELINE0 mirror slots 4 sessions 16
+pipeline PIPELINE0 build lib /tmp/pipeline/mirror_002/mirror_002.so io /tmp/pipeline/mirror_002/ethdev.io numa 0
+
+pipeline PIPELINE0 mirror session 0 port 0 clone slow truncate 0
+pipeline PIPELINE0 mirror session 1 port 1 clone slow truncate 0
+pipeline PIPELINE0 mirror session 2 port 2 clone slow truncate 0
+pipeline PIPELINE0 mirror session 3 port 3 clone slow truncate 0
+
+;
+; Pipelines-to-threads mapping.
+;
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/mirror_002/mirror_002.spec b/dep/pipeline/mirror_002/mirror_002.spec
new file mode 100644
index 00000000..25724726
--- /dev/null
+++ b/dep/pipeline/mirror_002/mirror_002.spec
@@ -0,0 +1,82 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+; This simple example illustrates how to perform packet mirroring. The "mirror" instruction is used
+; to flag the current packet for mirroring, which means that at TX time, before the current packet
+; is sent out, it will first be cloned (using either the fast or the slow/deep cloning method) and
+; the clone packet sent out on the output port specified by the mirror session.
+;
+; In this example, the UDP packets with destination port 5000 are mirrored to the output port
+; specified by the mirror session x (x:<mirror_session_id>), while the rest of the packets are not mirrored. Therefore, for
+; every UDP input packet with this specific destination port there will be two output packets (the
+; current packet and its clone packet), while for every other input packet there will be a single
+; output packet.
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+struct udp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<16> length
+ bit<16> checksum
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+header udp instanceof udp_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<32> mirror_slot
+ bit<32> mirror_session
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ extract h.udp
+
+ //
+ // Mark for mirroring all packets with UDP destination port of 5000.
+ //
+ MIRROR_UDP_DST_PORT_5000 : jmpneq EMIT h.udp.dst_port 5000
+ mov m.mirror_slot 1
+ mov m.mirror_session m.port
+ add m.mirror_session 1
+ and m.mirror_session 3
+ mirror m.mirror_slot m.mirror_session
+
+ EMIT : emit h.ethernet
+ emit h.ipv4
+ emit h.udp
+ tx m.port
+}
diff --git a/dep/pipeline/mirror_002/pcap_files/in_1.txt b/dep/pipeline/mirror_002/pcap_files/in_1.txt
new file mode 100644
index 00000000..f91c68a2
--- /dev/null
+++ b/dep/pipeline/mirror_002/pcap_files/in_1.txt
@@ -0,0 +1,19 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 9c 00 01 00 00 40 11 ad 39 64 00 00 01 64 00
+000020 05 16 00 64 13 88 00 88 f2 7e 73 7a 4b 63 76 6f
+000030 46 61 74 68 52 6e 32 48 42 64 76 68 77 7a 31 64
+000040 79 35 6a 4d 35 78 59 44 6b 52 4e 53 46 4d 4c 4c
+000050 7a 77 54 78 38 74 65 64 55 32 7a 51 33 70 33 77
+000060 6b 68 78 53 78 65 67 4e 75 53 36 39 36 31 34 37
+000070 6b 68 43 57 49 47 59 36 66 6a 66 72 6b 47 6c 55
+000080 41 5a 6d 63 34 41 35 66 50 42 34 78 50 51 46 31
+000090 31 4d 47 6b 6a 39 37 32 69 6d 65 50 51 76 37 55
+0000a0 34 4f 54 6e 36 4c 7a 48 45 73
diff --git a/dep/pipeline/mirror_002/pcap_files/out_11.txt b/dep/pipeline/mirror_002/pcap_files/out_11.txt
new file mode 100644
index 00000000..f91c68a2
--- /dev/null
+++ b/dep/pipeline/mirror_002/pcap_files/out_11.txt
@@ -0,0 +1,19 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 9c 00 01 00 00 40 11 ad 39 64 00 00 01 64 00
+000020 05 16 00 64 13 88 00 88 f2 7e 73 7a 4b 63 76 6f
+000030 46 61 74 68 52 6e 32 48 42 64 76 68 77 7a 31 64
+000040 79 35 6a 4d 35 78 59 44 6b 52 4e 53 46 4d 4c 4c
+000050 7a 77 54 78 38 74 65 64 55 32 7a 51 33 70 33 77
+000060 6b 68 78 53 78 65 67 4e 75 53 36 39 36 31 34 37
+000070 6b 68 43 57 49 47 59 36 66 6a 66 72 6b 47 6c 55
+000080 41 5a 6d 63 34 41 35 66 50 42 34 78 50 51 46 31
+000090 31 4d 47 6b 6a 39 37 32 69 6d 65 50 51 76 37 55
+0000a0 34 4f 54 6e 36 4c 7a 48 45 73
diff --git a/dep/pipeline/mirror_002/pcap_files/out_12.txt b/dep/pipeline/mirror_002/pcap_files/out_12.txt
new file mode 100644
index 00000000..f91c68a2
--- /dev/null
+++ b/dep/pipeline/mirror_002/pcap_files/out_12.txt
@@ -0,0 +1,19 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 9c 00 01 00 00 40 11 ad 39 64 00 00 01 64 00
+000020 05 16 00 64 13 88 00 88 f2 7e 73 7a 4b 63 76 6f
+000030 46 61 74 68 52 6e 32 48 42 64 76 68 77 7a 31 64
+000040 79 35 6a 4d 35 78 59 44 6b 52 4e 53 46 4d 4c 4c
+000050 7a 77 54 78 38 74 65 64 55 32 7a 51 33 70 33 77
+000060 6b 68 78 53 78 65 67 4e 75 53 36 39 36 31 34 37
+000070 6b 68 43 57 49 47 59 36 66 6a 66 72 6b 47 6c 55
+000080 41 5a 6d 63 34 41 35 66 50 42 34 78 50 51 46 31
+000090 31 4d 47 6b 6a 39 37 32 69 6d 65 50 51 76 37 55
+0000a0 34 4f 54 6e 36 4c 7a 48 45 73
diff --git a/dep/pipeline/mirror_002/readme.md b/dep/pipeline/mirror_002/readme.md
new file mode 100644
index 00000000..e79ab843
--- /dev/null
+++ b/dep/pipeline/mirror_002/readme.md
@@ -0,0 +1,18 @@
+Test Case: test_mirror_002
+-----------------------
+
+ CLI being tested:
+ pipeline PIPELINE0 mirror slots <max_slots> sessions <max_sessions>
+ pipeline PIPELINE0 mirror session <session_id> port <port_id> clone [slow] truncate <truncate_length>
+
+ Instruction being tested:
+ mirror m.field m.field
+
+ Description:
+ Mirror(clone) all the packet that are received with UDP destination port 5000.
+ The mirroring type is slow (copy of buffer).
+
+ Verification:
+ The packet should be sent out on the same port that it received.
+ The mirror copy of the packet should be sent out on the configured mirror port.
+ The mirrored packet content, should be same as the original transmitted packet.
\ No newline at end of file
diff --git a/dep/pipeline/mirror_003/ethdev.io b/dep/pipeline/mirror_003/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/mirror_003/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/mirror_003/mirror_003.cli b/dep/pipeline/mirror_003/mirror_003.cli
new file mode 100644
index 00000000..449b54c9
--- /dev/null
+++ b/dep/pipeline/mirror_003/mirror_003.cli
@@ -0,0 +1,34 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/mirror_003/mirror_003.spec /tmp/pipeline/mirror_003/mirror_003.c
+pipeline libbuild /tmp/pipeline/mirror_003/mirror_003.c /tmp/pipeline/mirror_003/mirror_003.so
+
+;
+; Customize the LINK parameters to match your setup.
+;
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+;
+; PIPELINE0 setup.
+;
+
+pipeline PIPELINE0 mirror slots 4 sessions 16
+pipeline PIPELINE0 build lib /tmp/pipeline/mirror_003/mirror_003.so io /tmp/pipeline/mirror_003/ethdev.io numa 0
+
+pipeline PIPELINE0 mirror session 0 port 0 clone slow truncate 0
+pipeline PIPELINE0 mirror session 1 port 1 clone slow truncate 64
+pipeline PIPELINE0 mirror session 2 port 2 clone slow truncate 128
+pipeline PIPELINE0 mirror session 3 port 3 clone slow truncate 256
+;
+; Pipelines-to-threads mapping.
+;
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/mirror_003/mirror_003.spec b/dep/pipeline/mirror_003/mirror_003.spec
new file mode 100644
index 00000000..25724726
--- /dev/null
+++ b/dep/pipeline/mirror_003/mirror_003.spec
@@ -0,0 +1,82 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+; This simple example illustrates how to perform packet mirroring. The "mirror" instruction is used
+; to flag the current packet for mirroring, which means that at TX time, before the current packet
+; is sent out, it will first be cloned (using either the fast or the slow/deep cloning method) and
+; the clone packet sent out on the output port specified by the mirror session.
+;
+; In this example, the UDP packets with destination port 5000 are mirrored to the output port
+; specified by the mirror session x (x:<mirror_session_id>), while the rest of the packets are not mirrored. Therefore, for
+; every UDP input packet with this specific destination port there will be two output packets (the
+; current packet and its clone packet), while for every other input packet there will be a single
+; output packet.
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+struct udp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<16> length
+ bit<16> checksum
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+header udp instanceof udp_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<32> mirror_slot
+ bit<32> mirror_session
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ extract h.udp
+
+ //
+ // Mark for mirroring all packets with UDP destination port of 5000.
+ //
+ MIRROR_UDP_DST_PORT_5000 : jmpneq EMIT h.udp.dst_port 5000
+ mov m.mirror_slot 1
+ mov m.mirror_session m.port
+ add m.mirror_session 1
+ and m.mirror_session 3
+ mirror m.mirror_slot m.mirror_session
+
+ EMIT : emit h.ethernet
+ emit h.ipv4
+ emit h.udp
+ tx m.port
+}
diff --git a/dep/pipeline/mirror_003/pcap_files/in_1.txt b/dep/pipeline/mirror_003/pcap_files/in_1.txt
new file mode 100644
index 00000000..f91c68a2
--- /dev/null
+++ b/dep/pipeline/mirror_003/pcap_files/in_1.txt
@@ -0,0 +1,19 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 9c 00 01 00 00 40 11 ad 39 64 00 00 01 64 00
+000020 05 16 00 64 13 88 00 88 f2 7e 73 7a 4b 63 76 6f
+000030 46 61 74 68 52 6e 32 48 42 64 76 68 77 7a 31 64
+000040 79 35 6a 4d 35 78 59 44 6b 52 4e 53 46 4d 4c 4c
+000050 7a 77 54 78 38 74 65 64 55 32 7a 51 33 70 33 77
+000060 6b 68 78 53 78 65 67 4e 75 53 36 39 36 31 34 37
+000070 6b 68 43 57 49 47 59 36 66 6a 66 72 6b 47 6c 55
+000080 41 5a 6d 63 34 41 35 66 50 42 34 78 50 51 46 31
+000090 31 4d 47 6b 6a 39 37 32 69 6d 65 50 51 76 37 55
+0000a0 34 4f 54 6e 36 4c 7a 48 45 73
diff --git a/dep/pipeline/mirror_003/pcap_files/out_11.txt b/dep/pipeline/mirror_003/pcap_files/out_11.txt
new file mode 100644
index 00000000..f91c68a2
--- /dev/null
+++ b/dep/pipeline/mirror_003/pcap_files/out_11.txt
@@ -0,0 +1,19 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 9c 00 01 00 00 40 11 ad 39 64 00 00 01 64 00
+000020 05 16 00 64 13 88 00 88 f2 7e 73 7a 4b 63 76 6f
+000030 46 61 74 68 52 6e 32 48 42 64 76 68 77 7a 31 64
+000040 79 35 6a 4d 35 78 59 44 6b 52 4e 53 46 4d 4c 4c
+000050 7a 77 54 78 38 74 65 64 55 32 7a 51 33 70 33 77
+000060 6b 68 78 53 78 65 67 4e 75 53 36 39 36 31 34 37
+000070 6b 68 43 57 49 47 59 36 66 6a 66 72 6b 47 6c 55
+000080 41 5a 6d 63 34 41 35 66 50 42 34 78 50 51 46 31
+000090 31 4d 47 6b 6a 39 37 32 69 6d 65 50 51 76 37 55
+0000a0 34 4f 54 6e 36 4c 7a 48 45 73
diff --git a/dep/pipeline/mirror_003/pcap_files/out_12.txt b/dep/pipeline/mirror_003/pcap_files/out_12.txt
new file mode 100644
index 00000000..f91c68a2
--- /dev/null
+++ b/dep/pipeline/mirror_003/pcap_files/out_12.txt
@@ -0,0 +1,19 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 9c 00 01 00 00 40 11 ad 39 64 00 00 01 64 00
+000020 05 16 00 64 13 88 00 88 f2 7e 73 7a 4b 63 76 6f
+000030 46 61 74 68 52 6e 32 48 42 64 76 68 77 7a 31 64
+000040 79 35 6a 4d 35 78 59 44 6b 52 4e 53 46 4d 4c 4c
+000050 7a 77 54 78 38 74 65 64 55 32 7a 51 33 70 33 77
+000060 6b 68 78 53 78 65 67 4e 75 53 36 39 36 31 34 37
+000070 6b 68 43 57 49 47 59 36 66 6a 66 72 6b 47 6c 55
+000080 41 5a 6d 63 34 41 35 66 50 42 34 78 50 51 46 31
+000090 31 4d 47 6b 6a 39 37 32 69 6d 65 50 51 76 37 55
+0000a0 34 4f 54 6e 36 4c 7a 48 45 73
diff --git a/dep/pipeline/mirror_003/pcap_files/out_13.txt b/dep/pipeline/mirror_003/pcap_files/out_13.txt
new file mode 100644
index 00000000..3dc9265a
--- /dev/null
+++ b/dep/pipeline/mirror_003/pcap_files/out_13.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 9c 00 01 00 00 40 11 ad 39 64 00 00 01 64 00
+000020 05 16 00 64 13 88 00 88 f2 7e 73 7a 4b 63 76 6f
+000030 46 61 74 68 52 6e 32 48 42 64 76 68 77 7a 31 64
diff --git a/dep/pipeline/mirror_003/pcap_files/out_14.txt b/dep/pipeline/mirror_003/pcap_files/out_14.txt
new file mode 100644
index 00000000..ee8111b4
--- /dev/null
+++ b/dep/pipeline/mirror_003/pcap_files/out_14.txt
@@ -0,0 +1,16 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 9c 00 01 00 00 40 11 ad 39 64 00 00 01 64 00
+000020 05 16 00 64 13 88 00 88 f2 7e 73 7a 4b 63 76 6f
+000030 46 61 74 68 52 6e 32 48 42 64 76 68 77 7a 31 64
+000040 79 35 6a 4d 35 78 59 44 6b 52 4e 53 46 4d 4c 4c
+000050 7a 77 54 78 38 74 65 64 55 32 7a 51 33 70 33 77
+000060 6b 68 78 53 78 65 67 4e 75 53 36 39 36 31 34 37
+000070 6b 68 43 57 49 47 59 36 66 6a 66 72 6b 47 6c 55
diff --git a/dep/pipeline/mirror_003/readme.md b/dep/pipeline/mirror_003/readme.md
new file mode 100644
index 00000000..cc09f044
--- /dev/null
+++ b/dep/pipeline/mirror_003/readme.md
@@ -0,0 +1,24 @@
+Test Case: test_mirror_003
+-----------------------
+
+ CLI being tested:
+ pipeline PIPELINE0 mirror slots <max_slots> sessions <max_sessions>
+ pipeline PIPELINE0 mirror session <session_id> port <port_id> clone [slow] truncate [truncate_length]
+
+ Instruction being tested:
+ mirror m.field m.field
+
+ Description:
+ Mirror(clone) all the packet that are received with UDP destination port 5000.
+ The mirroring type is slow (copy of buffer) and truncates the packet data
+ according to the configured length before sending the packet on mirror port.
+
+ Based on the configuration, truncate length is,
+ a) ZERO, then the mirror packet length is orignial packet length.
+ b) lesser than the original packet length then the mirror packet length is truncate length.
+ c) greater than the orginal packet length then the mirror packet length is original packet length.
+
+ Verification:
+ The packet should be sent out on the same port that it received.
+ The mirror copy of the packet should be sent out on the configured mirror port.
+ The mirrored packet length should match configured truncated criteria.
\ No newline at end of file
diff --git a/dep/pipeline/mirror_004/ethdev.io b/dep/pipeline/mirror_004/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/mirror_004/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/mirror_004/mirror_004.cli b/dep/pipeline/mirror_004/mirror_004.cli
new file mode 100644
index 00000000..0b3a5508
--- /dev/null
+++ b/dep/pipeline/mirror_004/mirror_004.cli
@@ -0,0 +1,34 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/mirror_004/mirror_004.spec /tmp/pipeline/mirror_004/mirror_004.c
+pipeline libbuild /tmp/pipeline/mirror_004/mirror_004.c /tmp/pipeline/mirror_004/mirror_004.so
+
+;
+; Customize the LINK parameters to match your setup.
+;
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+;
+; PIPELINE0 setup.
+;
+
+pipeline PIPELINE0 mirror slots 4 sessions 16
+pipeline PIPELINE0 build lib /tmp/pipeline/mirror_004/mirror_004.so io /tmp/pipeline/mirror_004/ethdev.io numa 0
+
+pipeline PIPELINE0 mirror session 0 port 0 clone fast truncate 0
+pipeline PIPELINE0 mirror session 1 port 1 clone fast truncate 64
+pipeline PIPELINE0 mirror session 2 port 2 clone fast truncate 128
+pipeline PIPELINE0 mirror session 3 port 3 clone fast truncate 256
+;
+; Pipelines-to-threads mapping.
+;
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/mirror_004/mirror_004.spec b/dep/pipeline/mirror_004/mirror_004.spec
new file mode 100644
index 00000000..25724726
--- /dev/null
+++ b/dep/pipeline/mirror_004/mirror_004.spec
@@ -0,0 +1,82 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+; This simple example illustrates how to perform packet mirroring. The "mirror" instruction is used
+; to flag the current packet for mirroring, which means that at TX time, before the current packet
+; is sent out, it will first be cloned (using either the fast or the slow/deep cloning method) and
+; the clone packet sent out on the output port specified by the mirror session.
+;
+; In this example, the UDP packets with destination port 5000 are mirrored to the output port
+; specified by the mirror session x (x:<mirror_session_id>), while the rest of the packets are not mirrored. Therefore, for
+; every UDP input packet with this specific destination port there will be two output packets (the
+; current packet and its clone packet), while for every other input packet there will be a single
+; output packet.
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+struct udp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<16> length
+ bit<16> checksum
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+header udp instanceof udp_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<32> mirror_slot
+ bit<32> mirror_session
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ extract h.udp
+
+ //
+ // Mark for mirroring all packets with UDP destination port of 5000.
+ //
+ MIRROR_UDP_DST_PORT_5000 : jmpneq EMIT h.udp.dst_port 5000
+ mov m.mirror_slot 1
+ mov m.mirror_session m.port
+ add m.mirror_session 1
+ and m.mirror_session 3
+ mirror m.mirror_slot m.mirror_session
+
+ EMIT : emit h.ethernet
+ emit h.ipv4
+ emit h.udp
+ tx m.port
+}
diff --git a/dep/pipeline/mirror_004/pcap_files/in_1.txt b/dep/pipeline/mirror_004/pcap_files/in_1.txt
new file mode 100644
index 00000000..f91c68a2
--- /dev/null
+++ b/dep/pipeline/mirror_004/pcap_files/in_1.txt
@@ -0,0 +1,19 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 9c 00 01 00 00 40 11 ad 39 64 00 00 01 64 00
+000020 05 16 00 64 13 88 00 88 f2 7e 73 7a 4b 63 76 6f
+000030 46 61 74 68 52 6e 32 48 42 64 76 68 77 7a 31 64
+000040 79 35 6a 4d 35 78 59 44 6b 52 4e 53 46 4d 4c 4c
+000050 7a 77 54 78 38 74 65 64 55 32 7a 51 33 70 33 77
+000060 6b 68 78 53 78 65 67 4e 75 53 36 39 36 31 34 37
+000070 6b 68 43 57 49 47 59 36 66 6a 66 72 6b 47 6c 55
+000080 41 5a 6d 63 34 41 35 66 50 42 34 78 50 51 46 31
+000090 31 4d 47 6b 6a 39 37 32 69 6d 65 50 51 76 37 55
+0000a0 34 4f 54 6e 36 4c 7a 48 45 73
diff --git a/dep/pipeline/mirror_004/pcap_files/out_11.txt b/dep/pipeline/mirror_004/pcap_files/out_11.txt
new file mode 100644
index 00000000..f91c68a2
--- /dev/null
+++ b/dep/pipeline/mirror_004/pcap_files/out_11.txt
@@ -0,0 +1,19 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 9c 00 01 00 00 40 11 ad 39 64 00 00 01 64 00
+000020 05 16 00 64 13 88 00 88 f2 7e 73 7a 4b 63 76 6f
+000030 46 61 74 68 52 6e 32 48 42 64 76 68 77 7a 31 64
+000040 79 35 6a 4d 35 78 59 44 6b 52 4e 53 46 4d 4c 4c
+000050 7a 77 54 78 38 74 65 64 55 32 7a 51 33 70 33 77
+000060 6b 68 78 53 78 65 67 4e 75 53 36 39 36 31 34 37
+000070 6b 68 43 57 49 47 59 36 66 6a 66 72 6b 47 6c 55
+000080 41 5a 6d 63 34 41 35 66 50 42 34 78 50 51 46 31
+000090 31 4d 47 6b 6a 39 37 32 69 6d 65 50 51 76 37 55
+0000a0 34 4f 54 6e 36 4c 7a 48 45 73
diff --git a/dep/pipeline/mirror_004/pcap_files/out_12.txt b/dep/pipeline/mirror_004/pcap_files/out_12.txt
new file mode 100644
index 00000000..f91c68a2
--- /dev/null
+++ b/dep/pipeline/mirror_004/pcap_files/out_12.txt
@@ -0,0 +1,19 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 9c 00 01 00 00 40 11 ad 39 64 00 00 01 64 00
+000020 05 16 00 64 13 88 00 88 f2 7e 73 7a 4b 63 76 6f
+000030 46 61 74 68 52 6e 32 48 42 64 76 68 77 7a 31 64
+000040 79 35 6a 4d 35 78 59 44 6b 52 4e 53 46 4d 4c 4c
+000050 7a 77 54 78 38 74 65 64 55 32 7a 51 33 70 33 77
+000060 6b 68 78 53 78 65 67 4e 75 53 36 39 36 31 34 37
+000070 6b 68 43 57 49 47 59 36 66 6a 66 72 6b 47 6c 55
+000080 41 5a 6d 63 34 41 35 66 50 42 34 78 50 51 46 31
+000090 31 4d 47 6b 6a 39 37 32 69 6d 65 50 51 76 37 55
+0000a0 34 4f 54 6e 36 4c 7a 48 45 73
diff --git a/dep/pipeline/mirror_004/readme.md b/dep/pipeline/mirror_004/readme.md
new file mode 100644
index 00000000..e530e553
--- /dev/null
+++ b/dep/pipeline/mirror_004/readme.md
@@ -0,0 +1,21 @@
+Test Case: test_mirror_004
+-----------------------
+
+ CLI being tested:
+ pipeline PIPELINE0 mirror slots <max_slots> sessions <max_sessions>
+ pipeline PIPELINE0 mirror session <session_id> port <port_id> clone [fast] truncate <truncate_length>
+
+ Instruction being tested:
+ mirror m.field m.field
+
+ Description:
+ Mirror all the packet that are received with UDP destination port 5000.
+ The mirroring type is fast(reference of buffer) to send the packet on mirror port.
+
+ The configured truncate length is ignored if clone type is fast,
+ hence the mirror packet length is always the original packet length.
+
+ Verification:
+ The packet should be sent out on the same port that it received.
+ The mirror copy of the packet should be sent out on the configured mirror port.
+ The mirrored packet content, should be same as the original transmitted packet.
\ No newline at end of file
diff --git a/dep/pipeline/mirror_005/ethdev.io b/dep/pipeline/mirror_005/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/mirror_005/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/mirror_005/mirror_005.cli b/dep/pipeline/mirror_005/mirror_005.cli
new file mode 100644
index 00000000..b5266cc8
--- /dev/null
+++ b/dep/pipeline/mirror_005/mirror_005.cli
@@ -0,0 +1,35 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/mirror_005/mirror_005.spec /tmp/pipeline/mirror_005/mirror_005.c
+pipeline libbuild /tmp/pipeline/mirror_005/mirror_005.c /tmp/pipeline/mirror_005/mirror_005.so
+
+;
+; Customize the LINK parameters to match your setup.
+;
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+;
+; PIPELINE0 setup.
+;
+
+pipeline PIPELINE0 mirror slots 4 sessions 16
+pipeline PIPELINE0 build lib /tmp/pipeline/mirror_005/mirror_005.so io /tmp/pipeline/mirror_005/ethdev.io numa 0
+
+pipeline PIPELINE0 mirror session 0 port 0 clone slow truncate 0
+pipeline PIPELINE0 mirror session 1 port 1 clone slow truncate 0
+pipeline PIPELINE0 mirror session 2 port 2 clone slow truncate 0
+pipeline PIPELINE0 mirror session 3 port 3 clone slow truncate 0
+
+;
+; Pipelines-to-threads mapping.
+;
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/mirror_005/mirror_005.spec b/dep/pipeline/mirror_005/mirror_005.spec
new file mode 100644
index 00000000..3f951905
--- /dev/null
+++ b/dep/pipeline/mirror_005/mirror_005.spec
@@ -0,0 +1,84 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+; This simple example illustrates how to perform packet mirroring. The "mirror" instruction is used
+; to flag the current packet for mirroring, which means that at TX time, before the current packet
+; is sent out, it will first be cloned (using either the fast or the slow/deep cloning method) and
+; the clone packet sent out on the output port specified by the mirror session.
+;
+; In this example, the UDP packets with destination port 5000 are mirrored to the output port
+; specified by the mirror session x (x:<mirror_session_id>), while the rest of the packets are not mirrored. Therefore, for
+; every UDP input packet with this specific destination port there will be two output packets (the
+; current packet and its clone packet), while for every other input packet there will be a single
+; output packet.
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+struct udp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<16> length
+ bit<16> checksum
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+header udp instanceof udp_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<32> mirror_slot
+ bit<32> mirror_session
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ extract h.udp
+
+ //
+ // Mark for mirroring all packets with UDP destination port of 5000.
+ //
+ MIRROR_UDP_DST_PORT_5000 : jmpneq EMIT h.udp.dst_port 5000
+ mov m.mirror_slot 1
+ mov m.mirror_session 1
+ mirror m.mirror_slot m.mirror_session
+
+ mov m.mirror_slot 2
+ mov m.mirror_session 2
+ mirror m.mirror_slot m.mirror_session
+
+ EMIT : emit h.ethernet
+ emit h.ipv4
+ emit h.udp
+ tx m.port
+}
diff --git a/dep/pipeline/mirror_005/pcap_files/in_1.txt b/dep/pipeline/mirror_005/pcap_files/in_1.txt
new file mode 100644
index 00000000..f91c68a2
--- /dev/null
+++ b/dep/pipeline/mirror_005/pcap_files/in_1.txt
@@ -0,0 +1,19 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 9c 00 01 00 00 40 11 ad 39 64 00 00 01 64 00
+000020 05 16 00 64 13 88 00 88 f2 7e 73 7a 4b 63 76 6f
+000030 46 61 74 68 52 6e 32 48 42 64 76 68 77 7a 31 64
+000040 79 35 6a 4d 35 78 59 44 6b 52 4e 53 46 4d 4c 4c
+000050 7a 77 54 78 38 74 65 64 55 32 7a 51 33 70 33 77
+000060 6b 68 78 53 78 65 67 4e 75 53 36 39 36 31 34 37
+000070 6b 68 43 57 49 47 59 36 66 6a 66 72 6b 47 6c 55
+000080 41 5a 6d 63 34 41 35 66 50 42 34 78 50 51 46 31
+000090 31 4d 47 6b 6a 39 37 32 69 6d 65 50 51 76 37 55
+0000a0 34 4f 54 6e 36 4c 7a 48 45 73
diff --git a/dep/pipeline/mirror_005/pcap_files/out_11.txt b/dep/pipeline/mirror_005/pcap_files/out_11.txt
new file mode 100644
index 00000000..f91c68a2
--- /dev/null
+++ b/dep/pipeline/mirror_005/pcap_files/out_11.txt
@@ -0,0 +1,19 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 9c 00 01 00 00 40 11 ad 39 64 00 00 01 64 00
+000020 05 16 00 64 13 88 00 88 f2 7e 73 7a 4b 63 76 6f
+000030 46 61 74 68 52 6e 32 48 42 64 76 68 77 7a 31 64
+000040 79 35 6a 4d 35 78 59 44 6b 52 4e 53 46 4d 4c 4c
+000050 7a 77 54 78 38 74 65 64 55 32 7a 51 33 70 33 77
+000060 6b 68 78 53 78 65 67 4e 75 53 36 39 36 31 34 37
+000070 6b 68 43 57 49 47 59 36 66 6a 66 72 6b 47 6c 55
+000080 41 5a 6d 63 34 41 35 66 50 42 34 78 50 51 46 31
+000090 31 4d 47 6b 6a 39 37 32 69 6d 65 50 51 76 37 55
+0000a0 34 4f 54 6e 36 4c 7a 48 45 73
diff --git a/dep/pipeline/mirror_005/pcap_files/out_12.txt b/dep/pipeline/mirror_005/pcap_files/out_12.txt
new file mode 100644
index 00000000..f91c68a2
--- /dev/null
+++ b/dep/pipeline/mirror_005/pcap_files/out_12.txt
@@ -0,0 +1,19 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 9c 00 01 00 00 40 11 ad 39 64 00 00 01 64 00
+000020 05 16 00 64 13 88 00 88 f2 7e 73 7a 4b 63 76 6f
+000030 46 61 74 68 52 6e 32 48 42 64 76 68 77 7a 31 64
+000040 79 35 6a 4d 35 78 59 44 6b 52 4e 53 46 4d 4c 4c
+000050 7a 77 54 78 38 74 65 64 55 32 7a 51 33 70 33 77
+000060 6b 68 78 53 78 65 67 4e 75 53 36 39 36 31 34 37
+000070 6b 68 43 57 49 47 59 36 66 6a 66 72 6b 47 6c 55
+000080 41 5a 6d 63 34 41 35 66 50 42 34 78 50 51 46 31
+000090 31 4d 47 6b 6a 39 37 32 69 6d 65 50 51 76 37 55
+0000a0 34 4f 54 6e 36 4c 7a 48 45 73
diff --git a/dep/pipeline/mirror_005/pcap_files/out_13.txt b/dep/pipeline/mirror_005/pcap_files/out_13.txt
new file mode 100644
index 00000000..f91c68a2
--- /dev/null
+++ b/dep/pipeline/mirror_005/pcap_files/out_13.txt
@@ -0,0 +1,19 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 9c 00 01 00 00 40 11 ad 39 64 00 00 01 64 00
+000020 05 16 00 64 13 88 00 88 f2 7e 73 7a 4b 63 76 6f
+000030 46 61 74 68 52 6e 32 48 42 64 76 68 77 7a 31 64
+000040 79 35 6a 4d 35 78 59 44 6b 52 4e 53 46 4d 4c 4c
+000050 7a 77 54 78 38 74 65 64 55 32 7a 51 33 70 33 77
+000060 6b 68 78 53 78 65 67 4e 75 53 36 39 36 31 34 37
+000070 6b 68 43 57 49 47 59 36 66 6a 66 72 6b 47 6c 55
+000080 41 5a 6d 63 34 41 35 66 50 42 34 78 50 51 46 31
+000090 31 4d 47 6b 6a 39 37 32 69 6d 65 50 51 76 37 55
+0000a0 34 4f 54 6e 36 4c 7a 48 45 73
diff --git a/dep/pipeline/mirror_005/readme.md b/dep/pipeline/mirror_005/readme.md
new file mode 100644
index 00000000..f25e6112
--- /dev/null
+++ b/dep/pipeline/mirror_005/readme.md
@@ -0,0 +1,17 @@
+Test Case: test_mirror_005
+-----------------------
+
+ CLI being tested:
+ pipeline PIPELINE0 mirror slots <max_slots> sessions <max_sessions>
+ pipeline PIPELINE0 mirror session <session_id> port <port_id> clone [slow/fast] truncate <truncate_length>
+
+ Instruction being tested:
+ mirror m.field m.field
+
+ Description:
+ Create multiple (2) mirror copies, mirror the packet that are received with UDP destination port 5000.
+
+ Verification:
+ The packet should be sent out on the same port that it received.
+ The mirror copy of the packet should be sent out on the multiple (2) mirror ports.
+ The mirrored packet content, should be same as the original transmitted packet.
\ No newline at end of file
diff --git a/dep/pipeline/mirror_006/ethdev.io b/dep/pipeline/mirror_006/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/mirror_006/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/mirror_006/mirror_006.cli b/dep/pipeline/mirror_006/mirror_006.cli
new file mode 100644
index 00000000..525d3197
--- /dev/null
+++ b/dep/pipeline/mirror_006/mirror_006.cli
@@ -0,0 +1,35 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/mirror_006/mirror_006.spec /tmp/pipeline/mirror_006/mirror_006.c
+pipeline libbuild /tmp/pipeline/mirror_006/mirror_006.c /tmp/pipeline/mirror_006/mirror_006.so
+
+;
+; Customize the LINK parameters to match your setup.
+;
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+;
+; PIPELINE0 setup.
+;
+
+pipeline PIPELINE0 mirror slots 4 sessions 16
+pipeline PIPELINE0 build lib /tmp/pipeline/mirror_006/mirror_006.so io /tmp/pipeline/mirror_006/ethdev.io numa 0
+
+pipeline PIPELINE0 mirror session 0 port 0 clone slow truncate 0
+pipeline PIPELINE0 mirror session 1 port 1 clone slow truncate 0
+pipeline PIPELINE0 mirror session 2 port 2 clone slow truncate 0
+pipeline PIPELINE0 mirror session 3 port 3 clone slow truncate 0
+
+;
+; Pipelines-to-threads mapping.
+;
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/mirror_006/mirror_006.spec b/dep/pipeline/mirror_006/mirror_006.spec
new file mode 100644
index 00000000..2ac661df
--- /dev/null
+++ b/dep/pipeline/mirror_006/mirror_006.spec
@@ -0,0 +1,84 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+; This simple example illustrates how to perform packet mirroring. The "mirror" instruction is used
+; to flag the current packet for mirroring, which means that at TX time, before the current packet
+; is sent out, it will first be cloned (using either the fast or the slow/deep cloning method) and
+; the clone packet sent out on the output port specified by the mirror session.
+;
+; In this example, the UDP packets with destination port 5000 are mirrored to the output port
+; specified by the mirror session x (x:<mirror_session_id>), while the rest of the packets are not mirrored. Therefore, for
+; every UDP input packet with this specific destination port there will be two output packets (the
+; current packet and its clone packet), while for every other input packet there will be a single
+; output packet.
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+struct udp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<16> length
+ bit<16> checksum
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+header udp instanceof udp_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<32> mirror_slot
+ bit<32> mirror_session
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ extract h.udp
+
+ //
+ // Mark for mirroring all packets with UDP destination port of 5000.
+ //
+ MIRROR_UDP_DST_PORT_5000 : jmpneq EMIT h.udp.dst_port 5000
+ mov m.mirror_slot 1
+ mov m.mirror_session 1
+ mirror m.mirror_slot m.mirror_session
+
+ mov m.mirror_slot 1
+ mov m.mirror_session 2
+ mirror m.mirror_slot m.mirror_session
+
+ EMIT : emit h.ethernet
+ emit h.ipv4
+ emit h.udp
+ tx m.port
+}
diff --git a/dep/pipeline/mirror_006/pcap_files/in_1.txt b/dep/pipeline/mirror_006/pcap_files/in_1.txt
new file mode 100644
index 00000000..f91c68a2
--- /dev/null
+++ b/dep/pipeline/mirror_006/pcap_files/in_1.txt
@@ -0,0 +1,19 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 9c 00 01 00 00 40 11 ad 39 64 00 00 01 64 00
+000020 05 16 00 64 13 88 00 88 f2 7e 73 7a 4b 63 76 6f
+000030 46 61 74 68 52 6e 32 48 42 64 76 68 77 7a 31 64
+000040 79 35 6a 4d 35 78 59 44 6b 52 4e 53 46 4d 4c 4c
+000050 7a 77 54 78 38 74 65 64 55 32 7a 51 33 70 33 77
+000060 6b 68 78 53 78 65 67 4e 75 53 36 39 36 31 34 37
+000070 6b 68 43 57 49 47 59 36 66 6a 66 72 6b 47 6c 55
+000080 41 5a 6d 63 34 41 35 66 50 42 34 78 50 51 46 31
+000090 31 4d 47 6b 6a 39 37 32 69 6d 65 50 51 76 37 55
+0000a0 34 4f 54 6e 36 4c 7a 48 45 73
diff --git a/dep/pipeline/mirror_006/pcap_files/out_11.txt b/dep/pipeline/mirror_006/pcap_files/out_11.txt
new file mode 100644
index 00000000..f91c68a2
--- /dev/null
+++ b/dep/pipeline/mirror_006/pcap_files/out_11.txt
@@ -0,0 +1,19 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 9c 00 01 00 00 40 11 ad 39 64 00 00 01 64 00
+000020 05 16 00 64 13 88 00 88 f2 7e 73 7a 4b 63 76 6f
+000030 46 61 74 68 52 6e 32 48 42 64 76 68 77 7a 31 64
+000040 79 35 6a 4d 35 78 59 44 6b 52 4e 53 46 4d 4c 4c
+000050 7a 77 54 78 38 74 65 64 55 32 7a 51 33 70 33 77
+000060 6b 68 78 53 78 65 67 4e 75 53 36 39 36 31 34 37
+000070 6b 68 43 57 49 47 59 36 66 6a 66 72 6b 47 6c 55
+000080 41 5a 6d 63 34 41 35 66 50 42 34 78 50 51 46 31
+000090 31 4d 47 6b 6a 39 37 32 69 6d 65 50 51 76 37 55
+0000a0 34 4f 54 6e 36 4c 7a 48 45 73
diff --git a/dep/pipeline/mirror_006/pcap_files/out_12.txt b/dep/pipeline/mirror_006/pcap_files/out_12.txt
new file mode 100644
index 00000000..af0fc303
--- /dev/null
+++ b/dep/pipeline/mirror_006/pcap_files/out_12.txt
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
diff --git a/dep/pipeline/mirror_006/pcap_files/out_13.txt b/dep/pipeline/mirror_006/pcap_files/out_13.txt
new file mode 100644
index 00000000..f91c68a2
--- /dev/null
+++ b/dep/pipeline/mirror_006/pcap_files/out_13.txt
@@ -0,0 +1,19 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 9c 00 01 00 00 40 11 ad 39 64 00 00 01 64 00
+000020 05 16 00 64 13 88 00 88 f2 7e 73 7a 4b 63 76 6f
+000030 46 61 74 68 52 6e 32 48 42 64 76 68 77 7a 31 64
+000040 79 35 6a 4d 35 78 59 44 6b 52 4e 53 46 4d 4c 4c
+000050 7a 77 54 78 38 74 65 64 55 32 7a 51 33 70 33 77
+000060 6b 68 78 53 78 65 67 4e 75 53 36 39 36 31 34 37
+000070 6b 68 43 57 49 47 59 36 66 6a 66 72 6b 47 6c 55
+000080 41 5a 6d 63 34 41 35 66 50 42 34 78 50 51 46 31
+000090 31 4d 47 6b 6a 39 37 32 69 6d 65 50 51 76 37 55
+0000a0 34 4f 54 6e 36 4c 7a 48 45 73
diff --git a/dep/pipeline/mirror_006/readme.md b/dep/pipeline/mirror_006/readme.md
new file mode 100644
index 00000000..d0007a8d
--- /dev/null
+++ b/dep/pipeline/mirror_006/readme.md
@@ -0,0 +1,17 @@
+Test Case: test_mirror_006
+-----------------------
+
+ CLI being tested:
+ pipeline PIPELINE0 mirror slots <max_slots> sessions <max_sessions>
+ pipeline PIPELINE0 mirror session <session_id> port <port_id> clone [slow/fast] truncate <truncate_length>
+
+ Instruction being tested:
+ mirror m.field m.field
+
+ Description:
+ Override the mirror configuration, mirror the packet that are received with UDP destination port 5000.
+
+ Verification:
+ The packet should be sent out on the same port that it received.
+ The mirror copy of the packet should be sent out on the overriden mirror ports.
+ The mirrored packet content, should be same as the original transmitted packet.
\ No newline at end of file
diff --git a/dep/pipeline/mirror_007/ethdev.io b/dep/pipeline/mirror_007/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/mirror_007/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/mirror_007/mirror_007.cli b/dep/pipeline/mirror_007/mirror_007.cli
new file mode 100644
index 00000000..4122584e
--- /dev/null
+++ b/dep/pipeline/mirror_007/mirror_007.cli
@@ -0,0 +1,35 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/mirror_007/mirror_007.spec /tmp/pipeline/mirror_007/mirror_007.c
+pipeline libbuild /tmp/pipeline/mirror_007/mirror_007.c /tmp/pipeline/mirror_007/mirror_007.so
+
+;
+; Customize the LINK parameters to match your setup.
+;
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+;
+; PIPELINE0 setup.
+;
+
+pipeline PIPELINE0 mirror slots 4 sessions 16
+pipeline PIPELINE0 build lib /tmp/pipeline/mirror_007/mirror_007.so io /tmp/pipeline/mirror_007/ethdev.io numa 0
+
+pipeline PIPELINE0 mirror session 0 port 0 clone fast truncate 0
+pipeline PIPELINE0 mirror session 1 port 1 clone fast truncate 0
+pipeline PIPELINE0 mirror session 2 port 2 clone fast truncate 0
+pipeline PIPELINE0 mirror session 3 port 3 clone fast truncate 0
+
+;
+; Pipelines-to-threads mapping.
+;
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/mirror_007/mirror_007.spec b/dep/pipeline/mirror_007/mirror_007.spec
new file mode 100644
index 00000000..347c034c
--- /dev/null
+++ b/dep/pipeline/mirror_007/mirror_007.spec
@@ -0,0 +1,80 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+; This simple example illustrates how to perform packet mirroring. The "mirror" instruction is used
+; to flag the current packet for mirroring, which means that at TX time, before the current packet
+; is sent out, it will first be cloned (using either the fast or the slow/deep cloning method) and
+; the clone packet sent out on the output port specified by the mirror session.
+;
+; In this example, the UDP packets with destination port 5000 are mirrored to the output port
+; specified by the mirror session x (x:<mirror_session_id>), while the rest of the packets are not mirrored. Therefore, for
+; every UDP input packet with this specific destination port there will be two output packets (the
+; current packet and its clone packet), while for every other input packet there will be a single
+; output packet.
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+struct udp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<16> length
+ bit<16> checksum
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+header udp instanceof udp_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<32> mirror_slot
+ bit<32> mirror_session
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ extract h.udp
+
+ //
+ // Mark for mirroring all packets with UDP destination port of 5000.
+ //
+ MIRROR_UDP_DST_PORT_5000 : jmpneq EMIT h.udp.dst_port 5000
+ mov m.mirror_slot 1
+ mov m.mirror_session 1
+ mirror m.mirror_slot m.mirror_session
+
+ EMIT : emit h.ethernet
+ emit h.ipv4
+ emit h.udp
+ tx m.port
+}
diff --git a/dep/pipeline/mirror_007/pcap_files/in_1.txt b/dep/pipeline/mirror_007/pcap_files/in_1.txt
new file mode 100644
index 00000000..69aa3e5d
--- /dev/null
+++ b/dep/pipeline/mirror_007/pcap_files/in_1.txt
@@ -0,0 +1,19 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 9c 00 01 00 00 40 11 ad 39 64 00 00 01 64 00
+000020 05 16 00 64 01 f4 00 88 63 79 62 36 4c 76 32 66
+000030 6a 55 62 70 58 75 35 44 62 6d 75 44 63 62 67 71
+000040 6c 68 38 30 52 39 36 46 65 39 68 4b 67 6d 44 73
+000050 77 46 54 64 79 57 67 6a 4f 53 7a 61 6d 79 71 33
+000060 6e 7a 54 63 54 46 4c 52 41 4d 33 74 37 58 42 46
+000070 51 76 4a 6c 74 77 51 55 49 6c 78 46 61 38 78 46
+000080 44 7a 7a 66 62 78 45 53 37 6d 4f 72 52 6c 78 38
+000090 36 57 37 74 62 4b 4a 4d 45 76 35 79 31 55 4e 53
+0000a0 71 56 5a 6b 58 54 64 50 4e 47
diff --git a/dep/pipeline/mirror_007/pcap_files/out_11.txt b/dep/pipeline/mirror_007/pcap_files/out_11.txt
new file mode 100644
index 00000000..69aa3e5d
--- /dev/null
+++ b/dep/pipeline/mirror_007/pcap_files/out_11.txt
@@ -0,0 +1,19 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 9c 00 01 00 00 40 11 ad 39 64 00 00 01 64 00
+000020 05 16 00 64 01 f4 00 88 63 79 62 36 4c 76 32 66
+000030 6a 55 62 70 58 75 35 44 62 6d 75 44 63 62 67 71
+000040 6c 68 38 30 52 39 36 46 65 39 68 4b 67 6d 44 73
+000050 77 46 54 64 79 57 67 6a 4f 53 7a 61 6d 79 71 33
+000060 6e 7a 54 63 54 46 4c 52 41 4d 33 74 37 58 42 46
+000070 51 76 4a 6c 74 77 51 55 49 6c 78 46 61 38 78 46
+000080 44 7a 7a 66 62 78 45 53 37 6d 4f 72 52 6c 78 38
+000090 36 57 37 74 62 4b 4a 4d 45 76 35 79 31 55 4e 53
+0000a0 71 56 5a 6b 58 54 64 50 4e 47
diff --git a/dep/pipeline/mirror_007/pcap_files/out_12.txt b/dep/pipeline/mirror_007/pcap_files/out_12.txt
new file mode 100644
index 00000000..af0fc303
--- /dev/null
+++ b/dep/pipeline/mirror_007/pcap_files/out_12.txt
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
diff --git a/dep/pipeline/mirror_007/readme.md b/dep/pipeline/mirror_007/readme.md
new file mode 100644
index 00000000..7be5dd64
--- /dev/null
+++ b/dep/pipeline/mirror_007/readme.md
@@ -0,0 +1,16 @@
+Test Case: test_mirror_007
+-----------------------
+
+ CLI being tested:
+ pipeline PIPELINE0 mirror slots <max_slots> sessions <max_sessions>
+ pipeline PIPELINE0 mirror session <session_id> port <port_id> clone [slow/fast] truncate <truncate_length>
+
+ Instruction being tested:
+ mirror m.field m.field
+
+ Description:
+ Check mirroring for the packet that are received with UDP destination port 500.
+
+ Verification:
+ The packet should be sent out on the same port that it received.
+ The mirror copy of the packet should not be sent out on the mirror port.
\ No newline at end of file
diff --git a/dep/pipeline/mov_001/ethdev.io b/dep/pipeline/mov_001/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/mov_001/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/mov_001/mov_001.cli b/dep/pipeline/mov_001/mov_001.cli
new file mode 100644
index 00000000..cd9ae521
--- /dev/null
+++ b/dep/pipeline/mov_001/mov_001.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/mov_001/mov_001.spec /tmp/pipeline/mov_001/mov_001.c
+pipeline libbuild /tmp/pipeline/mov_001/mov_001.c /tmp/pipeline/mov_001/mov_001.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/mov_001/mov_001.so io /tmp/pipeline/mov_001/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/mov_001/mov_001.spec b/dep/pipeline/mov_001/mov_001.spec
new file mode 100644
index 00000000..0f992392
--- /dev/null
+++ b/dep/pipeline/mov_001/mov_001.spec
@@ -0,0 +1,51 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ mov h.ipv4.dst_addr h.ethernet.src_addr
+ mov h.ethernet.src_addr h.ethernet.dst_addr
+ mov h.ethernet.dst_addr h.ipv4.src_addr
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/mov_001/pcap_files/in_1.txt b/dep/pipeline/mov_001/pcap_files/in_1.txt
new file mode 100644
index 00000000..75115c15
--- /dev/null
+++ b/dep/pipeline/mov_001/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/mov_001/pcap_files/out_1.txt b/dep/pipeline/mov_001/pcap_files/out_1.txt
new file mode 100644
index 00000000..a18d2af3
--- /dev/null
+++ b/dep/pipeline/mov_001/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 00 64 00 00 0a 00 11 22 33 44 55 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a 77 88
+000020 99 aa 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/mov_001/readme.md b/dep/pipeline/mov_001/readme.md
new file mode 100644
index 00000000..4fbc26ab
--- /dev/null
+++ b/dep/pipeline/mov_001/readme.md
@@ -0,0 +1,19 @@
+
+Test Case: test_mov_001
+-----------------------
+
+ Instruction being tested:
+ mov h.field h.field
+
+ Description:
+ Copy the source MAC address, destination MAC address and destination IP
+ address of the received packet into the destination IP address, source
+ MAC address and destination MAC address fields respectively and transmit
+ the packet back on the same port.
+
+ Verification:
+ For the received packet, the source MAC address, destination MAC
+ address and destination IP address should be copied into the
+ destination IP address, source MAC address and destination MAC address
+ fields respectively and the packet should be transmitted back on the
+ same port.
diff --git a/dep/pipeline/mov_002/ethdev.io b/dep/pipeline/mov_002/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/mov_002/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/mov_002/mov_002.cli b/dep/pipeline/mov_002/mov_002.cli
new file mode 100644
index 00000000..087e5ad5
--- /dev/null
+++ b/dep/pipeline/mov_002/mov_002.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/mov_002/mov_002.spec /tmp/pipeline/mov_002/mov_002.c
+pipeline libbuild /tmp/pipeline/mov_002/mov_002.c /tmp/pipeline/mov_002/mov_002.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/mov_002/mov_002.so io /tmp/pipeline/mov_002/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/mov_002/mov_002.spec b/dep/pipeline/mov_002/mov_002.spec
new file mode 100644
index 00000000..cca7e309
--- /dev/null
+++ b/dep/pipeline/mov_002/mov_002.spec
@@ -0,0 +1,67 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<48> addr_48
+ bit<32> addr_32
+ bit<16> addr_16
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+
+ // exchange ipv4 src and dest addresses
+ mov m.addr_48 h.ipv4.dst_addr // >
+ mov h.ipv4.dst_addr h.ipv4.src_addr
+ mov h.ipv4.src_addr m.addr_48 // <
+
+ // exchange ethernet src and dest addresses
+ mov m.addr_32 h.ethernet.dst_addr // <
+ mov h.ethernet.dst_addr h.ethernet.src_addr
+ mov h.ethernet.src_addr m.addr_32 // >
+
+ // exchange ipv4 identification and flags_offset
+ mov m.addr_16 h.ipv4.identification // ==
+ mov h.ipv4.identification h.ipv4.flags_offset
+ mov h.ipv4.flags_offset m.addr_16 // ==
+
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/mov_002/pcap_files/in_1.txt b/dep/pipeline/mov_002/pcap_files/in_1.txt
new file mode 100644
index 00000000..3b40fcb8
--- /dev/null
+++ b/dep/pipeline/mov_002/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e ab cd ef fe 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/mov_002/pcap_files/out_1.txt b/dep/pipeline/mov_002/pcap_files/out_1.txt
new file mode 100644
index 00000000..8dffdb29
--- /dev/null
+++ b/dep/pipeline/mov_002/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 66 77 88 99 aa 00 00 22 33 44 55 08 00 45 00
+000010 00 2e ef fe ab cd 40 06 4e b5 c8 00 00 0a 64 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/mov_002/readme.md b/dep/pipeline/mov_002/readme.md
new file mode 100644
index 00000000..e66185ed
--- /dev/null
+++ b/dep/pipeline/mov_002/readme.md
@@ -0,0 +1,14 @@
+
+Test Case: test_mov_002
+-----------------------
+
+ Instructions being tested:
+ mov m.field h.field
+ mov h.field m.field
+
+ Description:
+ Swap the source and destination IP address of the received packet and
+ transmit the packet back on the same port.
+
+ Verification:
+ To be verified using input & output pcap files.
diff --git a/dep/pipeline/mov_003/ethdev.io b/dep/pipeline/mov_003/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/mov_003/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/mov_003/mov_003.cli b/dep/pipeline/mov_003/mov_003.cli
new file mode 100644
index 00000000..878d2b67
--- /dev/null
+++ b/dep/pipeline/mov_003/mov_003.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/mov_003/mov_003.spec /tmp/pipeline/mov_003/mov_003.c
+pipeline libbuild /tmp/pipeline/mov_003/mov_003.c /tmp/pipeline/mov_003/mov_003.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/mov_003/mov_003.so io /tmp/pipeline/mov_003/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/mov_003/mov_003.spec b/dep/pipeline/mov_003/mov_003.spec
new file mode 100644
index 00000000..1d265aa5
--- /dev/null
+++ b/dep/pipeline/mov_003/mov_003.spec
@@ -0,0 +1,58 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ipv4 instanceof ipv4_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<56> addr_56
+ bit<48> addr_48
+ bit<32> addr_32_1
+ bit<32> addr_32_2
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ mov m.addr_48 h.ipv4.dst_addr
+ mov m.addr_32_1 m.addr_48 // <
+ mov m.addr_32_2 m.addr_32_1 // =
+ mov m.addr_56 m.addr_32_2 // >
+ mov h.ipv4.src_addr m.addr_56
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/mov_003/pcap_files/in_1.txt b/dep/pipeline/mov_003/pcap_files/in_1.txt
new file mode 100644
index 00000000..75115c15
--- /dev/null
+++ b/dep/pipeline/mov_003/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/mov_003/pcap_files/out_1.txt b/dep/pipeline/mov_003/pcap_files/out_1.txt
new file mode 100644
index 00000000..5ef169ca
--- /dev/null
+++ b/dep/pipeline/mov_003/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 c8 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/mov_003/readme.md b/dep/pipeline/mov_003/readme.md
new file mode 100644
index 00000000..9757160c
--- /dev/null
+++ b/dep/pipeline/mov_003/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_mov_003
+-----------------------
+
+ Instruction being tested:
+ mov m.field m.field
+
+ Description:
+ Copy the destination IP address of the received packet into the source IP address and transmit the packet back on the same port.
+
+ Verification:
+ Source and destination IP address fields of transmitted packets should have same value.
diff --git a/dep/pipeline/mov_004/ethdev.io b/dep/pipeline/mov_004/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/mov_004/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/mov_004/mov_004.cli b/dep/pipeline/mov_004/mov_004.cli
new file mode 100755
index 00000000..0edf45a9
--- /dev/null
+++ b/dep/pipeline/mov_004/mov_004.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/mov_004/mov_004.spec /tmp/pipeline/mov_004/mov_004.c
+pipeline libbuild /tmp/pipeline/mov_004/mov_004.c /tmp/pipeline/mov_004/mov_004.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/mov_004/mov_004.so io /tmp/pipeline/mov_004/ethdev.io numa 0
+pipeline PIPELINE0 table mov_004 add /tmp/pipeline/mov_004/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/mov_004/mov_004.spec b/dep/pipeline/mov_004/mov_004.spec
new file mode 100755
index 00000000..8de0d9b3
--- /dev/null
+++ b/dep/pipeline/mov_004/mov_004.spec
@@ -0,0 +1,82 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct mov_004_args_t {
+ bit<48> addr
+}
+
+action mov_004_action args instanceof mov_004_args_t {
+ mov h.ipv4.src_addr t.addr
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Table
+//
+table mov_004 {
+ key {
+ h.ethernet.dst_addr exact
+ }
+
+ actions {
+ mov_004_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ table mov_004
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/mov_004/pcap_files/in_1.txt b/dep/pipeline/mov_004/pcap_files/in_1.txt
new file mode 100644
index 00000000..bb7fe17f
--- /dev/null
+++ b/dep/pipeline/mov_004/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 aa bb cc dd c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/mov_004/pcap_files/out_1.txt b/dep/pipeline/mov_004/pcap_files/out_1.txt
new file mode 100644
index 00000000..bb7fe17f
--- /dev/null
+++ b/dep/pipeline/mov_004/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 aa bb cc dd c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/mov_004/readme.md b/dep/pipeline/mov_004/readme.md
new file mode 100644
index 00000000..f9f174df
--- /dev/null
+++ b/dep/pipeline/mov_004/readme.md
@@ -0,0 +1,14 @@
+
+Test Case: test_mov_004
+-----------------------
+
+ Instructions being tested:
+ mov h.field t.field
+
+ Description:
+ For a packet with matching destination MAC address, update the source
+ IP address of packet with the IP address of configured rule in the table.
+
+ Verification
+ IP address of the output packet should match the IP address of configured
+ rule in the table.
diff --git a/dep/pipeline/mov_004/table.txt b/dep/pipeline/mov_004/table.txt
new file mode 100755
index 00000000..d98c0e49
--- /dev/null
+++ b/dep/pipeline/mov_004/table.txt
@@ -0,0 +1 @@
+match 0x525400124457 action mov_004_action addr 0xaabbccdd
diff --git a/dep/pipeline/mov_005/ethdev.io b/dep/pipeline/mov_005/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/mov_005/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/mov_005/mov_005.cli b/dep/pipeline/mov_005/mov_005.cli
new file mode 100755
index 00000000..21a557db
--- /dev/null
+++ b/dep/pipeline/mov_005/mov_005.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/mov_005/mov_005.spec /tmp/pipeline/mov_005/mov_005.c
+pipeline libbuild /tmp/pipeline/mov_005/mov_005.c /tmp/pipeline/mov_005/mov_005.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/mov_005/mov_005.so io /tmp/pipeline/mov_005/ethdev.io numa 0
+pipeline PIPELINE0 table mov_005 add /tmp/pipeline/mov_005/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/mov_005/mov_005.spec b/dep/pipeline/mov_005/mov_005.spec
new file mode 100755
index 00000000..3f906123
--- /dev/null
+++ b/dep/pipeline/mov_005/mov_005.spec
@@ -0,0 +1,66 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct mov_005_args_t {
+ bit<32> port_out
+}
+
+action mov_005_action args instanceof mov_005_args_t {
+ mov m.port t.port_out
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+//table
+//
+table mov_005 {
+ key {
+ h.ethernet.dst_addr exact
+ }
+
+ actions {
+ mov_005_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ table mov_005
+ emit h.ethernet
+ tx m.port
+}
diff --git a/dep/pipeline/mov_005/pcap_files/in_1.txt b/dep/pipeline/mov_005/pcap_files/in_1.txt
new file mode 100644
index 00000000..ce0583c0
--- /dev/null
+++ b/dep/pipeline/mov_005/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/mov_005/pcap_files/out_1.txt b/dep/pipeline/mov_005/pcap_files/out_1.txt
new file mode 100644
index 00000000..ce0583c0
--- /dev/null
+++ b/dep/pipeline/mov_005/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/mov_005/readme.md b/dep/pipeline/mov_005/readme.md
new file mode 100644
index 00000000..4244ca30
--- /dev/null
+++ b/dep/pipeline/mov_005/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_mov_005
+-----------------------
+
+ Instructions being tested:
+ mov m.field t.field
+
+ Description:
+ For a packet with matching destination MAC address, Update the output port value from the table entry.
+
+ Verification:
+ Packet should be received on the port mentioned in the table.
diff --git a/dep/pipeline/mov_005/table.txt b/dep/pipeline/mov_005/table.txt
new file mode 100755
index 00000000..2ec98373
--- /dev/null
+++ b/dep/pipeline/mov_005/table.txt
@@ -0,0 +1 @@
+match 0x525400124457 action mov_005_action port_out 0x0
diff --git a/dep/pipeline/mov_007/ethdev.io b/dep/pipeline/mov_007/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/mov_007/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/mov_007/mov_007.cli b/dep/pipeline/mov_007/mov_007.cli
new file mode 100755
index 00000000..b1ff50a4
--- /dev/null
+++ b/dep/pipeline/mov_007/mov_007.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/mov_007/mov_007.spec /tmp/pipeline/mov_007/mov_007.c
+pipeline libbuild /tmp/pipeline/mov_007/mov_007.c /tmp/pipeline/mov_007/mov_007.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/mov_007/mov_007.so io /tmp/pipeline/mov_007/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/mov_007/mov_007.spec b/dep/pipeline/mov_007/mov_007.spec
new file mode 100755
index 00000000..3989a152
--- /dev/null
+++ b/dep/pipeline/mov_007/mov_007.spec
@@ -0,0 +1,57 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port
+ bit<16> data_16
+ bit<32> data_32
+ bit<48> data_48
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ mov m.data_48 0xa1a2a3a4
+ mov m.data_32 0xa1a2a3a4
+ mov m.data_16 0xa1a2a3a4
+ mov h.ethernet.dst_addr m.data_48
+ mov h.ipv4.dst_addr m.data_32
+ mov h.ipv4.identification m.data_16
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/mov_007/pcap_files/in_1.txt b/dep/pipeline/mov_007/pcap_files/in_1.txt
new file mode 100644
index 00000000..ce0583c0
--- /dev/null
+++ b/dep/pipeline/mov_007/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/mov_007/pcap_files/out_1.txt b/dep/pipeline/mov_007/pcap_files/out_1.txt
new file mode 100644
index 00000000..b54817a2
--- /dev/null
+++ b/dep/pipeline/mov_007/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 00 a1 a2 a3 a4 52 54 00 12 34 56 08 00 45 00
+000010 00 2e a3 a4 00 00 40 06 4e b5 64 00 00 0a a1 a2
+000020 a3 a4 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/mov_007/readme.md b/dep/pipeline/mov_007/readme.md
new file mode 100644
index 00000000..72220d87
--- /dev/null
+++ b/dep/pipeline/mov_007/readme.md
@@ -0,0 +1,14 @@
+
+Test Case: test_mov_007
+-----------------------
+
+ Instructions being tested:
+ mov m.field immediate_data
+
+ Description:
+ Update the destination MAC address, destination IP address and IP
+ identification fields of the input packet with fixed values using this
+ instruction.
+
+ Verification:
+ Verify using input and output pcap files.
diff --git a/dep/pipeline/mov_008/ethdev.io b/dep/pipeline/mov_008/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/mov_008/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/mov_008/mov_008.cli b/dep/pipeline/mov_008/mov_008.cli
new file mode 100755
index 00000000..3d0e53c6
--- /dev/null
+++ b/dep/pipeline/mov_008/mov_008.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/mov_008/mov_008.spec /tmp/pipeline/mov_008/mov_008.c
+pipeline libbuild /tmp/pipeline/mov_008/mov_008.c /tmp/pipeline/mov_008/mov_008.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/mov_008/mov_008.so io /tmp/pipeline/mov_008/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/mov_008/mov_008.spec b/dep/pipeline/mov_008/mov_008.spec
new file mode 100755
index 00000000..dd68699f
--- /dev/null
+++ b/dep/pipeline/mov_008/mov_008.spec
@@ -0,0 +1,51 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ mov h.ethernet.dst_addr 0xa1a2a3a4
+ mov h.ipv4.dst_addr 0xa1a2a3a4
+ mov h.ipv4.identification 0xa1a2a3a4
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/mov_008/pcap_files/in_1.txt b/dep/pipeline/mov_008/pcap_files/in_1.txt
new file mode 100644
index 00000000..75115c15
--- /dev/null
+++ b/dep/pipeline/mov_008/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/mov_008/pcap_files/out_1.txt b/dep/pipeline/mov_008/pcap_files/out_1.txt
new file mode 100644
index 00000000..8aaa1d96
--- /dev/null
+++ b/dep/pipeline/mov_008/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 00 a1 a2 a3 a4 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e a3 a4 00 00 40 06 4e b5 64 00 00 0a a1 a2
+000020 a3 a4 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/mov_008/readme.md b/dep/pipeline/mov_008/readme.md
new file mode 100644
index 00000000..60030cf9
--- /dev/null
+++ b/dep/pipeline/mov_008/readme.md
@@ -0,0 +1,13 @@
+
+Test Case: test_mov_008
+-----------------------
+
+ Instructions being tested:
+ mov h.field immediate_data
+
+ Description:
+ Update the destination MAC address, destination IP address and IP
+ identification of the received packet to a fixed value.
+
+ Verification:
+ Verify using input and output pcap files.
diff --git a/dep/pipeline/or_001/ethdev.io b/dep/pipeline/or_001/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/or_001/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/or_001/or_001.cli b/dep/pipeline/or_001/or_001.cli
new file mode 100755
index 00000000..8f923715
--- /dev/null
+++ b/dep/pipeline/or_001/or_001.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/or_001/or_001.spec /tmp/pipeline/or_001/or_001.c
+pipeline libbuild /tmp/pipeline/or_001/or_001.c /tmp/pipeline/or_001/or_001.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/or_001/or_001.so io /tmp/pipeline/or_001/ethdev.io numa 0
+pipeline PIPELINE0 table or_001 add /tmp/pipeline/or_001/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/or_001/or_001.spec b/dep/pipeline/or_001/or_001.spec
new file mode 100755
index 00000000..ffc1ec33
--- /dev/null
+++ b/dep/pipeline/or_001/or_001.spec
@@ -0,0 +1,82 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct or_001_args_t {
+ bit<48> addr
+}
+
+action or_001_action args instanceof or_001_args_t {
+ or h.ipv4.dst_addr t.addr
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Table
+//
+table or_001 {
+ key {
+ h.ethernet.dst_addr exact
+ }
+
+ actions {
+ or_001_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ table or_001
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/or_001/pcap_files/in_1.txt b/dep/pipeline/or_001/pcap_files/in_1.txt
new file mode 100644
index 00000000..e34fa2c4
--- /dev/null
+++ b/dep/pipeline/or_001/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 aa bb cc dd 12 34
+000020 56 78 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/or_001/pcap_files/out_1.txt b/dep/pipeline/or_001/pcap_files/out_1.txt
new file mode 100644
index 00000000..212c26a0
--- /dev/null
+++ b/dep/pipeline/or_001/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 aa bb cc dd ba bf
+000020 de fd 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/or_001/readme.md b/dep/pipeline/or_001/readme.md
new file mode 100644
index 00000000..f98857fd
--- /dev/null
+++ b/dep/pipeline/or_001/readme.md
@@ -0,0 +1,15 @@
+
+Test Case: test_or_001
+-----------------------
+
+ Instructions being tested:
+ or h.field t.field
+
+ Description:
+ For a packet with matching destination MAC address, bitwise OR the
+ destination IP address with the action data of matching rule in the
+ table and transmit the packet back on the same port.
+
+ Verification:
+ Received packet should have the destination IP address updated as per
+ the matching rule in the table.
diff --git a/dep/pipeline/or_001/table.txt b/dep/pipeline/or_001/table.txt
new file mode 100755
index 00000000..e0ec0ece
--- /dev/null
+++ b/dep/pipeline/or_001/table.txt
@@ -0,0 +1 @@
+match 0x525400124457 action or_001_action addr 0xaabbccdd
diff --git a/dep/pipeline/or_002/ethdev.io b/dep/pipeline/or_002/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/or_002/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/or_002/or_002.cli b/dep/pipeline/or_002/or_002.cli
new file mode 100644
index 00000000..3cc8912f
--- /dev/null
+++ b/dep/pipeline/or_002/or_002.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/or_002/or_002.spec /tmp/pipeline/or_002/or_002.c
+pipeline libbuild /tmp/pipeline/or_002/or_002.c /tmp/pipeline/or_002/or_002.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/or_002/or_002.so io /tmp/pipeline/or_002/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/or_002/or_002.spec b/dep/pipeline/or_002/or_002.spec
new file mode 100644
index 00000000..9af4c5fd
--- /dev/null
+++ b/dep/pipeline/or_002/or_002.spec
@@ -0,0 +1,51 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ or h.ipv4.dst_addr h.ethernet.src_addr // <
+ or h.ethernet.src_addr h.ethernet.dst_addr // =
+ or h.ethernet.dst_addr h.ipv4.src_addr // >
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/or_002/pcap_files/in_1.txt b/dep/pipeline/or_002/pcap_files/in_1.txt
new file mode 100644
index 00000000..c21b420b
--- /dev/null
+++ b/dep/pipeline/or_002/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 10 30 50 70 90 b0 12 34 56 78 9a bc 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 12 34 56 78 10 30
+000020 50 70 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/or_002/pcap_files/out_1.txt b/dep/pipeline/or_002/pcap_files/out_1.txt
new file mode 100644
index 00000000..6310b141
--- /dev/null
+++ b/dep/pipeline/or_002/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 10 30 52 74 d6 f8 12 34 56 78 9a bc 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 12 34 56 78 56 78
+000020 da fc 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/or_002/readme.md b/dep/pipeline/or_002/readme.md
new file mode 100644
index 00000000..c0ba7076
--- /dev/null
+++ b/dep/pipeline/or_002/readme.md
@@ -0,0 +1,17 @@
+
+Test Case: test_or_002
+-----------------------
+
+ Instruction being tested:
+ or h.field h.field
+
+ Description:
+ For the received packet, bitwise OR the bits of destination IP address
+ and source MAC address, source MAC address and destination MAC address,
+ destination MAC address and source IP address and transmit the packet
+ back on the same port.
+
+ Verification:
+ Bits of destination MAC address of the transmitted packet should be the
+ result of bitwise OR of source and destination MAC addresses of the
+ received packet.
diff --git a/dep/pipeline/or_003/ethdev.io b/dep/pipeline/or_003/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/or_003/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/or_003/or_003.cli b/dep/pipeline/or_003/or_003.cli
new file mode 100644
index 00000000..d12c75bc
--- /dev/null
+++ b/dep/pipeline/or_003/or_003.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/or_003/or_003.spec /tmp/pipeline/or_003/or_003.c
+pipeline libbuild /tmp/pipeline/or_003/or_003.c /tmp/pipeline/or_003/or_003.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/or_003/or_003.so io /tmp/pipeline/or_003/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/or_003/or_003.spec b/dep/pipeline/or_003/or_003.spec
new file mode 100644
index 00000000..5c7d4bf1
--- /dev/null
+++ b/dep/pipeline/or_003/or_003.spec
@@ -0,0 +1,38 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<48> addr_1
+ bit<48> addr_2
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ mov m.addr_1 h.ethernet.src_addr
+ mov m.addr_2 h.ethernet.dst_addr
+ or m.addr_2 m.addr_1
+ mov h.ethernet.dst_addr m.addr_2
+ emit h.ethernet
+ tx m.port
+}
diff --git a/dep/pipeline/or_003/pcap_files/in_1.txt b/dep/pipeline/or_003/pcap_files/in_1.txt
new file mode 100644
index 00000000..c21b420b
--- /dev/null
+++ b/dep/pipeline/or_003/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 10 30 50 70 90 b0 12 34 56 78 9a bc 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 12 34 56 78 10 30
+000020 50 70 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/or_003/pcap_files/out_1.txt b/dep/pipeline/or_003/pcap_files/out_1.txt
new file mode 100644
index 00000000..74678674
--- /dev/null
+++ b/dep/pipeline/or_003/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 12 34 56 78 9a bc 12 34 56 78 9a bc 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 12 34 56 78 10 30
+000020 50 70 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/or_003/readme.md b/dep/pipeline/or_003/readme.md
new file mode 100644
index 00000000..4ff1cf25
--- /dev/null
+++ b/dep/pipeline/or_003/readme.md
@@ -0,0 +1,13 @@
+Test Case: test_or_003
+-----------------------
+
+ Instruction being tested:
+ or m.field m.field
+
+ Description:
+ For the received packet, bitwise OR the bits of source and destination MAC addresses and store the result in destination MAC address
+ field and transmit the packet back on the same port.
+
+ Verification:
+ Bits of destination MAC address of the transmitted packet should be the result of bitwise OR of source and destination MAC addresses
+ of the received packet.
diff --git a/dep/pipeline/or_004/ethdev.io b/dep/pipeline/or_004/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/or_004/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/or_004/or_004.cli b/dep/pipeline/or_004/or_004.cli
new file mode 100644
index 00000000..23d2b37e
--- /dev/null
+++ b/dep/pipeline/or_004/or_004.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/or_004/or_004.spec /tmp/pipeline/or_004/or_004.c
+pipeline libbuild /tmp/pipeline/or_004/or_004.c /tmp/pipeline/or_004/or_004.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/or_004/or_004.so io /tmp/pipeline/or_004/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/or_004/or_004.spec b/dep/pipeline/or_004/or_004.spec
new file mode 100644
index 00000000..cd7c38a2
--- /dev/null
+++ b/dep/pipeline/or_004/or_004.spec
@@ -0,0 +1,36 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<48> addr
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ mov m.addr h.ethernet.dst_addr
+ or m.addr h.ethernet.src_addr
+ mov h.ethernet.dst_addr m.addr
+ emit h.ethernet
+ tx m.port
+}
diff --git a/dep/pipeline/or_004/pcap_files/in_1.txt b/dep/pipeline/or_004/pcap_files/in_1.txt
new file mode 100644
index 00000000..c21b420b
--- /dev/null
+++ b/dep/pipeline/or_004/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 10 30 50 70 90 b0 12 34 56 78 9a bc 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 12 34 56 78 10 30
+000020 50 70 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/or_004/pcap_files/out_1.txt b/dep/pipeline/or_004/pcap_files/out_1.txt
new file mode 100644
index 00000000..74678674
--- /dev/null
+++ b/dep/pipeline/or_004/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 12 34 56 78 9a bc 12 34 56 78 9a bc 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 12 34 56 78 10 30
+000020 50 70 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/or_004/readme.md b/dep/pipeline/or_004/readme.md
new file mode 100644
index 00000000..da6e41db
--- /dev/null
+++ b/dep/pipeline/or_004/readme.md
@@ -0,0 +1,13 @@
+Test Case: test_or_004
+-----------------------
+
+ Instruction being tested:
+ or m.field h.field
+
+ Description:
+ For the received packet, bitwise OR the bits of source and destination MAC addresses and store the result in destination MAC address
+ field and transmit the packet back on the same port.
+
+ Verification:
+ Bits of destination MAC address of the transmitted packet should be the result of bitwise OR of source and destination MAC addresses
+ of the received packet.
diff --git a/dep/pipeline/or_005/ethdev.io b/dep/pipeline/or_005/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/or_005/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/or_005/or_005.cli b/dep/pipeline/or_005/or_005.cli
new file mode 100644
index 00000000..c8d719db
--- /dev/null
+++ b/dep/pipeline/or_005/or_005.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/or_005/or_005.spec /tmp/pipeline/or_005/or_005.c
+pipeline libbuild /tmp/pipeline/or_005/or_005.c /tmp/pipeline/or_005/or_005.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/or_005/or_005.so io /tmp/pipeline/or_005/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/or_005/or_005.spec b/dep/pipeline/or_005/or_005.spec
new file mode 100644
index 00000000..6c31ed3c
--- /dev/null
+++ b/dep/pipeline/or_005/or_005.spec
@@ -0,0 +1,57 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+struct ipv4_h {
+ bit<8> version_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_frag_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<48> data_48
+ bit<32> data_32
+ bit<16> data_16
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ mov m.data_48 0xa55aa55a
+ mov m.data_32 0xa55aa55a
+ mov m.data_16 0xa55aa55a
+ or h.ethernet.dst_addr m.data_32 // >
+ or h.ipv4.dst_addr m.data_48 // <
+ or h.ipv4.identification m.data_16 // =
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/or_005/pcap_files/in_1.txt b/dep/pipeline/or_005/pcap_files/in_1.txt
new file mode 100644
index 00000000..947d3f59
--- /dev/null
+++ b/dep/pipeline/or_005/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 10 30 50 70 90 b0 12 34 56 78 9a bc 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 aa bb cc dd 12 34
+000020 56 78 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/or_005/pcap_files/out_1.txt b/dep/pipeline/or_005/pcap_files/out_1.txt
new file mode 100644
index 00000000..04a36a77
--- /dev/null
+++ b/dep/pipeline/or_005/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 10 30 f5 7a b5 fa 12 34 56 78 9a bc 08 00 45 00
+000010 00 2e a5 5b 00 00 40 06 4e b5 aa bb cc dd b7 7e
+000020 f7 7a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/or_005/readme.md b/dep/pipeline/or_005/readme.md
new file mode 100644
index 00000000..35e5317c
--- /dev/null
+++ b/dep/pipeline/or_005/readme.md
@@ -0,0 +1,14 @@
+
+Test Case: test_or_005
+----------------------
+
+ Instruction being tested:
+ or h.field m.field
+
+ Description:
+ For the received packet, bitwise OR destination MAC address,
+ destination IP address and IP identification with a fixed value and
+ transmit the packet back on the same port.
+
+ Verification:
+ Verify using input and output pcap files.
diff --git a/dep/pipeline/or_006/ethdev.io b/dep/pipeline/or_006/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/or_006/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/or_006/or_006.cli b/dep/pipeline/or_006/or_006.cli
new file mode 100644
index 00000000..1e21581a
--- /dev/null
+++ b/dep/pipeline/or_006/or_006.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/or_006/or_006.spec /tmp/pipeline/or_006/or_006.c
+pipeline libbuild /tmp/pipeline/or_006/or_006.c /tmp/pipeline/or_006/or_006.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/or_006/or_006.so io /tmp/pipeline/or_006/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/or_006/or_006.spec b/dep/pipeline/or_006/or_006.spec
new file mode 100644
index 00000000..4d5dc900
--- /dev/null
+++ b/dep/pipeline/or_006/or_006.spec
@@ -0,0 +1,51 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ipv4 instanceof ipv4_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ or h.ipv4.src_addr 0xF0F0F0F0
+ or h.ipv4.dst_addr 0xF0F0F0F0
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/or_006/pcap_files/in_1.txt b/dep/pipeline/or_006/pcap_files/in_1.txt
new file mode 100644
index 00000000..e49eb3de
--- /dev/null
+++ b/dep/pipeline/or_006/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 12 34 56 78 9a bc
+000020 de f0 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/or_006/pcap_files/out_1.txt b/dep/pipeline/or_006/pcap_files/out_1.txt
new file mode 100644
index 00000000..7501434d
--- /dev/null
+++ b/dep/pipeline/or_006/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 f2 f4 f6 f8 fa fc
+000020 fe f0 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/or_006/readme.md b/dep/pipeline/or_006/readme.md
new file mode 100644
index 00000000..01c99ac6
--- /dev/null
+++ b/dep/pipeline/or_006/readme.md
@@ -0,0 +1,13 @@
+Test Case: test_or_006
+-----------------------
+
+ Instruction being tested:
+ or h.field immediate_value
+
+ Description:
+ For the received packet, bitwise OR the bits of source and destination IP addresses with 0xF0F0F0F0 and transmit the packet back on the same
+ port.
+
+ Verification:
+ Bits of source and destination IP addresses of the transmitted packet should be the result of bitwise OR of 0xF0F0F0F0 with that of source
+ and destination IP addresses of the received packet.
diff --git a/dep/pipeline/or_007/ethdev.io b/dep/pipeline/or_007/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/or_007/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/or_007/or_007.cli b/dep/pipeline/or_007/or_007.cli
new file mode 100644
index 00000000..fc72308c
--- /dev/null
+++ b/dep/pipeline/or_007/or_007.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/or_007/or_007.spec /tmp/pipeline/or_007/or_007.c
+pipeline libbuild /tmp/pipeline/or_007/or_007.c /tmp/pipeline/or_007/or_007.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/or_007/or_007.so io /tmp/pipeline/or_007/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/or_007/or_007.spec b/dep/pipeline/or_007/or_007.spec
new file mode 100644
index 00000000..5bdd4f24
--- /dev/null
+++ b/dep/pipeline/or_007/or_007.spec
@@ -0,0 +1,57 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ipv4 instanceof ipv4_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<32> addr_1
+ bit<32> addr_2
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ mov m.addr_1 h.ipv4.src_addr
+ mov m.addr_2 h.ipv4.dst_addr
+ or m.addr_1 0xF0F0F0F0
+ or m.addr_2 0xF0F0F0F0
+ mov h.ipv4.src_addr m.addr_1
+ mov h.ipv4.dst_addr m.addr_2
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/or_007/pcap_files/in_1.txt b/dep/pipeline/or_007/pcap_files/in_1.txt
new file mode 100644
index 00000000..e49eb3de
--- /dev/null
+++ b/dep/pipeline/or_007/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 12 34 56 78 9a bc
+000020 de f0 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/or_007/pcap_files/out_1.txt b/dep/pipeline/or_007/pcap_files/out_1.txt
new file mode 100644
index 00000000..7501434d
--- /dev/null
+++ b/dep/pipeline/or_007/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 f2 f4 f6 f8 fa fc
+000020 fe f0 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/or_007/readme.md b/dep/pipeline/or_007/readme.md
new file mode 100644
index 00000000..4bdbd2cc
--- /dev/null
+++ b/dep/pipeline/or_007/readme.md
@@ -0,0 +1,13 @@
+Test Case: test_or_007
+-----------------------
+
+ Instruction being tested:
+ or m.field immediate_value
+
+ Description:
+ For the received packet, bitwise OR the bits of source and destination IP addresses with 0xF0F0F0F0 and transmit the packet back on the same
+ port.
+
+ Verification:
+ Bits of source and destination IP addresses of the transmitted packet should be the result of bitwise OR of 0xF0F0F0F0 with that of source
+ and destination IP addresses of the received packet.
diff --git a/dep/pipeline/or_008/ethdev.io b/dep/pipeline/or_008/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/or_008/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/or_008/or_008.cli b/dep/pipeline/or_008/or_008.cli
new file mode 100755
index 00000000..d9326f2c
--- /dev/null
+++ b/dep/pipeline/or_008/or_008.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/or_008/or_008.spec /tmp/pipeline/or_008/or_008.c
+pipeline libbuild /tmp/pipeline/or_008/or_008.c /tmp/pipeline/or_008/or_008.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/or_008/or_008.so io /tmp/pipeline/or_008/ethdev.io numa 0
+pipeline PIPELINE0 table or_008 add /tmp/pipeline/or_008/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/or_008/or_008.spec b/dep/pipeline/or_008/or_008.spec
new file mode 100755
index 00000000..2b2bd34a
--- /dev/null
+++ b/dep/pipeline/or_008/or_008.spec
@@ -0,0 +1,66 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct or_008_args_t {
+ bit<32> port
+}
+
+action or_008_action args instanceof or_008_args_t {
+ or m.port t.port
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Table
+//
+table or_008 {
+ key {
+ h.ethernet.dst_addr exact
+ }
+
+ actions {
+ or_008_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ table or_008
+ emit h.ethernet
+ tx m.port
+}
diff --git a/dep/pipeline/or_008/pcap_files/in_1.txt b/dep/pipeline/or_008/pcap_files/in_1.txt
new file mode 100644
index 00000000..ce0583c0
--- /dev/null
+++ b/dep/pipeline/or_008/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/or_008/pcap_files/out_1.txt b/dep/pipeline/or_008/pcap_files/out_1.txt
new file mode 100644
index 00000000..ce0583c0
--- /dev/null
+++ b/dep/pipeline/or_008/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/or_008/readme.md b/dep/pipeline/or_008/readme.md
new file mode 100644
index 00000000..fdf73163
--- /dev/null
+++ b/dep/pipeline/or_008/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_or_008
+-----------------------
+
+ Instructions being tested:
+ or m.field t.field
+
+ Description:
+ For a packet with matching destination MAC address, bitwise OR the received port metadata with the value stored in the table.
+
+ Verification:
+ Packet should be received on the port which is the result of logical OR of received port and value stored in the table.
diff --git a/dep/pipeline/or_008/table.txt b/dep/pipeline/or_008/table.txt
new file mode 100755
index 00000000..be5cf9fc
--- /dev/null
+++ b/dep/pipeline/or_008/table.txt
@@ -0,0 +1 @@
+match 0x525400124457 action or_008_action port 0x1
diff --git a/dep/pipeline/profile_001/cmd_files/cmd_1.txt b/dep/pipeline/profile_001/cmd_files/cmd_1.txt
new file mode 100644
index 00000000..c2ab75d2
--- /dev/null
+++ b/dep/pipeline/profile_001/cmd_files/cmd_1.txt
@@ -0,0 +1,4 @@
+match 0xc8000000 action profile_001_action_01 member_id 0x0
+match 0xc8000001 action profile_001_action_01 member_id 0x1
+match 0xc8000002 action profile_001_action_01 member_id 0x2
+match 0xc8000003 action profile_001_action_01 member_id 0x3
diff --git a/dep/pipeline/profile_001/cmd_files/cmd_2.txt b/dep/pipeline/profile_001/cmd_files/cmd_2.txt
new file mode 100644
index 00000000..d88a1dc8
--- /dev/null
+++ b/dep/pipeline/profile_001/cmd_files/cmd_2.txt
@@ -0,0 +1,4 @@
+match 0x0 action profile_001_action_02 port 0 new_mac_da 0xa1a2a3a40000 new_mac_sa 0xb1b2b3b40000
+match 0x1 action profile_001_action_02 port 1 new_mac_da 0xa1a2a3a40001 new_mac_sa 0xb1b2b3b40001
+match 0x2 action profile_001_action_02 port 2 new_mac_da 0xa1a2a3a40002 new_mac_sa 0xb1b2b3b40002
+match 0x3 action profile_001_action_02 port 3 new_mac_da 0xa1a2a3a40003 new_mac_sa 0xb1b2b3b40003
diff --git a/dep/pipeline/profile_001/ethdev.io b/dep/pipeline/profile_001/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/profile_001/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/profile_001/pcap_files/in_1.txt b/dep/pipeline/profile_001/pcap_files/in_1.txt
new file mode 100644
index 00000000..9113d96c
--- /dev/null
+++ b/dep/pipeline/profile_001/pcap_files/in_1.txt
@@ -0,0 +1,32 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 1c 3d 4b 00 4b 8c c8 00
+000020 00 00 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 27 1b 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e be 64 00 00 0a c8 00
+000020 00 01 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 9c 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 ea 08 c8 32 00 8c c8 00
+000020 00 02 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 f4 e6 00 00 58 58 58 58 58 58
+# Packet 3
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 1c 3a 96 00 00 8c c8 00
+000020 00 03 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 27 18 00 00 58 58 58 58 58 58
+# Packet 4
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 1c 39 96 00 00 8c c8 00
+000020 00 04 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 27 17 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/profile_001/pcap_files/out_1.txt b/dep/pipeline/profile_001/pcap_files/out_1.txt
new file mode 100644
index 00000000..6194011b
--- /dev/null
+++ b/dep/pipeline/profile_001/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 a1 a2 a3 a4 00 00 b1 b2 b3 b4 00 00 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 1d 3d 4b 00 4b 8c c8 00
+000020 00 00 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 27 1b 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/profile_001/pcap_files/out_2.txt b/dep/pipeline/profile_001/pcap_files/out_2.txt
new file mode 100644
index 00000000..c7a573c7
--- /dev/null
+++ b/dep/pipeline/profile_001/pcap_files/out_2.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 a1 a2 a3 a4 00 01 b1 b2 b3 b4 00 01 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 4f be 64 00 00 0a c8 00
+000020 00 01 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 9c 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/profile_001/pcap_files/out_3.txt b/dep/pipeline/profile_001/pcap_files/out_3.txt
new file mode 100644
index 00000000..a515c552
--- /dev/null
+++ b/dep/pipeline/profile_001/pcap_files/out_3.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 a1 a2 a3 a4 00 02 b1 b2 b3 b4 00 02 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 eb 08 c8 32 00 8c c8 00
+000020 00 02 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 f4 e6 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/profile_001/pcap_files/out_4.txt b/dep/pipeline/profile_001/pcap_files/out_4.txt
new file mode 100644
index 00000000..fad3ca5f
--- /dev/null
+++ b/dep/pipeline/profile_001/pcap_files/out_4.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 a1 a2 a3 a4 00 03 b1 b2 b3 b4 00 03 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 1d 3a 96 00 00 8c c8 00
+000020 00 03 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 27 18 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/profile_001/profile_001.cli b/dep/pipeline/profile_001/profile_001.cli
new file mode 100644
index 00000000..72716a3d
--- /dev/null
+++ b/dep/pipeline/profile_001/profile_001.cli
@@ -0,0 +1,24 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/profile_001/profile_001.spec /tmp/pipeline/profile_001/profile_001.c
+pipeline libbuild /tmp/pipeline/profile_001/profile_001.c /tmp/pipeline/profile_001/profile_001.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/profile_001/profile_001.so io /tmp/pipeline/profile_001/ethdev.io numa 0
+
+pipeline PIPELINE0 table profile_001_table_01 add /tmp/pipeline/profile_001/cmd_files/cmd_1.txt
+pipeline PIPELINE0 table profile_001_table_02 add /tmp/pipeline/profile_001/cmd_files/cmd_2.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/profile_001/profile_001.spec b/dep/pipeline/profile_001/profile_001.spec
new file mode 100644
index 00000000..ace80429
--- /dev/null
+++ b/dep/pipeline/profile_001/profile_001.spec
@@ -0,0 +1,115 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port_in
+ bit<32> port_out
+ bit<32> member_id
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct profile_001_action_01_args_t {
+ bit<32> member_id
+}
+
+struct profile_001_action_02_args_t {
+ bit<32> port
+ bit<48> new_mac_da
+ bit<48> new_mac_sa
+}
+
+action drop args none {
+ drop
+}
+
+action profile_001_action_01 args instanceof profile_001_action_01_args_t {
+ mov m.member_id t.member_id
+ return
+}
+
+action profile_001_action_02 args instanceof profile_001_action_02_args_t {
+ mov h.ethernet.dst_addr t.new_mac_da
+ mov h.ethernet.src_addr t.new_mac_sa
+ cksub h.ipv4.hdr_checksum h.ipv4.ttl
+ sub h.ipv4.ttl 0x1
+ ckadd h.ipv4.hdr_checksum h.ipv4.ttl
+ mov m.port_out t.port
+ return
+}
+
+//
+// Tables
+//
+table profile_001_table_01 {
+ key {
+ h.ipv4.dst_addr exact
+ }
+
+ actions {
+ profile_001_action_01
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+table profile_001_table_02 {
+ key {
+ m.member_id exact
+ }
+
+ actions {
+ profile_001_action_02
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port_in
+ extract h.ethernet
+ extract h.ipv4
+ table profile_001_table_01
+ table profile_001_table_02
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port_out
+}
diff --git a/dep/pipeline/profile_001/readme.md b/dep/pipeline/profile_001/readme.md
new file mode 100644
index 00000000..c7b6b63e
--- /dev/null
+++ b/dep/pipeline/profile_001/readme.md
@@ -0,0 +1,6 @@
+
+Test Case: test_profile_001
+---------------------------
+
+ Description:
+ Testing the action profile scenarios.
diff --git a/dep/pipeline/recirculate_001/ethdev.io b/dep/pipeline/recirculate_001/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/recirculate_001/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/recirculate_001/pcap_files/in_1.txt b/dep/pipeline/recirculate_001/pcap_files/in_1.txt
new file mode 100644
index 00000000..c3391788
--- /dev/null
+++ b/dep/pipeline/recirculate_001/pcap_files/in_1.txt
@@ -0,0 +1,19 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 9c 00 01 00 00 40 11 ad 39 64 00 00 01 64 00
+000020 05 16 d4 e4 0f a0 00 88 db f8 63 4a 63 37 6d 37
+000030 68 63 74 4d 69 73 73 70 47 31 71 6b 62 47 6e 55
+000040 77 49 45 77 64 64 61 50 6b 35 74 37 54 33 47 6e
+000050 64 67 6f 45 47 70 49 6b 57 54 4d 4f 39 55 79 74
+000060 6f 57 45 54 41 50 54 54 4b 59 32 79 62 78 55 30
+000070 46 73 63 54 53 50 70 6c 54 61 71 6f 39 5a 4e 4f
+000080 77 52 6b 33 4e 4d 38 57 38 71 55 52 61 36 6a 34
+000090 4f 6b 52 37 45 70 6d 57 62 62 4e 45 77 48 58 42
+0000a0 46 6a 39 36 4e 39 6b 48 36 66
diff --git a/dep/pipeline/recirculate_001/pcap_files/out_1.txt b/dep/pipeline/recirculate_001/pcap_files/out_1.txt
new file mode 100644
index 00000000..40c8ffab
--- /dev/null
+++ b/dep/pipeline/recirculate_001/pcap_files/out_1.txt
@@ -0,0 +1,19 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 fb 64 5a 08 00 45 00
+000010 00 9c 00 01 00 00 40 11 ad 39 64 00 00 01 64 00
+000020 05 16 d4 e9 0f a0 00 88 db f8 63 4a 63 37 6d 37
+000030 68 63 74 4d 69 73 73 70 47 31 71 6b 62 47 6e 55
+000040 77 49 45 77 64 64 61 50 6b 35 74 37 54 33 47 6e
+000050 64 67 6f 45 47 70 49 6b 57 54 4d 4f 39 55 79 74
+000060 6f 57 45 54 41 50 54 54 4b 59 32 79 62 78 55 30
+000070 46 73 63 54 53 50 70 6c 54 61 71 6f 39 5a 4e 4f
+000080 77 52 6b 33 4e 4d 38 57 38 71 55 52 61 36 6a 34
+000090 4f 6b 52 37 45 70 6d 57 62 62 4e 45 77 48 58 42
+0000a0 46 6a 39 36 4e 39 6b 48 36 66
diff --git a/dep/pipeline/recirculate_001/readme.md b/dep/pipeline/recirculate_001/readme.md
new file mode 100644
index 00000000..45902725
--- /dev/null
+++ b/dep/pipeline/recirculate_001/readme.md
@@ -0,0 +1,14 @@
+Test Case: test_recirculate_001
+-----------------------
+
+ Instruction being tested:
+ recircid m.field
+ recirculate
+
+ Description:
+ Recirculate the packet for N(5) times, until the pass(recirc_id) value is equal to N.
+ The UDP source port is incremented by one(1) for each recirculation.
+
+ Verification:
+ The packet should be sent out on the same port that it received.
+ The UDP source port of the packet should be increment by 5.
\ No newline at end of file
diff --git a/dep/pipeline/recirculate_001/recirculate_001.cli b/dep/pipeline/recirculate_001/recirculate_001.cli
new file mode 100644
index 00000000..d99e2d5f
--- /dev/null
+++ b/dep/pipeline/recirculate_001/recirculate_001.cli
@@ -0,0 +1,29 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/recirculate_001/recirculate_001.spec /tmp/pipeline/recirculate_001/recirculate_001.c
+pipeline libbuild /tmp/pipeline/recirculate_001/recirculate_001.c /tmp/pipeline/recirculate_001/recirculate_001.so
+
+;
+; Customize the LINK parameters to match your setup.
+;
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+;
+; PIPELINE0 setup.
+;
+
+pipeline PIPELINE0 build lib /tmp/pipeline/recirculate_001/recirculate_001.so io /tmp/pipeline/recirculate_001/ethdev.io numa 0
+
+;
+; Pipelines-to-threads mapping.
+;
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/recirculate_001/recirculate_001.spec b/dep/pipeline/recirculate_001/recirculate_001.spec
new file mode 100644
index 00000000..3cc11561
--- /dev/null
+++ b/dep/pipeline/recirculate_001/recirculate_001.spec
@@ -0,0 +1,81 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+; This simple example illustrates how to perform packet recirculation. The "recirculate" instruction
+; is used to mark the current packet for recirculation, which means that at TX time the packet is
+; reinjected into the pipeline for another full pass as opposed to being sent to the output port.
+;
+; The same packet can be recirculated multiple times, with the recirculation pass ID retrieved by
+; the "recircid" instruction. The pass ID can be used by the program to execute different code on
+; the same packet in different pipeline passes. The packet meta-data is preserved between the
+; pipeline passes.
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+struct udp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<16> length
+ bit<16> checksum
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+header udp instanceof udp_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<32> pass_id
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ extract h.udp
+
+ //
+ // State machine based on the recirculation pass ID.
+ //
+ // During each of the first 5 passes through the pipeline (m.pass_id is 0 .. 4), the UDP
+ // source port is incremented and the packet is marked for recirculation, while on the final
+ // iteration (m.pass_id is 5) the packet is sent out.
+ //
+ recircid m.pass_id
+ jmpgt EMIT m.pass_id 4
+ add h.udp.src_port 1
+ recirculate
+
+ EMIT : emit h.ethernet
+ emit h.ipv4
+ emit h.udp
+ tx m.port
+}
diff --git a/dep/pipeline/reg_001/ethdev.io b/dep/pipeline/reg_001/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/reg_001/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/reg_001/readme.md b/dep/pipeline/reg_001/readme.md
new file mode 100644
index 00000000..ac5c3458
--- /dev/null
+++ b/dep/pipeline/reg_001/readme.md
@@ -0,0 +1,16 @@
+
+Test Case: test_reg_001
+-----------------------
+
+ CLI commands being tested:
+ pipeline <pipeline_name> regrd <register_array_name> <index>
+ pipeline <pipeline_name> regwr <register_array_name> <index> <value>
+
+ Description:
+ Read initial zero value of certain location of register array using "regrd" CLI command.
+ Update that value to a new value through "regwr" CLI command.
+ Read updated value of that location of register array using "regrd" CLI command.
+
+ Verification:
+ regrd command should read the correct value of register array.
+ regwr command should modify register array location with the required value.
diff --git a/dep/pipeline/reg_001/reg_001.cli b/dep/pipeline/reg_001/reg_001.cli
new file mode 100644
index 00000000..b5e4e6fc
--- /dev/null
+++ b/dep/pipeline/reg_001/reg_001.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/reg_001/reg_001.spec /tmp/pipeline/reg_001/reg_001.c
+pipeline libbuild /tmp/pipeline/reg_001/reg_001.c /tmp/pipeline/reg_001/reg_001.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/reg_001/reg_001.so io /tmp/pipeline/reg_001/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/reg_001/reg_001.spec b/dep/pipeline/reg_001/reg_001.spec
new file mode 100644
index 00000000..2b981c88
--- /dev/null
+++ b/dep/pipeline/reg_001/reg_001.spec
@@ -0,0 +1,49 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2021 Intel Corporation
+
+//
+// Headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Registers.
+//
+regarray REG_ARR_1 size 65536 initval 0x12
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ tx m.port
+}
diff --git a/dep/pipeline/reg_002/ethdev.io b/dep/pipeline/reg_002/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/reg_002/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/reg_002/pcap_files/in_1.txt b/dep/pipeline/reg_002/pcap_files/in_1.txt
new file mode 100644
index 00000000..65022f88
--- /dev/null
+++ b/dep/pipeline/reg_002/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 c1
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/reg_002/pcap_files/out_1.txt b/dep/pipeline/reg_002/pcap_files/out_1.txt
new file mode 100644
index 00000000..9c7270dc
--- /dev/null
+++ b/dep/pipeline/reg_002/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 12 34 56 78 90 12 10 22 33 44 55 66 08 00 45 c1
+000010 00 2e 12 34 b1 b2 12 06 4e b5 12 34 56 78 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/reg_002/readme.md b/dep/pipeline/reg_002/readme.md
new file mode 100644
index 00000000..f336a101
--- /dev/null
+++ b/dep/pipeline/reg_002/readme.md
@@ -0,0 +1,14 @@
+
+Test Case: test_reg_002
+-----------------------
+
+ Instruction being tested:
+ regrd h.field REGARRAY h.field
+
+ Description:
+ Write some values to specific locations of register array via "regwr"
+ CLI command and verify reading the values through this instruction.
+
+ Verification:
+ Values read through this instruction should match the values written
+ via regwr CLI command.
diff --git a/dep/pipeline/reg_002/reg_002.cli b/dep/pipeline/reg_002/reg_002.cli
new file mode 100644
index 00000000..d83b6d21
--- /dev/null
+++ b/dep/pipeline/reg_002/reg_002.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/reg_002/reg_002.spec /tmp/pipeline/reg_002/reg_002.c
+pipeline libbuild /tmp/pipeline/reg_002/reg_002.c /tmp/pipeline/reg_002/reg_002.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/reg_002/reg_002.so io /tmp/pipeline/reg_002/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/reg_002/reg_002.spec b/dep/pipeline/reg_002/reg_002.spec
new file mode 100644
index 00000000..b2984bae
--- /dev/null
+++ b/dep/pipeline/reg_002/reg_002.spec
@@ -0,0 +1,57 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2021 Intel Corporation
+
+//
+// Headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Registers.
+//
+regarray REG_ARR_1 size 0x1FFFFFF initval 0
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ regrd h.ethernet.dst_addr REG_ARR_1 h.ipv4.identification
+ regrd h.ipv4.src_addr REG_ARR_1 h.ipv4.flags_offset
+ regrd h.ipv4.identification REG_ARR_1 h.ipv4.diffserv
+ regrd h.ipv4.ttl REG_ARR_1 h.ipv4.ttl
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/reg_003/ethdev.io b/dep/pipeline/reg_003/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/reg_003/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/reg_003/pcap_files/in_1.txt b/dep/pipeline/reg_003/pcap_files/in_1.txt
new file mode 100644
index 00000000..65022f88
--- /dev/null
+++ b/dep/pipeline/reg_003/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 c1
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/reg_003/pcap_files/out_1.txt b/dep/pipeline/reg_003/pcap_files/out_1.txt
new file mode 100644
index 00000000..9c7270dc
--- /dev/null
+++ b/dep/pipeline/reg_003/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 12 34 56 78 90 12 10 22 33 44 55 66 08 00 45 c1
+000010 00 2e 12 34 b1 b2 12 06 4e b5 12 34 56 78 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/reg_003/readme.md b/dep/pipeline/reg_003/readme.md
new file mode 100644
index 00000000..6ababff7
--- /dev/null
+++ b/dep/pipeline/reg_003/readme.md
@@ -0,0 +1,14 @@
+
+Test Case: test_reg_003
+-----------------------
+
+ Instruction being tested:
+ regrd h.field REGARRAY m.field
+
+ Description:
+ Write some values to specific locations of register array via "regwr"
+ CLI command and verify reading the values through this instruction.
+
+ Verification:
+ Values read through this instruction should match the values written
+ via regwr CLI command.
diff --git a/dep/pipeline/reg_003/reg_003.cli b/dep/pipeline/reg_003/reg_003.cli
new file mode 100644
index 00000000..a765b4cd
--- /dev/null
+++ b/dep/pipeline/reg_003/reg_003.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/reg_003/reg_003.spec /tmp/pipeline/reg_003/reg_003.c
+pipeline libbuild /tmp/pipeline/reg_003/reg_003.c /tmp/pipeline/reg_003/reg_003.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/reg_003/reg_003.so io /tmp/pipeline/reg_003/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/reg_003/reg_003.spec b/dep/pipeline/reg_003/reg_003.spec
new file mode 100644
index 00000000..76c5f6e9
--- /dev/null
+++ b/dep/pipeline/reg_003/reg_003.spec
@@ -0,0 +1,65 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2021 Intel Corporation
+
+//
+// Headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<32> idx_48
+ bit<32> idx_32
+ bit<32> idx_16
+ bit<32> idx_8
+}
+
+metadata instanceof metadata_t
+
+//
+// Registers.
+//
+regarray REG_ARR_1 size 0x1FFFFFF initval 0
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ mov m.idx_48 0x1a1a2a3
+ mov m.idx_32 0x7fb1b2
+ mov m.idx_16 0x7fc1
+ mov m.idx_8 0x7f
+ regrd h.ethernet.dst_addr REG_ARR_1 m.idx_48
+ regrd h.ipv4.src_addr REG_ARR_1 m.idx_32
+ regrd h.ipv4.identification REG_ARR_1 m.idx_16
+ regrd h.ipv4.ttl REG_ARR_1 m.idx_8
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/reg_004/ethdev.io b/dep/pipeline/reg_004/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/reg_004/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/reg_004/pcap_files/in_1.txt b/dep/pipeline/reg_004/pcap_files/in_1.txt
new file mode 100644
index 00000000..65022f88
--- /dev/null
+++ b/dep/pipeline/reg_004/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 c1
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/reg_004/pcap_files/out_1.txt b/dep/pipeline/reg_004/pcap_files/out_1.txt
new file mode 100644
index 00000000..9c7270dc
--- /dev/null
+++ b/dep/pipeline/reg_004/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 12 34 56 78 90 12 10 22 33 44 55 66 08 00 45 c1
+000010 00 2e 12 34 b1 b2 12 06 4e b5 12 34 56 78 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/reg_004/readme.md b/dep/pipeline/reg_004/readme.md
new file mode 100644
index 00000000..ec479878
--- /dev/null
+++ b/dep/pipeline/reg_004/readme.md
@@ -0,0 +1,14 @@
+
+Test Case: test_reg_004
+-----------------------
+
+ Instruction being tested:
+ regrd h.field REGARRAY t.field
+
+ Description:
+ Write some values to specific locations of register array via "regwr"
+ CLI command and verify reading the values through this instruction.
+
+ Verification:
+ Values read through this instruction should match the values written
+ via regwr CLI command.
diff --git a/dep/pipeline/reg_004/reg_004.cli b/dep/pipeline/reg_004/reg_004.cli
new file mode 100644
index 00000000..ab9cae4e
--- /dev/null
+++ b/dep/pipeline/reg_004/reg_004.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/reg_004/reg_004.spec /tmp/pipeline/reg_004/reg_004.c
+pipeline libbuild /tmp/pipeline/reg_004/reg_004.c /tmp/pipeline/reg_004/reg_004.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/reg_004/reg_004.so io /tmp/pipeline/reg_004/ethdev.io numa 0
+pipeline PIPELINE0 table reg_004 add /tmp/pipeline/reg_004/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/reg_004/reg_004.spec b/dep/pipeline/reg_004/reg_004.spec
new file mode 100644
index 00000000..ab024cfa
--- /dev/null
+++ b/dep/pipeline/reg_004/reg_004.spec
@@ -0,0 +1,93 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2021 Intel Corporation
+
+//
+// Headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Registers.
+//
+regarray REG_ARR_1 size 0x1FFFFFF initval 0
+
+//
+// Actions
+//
+struct reg_004_args_t {
+ bit<32> idx_48
+ bit<32> idx_32
+ bit<32> idx_16
+ bit<32> idx_8
+}
+
+action reg_004_action args instanceof reg_004_args_t {
+ regrd h.ethernet.dst_addr REG_ARR_1 t.idx_48
+ regrd h.ipv4.src_addr REG_ARR_1 t.idx_32
+ regrd h.ipv4.identification REG_ARR_1 t.idx_16
+ regrd h.ipv4.ttl REG_ARR_1 t.idx_8
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table reg_004 {
+ key {
+ h.ethernet.src_addr exact
+ }
+
+ actions {
+ reg_004_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ table reg_004
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/reg_004/table.txt b/dep/pipeline/reg_004/table.txt
new file mode 100644
index 00000000..2fc7b356
--- /dev/null
+++ b/dep/pipeline/reg_004/table.txt
@@ -0,0 +1 @@
+match 0x102233445566 action reg_004_action idx_48 0x1a1a2a3 idx_32 0x7fb1b2 idx_16 0x7fc1 idx_8 0x7f
diff --git a/dep/pipeline/reg_005/ethdev.io b/dep/pipeline/reg_005/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/reg_005/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/reg_005/pcap_files/in_1.txt b/dep/pipeline/reg_005/pcap_files/in_1.txt
new file mode 100644
index 00000000..65022f88
--- /dev/null
+++ b/dep/pipeline/reg_005/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 c1
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/reg_005/pcap_files/out_1.txt b/dep/pipeline/reg_005/pcap_files/out_1.txt
new file mode 100644
index 00000000..9c7270dc
--- /dev/null
+++ b/dep/pipeline/reg_005/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 12 34 56 78 90 12 10 22 33 44 55 66 08 00 45 c1
+000010 00 2e 12 34 b1 b2 12 06 4e b5 12 34 56 78 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/reg_005/readme.md b/dep/pipeline/reg_005/readme.md
new file mode 100644
index 00000000..15887803
--- /dev/null
+++ b/dep/pipeline/reg_005/readme.md
@@ -0,0 +1,14 @@
+
+Test Case: test_reg_005
+-----------------------
+
+ Instruction being tested:
+ regrd h.field REGARRAY imm_value
+
+ Description:
+ Write some values to specific locations of register array via "regwr"
+ CLI command and verify reading the values through this instruction.
+
+ Verification:
+ Values read through this instruction should match the values written
+ via regwr CLI command.
diff --git a/dep/pipeline/reg_005/reg_005.cli b/dep/pipeline/reg_005/reg_005.cli
new file mode 100644
index 00000000..17c749c4
--- /dev/null
+++ b/dep/pipeline/reg_005/reg_005.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/reg_005/reg_005.spec /tmp/pipeline/reg_005/reg_005.c
+pipeline libbuild /tmp/pipeline/reg_005/reg_005.c /tmp/pipeline/reg_005/reg_005.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/reg_005/reg_005.so io /tmp/pipeline/reg_005/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/reg_005/reg_005.spec b/dep/pipeline/reg_005/reg_005.spec
new file mode 100644
index 00000000..07c53077
--- /dev/null
+++ b/dep/pipeline/reg_005/reg_005.spec
@@ -0,0 +1,58 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2021 Intel Corporation
+
+//
+// Headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Registers.
+//
+regarray REG_ARR_1 size 0x1FFFFFF initval 0
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ jmpneq L1 h.ethernet.src_addr 0x102233445566
+ regrd h.ethernet.dst_addr REG_ARR_1 0x1a1a2a3
+ regrd h.ipv4.src_addr REG_ARR_1 0x7fb1b2
+ regrd h.ipv4.identification REG_ARR_1 0x7fc1
+ regrd h.ipv4.ttl REG_ARR_1 0x7f
+ L1 : emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/reg_006/ethdev.io b/dep/pipeline/reg_006/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/reg_006/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/reg_006/pcap_files/in_1.txt b/dep/pipeline/reg_006/pcap_files/in_1.txt
new file mode 100644
index 00000000..e5d35f35
--- /dev/null
+++ b/dep/pipeline/reg_006/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 aa 45 c1
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/reg_006/readme.md b/dep/pipeline/reg_006/readme.md
new file mode 100644
index 00000000..b8ece183
--- /dev/null
+++ b/dep/pipeline/reg_006/readme.md
@@ -0,0 +1,16 @@
+
+Test Case: test_reg_006
+-----------------------
+
+ Instruction being tested:
+ regrd m.field REGARRAY h.field
+
+ Description:
+ Write some values to specific locations of register array via "regwr"
+ CLI command. Using the above instruction, read the written values and
+ write those values to other locations of register array.
+ Verify reading these values through regrd CLI command.
+
+ Verification:
+ Values read through regrd CLI command should match the values written
+ via regwr CLI command.
diff --git a/dep/pipeline/reg_006/reg_006.cli b/dep/pipeline/reg_006/reg_006.cli
new file mode 100644
index 00000000..14f3a315
--- /dev/null
+++ b/dep/pipeline/reg_006/reg_006.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/reg_006/reg_006.spec /tmp/pipeline/reg_006/reg_006.c
+pipeline libbuild /tmp/pipeline/reg_006/reg_006.c /tmp/pipeline/reg_006/reg_006.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/reg_006/reg_006.so io /tmp/pipeline/reg_006/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/reg_006/reg_006.spec b/dep/pipeline/reg_006/reg_006.spec
new file mode 100644
index 00000000..332ae3dd
--- /dev/null
+++ b/dep/pipeline/reg_006/reg_006.spec
@@ -0,0 +1,66 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2021 Intel Corporation
+
+//
+// Headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<48> val_48
+ bit<48> val_32
+ bit<48> val_16
+ bit<48> val_8
+}
+
+metadata instanceof metadata_t
+
+//
+// Registers.
+//
+regarray REG_ARR_1 size 0x1FFFFFF initval 0
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ jmpneq L1 h.ethernet.ethertype 0x08aa
+ regrd m.val_48 REG_ARR_1 h.ipv4.identification
+ regrd m.val_32 REG_ARR_1 h.ipv4.flags_offset
+ regrd m.val_16 REG_ARR_1 h.ipv4.diffserv
+ regrd m.val_8 REG_ARR_1 h.ipv4.ttl
+ regwr REG_ARR_1 0xa3a4 m.val_48
+ regwr REG_ARR_1 0xb3b4 m.val_32
+ regwr REG_ARR_1 0xc2 m.val_16
+ regwr REG_ARR_1 0xd2 m.val_8
+ L1 : emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/reg_007/ethdev.io b/dep/pipeline/reg_007/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/reg_007/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/reg_007/pcap_files/in_1.txt b/dep/pipeline/reg_007/pcap_files/in_1.txt
new file mode 100644
index 00000000..65022f88
--- /dev/null
+++ b/dep/pipeline/reg_007/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 c1
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/reg_007/readme.md b/dep/pipeline/reg_007/readme.md
new file mode 100644
index 00000000..b1d3b883
--- /dev/null
+++ b/dep/pipeline/reg_007/readme.md
@@ -0,0 +1,16 @@
+
+Test Case: test_reg_007
+-----------------------
+
+ Instruction being tested:
+ regrd m.field REGARRAY m.field
+
+ Description:
+ Write some values to specific locations of register array via "regwr"
+ CLI command. Using the above instruction, read the written values and
+ write those values to other locations of register array.
+ Verify reading these values through regrd CLI command.
+
+ Verification:
+ Values read through regrd CLI command should match the values written
+ via regwr CLI command.
diff --git a/dep/pipeline/reg_007/reg_007.cli b/dep/pipeline/reg_007/reg_007.cli
new file mode 100644
index 00000000..61a62eed
--- /dev/null
+++ b/dep/pipeline/reg_007/reg_007.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/reg_007/reg_007.spec /tmp/pipeline/reg_007/reg_007.c
+pipeline libbuild /tmp/pipeline/reg_007/reg_007.c /tmp/pipeline/reg_007/reg_007.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/reg_007/reg_007.so io /tmp/pipeline/reg_007/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/reg_007/reg_007.spec b/dep/pipeline/reg_007/reg_007.spec
new file mode 100644
index 00000000..bc85d8fe
--- /dev/null
+++ b/dep/pipeline/reg_007/reg_007.spec
@@ -0,0 +1,57 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2021 Intel Corporation
+
+//
+// Headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<32> idx_48
+ bit<32> idx_32
+ bit<32> idx_16
+ bit<32> idx_8
+ bit<48> val_48
+ bit<48> val_32
+ bit<48> val_16
+ bit<48> val_8
+}
+
+metadata instanceof metadata_t
+
+//
+// Registers.
+//
+regarray REG_ARR_1 size 0x1FFFFFF initval 0
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ mov m.idx_48 0xa1a2
+ mov m.idx_32 0xb1b2
+ mov m.idx_16 0xc1
+ mov m.idx_8 0xd1
+ regrd m.val_48 REG_ARR_1 m.idx_48
+ regrd m.val_32 REG_ARR_1 m.idx_32
+ regrd m.val_16 REG_ARR_1 m.idx_16
+ regrd m.val_8 REG_ARR_1 m.idx_8
+ regwr REG_ARR_1 0xa3a4 m.val_48
+ regwr REG_ARR_1 0xb3b4 m.val_32
+ regwr REG_ARR_1 0xc2 m.val_16
+ regwr REG_ARR_1 0xd2 m.val_8
+ emit h.ethernet
+ tx m.port
+}
diff --git a/dep/pipeline/reg_008/ethdev.io b/dep/pipeline/reg_008/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/reg_008/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/reg_008/pcap_files/in_1.txt b/dep/pipeline/reg_008/pcap_files/in_1.txt
new file mode 100644
index 00000000..e5d35f35
--- /dev/null
+++ b/dep/pipeline/reg_008/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 aa 45 c1
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/reg_008/readme.md b/dep/pipeline/reg_008/readme.md
new file mode 100644
index 00000000..f81a55eb
--- /dev/null
+++ b/dep/pipeline/reg_008/readme.md
@@ -0,0 +1,16 @@
+
+Test Case: test_reg_008
+-----------------------
+
+ Instruction being tested:
+ regrd m.field REGARRAY t.field
+
+ Description:
+ Write some values to specific locations of register array via "regwr"
+ CLI command. Using the above instruction, read the written values and
+ write those values to other locations of register array.
+ Verify reading these values through regrd CLI command.
+
+ Verification:
+ Values read through regrd CLI command should match the values written
+ via regwr CLI command.
diff --git a/dep/pipeline/reg_008/reg_008.cli b/dep/pipeline/reg_008/reg_008.cli
new file mode 100644
index 00000000..6b9d390c
--- /dev/null
+++ b/dep/pipeline/reg_008/reg_008.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/reg_008/reg_008.spec /tmp/pipeline/reg_008/reg_008.c
+pipeline libbuild /tmp/pipeline/reg_008/reg_008.c /tmp/pipeline/reg_008/reg_008.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/reg_008/reg_008.so io /tmp/pipeline/reg_008/ethdev.io numa 0
+pipeline PIPELINE0 table reg_008 add /tmp/pipeline/reg_008/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/reg_008/reg_008.spec b/dep/pipeline/reg_008/reg_008.spec
new file mode 100644
index 00000000..0775a5b1
--- /dev/null
+++ b/dep/pipeline/reg_008/reg_008.spec
@@ -0,0 +1,85 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2021 Intel Corporation
+
+//
+// Headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<48> val_48
+ bit<48> val_32
+ bit<48> val_16
+ bit<48> val_8
+}
+
+metadata instanceof metadata_t
+
+//
+// Registers.
+//
+regarray REG_ARR_1 size 0x1FFFFFF initval 0
+
+//
+// Actions
+//
+struct reg_008_args_t {
+ bit<32> idx_48
+ bit<32> idx_32
+ bit<32> idx_16
+ bit<32> idx_8
+}
+
+action reg_008_action args instanceof reg_008_args_t {
+ regrd m.val_48 REG_ARR_1 t.idx_48
+ regrd m.val_32 REG_ARR_1 t.idx_32
+ regrd m.val_16 REG_ARR_1 t.idx_16
+ regrd m.val_8 REG_ARR_1 t.idx_8
+ regwr REG_ARR_1 0xa3a4 m.val_48
+ regwr REG_ARR_1 0xb3b4 m.val_32
+ regwr REG_ARR_1 0xc2 m.val_16
+ regwr REG_ARR_1 0xd2 m.val_8
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table reg_008 {
+ key {
+ h.ethernet.ethertype exact
+ }
+
+ actions {
+ reg_008_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ table reg_008
+ emit h.ethernet
+ tx m.port
+}
diff --git a/dep/pipeline/reg_008/table.txt b/dep/pipeline/reg_008/table.txt
new file mode 100644
index 00000000..2124d52f
--- /dev/null
+++ b/dep/pipeline/reg_008/table.txt
@@ -0,0 +1 @@
+match 0x08aa action reg_008_action idx_48 0x1a1a2a3 idx_32 0x7fb1b2 idx_16 0x7fc1 idx_8 0x7f
diff --git a/dep/pipeline/reg_009/ethdev.io b/dep/pipeline/reg_009/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/reg_009/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/reg_009/pcap_files/in_1.txt b/dep/pipeline/reg_009/pcap_files/in_1.txt
new file mode 100644
index 00000000..e5d35f35
--- /dev/null
+++ b/dep/pipeline/reg_009/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 aa 45 c1
+000010 00 2e a1 a2 b1 b2 d1 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/reg_009/readme.md b/dep/pipeline/reg_009/readme.md
new file mode 100644
index 00000000..ce0f6ace
--- /dev/null
+++ b/dep/pipeline/reg_009/readme.md
@@ -0,0 +1,16 @@
+
+Test Case: test_reg_009
+-----------------------
+
+ Instruction being tested:
+ regrd m.field REGARRAY imm_value
+
+ Description:
+ Write some values to specific locations of register array via "regwr"
+ CLI command. Using the above instruction, read the written values and
+ write those values to other locations of register array.
+ Verify reading these values through regrd CLI command.
+
+ Verification:
+ Values read through regrd CLI command should match the values written
+ via regwr CLI command.
diff --git a/dep/pipeline/reg_009/reg_009.cli b/dep/pipeline/reg_009/reg_009.cli
new file mode 100644
index 00000000..d57a5ec9
--- /dev/null
+++ b/dep/pipeline/reg_009/reg_009.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/reg_009/reg_009.spec /tmp/pipeline/reg_009/reg_009.c
+pipeline libbuild /tmp/pipeline/reg_009/reg_009.c /tmp/pipeline/reg_009/reg_009.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/reg_009/reg_009.so io /tmp/pipeline/reg_009/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/reg_009/reg_009.spec b/dep/pipeline/reg_009/reg_009.spec
new file mode 100644
index 00000000..39f6431a
--- /dev/null
+++ b/dep/pipeline/reg_009/reg_009.spec
@@ -0,0 +1,48 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2021 Intel Corporation
+
+//
+// Headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+header ethernet instanceof ethernet_h
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<48> val_48
+ bit<48> val_32
+ bit<48> val_16
+ bit<48> val_8
+}
+
+metadata instanceof metadata_t
+
+//
+// Registers.
+//
+regarray REG_ARR_1 size 0x1FFFFFF initval 0
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ regrd m.val_48 REG_ARR_1 0x1a1a2a3
+ regrd m.val_32 REG_ARR_1 0x7fb1b2
+ regrd m.val_16 REG_ARR_1 0x7fc1
+ regrd m.val_8 REG_ARR_1 0x7f
+ regwr REG_ARR_1 0xa3a4 m.val_48
+ regwr REG_ARR_1 0xb3b4 m.val_32
+ regwr REG_ARR_1 0xc2 m.val_16
+ regwr REG_ARR_1 0xd2 m.val_8
+ emit h.ethernet
+ tx m.port
+}
diff --git a/dep/pipeline/reg_010/ethdev.io b/dep/pipeline/reg_010/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/reg_010/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/reg_010/pcap_files/in_1.txt b/dep/pipeline/reg_010/pcap_files/in_1.txt
new file mode 100644
index 00000000..3365278b
--- /dev/null
+++ b/dep/pipeline/reg_010/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 12 34 56 78 90 12 10 22 33 44 55 66 08 00 45 c1
+000010 12 34 a1 a2 b1 b2 d1 06 4e b5 12 34 56 78 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/reg_010/readme.md b/dep/pipeline/reg_010/readme.md
new file mode 100644
index 00000000..595c0242
--- /dev/null
+++ b/dep/pipeline/reg_010/readme.md
@@ -0,0 +1,15 @@
+
+Test Case: test_reg_010
+-----------------------
+
+ Instruction being tested:
+ regwr REGARRAY h.field h.field
+
+ Description:
+ Write specific locations of register array by sending a packet to DUT
+ and using the above command to write. Verify the values written by
+ reading those locations using regrd CLI command.
+
+ Verification:
+ The values read via regrd CLI command should match with those
+ previously written.
diff --git a/dep/pipeline/reg_010/reg_010.cli b/dep/pipeline/reg_010/reg_010.cli
new file mode 100644
index 00000000..d29e610e
--- /dev/null
+++ b/dep/pipeline/reg_010/reg_010.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/reg_010/reg_010.spec /tmp/pipeline/reg_010/reg_010.c
+pipeline libbuild /tmp/pipeline/reg_010/reg_010.c /tmp/pipeline/reg_010/reg_010.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/reg_010/reg_010.so io /tmp/pipeline/reg_010/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/reg_010/reg_010.spec b/dep/pipeline/reg_010/reg_010.spec
new file mode 100644
index 00000000..5360e186
--- /dev/null
+++ b/dep/pipeline/reg_010/reg_010.spec
@@ -0,0 +1,57 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2021 Intel Corporation
+
+//
+// Headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Registers.
+//
+regarray REG_ARR_1 size 0x1FFFFFF initval 0
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ regwr REG_ARR_1 h.ipv4.identification h.ethernet.dst_addr
+ regwr REG_ARR_1 h.ipv4.flags_offset h.ipv4.src_addr
+ regwr REG_ARR_1 h.ipv4.diffserv h.ipv4.total_len
+ regwr REG_ARR_1 h.ipv4.ttl h.ipv4.protocol
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/reg_011/ethdev.io b/dep/pipeline/reg_011/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/reg_011/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/reg_011/pcap_files/in_1.txt b/dep/pipeline/reg_011/pcap_files/in_1.txt
new file mode 100644
index 00000000..3365278b
--- /dev/null
+++ b/dep/pipeline/reg_011/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 12 34 56 78 90 12 10 22 33 44 55 66 08 00 45 c1
+000010 12 34 a1 a2 b1 b2 d1 06 4e b5 12 34 56 78 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/reg_011/readme.md b/dep/pipeline/reg_011/readme.md
new file mode 100644
index 00000000..eeaceb22
--- /dev/null
+++ b/dep/pipeline/reg_011/readme.md
@@ -0,0 +1,15 @@
+
+Test Case: test_reg_011
+-----------------------
+
+ Instruction being tested:
+ regwr REGARRAY h.field m.field
+
+ Description:
+ Write specific locations of register array by sending a packet to DUT
+ and using the above command to write. Verify the values written by
+ reading those locations using regrd CLI command.
+
+ Verification:
+ The values read via regrd CLI command should match with those
+ previously written.
diff --git a/dep/pipeline/reg_011/reg_011.cli b/dep/pipeline/reg_011/reg_011.cli
new file mode 100644
index 00000000..4042a00e
--- /dev/null
+++ b/dep/pipeline/reg_011/reg_011.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/reg_011/reg_011.spec /tmp/pipeline/reg_011/reg_011.c
+pipeline libbuild /tmp/pipeline/reg_011/reg_011.c /tmp/pipeline/reg_011/reg_011.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/reg_011/reg_011.so io /tmp/pipeline/reg_011/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/reg_011/reg_011.spec b/dep/pipeline/reg_011/reg_011.spec
new file mode 100644
index 00000000..a93e29fc
--- /dev/null
+++ b/dep/pipeline/reg_011/reg_011.spec
@@ -0,0 +1,65 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2021 Intel Corporation
+
+//
+// Headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<48> val_48
+ bit<32> val_32
+ bit<16> val_16
+ bit<8> val_8
+}
+
+metadata instanceof metadata_t
+
+//
+// Registers.
+//
+regarray REG_ARR_1 size 0x1FFFFFF initval 0
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ mov m.val_48 0x123456789012
+ mov m.val_32 0x12345678
+ mov m.val_16 0x1234
+ mov m.val_8 0x06
+ regwr REG_ARR_1 h.ipv4.identification m.val_48
+ regwr REG_ARR_1 h.ipv4.flags_offset m.val_32
+ regwr REG_ARR_1 h.ipv4.diffserv m.val_16
+ regwr REG_ARR_1 h.ipv4.ttl m.val_8
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/reg_012/ethdev.io b/dep/pipeline/reg_012/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/reg_012/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/reg_012/pcap_files/in_1.txt b/dep/pipeline/reg_012/pcap_files/in_1.txt
new file mode 100644
index 00000000..3365278b
--- /dev/null
+++ b/dep/pipeline/reg_012/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 12 34 56 78 90 12 10 22 33 44 55 66 08 00 45 c1
+000010 12 34 a1 a2 b1 b2 d1 06 4e b5 12 34 56 78 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/reg_012/readme.md b/dep/pipeline/reg_012/readme.md
new file mode 100644
index 00000000..bee5276d
--- /dev/null
+++ b/dep/pipeline/reg_012/readme.md
@@ -0,0 +1,15 @@
+
+Test Case: test_reg_013
+-----------------------
+
+ Instruction being tested:
+ regwr REGARRAY h.field imm_value
+
+ Description:
+ Write specific locations of register array by sending a packet to DUT
+ and using the above command to write. Verify the values written by
+ reading those locations using regrd CLI command.
+
+ Verification:
+ The values read via regrd CLI command should match with those
+ previously written.
diff --git a/dep/pipeline/reg_012/reg_012.cli b/dep/pipeline/reg_012/reg_012.cli
new file mode 100644
index 00000000..11e7703c
--- /dev/null
+++ b/dep/pipeline/reg_012/reg_012.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/reg_012/reg_012.spec /tmp/pipeline/reg_012/reg_012.c
+pipeline libbuild /tmp/pipeline/reg_012/reg_012.c /tmp/pipeline/reg_012/reg_012.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/reg_012/reg_012.so io /tmp/pipeline/reg_012/ethdev.io numa 0
+pipeline PIPELINE0 table reg_012 add /tmp/pipeline/reg_012/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/reg_012/reg_012.spec b/dep/pipeline/reg_012/reg_012.spec
new file mode 100644
index 00000000..8e642b79
--- /dev/null
+++ b/dep/pipeline/reg_012/reg_012.spec
@@ -0,0 +1,93 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2021 Intel Corporation
+
+//
+// Headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Registers.
+//
+regarray REG_ARR_1 size 0x1FFFFFF initval 0
+
+//
+// Actions
+//
+struct reg_012_args_t {
+ bit<48> val_48
+ bit<32> val_32
+ bit<16> val_16
+ bit<8> val_8
+}
+
+action reg_012_action args instanceof reg_012_args_t {
+ regwr REG_ARR_1 h.ipv4.identification t.val_48
+ regwr REG_ARR_1 h.ipv4.flags_offset t.val_32
+ regwr REG_ARR_1 h.ipv4.diffserv t.val_16
+ regwr REG_ARR_1 h.ipv4.ttl t.val_8
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table reg_012 {
+ key {
+ h.ethernet.src_addr exact
+ }
+
+ actions {
+ reg_012_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ table reg_012
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/reg_012/table.txt b/dep/pipeline/reg_012/table.txt
new file mode 100644
index 00000000..1cb58482
--- /dev/null
+++ b/dep/pipeline/reg_012/table.txt
@@ -0,0 +1 @@
+match 0x102233445566 action reg_012_action val_48 0x123456789012 val_32 0x12345678 val_16 0x1234 val_8 0x12
diff --git a/dep/pipeline/reg_013/ethdev.io b/dep/pipeline/reg_013/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/reg_013/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/reg_013/pcap_files/in_1.txt b/dep/pipeline/reg_013/pcap_files/in_1.txt
new file mode 100644
index 00000000..3365278b
--- /dev/null
+++ b/dep/pipeline/reg_013/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 12 34 56 78 90 12 10 22 33 44 55 66 08 00 45 c1
+000010 12 34 a1 a2 b1 b2 d1 06 4e b5 12 34 56 78 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/reg_013/readme.md b/dep/pipeline/reg_013/readme.md
new file mode 100644
index 00000000..bee5276d
--- /dev/null
+++ b/dep/pipeline/reg_013/readme.md
@@ -0,0 +1,15 @@
+
+Test Case: test_reg_013
+-----------------------
+
+ Instruction being tested:
+ regwr REGARRAY h.field imm_value
+
+ Description:
+ Write specific locations of register array by sending a packet to DUT
+ and using the above command to write. Verify the values written by
+ reading those locations using regrd CLI command.
+
+ Verification:
+ The values read via regrd CLI command should match with those
+ previously written.
diff --git a/dep/pipeline/reg_013/reg_013.cli b/dep/pipeline/reg_013/reg_013.cli
new file mode 100644
index 00000000..1b2b8e34
--- /dev/null
+++ b/dep/pipeline/reg_013/reg_013.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/reg_013/reg_013.spec /tmp/pipeline/reg_013/reg_013.c
+pipeline libbuild /tmp/pipeline/reg_013/reg_013.c /tmp/pipeline/reg_013/reg_013.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/reg_013/reg_013.so io /tmp/pipeline/reg_013/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/reg_013/reg_013.spec b/dep/pipeline/reg_013/reg_013.spec
new file mode 100644
index 00000000..810c3c3b
--- /dev/null
+++ b/dep/pipeline/reg_013/reg_013.spec
@@ -0,0 +1,58 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2021 Intel Corporation
+
+//
+// Headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Registers.
+//
+regarray REG_ARR_1 size 0x1FFFFFF initval 0
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ regwr REG_ARR_1 h.ipv4.identification 0x123456789012
+ regwr REG_ARR_1 h.ipv4.flags_offset 0x12345678
+ regwr REG_ARR_1 h.ipv4.diffserv 0x1234
+ regwr REG_ARR_1 h.ipv4.ttl 0x06
+ regwr REG_ARR_1 h.ipv4.protocol 0x9876543210987654
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/reg_014/ethdev.io b/dep/pipeline/reg_014/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/reg_014/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/reg_014/pcap_files/in_1.txt b/dep/pipeline/reg_014/pcap_files/in_1.txt
new file mode 100644
index 00000000..1a5c2ba4
--- /dev/null
+++ b/dep/pipeline/reg_014/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 12 34 56 78 90 12 10 22 33 44 55 66 08 aa 45 c1
+000010 12 34 a1 a2 b1 b2 d1 06 4e b5 12 34 56 78 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/reg_014/readme.md b/dep/pipeline/reg_014/readme.md
new file mode 100644
index 00000000..bebad6db
--- /dev/null
+++ b/dep/pipeline/reg_014/readme.md
@@ -0,0 +1,15 @@
+
+Test Case: test_reg_014
+-----------------------
+
+ Instruction being tested:
+ regwr REGARRAY m.field h.field
+
+ Description:
+ Write specific locations of register array by sending a packet to DUT
+ and using the above command to write. Verify the values written by
+ reading those locations using regrd CLI command.
+
+ Verification:
+ The values read via regrd CLI command should match with those
+ previously written.
diff --git a/dep/pipeline/reg_014/reg_014.cli b/dep/pipeline/reg_014/reg_014.cli
new file mode 100644
index 00000000..c8f9a3ba
--- /dev/null
+++ b/dep/pipeline/reg_014/reg_014.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/reg_014/reg_014.spec /tmp/pipeline/reg_014/reg_014.c
+pipeline libbuild /tmp/pipeline/reg_014/reg_014.c /tmp/pipeline/reg_014/reg_014.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/reg_014/reg_014.so io /tmp/pipeline/reg_014/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/reg_014/reg_014.spec b/dep/pipeline/reg_014/reg_014.spec
new file mode 100644
index 00000000..0796ec46
--- /dev/null
+++ b/dep/pipeline/reg_014/reg_014.spec
@@ -0,0 +1,66 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2021 Intel Corporation
+
+//
+// Headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<16> idx_48
+ bit<16> idx_32
+ bit<16> idx_16
+ bit<16> idx_8
+}
+
+metadata instanceof metadata_t
+
+//
+// Registers.
+//
+regarray REG_ARR_1 size 0x1FFFFFF initval 0
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ jmpneq L1 h.ethernet.ethertype 0x08aa
+ mov m.idx_48 0xa1a2
+ mov m.idx_32 0xb1b2
+ mov m.idx_16 0xc1
+ mov m.idx_8 0xd1
+ regwr REG_ARR_1 m.idx_48 h.ethernet.dst_addr
+ regwr REG_ARR_1 m.idx_32 h.ipv4.src_addr
+ regwr REG_ARR_1 m.idx_16 h.ipv4.total_len
+ regwr REG_ARR_1 m.idx_8 h.ipv4.protocol
+ L1 : emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/reg_015/ethdev.io b/dep/pipeline/reg_015/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/reg_015/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/reg_015/pcap_files/in_1.txt b/dep/pipeline/reg_015/pcap_files/in_1.txt
new file mode 100644
index 00000000..1a5c2ba4
--- /dev/null
+++ b/dep/pipeline/reg_015/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 12 34 56 78 90 12 10 22 33 44 55 66 08 aa 45 c1
+000010 12 34 a1 a2 b1 b2 d1 06 4e b5 12 34 56 78 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/reg_015/readme.md b/dep/pipeline/reg_015/readme.md
new file mode 100644
index 00000000..1bedad98
--- /dev/null
+++ b/dep/pipeline/reg_015/readme.md
@@ -0,0 +1,15 @@
+
+Test Case: test_reg_015
+-----------------------
+
+ Instruction being tested:
+ regwr REGARRAY t.field h.field
+
+ Description:
+ Write specific locations of register array by sending a packet to DUT
+ and using the above command to write. Verify the values written by
+ reading those locations using regrd CLI command.
+
+ Verification:
+ The values read via regrd CLI command should match with those
+ previously written.
diff --git a/dep/pipeline/reg_015/reg_015.cli b/dep/pipeline/reg_015/reg_015.cli
new file mode 100644
index 00000000..9d323ed0
--- /dev/null
+++ b/dep/pipeline/reg_015/reg_015.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/reg_015/reg_015.spec /tmp/pipeline/reg_015/reg_015.c
+pipeline libbuild /tmp/pipeline/reg_015/reg_015.c /tmp/pipeline/reg_015/reg_015.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/reg_015/reg_015.so io /tmp/pipeline/reg_015/ethdev.io numa 0
+pipeline PIPELINE0 table reg_015 add /tmp/pipeline/reg_015/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/reg_015/reg_015.spec b/dep/pipeline/reg_015/reg_015.spec
new file mode 100644
index 00000000..fd1c929c
--- /dev/null
+++ b/dep/pipeline/reg_015/reg_015.spec
@@ -0,0 +1,93 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2021 Intel Corporation
+
+//
+// Headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Registers.
+//
+regarray REG_ARR_1 size 0x1FFFFFF initval 0
+
+//
+// Actions
+//
+struct reg_015_args_t {
+ bit<32> idx_48
+ bit<32> idx_32
+ bit<32> idx_16
+ bit<32> idx_8
+}
+
+action reg_015_action args instanceof reg_015_args_t {
+ regwr REG_ARR_1 t.idx_48 h.ethernet.dst_addr
+ regwr REG_ARR_1 t.idx_32 h.ipv4.src_addr
+ regwr REG_ARR_1 t.idx_16 h.ipv4.total_len
+ regwr REG_ARR_1 t.idx_8 h.ipv4.protocol
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table reg_015 {
+ key {
+ h.ethernet.ethertype exact
+ }
+
+ actions {
+ reg_015_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ table reg_015
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/reg_015/table.txt b/dep/pipeline/reg_015/table.txt
new file mode 100644
index 00000000..335b93dd
--- /dev/null
+++ b/dep/pipeline/reg_015/table.txt
@@ -0,0 +1 @@
+match 0x08aa action reg_015_action idx_48 0xa1a2 idx_32 0xb1b2 idx_16 0xc1 idx_8 0xd1
diff --git a/dep/pipeline/reg_016/ethdev.io b/dep/pipeline/reg_016/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/reg_016/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/reg_016/pcap_files/in_1.txt b/dep/pipeline/reg_016/pcap_files/in_1.txt
new file mode 100644
index 00000000..1a5c2ba4
--- /dev/null
+++ b/dep/pipeline/reg_016/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 12 34 56 78 90 12 10 22 33 44 55 66 08 aa 45 c1
+000010 12 34 a1 a2 b1 b2 d1 06 4e b5 12 34 56 78 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/reg_016/readme.md b/dep/pipeline/reg_016/readme.md
new file mode 100644
index 00000000..ea06303c
--- /dev/null
+++ b/dep/pipeline/reg_016/readme.md
@@ -0,0 +1,15 @@
+
+Test Case: test_reg_016
+-----------------------
+
+ Instruction being tested:
+ regwr REGARRAY m.field m.field
+
+ Description:
+ Write specific locations of register array by sending a packet to DUT
+ and using the above command to write. Verify the values written by
+ reading those locations using regrd CLI command.
+
+ Verification:
+ The values read via regrd CLI command should match with those
+ previously written.
diff --git a/dep/pipeline/reg_016/reg_016.cli b/dep/pipeline/reg_016/reg_016.cli
new file mode 100644
index 00000000..8e227da4
--- /dev/null
+++ b/dep/pipeline/reg_016/reg_016.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/reg_016/reg_016.spec /tmp/pipeline/reg_016/reg_016.c
+pipeline libbuild /tmp/pipeline/reg_016/reg_016.c /tmp/pipeline/reg_016/reg_016.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/reg_016/reg_016.so io /tmp/pipeline/reg_016/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/reg_016/reg_016.spec b/dep/pipeline/reg_016/reg_016.spec
new file mode 100644
index 00000000..8bb746e1
--- /dev/null
+++ b/dep/pipeline/reg_016/reg_016.spec
@@ -0,0 +1,63 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2021 Intel Corporation
+
+//
+// Headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<32> idx_64
+ bit<32> idx_48
+ bit<32> idx_32
+ bit<32> idx_16
+ bit<32> idx_8
+ bit<64> val_64
+ bit<48> val_48
+ bit<32> val_32
+ bit<16> val_16
+ bit<8> val_8
+}
+
+metadata instanceof metadata_t
+
+//
+// Registers.
+//
+regarray REG_ARR_1 size 0x1FFFFFF initval 0
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ jmpneq L1 h.ethernet.ethertype 0x08aa
+ mov m.idx_64 0x1a1a2a3
+ mov m.idx_48 0x7fb1b2
+ mov m.idx_32 0x7fc1
+ mov m.idx_16 0x7f
+ mov m.idx_8 0xf7
+ mov m.val_64 0x1234567890123456
+ mov m.val_48 0x123456789012
+ mov m.val_32 0x12345678
+ mov m.val_16 0x1234
+ mov m.val_8 0x12
+ regwr REG_ARR_1 m.idx_64 m.val_64
+ regwr REG_ARR_1 m.idx_48 m.val_48
+ regwr REG_ARR_1 m.idx_32 m.val_32
+ regwr REG_ARR_1 m.idx_16 m.val_16
+ regwr REG_ARR_1 m.idx_8 m.val_8
+ L1 : emit h.ethernet
+ tx m.port
+}
diff --git a/dep/pipeline/reg_017/ethdev.io b/dep/pipeline/reg_017/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/reg_017/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/reg_017/pcap_files/in_1.txt b/dep/pipeline/reg_017/pcap_files/in_1.txt
new file mode 100644
index 00000000..1a5c2ba4
--- /dev/null
+++ b/dep/pipeline/reg_017/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 12 34 56 78 90 12 10 22 33 44 55 66 08 aa 45 c1
+000010 12 34 a1 a2 b1 b2 d1 06 4e b5 12 34 56 78 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/reg_017/readme.md b/dep/pipeline/reg_017/readme.md
new file mode 100644
index 00000000..fb03a2e2
--- /dev/null
+++ b/dep/pipeline/reg_017/readme.md
@@ -0,0 +1,15 @@
+
+Test Case: test_reg_017
+-----------------------
+
+ Instruction being tested:
+ regwr REGARRAY m.field t.field
+
+ Description:
+ Write specific locations of register array by sending a packet to DUT
+ and using this instruction to write. Verify the values written by
+ reading those locations using regrd CLI command.
+
+ Verification:
+ The values read via regrd CLI command should match with those
+ previously written.
diff --git a/dep/pipeline/reg_017/reg_017.cli b/dep/pipeline/reg_017/reg_017.cli
new file mode 100644
index 00000000..6b301b74
--- /dev/null
+++ b/dep/pipeline/reg_017/reg_017.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/reg_017/reg_017.spec /tmp/pipeline/reg_017/reg_017.c
+pipeline libbuild /tmp/pipeline/reg_017/reg_017.c /tmp/pipeline/reg_017/reg_017.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/reg_017/reg_017.so io /tmp/pipeline/reg_017/ethdev.io numa 0
+pipeline PIPELINE0 table reg_017 add /tmp/pipeline/reg_017/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/reg_017/reg_017.spec b/dep/pipeline/reg_017/reg_017.spec
new file mode 100644
index 00000000..d7b22ef8
--- /dev/null
+++ b/dep/pipeline/reg_017/reg_017.spec
@@ -0,0 +1,89 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2021 Intel Corporation
+
+//
+// Headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<32> idx_64
+ bit<32> idx_48
+ bit<32> idx_32
+ bit<32> idx_16
+ bit<32> idx_8
+}
+
+metadata instanceof metadata_t
+
+//
+// Registers.
+//
+regarray REG_ARR_1 size 0x1FFFFFF initval 0
+
+//
+// Actions
+//
+struct reg_017_args_t {
+ bit<64> val_64
+ bit<48> val_48
+ bit<32> val_32
+ bit<16> val_16
+ bit<8> val_8
+}
+
+action reg_017_action args instanceof reg_017_args_t {
+ mov m.idx_64 0x1a1a2a3
+ mov m.idx_48 0x7fb1b2
+ mov m.idx_32 0x7fc1
+ mov m.idx_16 0x7f
+ mov m.idx_8 0xf7
+ regwr REG_ARR_1 m.idx_64 t.val_64
+ regwr REG_ARR_1 m.idx_48 t.val_48
+ regwr REG_ARR_1 m.idx_32 t.val_32
+ regwr REG_ARR_1 m.idx_16 t.val_16
+ regwr REG_ARR_1 m.idx_8 t.val_8
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table reg_017 {
+ key {
+ h.ethernet.ethertype exact
+ }
+
+ actions {
+ reg_017_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ table reg_017
+ emit h.ethernet
+ tx m.port
+}
diff --git a/dep/pipeline/reg_017/table.txt b/dep/pipeline/reg_017/table.txt
new file mode 100644
index 00000000..539419f1
--- /dev/null
+++ b/dep/pipeline/reg_017/table.txt
@@ -0,0 +1 @@
+match 0x08aa action reg_017_action val_64 0x1234567890123456 val_48 0x123456789012 val_32 0x12345678 val_16 0x1234 val_8 0x12
diff --git a/dep/pipeline/reg_018/ethdev.io b/dep/pipeline/reg_018/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/reg_018/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/reg_018/pcap_files/in_1.txt b/dep/pipeline/reg_018/pcap_files/in_1.txt
new file mode 100644
index 00000000..1a5c2ba4
--- /dev/null
+++ b/dep/pipeline/reg_018/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 12 34 56 78 90 12 10 22 33 44 55 66 08 aa 45 c1
+000010 12 34 a1 a2 b1 b2 d1 06 4e b5 12 34 56 78 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/reg_018/readme.md b/dep/pipeline/reg_018/readme.md
new file mode 100644
index 00000000..2484e4ac
--- /dev/null
+++ b/dep/pipeline/reg_018/readme.md
@@ -0,0 +1,15 @@
+
+Test Case: test_reg_018
+-----------------------
+
+ Instruction being tested:
+ regwr REGARRAY t.field m.field
+
+ Description:
+ Write specific locations of register array by sending a packet to DUT
+ and using this instruction to write. Verify the values written by
+ reading those locations using regrd CLI command.
+
+ Verification:
+ The values read via regrd CLI command should match with those
+ previously written.
diff --git a/dep/pipeline/reg_018/reg_018.cli b/dep/pipeline/reg_018/reg_018.cli
new file mode 100644
index 00000000..b6fc964a
--- /dev/null
+++ b/dep/pipeline/reg_018/reg_018.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/reg_018/reg_018.spec /tmp/pipeline/reg_018/reg_018.c
+pipeline libbuild /tmp/pipeline/reg_018/reg_018.c /tmp/pipeline/reg_018/reg_018.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/reg_018/reg_018.so io /tmp/pipeline/reg_018/ethdev.io numa 0
+pipeline PIPELINE0 table reg_018 add /tmp/pipeline/reg_018/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/reg_018/reg_018.spec b/dep/pipeline/reg_018/reg_018.spec
new file mode 100644
index 00000000..0129e42a
--- /dev/null
+++ b/dep/pipeline/reg_018/reg_018.spec
@@ -0,0 +1,89 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2021 Intel Corporation
+
+//
+// Headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<64> val_64
+ bit<48> val_48
+ bit<32> val_32
+ bit<16> val_16
+ bit<8> val_8
+}
+
+metadata instanceof metadata_t
+
+//
+// Registers.
+//
+regarray REG_ARR_1 size 0x1FFFFFF initval 0
+
+//
+// Actions
+//
+struct reg_018_args_t {
+ bit<32> idx_64
+ bit<32> idx_48
+ bit<32> idx_32
+ bit<32> idx_16
+ bit<32> idx_8
+}
+
+action reg_018_action args instanceof reg_018_args_t {
+ mov m.val_64 0x1234567890123456
+ mov m.val_48 0x123456789012
+ mov m.val_32 0x12345678
+ mov m.val_16 0x1234
+ mov m.val_8 0x12
+ regwr REG_ARR_1 t.idx_64 m.val_64
+ regwr REG_ARR_1 t.idx_48 m.val_48
+ regwr REG_ARR_1 t.idx_32 m.val_32
+ regwr REG_ARR_1 t.idx_16 m.val_16
+ regwr REG_ARR_1 t.idx_8 m.val_8
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table reg_018 {
+ key {
+ h.ethernet.ethertype exact
+ }
+
+ actions {
+ reg_018_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ table reg_018
+ emit h.ethernet
+ tx m.port
+}
diff --git a/dep/pipeline/reg_018/table.txt b/dep/pipeline/reg_018/table.txt
new file mode 100644
index 00000000..f2b395cd
--- /dev/null
+++ b/dep/pipeline/reg_018/table.txt
@@ -0,0 +1 @@
+match 0x08aa action reg_018_action idx_64 0x1a1a2a3 idx_48 0x7fb1b2 idx_32 0x7fc1 idx_16 0x7f idx_8 0xf7
diff --git a/dep/pipeline/reg_019/ethdev.io b/dep/pipeline/reg_019/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/reg_019/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/reg_019/pcap_files/in_1.txt b/dep/pipeline/reg_019/pcap_files/in_1.txt
new file mode 100644
index 00000000..1a5c2ba4
--- /dev/null
+++ b/dep/pipeline/reg_019/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 12 34 56 78 90 12 10 22 33 44 55 66 08 aa 45 c1
+000010 12 34 a1 a2 b1 b2 d1 06 4e b5 12 34 56 78 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/reg_019/readme.md b/dep/pipeline/reg_019/readme.md
new file mode 100644
index 00000000..6d6307d2
--- /dev/null
+++ b/dep/pipeline/reg_019/readme.md
@@ -0,0 +1,15 @@
+
+Test Case: test_reg_019
+-----------------------
+
+ Instruction being tested:
+ regwr REGARRAY t.field t.field
+
+ Description:
+ Write specific locations of register array by sending a packet to DUT
+ and using this instruction to write. Verify the values written by
+ reading those locations using regrd CLI command.
+
+ Verification:
+ The values read via regrd CLI command should match with those
+ previously written.
diff --git a/dep/pipeline/reg_019/reg_019.cli b/dep/pipeline/reg_019/reg_019.cli
new file mode 100644
index 00000000..d616ddfe
--- /dev/null
+++ b/dep/pipeline/reg_019/reg_019.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/reg_019/reg_019.spec /tmp/pipeline/reg_019/reg_019.c
+pipeline libbuild /tmp/pipeline/reg_019/reg_019.c /tmp/pipeline/reg_019/reg_019.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/reg_019/reg_019.so io /tmp/pipeline/reg_019/ethdev.io numa 0
+pipeline PIPELINE0 table reg_019 add /tmp/pipeline/reg_019/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/reg_019/reg_019.spec b/dep/pipeline/reg_019/reg_019.spec
new file mode 100644
index 00000000..686d6342
--- /dev/null
+++ b/dep/pipeline/reg_019/reg_019.spec
@@ -0,0 +1,84 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2021 Intel Corporation
+
+//
+// Headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Registers.
+//
+regarray REG_ARR_1 size 0x1FFFFFF initval 0
+
+//
+// Actions
+//
+struct reg_019_args_t {
+ bit<32> idx_64
+ bit<32> idx_48
+ bit<32> idx_32
+ bit<32> idx_16
+ bit<32> idx_8
+ bit<64> val_64
+ bit<48> val_48
+ bit<32> val_32
+ bit<16> val_16
+ bit<8> val_8
+}
+
+action reg_019_action args instanceof reg_019_args_t {
+ regwr REG_ARR_1 t.idx_64 t.val_64
+ regwr REG_ARR_1 t.idx_48 t.val_48
+ regwr REG_ARR_1 t.idx_32 t.val_32
+ regwr REG_ARR_1 t.idx_16 t.val_16
+ regwr REG_ARR_1 t.idx_8 t.val_8
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table reg_019 {
+ key {
+ h.ethernet.ethertype exact
+ }
+
+ actions {
+ reg_019_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ table reg_019
+ emit h.ethernet
+ tx m.port
+}
diff --git a/dep/pipeline/reg_019/table.txt b/dep/pipeline/reg_019/table.txt
new file mode 100644
index 00000000..82b1b6c5
--- /dev/null
+++ b/dep/pipeline/reg_019/table.txt
@@ -0,0 +1 @@
+match 0x08aa action reg_019_action idx_64 0x1a1a2a3 idx_48 0x7fb1b2 idx_32 0x7fc1 idx_16 0x7f idx_8 0xf7 val_64 0x1234567890123456 val_48 0x123456789012 val_32 0x12345678 val_16 0x1234 val_8 0x12
diff --git a/dep/pipeline/reg_020/ethdev.io b/dep/pipeline/reg_020/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/reg_020/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/reg_020/pcap_files/in_1.txt b/dep/pipeline/reg_020/pcap_files/in_1.txt
new file mode 100644
index 00000000..1a5c2ba4
--- /dev/null
+++ b/dep/pipeline/reg_020/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 12 34 56 78 90 12 10 22 33 44 55 66 08 aa 45 c1
+000010 12 34 a1 a2 b1 b2 d1 06 4e b5 12 34 56 78 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/reg_020/readme.md b/dep/pipeline/reg_020/readme.md
new file mode 100644
index 00000000..cb3f01db
--- /dev/null
+++ b/dep/pipeline/reg_020/readme.md
@@ -0,0 +1,15 @@
+
+Test Case: test_reg_020
+-----------------------
+
+ Instruction being tested:
+ regwr REGARRAY m.field imm_value
+
+ Description:
+ Write specific locations of register array by sending a packet to DUT
+ and using this instruction to write. Verify the values written by
+ reading those locations using regrd CLI command.
+
+ Verification:
+ The values read via regrd CLI command should match with those
+ previously written.
diff --git a/dep/pipeline/reg_020/reg_020.cli b/dep/pipeline/reg_020/reg_020.cli
new file mode 100644
index 00000000..0b8b9bd2
--- /dev/null
+++ b/dep/pipeline/reg_020/reg_020.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/reg_020/reg_020.spec /tmp/pipeline/reg_020/reg_020.c
+pipeline libbuild /tmp/pipeline/reg_020/reg_020.c /tmp/pipeline/reg_020/reg_020.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/reg_020/reg_020.so io /tmp/pipeline/reg_020/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/reg_020/reg_020.spec b/dep/pipeline/reg_020/reg_020.spec
new file mode 100644
index 00000000..60df4af0
--- /dev/null
+++ b/dep/pipeline/reg_020/reg_020.spec
@@ -0,0 +1,50 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2021 Intel Corporation
+
+//
+// Headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<16> idx_48
+ bit<16> idx_32
+ bit<16> idx_16
+ bit<16> idx_8
+}
+
+metadata instanceof metadata_t
+
+//
+// Registers.
+//
+regarray REG_ARR_1 size 0x1FFFFFF initval 0
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ jmpneq L1 h.ethernet.ethertype 0x08aa
+ mov m.idx_48 0xa1a2
+ mov m.idx_32 0xb1b2
+ mov m.idx_16 0xc1
+ mov m.idx_8 0xd1
+ regwr REG_ARR_1 m.idx_48 0x1234567890123456
+ regwr REG_ARR_1 m.idx_32 0x123456789012
+ regwr REG_ARR_1 m.idx_16 0x12345678
+ regwr REG_ARR_1 m.idx_8 0x1234
+ L1 : emit h.ethernet
+ tx m.port
+}
diff --git a/dep/pipeline/reg_021/ethdev.io b/dep/pipeline/reg_021/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/reg_021/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/reg_021/pcap_files/in_1.txt b/dep/pipeline/reg_021/pcap_files/in_1.txt
new file mode 100644
index 00000000..1a5c2ba4
--- /dev/null
+++ b/dep/pipeline/reg_021/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 12 34 56 78 90 12 10 22 33 44 55 66 08 aa 45 c1
+000010 12 34 a1 a2 b1 b2 d1 06 4e b5 12 34 56 78 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/reg_021/readme.md b/dep/pipeline/reg_021/readme.md
new file mode 100644
index 00000000..3b5436f2
--- /dev/null
+++ b/dep/pipeline/reg_021/readme.md
@@ -0,0 +1,15 @@
+
+Test Case: test_reg_021
+-----------------------
+
+ Instruction being tested:
+ regwr REGARRAY t.field imm_value
+
+ Description:
+ Write specific locations of register array by sending a packet to DUT
+ and using this instruction to write. Verify the values written by
+ reading those locations using regrd CLI command.
+
+ Verification:
+ The values read via regrd CLI command should match with those
+ previously written.
diff --git a/dep/pipeline/reg_021/reg_021.cli b/dep/pipeline/reg_021/reg_021.cli
new file mode 100644
index 00000000..4babd2a2
--- /dev/null
+++ b/dep/pipeline/reg_021/reg_021.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/reg_021/reg_021.spec /tmp/pipeline/reg_021/reg_021.c
+pipeline libbuild /tmp/pipeline/reg_021/reg_021.c /tmp/pipeline/reg_021/reg_021.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/reg_021/reg_021.so io /tmp/pipeline/reg_021/ethdev.io numa 0
+pipeline PIPELINE0 table reg_021 add /tmp/pipeline/reg_021/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/reg_021/reg_021.spec b/dep/pipeline/reg_021/reg_021.spec
new file mode 100644
index 00000000..4bf40955
--- /dev/null
+++ b/dep/pipeline/reg_021/reg_021.spec
@@ -0,0 +1,79 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2021 Intel Corporation
+
+//
+// Headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Registers.
+//
+regarray REG_ARR_1 size 0x1FFFFFF initval 0
+
+//
+// Actions
+//
+struct reg_021_args_t {
+ bit<32> idx_64
+ bit<32> idx_48
+ bit<32> idx_32
+ bit<32> idx_16
+ bit<32> idx_8
+}
+
+action reg_021_action args instanceof reg_021_args_t {
+ regwr REG_ARR_1 t.idx_64 0x1234567890123456
+ regwr REG_ARR_1 t.idx_48 0x123456789012
+ regwr REG_ARR_1 t.idx_32 0x12345678
+ regwr REG_ARR_1 t.idx_16 0x1234
+ regwr REG_ARR_1 t.idx_8 0x12
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table reg_021 {
+ key {
+ h.ethernet.ethertype exact
+ }
+
+ actions {
+ reg_021_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ table reg_021
+ emit h.ethernet
+ tx m.port
+}
diff --git a/dep/pipeline/reg_021/table.txt b/dep/pipeline/reg_021/table.txt
new file mode 100644
index 00000000..04022254
--- /dev/null
+++ b/dep/pipeline/reg_021/table.txt
@@ -0,0 +1 @@
+match 0x08aa action reg_021_action idx_64 0x1a1a2a3 idx_48 0x7fb1b2 idx_32 0x7fc1 idx_16 0x7f idx_8 0xf7
diff --git a/dep/pipeline/reg_022/ethdev.io b/dep/pipeline/reg_022/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/reg_022/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/reg_022/pcap_files/in_1.txt b/dep/pipeline/reg_022/pcap_files/in_1.txt
new file mode 100644
index 00000000..3365278b
--- /dev/null
+++ b/dep/pipeline/reg_022/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 12 34 56 78 90 12 10 22 33 44 55 66 08 00 45 c1
+000010 12 34 a1 a2 b1 b2 d1 06 4e b5 12 34 56 78 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/reg_022/readme.md b/dep/pipeline/reg_022/readme.md
new file mode 100644
index 00000000..ccb1a3a8
--- /dev/null
+++ b/dep/pipeline/reg_022/readme.md
@@ -0,0 +1,15 @@
+
+Test Case: test_reg_022
+-----------------------
+
+ Instruction being tested:
+ regwr REGARRAY imm_value h.field
+
+ Description:
+ Write specific locations of register array by sending a packet to DUT
+ and using this instruction to write. Verify the values written by
+ reading those locations using regrd CLI command.
+
+ Verification:
+ The values read via regrd CLI command should match with those
+ previously written.
diff --git a/dep/pipeline/reg_022/reg_022.cli b/dep/pipeline/reg_022/reg_022.cli
new file mode 100644
index 00000000..a31ce7b2
--- /dev/null
+++ b/dep/pipeline/reg_022/reg_022.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/reg_022/reg_022.spec /tmp/pipeline/reg_022/reg_022.c
+pipeline libbuild /tmp/pipeline/reg_022/reg_022.c /tmp/pipeline/reg_022/reg_022.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/reg_022/reg_022.so io /tmp/pipeline/reg_022/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/reg_022/reg_022.spec b/dep/pipeline/reg_022/reg_022.spec
new file mode 100644
index 00000000..a9e9e2c9
--- /dev/null
+++ b/dep/pipeline/reg_022/reg_022.spec
@@ -0,0 +1,58 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2021 Intel Corporation
+
+//
+// Headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Registers.
+//
+regarray REG_ARR_1 size 0x1FFFFFF initval 0
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ jmpneq L1 h.ethernet.src_addr 0x102233445566
+ regwr REG_ARR_1 0x1a1a2a3 h.ethernet.dst_addr
+ regwr REG_ARR_1 0x7fb1b2 h.ipv4.src_addr
+ regwr REG_ARR_1 0x7fc1 h.ipv4.total_len
+ regwr REG_ARR_1 0x7f h.ipv4.protocol
+ L1 : emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/reg_023/ethdev.io b/dep/pipeline/reg_023/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/reg_023/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/reg_023/pcap_files/in_1.txt b/dep/pipeline/reg_023/pcap_files/in_1.txt
new file mode 100644
index 00000000..1a5c2ba4
--- /dev/null
+++ b/dep/pipeline/reg_023/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 12 34 56 78 90 12 10 22 33 44 55 66 08 aa 45 c1
+000010 12 34 a1 a2 b1 b2 d1 06 4e b5 12 34 56 78 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/reg_023/readme.md b/dep/pipeline/reg_023/readme.md
new file mode 100644
index 00000000..62678638
--- /dev/null
+++ b/dep/pipeline/reg_023/readme.md
@@ -0,0 +1,15 @@
+
+Test Case: test_reg_023
+-----------------------
+
+ Instruction being tested:
+ regwr REGARRAY imm_value m.field
+
+ Description:
+ Write specific locations of register array by sending a packet to DUT
+ and using this instruction to write. Verify the values written by
+ reading those locations using regrd CLI command.
+
+ Verification:
+ The values read via regrd CLI command should match with those
+ previously written.
diff --git a/dep/pipeline/reg_023/reg_023.cli b/dep/pipeline/reg_023/reg_023.cli
new file mode 100644
index 00000000..31ea3b99
--- /dev/null
+++ b/dep/pipeline/reg_023/reg_023.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/reg_023/reg_023.spec /tmp/pipeline/reg_023/reg_023.c
+pipeline libbuild /tmp/pipeline/reg_023/reg_023.c /tmp/pipeline/reg_023/reg_023.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/reg_023/reg_023.so io /tmp/pipeline/reg_023/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/reg_023/reg_023.spec b/dep/pipeline/reg_023/reg_023.spec
new file mode 100644
index 00000000..d0f1bd9e
--- /dev/null
+++ b/dep/pipeline/reg_023/reg_023.spec
@@ -0,0 +1,53 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2021 Intel Corporation
+
+//
+// Headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<64> val_64
+ bit<48> val_48
+ bit<32> val_32
+ bit<16> val_16
+ bit<8> val_8
+}
+
+metadata instanceof metadata_t
+
+//
+// Registers.
+//
+regarray REG_ARR_1 size 0x1FFFFFF initval 0
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ jmpneq L1 h.ethernet.ethertype 0x08aa
+ mov m.val_64 0x1234567890123456
+ mov m.val_48 0x123456789012
+ mov m.val_32 0x12345678
+ mov m.val_16 0x1234
+ mov m.val_8 0x12
+ regwr REG_ARR_1 0x1a1a2a3 m.val_64
+ regwr REG_ARR_1 0x7fb1b2 m.val_48
+ regwr REG_ARR_1 0x7fc1 m.val_32
+ regwr REG_ARR_1 0x7f m.val_16
+ regwr REG_ARR_1 0xf7 m.val_8
+ L1 : emit h.ethernet
+ tx m.port
+}
diff --git a/dep/pipeline/reg_024/ethdev.io b/dep/pipeline/reg_024/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/reg_024/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/reg_024/pcap_files/in_1.txt b/dep/pipeline/reg_024/pcap_files/in_1.txt
new file mode 100644
index 00000000..1a5c2ba4
--- /dev/null
+++ b/dep/pipeline/reg_024/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 12 34 56 78 90 12 10 22 33 44 55 66 08 aa 45 c1
+000010 12 34 a1 a2 b1 b2 d1 06 4e b5 12 34 56 78 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/reg_024/readme.md b/dep/pipeline/reg_024/readme.md
new file mode 100644
index 00000000..7196d83c
--- /dev/null
+++ b/dep/pipeline/reg_024/readme.md
@@ -0,0 +1,15 @@
+
+Test Case: test_reg_024
+-----------------------
+
+ Instruction being tested:
+ regwr REGARRAY imm_value t.field
+
+ Description:
+ Write specific locations of register array by sending a packet to DUT
+ and using this instruction to write. Verify the values written by
+ reading those locations using regrd CLI command.
+
+ Verification:
+ The values read via regrd CLI command should match with those
+ previously written.
diff --git a/dep/pipeline/reg_024/reg_024.cli b/dep/pipeline/reg_024/reg_024.cli
new file mode 100644
index 00000000..c80ea137
--- /dev/null
+++ b/dep/pipeline/reg_024/reg_024.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/reg_024/reg_024.spec /tmp/pipeline/reg_024/reg_024.c
+pipeline libbuild /tmp/pipeline/reg_024/reg_024.c /tmp/pipeline/reg_024/reg_024.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/reg_024/reg_024.so io /tmp/pipeline/reg_024/ethdev.io numa 0
+pipeline PIPELINE0 table reg_024 add /tmp/pipeline/reg_024/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/reg_024/reg_024.spec b/dep/pipeline/reg_024/reg_024.spec
new file mode 100644
index 00000000..43a86ec1
--- /dev/null
+++ b/dep/pipeline/reg_024/reg_024.spec
@@ -0,0 +1,79 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2021 Intel Corporation
+
+//
+// Headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Registers.
+//
+regarray REG_ARR_1 size 0x1FFFFFF initval 0
+
+//
+// Actions
+//
+struct reg_024_args_t {
+ bit<64> val_64
+ bit<48> val_48
+ bit<32> val_32
+ bit<16> val_16
+ bit<8> val_8
+}
+
+action reg_024_action args instanceof reg_024_args_t {
+ regwr REG_ARR_1 0x1a1a2a3 t.val_64
+ regwr REG_ARR_1 0x7fb1b2 t.val_48
+ regwr REG_ARR_1 0x7fc1 t.val_32
+ regwr REG_ARR_1 0x7f t.val_16
+ regwr REG_ARR_1 0xf7 t.val_8
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table reg_024 {
+ key {
+ h.ethernet.ethertype exact
+ }
+
+ actions {
+ reg_024_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ table reg_024
+ emit h.ethernet
+ tx m.port
+}
diff --git a/dep/pipeline/reg_024/table.txt b/dep/pipeline/reg_024/table.txt
new file mode 100644
index 00000000..77e65005
--- /dev/null
+++ b/dep/pipeline/reg_024/table.txt
@@ -0,0 +1 @@
+match 0x08aa action reg_024_action val_64 0x1234567890123456 val_48 0x123456789012 val_32 0x12345678 val_16 0x1234 val_8 0x12
diff --git a/dep/pipeline/reg_025/ethdev.io b/dep/pipeline/reg_025/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/reg_025/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/reg_025/pcap_files/in_1.txt b/dep/pipeline/reg_025/pcap_files/in_1.txt
new file mode 100644
index 00000000..1a5c2ba4
--- /dev/null
+++ b/dep/pipeline/reg_025/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 12 34 56 78 90 12 10 22 33 44 55 66 08 aa 45 c1
+000010 12 34 a1 a2 b1 b2 d1 06 4e b5 12 34 56 78 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/reg_025/readme.md b/dep/pipeline/reg_025/readme.md
new file mode 100644
index 00000000..a92775b2
--- /dev/null
+++ b/dep/pipeline/reg_025/readme.md
@@ -0,0 +1,15 @@
+
+Test Case: test_reg_025
+-----------------------
+
+ Instruction being tested:
+ regwr REGARRAY imm_value imm_value
+
+ Description:
+ Write specific locations of register array by sending a packet to DUT
+ and using this instruction to write. Verify the values written by
+ reading those locations using regrd CLI command.
+
+ Verification:
+ The values read via regrd CLI command should match with those
+ previously written.
diff --git a/dep/pipeline/reg_025/reg_025.cli b/dep/pipeline/reg_025/reg_025.cli
new file mode 100644
index 00000000..bb9e3d24
--- /dev/null
+++ b/dep/pipeline/reg_025/reg_025.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/reg_025/reg_025.spec /tmp/pipeline/reg_025/reg_025.c
+pipeline libbuild /tmp/pipeline/reg_025/reg_025.c /tmp/pipeline/reg_025/reg_025.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/reg_025/reg_025.so io /tmp/pipeline/reg_025/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/reg_025/reg_025.spec b/dep/pipeline/reg_025/reg_025.spec
new file mode 100644
index 00000000..4fdca3bf
--- /dev/null
+++ b/dep/pipeline/reg_025/reg_025.spec
@@ -0,0 +1,42 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2021 Intel Corporation
+
+//
+// Headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Registers.
+//
+regarray REG_ARR_1 size 0x1FFFFFF initval 0
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ jmpneq L1 h.ethernet.ethertype 0x08aa
+ regwr REG_ARR_1 0xa1a2 0x1234567890123456
+ regwr REG_ARR_1 0xb1b2 0x123456789012
+ regwr REG_ARR_1 0xc1 0x12345678
+ regwr REG_ARR_1 0xd1 0x1234
+ L1 : emit h.ethernet
+ tx m.port
+}
diff --git a/dep/pipeline/reg_026/ethdev.io b/dep/pipeline/reg_026/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/reg_026/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/reg_026/pcap_files/in_1.txt b/dep/pipeline/reg_026/pcap_files/in_1.txt
new file mode 100644
index 00000000..3365278b
--- /dev/null
+++ b/dep/pipeline/reg_026/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 12 34 56 78 90 12 10 22 33 44 55 66 08 00 45 c1
+000010 12 34 a1 a2 b1 b2 d1 06 4e b5 12 34 56 78 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/reg_026/readme.md b/dep/pipeline/reg_026/readme.md
new file mode 100644
index 00000000..4f4d3d39
--- /dev/null
+++ b/dep/pipeline/reg_026/readme.md
@@ -0,0 +1,17 @@
+
+Test Case: test_reg_026
+-----------------------
+
+ Instruction being tested:
+ regadd REGARRAY h.field h.field
+
+ Description:
+ Write some values to specific locations of register array via regwr
+ CLI command. Send a packet to DUT for updating the previously written
+ locations using this instruction. Verify the updated values by reading
+ them via regrd CLI command.
+
+ Verification:
+ The values read via regrd CLI command should be equal to the addition
+ of values sent via packet and those initially written using regwr CLI
+ command.
diff --git a/dep/pipeline/reg_026/reg_026.cli b/dep/pipeline/reg_026/reg_026.cli
new file mode 100644
index 00000000..ca13ed7b
--- /dev/null
+++ b/dep/pipeline/reg_026/reg_026.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/reg_026/reg_026.spec /tmp/pipeline/reg_026/reg_026.c
+pipeline libbuild /tmp/pipeline/reg_026/reg_026.c /tmp/pipeline/reg_026/reg_026.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/reg_026/reg_026.so io /tmp/pipeline/reg_026/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/reg_026/reg_026.spec b/dep/pipeline/reg_026/reg_026.spec
new file mode 100644
index 00000000..1e8a148d
--- /dev/null
+++ b/dep/pipeline/reg_026/reg_026.spec
@@ -0,0 +1,57 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2021 Intel Corporation
+
+//
+// Headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Registers.
+//
+regarray REG_ARR_1 size 0x1FFFFFF initval 0
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ regadd REG_ARR_1 h.ipv4.identification h.ethernet.dst_addr
+ regadd REG_ARR_1 h.ipv4.flags_offset h.ipv4.src_addr
+ regadd REG_ARR_1 h.ipv4.diffserv h.ipv4.total_len
+ regadd REG_ARR_1 h.ipv4.ttl h.ipv4.protocol
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/reg_027/ethdev.io b/dep/pipeline/reg_027/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/reg_027/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/reg_027/pcap_files/in_1.txt b/dep/pipeline/reg_027/pcap_files/in_1.txt
new file mode 100644
index 00000000..3365278b
--- /dev/null
+++ b/dep/pipeline/reg_027/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 12 34 56 78 90 12 10 22 33 44 55 66 08 00 45 c1
+000010 12 34 a1 a2 b1 b2 d1 06 4e b5 12 34 56 78 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/reg_027/readme.md b/dep/pipeline/reg_027/readme.md
new file mode 100644
index 00000000..962b376f
--- /dev/null
+++ b/dep/pipeline/reg_027/readme.md
@@ -0,0 +1,17 @@
+
+Test Case: test_reg_027
+-----------------------
+
+ Instruction being tested:
+ regadd REGARRAY h.field m.field
+
+ Description:
+ Write some values to specific locations of register array via regwr
+ CLI command. Send a packet to DUT for updating the previously written
+ locations using this instruction. Verify the updated values by reading
+ them via regrd CLI command.
+
+ Verification:
+ The values read via regrd CLI command should be equal to the addition
+ of values sent via packet and those initially written using regwr CLI
+ command.
diff --git a/dep/pipeline/reg_027/reg_027.cli b/dep/pipeline/reg_027/reg_027.cli
new file mode 100644
index 00000000..5908793b
--- /dev/null
+++ b/dep/pipeline/reg_027/reg_027.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/reg_027/reg_027.spec /tmp/pipeline/reg_027/reg_027.c
+pipeline libbuild /tmp/pipeline/reg_027/reg_027.c /tmp/pipeline/reg_027/reg_027.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/reg_027/reg_027.so io /tmp/pipeline/reg_027/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/reg_027/reg_027.spec b/dep/pipeline/reg_027/reg_027.spec
new file mode 100644
index 00000000..e7fa76e4
--- /dev/null
+++ b/dep/pipeline/reg_027/reg_027.spec
@@ -0,0 +1,65 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2021 Intel Corporation
+
+//
+// Headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<48> val_48
+ bit<32> val_32
+ bit<16> val_16
+ bit<8> val_8
+}
+
+metadata instanceof metadata_t
+
+//
+// Registers.
+//
+regarray REG_ARR_1 size 0x1FFFFFF initval 0
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ mov m.val_48 0x123456789012
+ mov m.val_32 0x12345678
+ mov m.val_16 0x1234
+ mov m.val_8 0x06
+ regadd REG_ARR_1 h.ipv4.identification m.val_48
+ regadd REG_ARR_1 h.ipv4.flags_offset m.val_32
+ regadd REG_ARR_1 h.ipv4.diffserv m.val_16
+ regadd REG_ARR_1 h.ipv4.ttl m.val_8
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/reg_028/ethdev.io b/dep/pipeline/reg_028/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/reg_028/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/reg_028/pcap_files/in_1.txt b/dep/pipeline/reg_028/pcap_files/in_1.txt
new file mode 100644
index 00000000..1a5c2ba4
--- /dev/null
+++ b/dep/pipeline/reg_028/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 12 34 56 78 90 12 10 22 33 44 55 66 08 aa 45 c1
+000010 12 34 a1 a2 b1 b2 d1 06 4e b5 12 34 56 78 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/reg_028/readme.md b/dep/pipeline/reg_028/readme.md
new file mode 100644
index 00000000..d71b3957
--- /dev/null
+++ b/dep/pipeline/reg_028/readme.md
@@ -0,0 +1,17 @@
+
+Test Case: test_reg_028
+-----------------------
+
+ Instruction being tested:
+ regadd REGARRAY h.field t.field
+
+ Description:
+ Write some values to specific locations of register array via regwr
+ CLI command. Send a packet to DUT for updating the previously written
+ locations using this instruction. Verify the updated values by reading
+ them via regrd CLI command.
+
+ Verification:
+ The values read via regrd CLI command should be equal to the addition
+ of values sent via packet and those initially written using regwr CLI
+ command.
diff --git a/dep/pipeline/reg_028/reg_028.cli b/dep/pipeline/reg_028/reg_028.cli
new file mode 100644
index 00000000..4c3ed324
--- /dev/null
+++ b/dep/pipeline/reg_028/reg_028.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/reg_028/reg_028.spec /tmp/pipeline/reg_028/reg_028.c
+pipeline libbuild /tmp/pipeline/reg_028/reg_028.c /tmp/pipeline/reg_028/reg_028.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/reg_028/reg_028.so io /tmp/pipeline/reg_028/ethdev.io numa 0
+pipeline PIPELINE0 table reg_028 add /tmp/pipeline/reg_028/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/reg_028/reg_028.spec b/dep/pipeline/reg_028/reg_028.spec
new file mode 100644
index 00000000..c0976f42
--- /dev/null
+++ b/dep/pipeline/reg_028/reg_028.spec
@@ -0,0 +1,93 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2021 Intel Corporation
+
+//
+// Headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Registers.
+//
+regarray REG_ARR_1 size 0x1FFFFFF initval 0
+
+//
+// Actions
+//
+struct reg_028_args_t {
+ bit<48> val_48
+ bit<32> val_32
+ bit<16> val_16
+ bit<8> val_8
+}
+
+action reg_028_action args instanceof reg_028_args_t {
+ regadd REG_ARR_1 h.ipv4.identification t.val_48
+ regadd REG_ARR_1 h.ipv4.flags_offset t.val_32
+ regadd REG_ARR_1 h.ipv4.diffserv t.val_16
+ regadd REG_ARR_1 h.ipv4.ttl t.val_8
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table reg_028 {
+ key {
+ h.ethernet.ethertype exact
+ }
+
+ actions {
+ reg_028_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ table reg_028
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/reg_028/table.txt b/dep/pipeline/reg_028/table.txt
new file mode 100644
index 00000000..1cb2f6b9
--- /dev/null
+++ b/dep/pipeline/reg_028/table.txt
@@ -0,0 +1 @@
+match 0x08aa action reg_028_action val_48 0x123456789012 val_32 0x12345678 val_16 0x1234 val_8 0x6
diff --git a/dep/pipeline/reg_029/ethdev.io b/dep/pipeline/reg_029/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/reg_029/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/reg_029/pcap_files/in_1.txt b/dep/pipeline/reg_029/pcap_files/in_1.txt
new file mode 100644
index 00000000..3365278b
--- /dev/null
+++ b/dep/pipeline/reg_029/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 12 34 56 78 90 12 10 22 33 44 55 66 08 00 45 c1
+000010 12 34 a1 a2 b1 b2 d1 06 4e b5 12 34 56 78 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/reg_029/readme.md b/dep/pipeline/reg_029/readme.md
new file mode 100644
index 00000000..576253ef
--- /dev/null
+++ b/dep/pipeline/reg_029/readme.md
@@ -0,0 +1,17 @@
+
+Test Case: test_reg_029
+-----------------------
+
+ Instruction being tested:
+ regadd REGARRAY h.field imm_value
+
+ Description:
+ Write some values to specific locations of register array via regwr
+ CLI command. Send a packet to DUT for updating the previously written
+ locations using this instruction. Verify the updated values by reading
+ them via regrd CLI command.
+
+ Verification:
+ The values read via regrd CLI command should be equal to the addition
+ of values sent via packet and those initially written using regwr CLI
+ command.
diff --git a/dep/pipeline/reg_029/reg_029.cli b/dep/pipeline/reg_029/reg_029.cli
new file mode 100644
index 00000000..aa0ed631
--- /dev/null
+++ b/dep/pipeline/reg_029/reg_029.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/reg_029/reg_029.spec /tmp/pipeline/reg_029/reg_029.c
+pipeline libbuild /tmp/pipeline/reg_029/reg_029.c /tmp/pipeline/reg_029/reg_029.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/reg_029/reg_029.so io /tmp/pipeline/reg_029/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/reg_029/reg_029.spec b/dep/pipeline/reg_029/reg_029.spec
new file mode 100644
index 00000000..d0f8950a
--- /dev/null
+++ b/dep/pipeline/reg_029/reg_029.spec
@@ -0,0 +1,57 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2021 Intel Corporation
+
+//
+// Headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Registers.
+//
+regarray REG_ARR_1 size 0x1FFFFFF initval 0
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ regadd REG_ARR_1 h.ipv4.identification 0x123456789012
+ regadd REG_ARR_1 h.ipv4.flags_offset 0x12345678
+ regadd REG_ARR_1 h.ipv4.diffserv 0x1234
+ regadd REG_ARR_1 h.ipv4.ttl 0x06
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/reg_030/ethdev.io b/dep/pipeline/reg_030/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/reg_030/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/reg_030/pcap_files/in_1.txt b/dep/pipeline/reg_030/pcap_files/in_1.txt
new file mode 100644
index 00000000..1a5c2ba4
--- /dev/null
+++ b/dep/pipeline/reg_030/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 12 34 56 78 90 12 10 22 33 44 55 66 08 aa 45 c1
+000010 12 34 a1 a2 b1 b2 d1 06 4e b5 12 34 56 78 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/reg_030/readme.md b/dep/pipeline/reg_030/readme.md
new file mode 100644
index 00000000..ed536f3d
--- /dev/null
+++ b/dep/pipeline/reg_030/readme.md
@@ -0,0 +1,17 @@
+
+Test Case: test_reg_030
+-----------------------
+
+ Instruction being tested:
+ regadd REGARRAY m.field h.field
+
+ Description:
+ Write some values to specific locations of register array via regwr
+ CLI command. Send a packet to DUT for updating the previously written
+ locations using this instruction. Verify the updated values by reading
+ them via regrd CLI command.
+
+ Verification:
+ The values read via regrd CLI command should be equal to the addition
+ of values sent via packet and those initially written using regwr CLI
+ command.
diff --git a/dep/pipeline/reg_030/reg_030.cli b/dep/pipeline/reg_030/reg_030.cli
new file mode 100644
index 00000000..9b420108
--- /dev/null
+++ b/dep/pipeline/reg_030/reg_030.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/reg_030/reg_030.spec /tmp/pipeline/reg_030/reg_030.c
+pipeline libbuild /tmp/pipeline/reg_030/reg_030.c /tmp/pipeline/reg_030/reg_030.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/reg_030/reg_030.so io /tmp/pipeline/reg_030/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/reg_030/reg_030.spec b/dep/pipeline/reg_030/reg_030.spec
new file mode 100644
index 00000000..8dc4af0c
--- /dev/null
+++ b/dep/pipeline/reg_030/reg_030.spec
@@ -0,0 +1,66 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2021 Intel Corporation
+
+//
+// Headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<16> idx_48
+ bit<16> idx_32
+ bit<16> idx_16
+ bit<16> idx_8
+}
+
+metadata instanceof metadata_t
+
+//
+// Registers.
+//
+regarray REG_ARR_1 size 0x1FFFFFF initval 0
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ jmpneq L1 h.ethernet.ethertype 0x08aa
+ mov m.idx_48 0xa1a2
+ mov m.idx_32 0xb1b2
+ mov m.idx_16 0xc1
+ mov m.idx_8 0xd1
+ regadd REG_ARR_1 m.idx_48 h.ethernet.dst_addr
+ regadd REG_ARR_1 m.idx_32 h.ipv4.src_addr
+ regadd REG_ARR_1 m.idx_16 h.ipv4.total_len
+ regadd REG_ARR_1 m.idx_8 h.ipv4.protocol
+ L1 : emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/reg_031/ethdev.io b/dep/pipeline/reg_031/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/reg_031/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/reg_031/pcap_files/in_1.txt b/dep/pipeline/reg_031/pcap_files/in_1.txt
new file mode 100644
index 00000000..1a5c2ba4
--- /dev/null
+++ b/dep/pipeline/reg_031/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 12 34 56 78 90 12 10 22 33 44 55 66 08 aa 45 c1
+000010 12 34 a1 a2 b1 b2 d1 06 4e b5 12 34 56 78 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/reg_031/readme.md b/dep/pipeline/reg_031/readme.md
new file mode 100644
index 00000000..3e3f1dd9
--- /dev/null
+++ b/dep/pipeline/reg_031/readme.md
@@ -0,0 +1,17 @@
+
+Test Case: test_reg_031
+-----------------------
+
+ Instruction being tested:
+ regadd REGARRAY t.field h.field
+
+ Description:
+ Write some values to specific locations of register array via regwr
+ CLI command. Send a packet to DUT for updating the previously written
+ locations using this instruction. Verify the updated values by reading
+ them via regrd CLI command.
+
+ Verification:
+ The values read via regrd CLI command should be equal to the addition
+ of values sent via packet and those initially written using regwr CLI
+ command.
diff --git a/dep/pipeline/reg_031/reg_031.cli b/dep/pipeline/reg_031/reg_031.cli
new file mode 100644
index 00000000..ab42b814
--- /dev/null
+++ b/dep/pipeline/reg_031/reg_031.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/reg_031/reg_031.spec /tmp/pipeline/reg_031/reg_031.c
+pipeline libbuild /tmp/pipeline/reg_031/reg_031.c /tmp/pipeline/reg_031/reg_031.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/reg_031/reg_031.so io /tmp/pipeline/reg_031/ethdev.io numa 0
+pipeline PIPELINE0 table reg_031 add /tmp/pipeline/reg_031/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/reg_031/reg_031.spec b/dep/pipeline/reg_031/reg_031.spec
new file mode 100644
index 00000000..3f16a81c
--- /dev/null
+++ b/dep/pipeline/reg_031/reg_031.spec
@@ -0,0 +1,93 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2021 Intel Corporation
+
+//
+// Headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Registers.
+//
+regarray REG_ARR_1 size 0x1FFFFFF initval 0
+
+//
+// Actions
+//
+struct reg_031_args_t {
+ bit<32> idx_48
+ bit<32> idx_32
+ bit<32> idx_16
+ bit<32> idx_8
+}
+
+action reg_031_action args instanceof reg_031_args_t {
+ regadd REG_ARR_1 t.idx_48 h.ethernet.dst_addr
+ regadd REG_ARR_1 t.idx_32 h.ipv4.src_addr
+ regadd REG_ARR_1 t.idx_16 h.ipv4.total_len
+ regadd REG_ARR_1 t.idx_8 h.ipv4.protocol
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table reg_031 {
+ key {
+ h.ethernet.ethertype exact
+ }
+
+ actions {
+ reg_031_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ table reg_031
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/reg_031/table.txt b/dep/pipeline/reg_031/table.txt
new file mode 100644
index 00000000..4a91a120
--- /dev/null
+++ b/dep/pipeline/reg_031/table.txt
@@ -0,0 +1 @@
+match 0x08aa action reg_031_action idx_48 0x1a1a2a3 idx_32 0x7fb1b2 idx_16 0x7fc1 idx_8 0x7f
diff --git a/dep/pipeline/reg_032/ethdev.io b/dep/pipeline/reg_032/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/reg_032/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/reg_032/pcap_files/in_1.txt b/dep/pipeline/reg_032/pcap_files/in_1.txt
new file mode 100644
index 00000000..1a5c2ba4
--- /dev/null
+++ b/dep/pipeline/reg_032/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 12 34 56 78 90 12 10 22 33 44 55 66 08 aa 45 c1
+000010 12 34 a1 a2 b1 b2 d1 06 4e b5 12 34 56 78 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/reg_032/readme.md b/dep/pipeline/reg_032/readme.md
new file mode 100644
index 00000000..e75cf9a2
--- /dev/null
+++ b/dep/pipeline/reg_032/readme.md
@@ -0,0 +1,17 @@
+
+Test Case: test_reg_032
+-----------------------
+
+ Instruction being tested:
+ regadd REGARRAY m.field m.field
+
+ Description:
+ Write some values to specific locations of register array via regwr
+ CLI command. Send a packet to DUT for updating the previously written
+ locations using this instruction. Verify the updated values by reading
+ them via regrd CLI command.
+
+ Verification:
+ The values read via regrd CLI command should be equal to the addition
+ of values sent via packet and those initially written using regwr CLI
+ command.
diff --git a/dep/pipeline/reg_032/reg_032.cli b/dep/pipeline/reg_032/reg_032.cli
new file mode 100644
index 00000000..10ab51a1
--- /dev/null
+++ b/dep/pipeline/reg_032/reg_032.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/reg_032/reg_032.spec /tmp/pipeline/reg_032/reg_032.c
+pipeline libbuild /tmp/pipeline/reg_032/reg_032.c /tmp/pipeline/reg_032/reg_032.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/reg_032/reg_032.so io /tmp/pipeline/reg_032/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/reg_032/reg_032.spec b/dep/pipeline/reg_032/reg_032.spec
new file mode 100644
index 00000000..5c6f97a7
--- /dev/null
+++ b/dep/pipeline/reg_032/reg_032.spec
@@ -0,0 +1,63 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2021 Intel Corporation
+
+//
+// Headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<32> idx_64
+ bit<32> idx_48
+ bit<32> idx_32
+ bit<32> idx_16
+ bit<32> idx_8
+ bit<64> val_64
+ bit<48> val_48
+ bit<32> val_32
+ bit<16> val_16
+ bit<8> val_8
+}
+
+metadata instanceof metadata_t
+
+//
+// Registers.
+//
+regarray REG_ARR_1 size 0x1FFFFFF initval 0
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ jmpneq L1 h.ethernet.ethertype 0x08aa
+ mov m.idx_64 0x1a1a2a3
+ mov m.idx_48 0x7fb1b2
+ mov m.idx_32 0x7fc1
+ mov m.idx_16 0x7f
+ mov m.idx_8 0xf7
+ mov m.val_64 0x1234567890123456
+ mov m.val_48 0x123456789012
+ mov m.val_32 0x12345678
+ mov m.val_16 0xff
+ mov m.val_8 0x06
+ regadd REG_ARR_1 m.idx_64 m.val_64
+ regadd REG_ARR_1 m.idx_48 m.val_48
+ regadd REG_ARR_1 m.idx_32 m.val_32
+ regadd REG_ARR_1 m.idx_16 m.val_16
+ regadd REG_ARR_1 m.idx_8 m.val_8
+ L1 : emit h.ethernet
+ tx m.port
+}
diff --git a/dep/pipeline/reg_033/ethdev.io b/dep/pipeline/reg_033/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/reg_033/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/reg_033/pcap_files/in_1.txt b/dep/pipeline/reg_033/pcap_files/in_1.txt
new file mode 100644
index 00000000..1a5c2ba4
--- /dev/null
+++ b/dep/pipeline/reg_033/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 12 34 56 78 90 12 10 22 33 44 55 66 08 aa 45 c1
+000010 12 34 a1 a2 b1 b2 d1 06 4e b5 12 34 56 78 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/reg_033/readme.md b/dep/pipeline/reg_033/readme.md
new file mode 100644
index 00000000..bb9b3624
--- /dev/null
+++ b/dep/pipeline/reg_033/readme.md
@@ -0,0 +1,17 @@
+
+Test Case: test_reg_033
+-----------------------
+
+ Instruction being tested:
+ regadd REGARRAY m.field t.field
+
+ Description:
+ Write some values to specific locations of register array via regwr
+ CLI command. Send a packet to DUT for updating the previously written
+ locations using this instruction. Verify the updated values by reading
+ them via regrd CLI command.
+
+ Verification:
+ The values read via regrd CLI command should be equal to the addition
+ of values sent via packet and those initially written using regwr CLI
+ command.
diff --git a/dep/pipeline/reg_033/reg_033.cli b/dep/pipeline/reg_033/reg_033.cli
new file mode 100644
index 00000000..45c018ce
--- /dev/null
+++ b/dep/pipeline/reg_033/reg_033.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/reg_033/reg_033.spec /tmp/pipeline/reg_033/reg_033.c
+pipeline libbuild /tmp/pipeline/reg_033/reg_033.c /tmp/pipeline/reg_033/reg_033.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/reg_033/reg_033.so io /tmp/pipeline/reg_033/ethdev.io numa 0
+pipeline PIPELINE0 table reg_033 add /tmp/pipeline/reg_033/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/reg_033/reg_033.spec b/dep/pipeline/reg_033/reg_033.spec
new file mode 100644
index 00000000..3295a56e
--- /dev/null
+++ b/dep/pipeline/reg_033/reg_033.spec
@@ -0,0 +1,89 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2021 Intel Corporation
+
+//
+// Headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<32> idx_64
+ bit<32> idx_48
+ bit<32> idx_32
+ bit<32> idx_16
+ bit<32> idx_8
+}
+
+metadata instanceof metadata_t
+
+//
+// Registers.
+//
+regarray REG_ARR_1 size 0x1FFFFFF initval 0
+
+//
+// Actions
+//
+struct reg_033_args_t {
+ bit<64> val_64
+ bit<48> val_48
+ bit<32> val_32
+ bit<16> val_16
+ bit<8> val_8
+}
+
+action reg_033_action args instanceof reg_033_args_t {
+ mov m.idx_64 0x1a1a2a3
+ mov m.idx_48 0x7fb1b2
+ mov m.idx_32 0x7fc1
+ mov m.idx_16 0x7f
+ mov m.idx_8 0xf7
+ regadd REG_ARR_1 m.idx_64 t.val_64
+ regadd REG_ARR_1 m.idx_48 t.val_48
+ regadd REG_ARR_1 m.idx_32 t.val_32
+ regadd REG_ARR_1 m.idx_16 t.val_16
+ regadd REG_ARR_1 m.idx_8 t.val_8
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table reg_033 {
+ key {
+ h.ethernet.ethertype exact
+ }
+
+ actions {
+ reg_033_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ table reg_033
+ emit h.ethernet
+ tx m.port
+}
diff --git a/dep/pipeline/reg_033/table.txt b/dep/pipeline/reg_033/table.txt
new file mode 100644
index 00000000..9be776c6
--- /dev/null
+++ b/dep/pipeline/reg_033/table.txt
@@ -0,0 +1 @@
+match 0x08aa action reg_033_action val_64 0x1234567890123456 val_48 0x123456789012 val_32 0x12345678 val_16 0xff val_8 0x6
diff --git a/dep/pipeline/reg_034/ethdev.io b/dep/pipeline/reg_034/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/reg_034/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/reg_034/pcap_files/in_1.txt b/dep/pipeline/reg_034/pcap_files/in_1.txt
new file mode 100644
index 00000000..1a5c2ba4
--- /dev/null
+++ b/dep/pipeline/reg_034/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 12 34 56 78 90 12 10 22 33 44 55 66 08 aa 45 c1
+000010 12 34 a1 a2 b1 b2 d1 06 4e b5 12 34 56 78 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/reg_034/readme.md b/dep/pipeline/reg_034/readme.md
new file mode 100644
index 00000000..7a42a04b
--- /dev/null
+++ b/dep/pipeline/reg_034/readme.md
@@ -0,0 +1,17 @@
+
+Test Case: test_reg_034
+-----------------------
+
+ Instruction being tested:
+ regadd REGARRAY t.field m.field
+
+ Description:
+ Write some values to specific locations of register array via regwr
+ CLI command. Send a packet to DUT for updating the previously written
+ locations using this instruction. Verify the updated values by reading
+ them via regrd CLI command.
+
+ Verification:
+ The values read via regrd CLI command should be equal to the addition
+ of values sent via packet and those initially written using regwr CLI
+ command.
diff --git a/dep/pipeline/reg_034/reg_034.cli b/dep/pipeline/reg_034/reg_034.cli
new file mode 100644
index 00000000..222dc520
--- /dev/null
+++ b/dep/pipeline/reg_034/reg_034.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/reg_034/reg_034.spec /tmp/pipeline/reg_034/reg_034.c
+pipeline libbuild /tmp/pipeline/reg_034/reg_034.c /tmp/pipeline/reg_034/reg_034.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/reg_034/reg_034.so io /tmp/pipeline/reg_034/ethdev.io numa 0
+pipeline PIPELINE0 table reg_034 add /tmp/pipeline/reg_034/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/reg_034/reg_034.spec b/dep/pipeline/reg_034/reg_034.spec
new file mode 100644
index 00000000..a88bde1a
--- /dev/null
+++ b/dep/pipeline/reg_034/reg_034.spec
@@ -0,0 +1,89 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2021 Intel Corporation
+
+//
+// Headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<64> val_64
+ bit<48> val_48
+ bit<32> val_32
+ bit<16> val_16
+ bit<8> val_8
+}
+
+metadata instanceof metadata_t
+
+//
+// Registers.
+//
+regarray REG_ARR_1 size 0x1FFFFFF initval 0
+
+//
+// Actions
+//
+struct reg_034_args_t {
+ bit<32> idx_64
+ bit<32> idx_48
+ bit<32> idx_32
+ bit<32> idx_16
+ bit<32> idx_8
+}
+
+action reg_034_action args instanceof reg_034_args_t {
+ mov m.val_64 0x1234567890123456
+ mov m.val_48 0x123456789012
+ mov m.val_32 0x12345678
+ mov m.val_16 0xff
+ mov m.val_8 0x06
+ regadd REG_ARR_1 t.idx_64 m.val_64
+ regadd REG_ARR_1 t.idx_48 m.val_48
+ regadd REG_ARR_1 t.idx_32 m.val_32
+ regadd REG_ARR_1 t.idx_16 m.val_16
+ regadd REG_ARR_1 t.idx_8 m.val_8
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table reg_034 {
+ key {
+ h.ethernet.ethertype exact
+ }
+
+ actions {
+ reg_034_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ table reg_034
+ emit h.ethernet
+ tx m.port
+}
diff --git a/dep/pipeline/reg_034/table.txt b/dep/pipeline/reg_034/table.txt
new file mode 100644
index 00000000..0c8327e9
--- /dev/null
+++ b/dep/pipeline/reg_034/table.txt
@@ -0,0 +1 @@
+match 0x08aa action reg_034_action idx_64 0x1a1a2a3 idx_48 0x7fb1b2 idx_32 0x7fc1 idx_16 0x7f idx_8 0xf7
diff --git a/dep/pipeline/reg_035/ethdev.io b/dep/pipeline/reg_035/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/reg_035/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/reg_035/pcap_files/in_1.txt b/dep/pipeline/reg_035/pcap_files/in_1.txt
new file mode 100644
index 00000000..1a5c2ba4
--- /dev/null
+++ b/dep/pipeline/reg_035/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 12 34 56 78 90 12 10 22 33 44 55 66 08 aa 45 c1
+000010 12 34 a1 a2 b1 b2 d1 06 4e b5 12 34 56 78 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/reg_035/readme.md b/dep/pipeline/reg_035/readme.md
new file mode 100644
index 00000000..32bae169
--- /dev/null
+++ b/dep/pipeline/reg_035/readme.md
@@ -0,0 +1,17 @@
+
+Test Case: test_reg_035
+-----------------------
+
+ Instruction being tested:
+ regadd REGARRAY t.field t.field
+
+ Description:
+ Write some values to specific locations of register array via regwr
+ CLI command. Send a packet to DUT for updating the previously written
+ locations using this instruction. Verify the updated values by reading
+ them via regrd CLI command.
+
+ Verification:
+ The values read via regrd CLI command should be equal to the addition
+ of values sent via packet and those initially written using regwr CLI
+ command.
diff --git a/dep/pipeline/reg_035/reg_035.cli b/dep/pipeline/reg_035/reg_035.cli
new file mode 100644
index 00000000..a15a8050
--- /dev/null
+++ b/dep/pipeline/reg_035/reg_035.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/reg_035/reg_035.spec /tmp/pipeline/reg_035/reg_035.c
+pipeline libbuild /tmp/pipeline/reg_035/reg_035.c /tmp/pipeline/reg_035/reg_035.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/reg_035/reg_035.so io /tmp/pipeline/reg_035/ethdev.io numa 0
+pipeline PIPELINE0 table reg_035 add /tmp/pipeline/reg_035/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/reg_035/reg_035.spec b/dep/pipeline/reg_035/reg_035.spec
new file mode 100644
index 00000000..0a69f49c
--- /dev/null
+++ b/dep/pipeline/reg_035/reg_035.spec
@@ -0,0 +1,84 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2021 Intel Corporation
+
+//
+// Headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Registers.
+//
+regarray REG_ARR_1 size 0x1FFFFFF initval 0
+
+//
+// Actions
+//
+struct reg_035_args_t {
+ bit<32> idx_64
+ bit<32> idx_48
+ bit<32> idx_32
+ bit<32> idx_16
+ bit<32> idx_8
+ bit<64> val_64
+ bit<48> val_48
+ bit<32> val_32
+ bit<16> val_16
+ bit<8> val_8
+}
+
+action reg_035_action args instanceof reg_035_args_t {
+ regadd REG_ARR_1 t.idx_64 t.val_64
+ regadd REG_ARR_1 t.idx_48 t.val_48
+ regadd REG_ARR_1 t.idx_32 t.val_32
+ regadd REG_ARR_1 t.idx_16 t.val_16
+ regadd REG_ARR_1 t.idx_8 t.val_8
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table reg_035 {
+ key {
+ h.ethernet.ethertype exact
+ }
+
+ actions {
+ reg_035_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ table reg_035
+ emit h.ethernet
+ tx m.port
+}
diff --git a/dep/pipeline/reg_035/table.txt b/dep/pipeline/reg_035/table.txt
new file mode 100644
index 00000000..7907f52f
--- /dev/null
+++ b/dep/pipeline/reg_035/table.txt
@@ -0,0 +1 @@
+match 0x08aa action reg_035_action idx_64 0x1a1a2a3 idx_48 0x7fb1b2 idx_32 0x7fc1 idx_16 0x7f idx_8 0xf7 val_64 0x1234567890123456 val_48 0x123456789012 val_32 0x12345678 val_16 0xff val_8 0x06
diff --git a/dep/pipeline/reg_036/ethdev.io b/dep/pipeline/reg_036/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/reg_036/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/reg_036/pcap_files/in_1.txt b/dep/pipeline/reg_036/pcap_files/in_1.txt
new file mode 100644
index 00000000..1a5c2ba4
--- /dev/null
+++ b/dep/pipeline/reg_036/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 12 34 56 78 90 12 10 22 33 44 55 66 08 aa 45 c1
+000010 12 34 a1 a2 b1 b2 d1 06 4e b5 12 34 56 78 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/reg_036/readme.md b/dep/pipeline/reg_036/readme.md
new file mode 100644
index 00000000..1d4addb0
--- /dev/null
+++ b/dep/pipeline/reg_036/readme.md
@@ -0,0 +1,17 @@
+
+Test Case: test_reg_036
+-----------------------
+
+ Instruction being tested:
+ regadd REGARRAY m.field imm_value
+
+ Description:
+ Write some values to specific locations of register array via regwr
+ CLI command. Send a packet to DUT for updating the previously written
+ locations using this instruction. Verify the updated values by reading
+ them via regrd CLI command.
+
+ Verification:
+ The values read via regrd CLI command should be equal to the addition
+ of values sent via packet and those initially written using regwr CLI
+ command.
diff --git a/dep/pipeline/reg_036/reg_036.cli b/dep/pipeline/reg_036/reg_036.cli
new file mode 100644
index 00000000..152d4ff2
--- /dev/null
+++ b/dep/pipeline/reg_036/reg_036.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/reg_036/reg_036.spec /tmp/pipeline/reg_036/reg_036.c
+pipeline libbuild /tmp/pipeline/reg_036/reg_036.c /tmp/pipeline/reg_036/reg_036.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/reg_036/reg_036.so io /tmp/pipeline/reg_036/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/reg_036/reg_036.spec b/dep/pipeline/reg_036/reg_036.spec
new file mode 100644
index 00000000..b182b939
--- /dev/null
+++ b/dep/pipeline/reg_036/reg_036.spec
@@ -0,0 +1,53 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2021 Intel Corporation
+
+//
+// Headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<32> idx_64
+ bit<32> idx_48
+ bit<32> idx_32
+ bit<32> idx_16
+ bit<32> idx_8
+}
+
+metadata instanceof metadata_t
+
+//
+// Registers.
+//
+regarray REG_ARR_1 size 0x1FFFFFF initval 0
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ jmpneq L1 h.ethernet.ethertype 0x08aa
+ mov m.idx_64 0x1a1a2a3
+ mov m.idx_48 0x7fb1b2
+ mov m.idx_32 0x7fc1
+ mov m.idx_16 0x7f
+ mov m.idx_8 0xf7
+ regadd REG_ARR_1 m.idx_64 0x1234567890123456
+ regadd REG_ARR_1 m.idx_48 0x123456789012
+ regadd REG_ARR_1 m.idx_32 0x12345678
+ regadd REG_ARR_1 m.idx_16 0xff
+ regadd REG_ARR_1 m.idx_8 0x06
+ L1 : emit h.ethernet
+ tx m.port
+}
diff --git a/dep/pipeline/reg_037/ethdev.io b/dep/pipeline/reg_037/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/reg_037/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/reg_037/pcap_files/in_1.txt b/dep/pipeline/reg_037/pcap_files/in_1.txt
new file mode 100644
index 00000000..1a5c2ba4
--- /dev/null
+++ b/dep/pipeline/reg_037/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 12 34 56 78 90 12 10 22 33 44 55 66 08 aa 45 c1
+000010 12 34 a1 a2 b1 b2 d1 06 4e b5 12 34 56 78 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/reg_037/readme.md b/dep/pipeline/reg_037/readme.md
new file mode 100644
index 00000000..f8686f74
--- /dev/null
+++ b/dep/pipeline/reg_037/readme.md
@@ -0,0 +1,17 @@
+
+Test Case: test_reg_037
+-----------------------
+
+ Instruction being tested:
+ regadd REGARRAY t.field imm_value
+
+ Description:
+ Write some values to specific locations of register array via regwr
+ CLI command. Send a packet to DUT for updating the previously written
+ locations using this instruction. Verify the updated values by reading
+ them via regrd CLI command.
+
+ Verification:
+ The values read via regrd CLI command should be equal to the addition
+ of values sent via packet and those initially written using regwr CLI
+ command.
diff --git a/dep/pipeline/reg_037/reg_037.cli b/dep/pipeline/reg_037/reg_037.cli
new file mode 100644
index 00000000..1f8de5a4
--- /dev/null
+++ b/dep/pipeline/reg_037/reg_037.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/reg_037/reg_037.spec /tmp/pipeline/reg_037/reg_037.c
+pipeline libbuild /tmp/pipeline/reg_037/reg_037.c /tmp/pipeline/reg_037/reg_037.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/reg_037/reg_037.so io /tmp/pipeline/reg_037/ethdev.io numa 0
+pipeline PIPELINE0 table reg_037 add /tmp/pipeline/reg_037/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/reg_037/reg_037.spec b/dep/pipeline/reg_037/reg_037.spec
new file mode 100644
index 00000000..9f830491
--- /dev/null
+++ b/dep/pipeline/reg_037/reg_037.spec
@@ -0,0 +1,79 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2021 Intel Corporation
+
+//
+// Headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Registers.
+//
+regarray REG_ARR_1 size 0x1FFFFFF initval 0
+
+//
+// Actions
+//
+struct reg_037_args_t {
+ bit<32> idx_64
+ bit<32> idx_48
+ bit<32> idx_32
+ bit<32> idx_16
+ bit<32> idx_8
+}
+
+action reg_037_action args instanceof reg_037_args_t {
+ regadd REG_ARR_1 t.idx_64 0x1234567890123456
+ regadd REG_ARR_1 t.idx_48 0x123456789012
+ regadd REG_ARR_1 t.idx_32 0x12345678
+ regadd REG_ARR_1 t.idx_16 0xff
+ regadd REG_ARR_1 t.idx_8 0x06
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table reg_037 {
+ key {
+ h.ethernet.ethertype exact
+ }
+
+ actions {
+ reg_037_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ table reg_037
+ emit h.ethernet
+ tx m.port
+}
diff --git a/dep/pipeline/reg_037/table.txt b/dep/pipeline/reg_037/table.txt
new file mode 100644
index 00000000..31b8a46f
--- /dev/null
+++ b/dep/pipeline/reg_037/table.txt
@@ -0,0 +1 @@
+match 0x08aa action reg_037_action idx_64 0x1a1a2a3 idx_48 0x7fb1b2 idx_32 0x7fc1 idx_16 0x7f idx_8 0xf7
diff --git a/dep/pipeline/reg_038/ethdev.io b/dep/pipeline/reg_038/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/reg_038/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/reg_038/pcap_files/in_1.txt b/dep/pipeline/reg_038/pcap_files/in_1.txt
new file mode 100644
index 00000000..1a5c2ba4
--- /dev/null
+++ b/dep/pipeline/reg_038/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 12 34 56 78 90 12 10 22 33 44 55 66 08 aa 45 c1
+000010 12 34 a1 a2 b1 b2 d1 06 4e b5 12 34 56 78 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/reg_038/readme.md b/dep/pipeline/reg_038/readme.md
new file mode 100644
index 00000000..8db7df81
--- /dev/null
+++ b/dep/pipeline/reg_038/readme.md
@@ -0,0 +1,17 @@
+
+Test Case: test_reg_038
+-----------------------
+
+ Instruction being tested:
+ regadd REGARRAY imm_value h.field
+
+ Description:
+ Write some values to specific locations of register array via regwr
+ CLI command. Send a packet to DUT for updating the previously written
+ locations using this instruction. Verify the updated values by reading
+ them via regrd CLI command.
+
+ Verification:
+ The values read via regrd CLI command should be equal to the addition
+ of values sent via packet and those initially written using regwr CLI
+ command.
diff --git a/dep/pipeline/reg_038/reg_038.cli b/dep/pipeline/reg_038/reg_038.cli
new file mode 100644
index 00000000..56237a09
--- /dev/null
+++ b/dep/pipeline/reg_038/reg_038.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/reg_038/reg_038.spec /tmp/pipeline/reg_038/reg_038.c
+pipeline libbuild /tmp/pipeline/reg_038/reg_038.c /tmp/pipeline/reg_038/reg_038.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/reg_038/reg_038.so io /tmp/pipeline/reg_038/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/reg_038/reg_038.spec b/dep/pipeline/reg_038/reg_038.spec
new file mode 100644
index 00000000..d2a34c8c
--- /dev/null
+++ b/dep/pipeline/reg_038/reg_038.spec
@@ -0,0 +1,58 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2021 Intel Corporation
+
+//
+// Headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Registers.
+//
+regarray REG_ARR_1 size 0x1FFFFFF initval 0
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ jmpneq L1 h.ethernet.ethertype 0x08aa
+ regadd REG_ARR_1 0xa1a2 h.ethernet.dst_addr
+ regadd REG_ARR_1 0xb1b2 h.ipv4.src_addr
+ regadd REG_ARR_1 0xc1 h.ipv4.total_len
+ regadd REG_ARR_1 0xd1 h.ipv4.protocol
+ L1 : emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/reg_039/ethdev.io b/dep/pipeline/reg_039/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/reg_039/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/reg_039/pcap_files/in_1.txt b/dep/pipeline/reg_039/pcap_files/in_1.txt
new file mode 100644
index 00000000..1a5c2ba4
--- /dev/null
+++ b/dep/pipeline/reg_039/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 12 34 56 78 90 12 10 22 33 44 55 66 08 aa 45 c1
+000010 12 34 a1 a2 b1 b2 d1 06 4e b5 12 34 56 78 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/reg_039/readme.md b/dep/pipeline/reg_039/readme.md
new file mode 100644
index 00000000..4235b51c
--- /dev/null
+++ b/dep/pipeline/reg_039/readme.md
@@ -0,0 +1,17 @@
+
+Test Case: test_reg_039
+-----------------------
+
+ Instruction being tested:
+ regadd REGARRAY imm_value m.field
+
+ Description:
+ Write some values to specific locations of register array via regwr
+ CLI command. Send a packet to DUT for updating the previously written
+ locations using this instruction. Verify the updated values by reading
+ them via regrd CLI command.
+
+ Verification:
+ The values read via regrd CLI command should be equal to the addition
+ of values sent via packet and those initially written using regwr CLI
+ command.
diff --git a/dep/pipeline/reg_039/reg_039.cli b/dep/pipeline/reg_039/reg_039.cli
new file mode 100644
index 00000000..06afea03
--- /dev/null
+++ b/dep/pipeline/reg_039/reg_039.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/reg_039/reg_039.spec /tmp/pipeline/reg_039/reg_039.c
+pipeline libbuild /tmp/pipeline/reg_039/reg_039.c /tmp/pipeline/reg_039/reg_039.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/reg_039/reg_039.so io /tmp/pipeline/reg_039/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/reg_039/reg_039.spec b/dep/pipeline/reg_039/reg_039.spec
new file mode 100644
index 00000000..97a01001
--- /dev/null
+++ b/dep/pipeline/reg_039/reg_039.spec
@@ -0,0 +1,53 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2021 Intel Corporation
+
+//
+// Headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<64> val_64
+ bit<48> val_48
+ bit<32> val_32
+ bit<16> val_16
+ bit<8> val_8
+}
+
+metadata instanceof metadata_t
+
+//
+// Registers.
+//
+regarray REG_ARR_1 size 0x1FFFFFF initval 0
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ jmpneq L1 h.ethernet.ethertype 0x08aa
+ mov m.val_64 0x1234567890123456
+ mov m.val_48 0x123456789012
+ mov m.val_32 0x12345678
+ mov m.val_16 0xff
+ mov m.val_8 0x06
+ regadd REG_ARR_1 0x1a1a2a3 m.val_64
+ regadd REG_ARR_1 0x7fb1b2 m.val_48
+ regadd REG_ARR_1 0x7fc1 m.val_32
+ regadd REG_ARR_1 0x7f m.val_16
+ regadd REG_ARR_1 0xf7 m.val_8
+ L1 : emit h.ethernet
+ tx m.port
+}
diff --git a/dep/pipeline/reg_040/ethdev.io b/dep/pipeline/reg_040/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/reg_040/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/reg_040/pcap_files/in_1.txt b/dep/pipeline/reg_040/pcap_files/in_1.txt
new file mode 100644
index 00000000..1a5c2ba4
--- /dev/null
+++ b/dep/pipeline/reg_040/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 12 34 56 78 90 12 10 22 33 44 55 66 08 aa 45 c1
+000010 12 34 a1 a2 b1 b2 d1 06 4e b5 12 34 56 78 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/reg_040/readme.md b/dep/pipeline/reg_040/readme.md
new file mode 100644
index 00000000..c7567d69
--- /dev/null
+++ b/dep/pipeline/reg_040/readme.md
@@ -0,0 +1,17 @@
+
+Test Case: test_reg_040
+-----------------------
+
+ Instruction being tested:
+ regadd REGARRAY imm_value t.field
+
+ Description:
+ Write some values to specific locations of register array via regwr
+ CLI command. Send a packet to DUT for updating the previously written
+ locations using this instruction. Verify the updated values by reading
+ them via regrd CLI command.
+
+ Verification:
+ The values read via regrd CLI command should be equal to the addition
+ of values sent via packet and those initially written using regwr CLI
+ command.
diff --git a/dep/pipeline/reg_040/reg_040.cli b/dep/pipeline/reg_040/reg_040.cli
new file mode 100644
index 00000000..ef356ef3
--- /dev/null
+++ b/dep/pipeline/reg_040/reg_040.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/reg_040/reg_040.spec /tmp/pipeline/reg_040/reg_040.c
+pipeline libbuild /tmp/pipeline/reg_040/reg_040.c /tmp/pipeline/reg_040/reg_040.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/reg_040/reg_040.so io /tmp/pipeline/reg_040/ethdev.io numa 0
+pipeline PIPELINE0 table reg_040 add /tmp/pipeline/reg_040/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/reg_040/reg_040.spec b/dep/pipeline/reg_040/reg_040.spec
new file mode 100644
index 00000000..73eb61e8
--- /dev/null
+++ b/dep/pipeline/reg_040/reg_040.spec
@@ -0,0 +1,79 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2021 Intel Corporation
+
+//
+// Headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Registers.
+//
+regarray REG_ARR_1 size 0x1FFFFFF initval 0
+
+//
+// Actions
+//
+struct reg_040_args_t {
+ bit<64> val_64
+ bit<48> val_48
+ bit<32> val_32
+ bit<16> val_16
+ bit<8> val_8
+}
+
+action reg_040_action args instanceof reg_040_args_t {
+ regadd REG_ARR_1 0x1a1a2a3 t.val_64
+ regadd REG_ARR_1 0x7fb1b2 t.val_48
+ regadd REG_ARR_1 0x7fc1 t.val_32
+ regadd REG_ARR_1 0x7f t.val_16
+ regadd REG_ARR_1 0xf7 t.val_8
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table reg_040 {
+ key {
+ h.ethernet.ethertype exact
+ }
+
+ actions {
+ reg_040_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ table reg_040
+ emit h.ethernet
+ tx m.port
+}
diff --git a/dep/pipeline/reg_040/table.txt b/dep/pipeline/reg_040/table.txt
new file mode 100644
index 00000000..2085d5f4
--- /dev/null
+++ b/dep/pipeline/reg_040/table.txt
@@ -0,0 +1 @@
+match 0x08aa action reg_040_action val_64 0x1234567890123456 val_48 0x123456789012 val_32 0x12345678 val_16 0xff val_8 0x6
diff --git a/dep/pipeline/reg_041/ethdev.io b/dep/pipeline/reg_041/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/reg_041/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/reg_041/pcap_files/in_1.txt b/dep/pipeline/reg_041/pcap_files/in_1.txt
new file mode 100644
index 00000000..1a5c2ba4
--- /dev/null
+++ b/dep/pipeline/reg_041/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 12 34 56 78 90 12 10 22 33 44 55 66 08 aa 45 c1
+000010 12 34 a1 a2 b1 b2 d1 06 4e b5 12 34 56 78 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/reg_041/readme.md b/dep/pipeline/reg_041/readme.md
new file mode 100644
index 00000000..f372c7b4
--- /dev/null
+++ b/dep/pipeline/reg_041/readme.md
@@ -0,0 +1,17 @@
+
+Test Case: test_reg_041
+-----------------------
+
+ Instruction being tested:
+ regadd REGARRAY imm_value imm_value
+
+ Description:
+ Write some values to specific locations of register array via regwr
+ CLI command. Send a packet to DUT for updating the previously written
+ locations using this instruction. Verify the updated values by reading
+ them via regrd CLI command.
+
+ Verification:
+ The values read via regrd CLI command should be equal to the addition
+ of values sent via packet and those initially written using regwr CLI
+ command.
diff --git a/dep/pipeline/reg_041/reg_041.cli b/dep/pipeline/reg_041/reg_041.cli
new file mode 100644
index 00000000..3232d89f
--- /dev/null
+++ b/dep/pipeline/reg_041/reg_041.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/reg_041/reg_041.spec /tmp/pipeline/reg_041/reg_041.c
+pipeline libbuild /tmp/pipeline/reg_041/reg_041.c /tmp/pipeline/reg_041/reg_041.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/reg_041/reg_041.so io /tmp/pipeline/reg_041/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/reg_041/reg_041.spec b/dep/pipeline/reg_041/reg_041.spec
new file mode 100644
index 00000000..3c951046
--- /dev/null
+++ b/dep/pipeline/reg_041/reg_041.spec
@@ -0,0 +1,43 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2021 Intel Corporation
+
+//
+// Headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Registers.
+//
+regarray REG_ARR_1 size 0x1FFFFFF initval 0
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ jmpneq L1 h.ethernet.ethertype 0x08aa
+ regadd REG_ARR_1 0x1a1a2a3 0x1234567890123456
+ regadd REG_ARR_1 0x7fb1b2 0x123456789012
+ regadd REG_ARR_1 0x7fc1 0x12345678
+ regadd REG_ARR_1 0x7f 0xff
+ regadd REG_ARR_1 0xf7 0x06
+ L1 : emit h.ethernet
+ tx m.port
+}
diff --git a/dep/pipeline/reg_042/ethdev.io b/dep/pipeline/reg_042/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/reg_042/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/reg_042/pcap_files/in_1.txt b/dep/pipeline/reg_042/pcap_files/in_1.txt
new file mode 100644
index 00000000..3365278b
--- /dev/null
+++ b/dep/pipeline/reg_042/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 12 34 56 78 90 12 10 22 33 44 55 66 08 00 45 c1
+000010 12 34 a1 a2 b1 b2 d1 06 4e b5 12 34 56 78 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/reg_042/readme.md b/dep/pipeline/reg_042/readme.md
new file mode 100644
index 00000000..6c526133
--- /dev/null
+++ b/dep/pipeline/reg_042/readme.md
@@ -0,0 +1,17 @@
+
+Test Case: test_reg_042
+-----------------------
+
+ Instruction being tested:
+ regprefetch REGARRAY h.field
+
+ Description:
+ Write some values to specific locations of register array via regwr
+ CLI command. Send a packet to DUT for updating the previously written
+ locations using regadd and this instruction. Verify the updated values
+ by reading them via regrd CLI command.
+
+ Verification:
+ The values read via regrd CLI command should be equal to the addition
+ of values sent via packet and those initially written using regwr CLI
+ command.
diff --git a/dep/pipeline/reg_042/reg_042.cli b/dep/pipeline/reg_042/reg_042.cli
new file mode 100644
index 00000000..b16cbe22
--- /dev/null
+++ b/dep/pipeline/reg_042/reg_042.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/reg_042/reg_042.spec /tmp/pipeline/reg_042/reg_042.c
+pipeline libbuild /tmp/pipeline/reg_042/reg_042.c /tmp/pipeline/reg_042/reg_042.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/reg_042/reg_042.so io /tmp/pipeline/reg_042/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/reg_042/reg_042.spec b/dep/pipeline/reg_042/reg_042.spec
new file mode 100644
index 00000000..a40ffc3d
--- /dev/null
+++ b/dep/pipeline/reg_042/reg_042.spec
@@ -0,0 +1,62 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2021 Intel Corporation
+
+//
+// Headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Registers.
+//
+regarray REG_ARR_1 size 0x1FFFFFF initval 0
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ jmpneq L1 h.ethernet.src_addr 0x102233445566
+ regprefetch REG_ARR_1 h.ipv4.identification
+ regprefetch REG_ARR_1 h.ipv4.flags_offset
+ regprefetch REG_ARR_1 h.ipv4.diffserv
+ regprefetch REG_ARR_1 h.ipv4.ttl
+ regadd REG_ARR_1 h.ipv4.identification h.ethernet.dst_addr
+ regadd REG_ARR_1 h.ipv4.flags_offset h.ipv4.src_addr
+ regadd REG_ARR_1 h.ipv4.diffserv h.ipv4.total_len
+ regadd REG_ARR_1 h.ipv4.ttl h.ipv4.protocol
+ L1 : emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/reg_043/ethdev.io b/dep/pipeline/reg_043/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/reg_043/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/reg_043/pcap_files/in_1.txt b/dep/pipeline/reg_043/pcap_files/in_1.txt
new file mode 100644
index 00000000..3365278b
--- /dev/null
+++ b/dep/pipeline/reg_043/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 12 34 56 78 90 12 10 22 33 44 55 66 08 00 45 c1
+000010 12 34 a1 a2 b1 b2 d1 06 4e b5 12 34 56 78 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/reg_043/readme.md b/dep/pipeline/reg_043/readme.md
new file mode 100644
index 00000000..8b2df449
--- /dev/null
+++ b/dep/pipeline/reg_043/readme.md
@@ -0,0 +1,17 @@
+
+Test Case: test_reg_043
+-----------------------
+
+ Instruction being tested:
+ regprefetch REGARRAY m.field
+
+ Description:
+ Write some values to specific locations of register array via regwr
+ CLI command. Send a packet to DUT for updating the previously written
+ locations using regadd and this instruction. Verify the updated values
+ by reading them via regrd CLI command.
+
+ Verification:
+ The values read via regrd CLI command should be equal to the addition
+ of values sent via packet and those initially written using regwr CLI
+ command.
diff --git a/dep/pipeline/reg_043/reg_043.cli b/dep/pipeline/reg_043/reg_043.cli
new file mode 100644
index 00000000..701f4598
--- /dev/null
+++ b/dep/pipeline/reg_043/reg_043.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/reg_043/reg_043.spec /tmp/pipeline/reg_043/reg_043.c
+pipeline libbuild /tmp/pipeline/reg_043/reg_043.c /tmp/pipeline/reg_043/reg_043.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/reg_043/reg_043.so io /tmp/pipeline/reg_043/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/reg_043/reg_043.spec b/dep/pipeline/reg_043/reg_043.spec
new file mode 100644
index 00000000..16d2a35b
--- /dev/null
+++ b/dep/pipeline/reg_043/reg_043.spec
@@ -0,0 +1,70 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2021 Intel Corporation
+
+//
+// Headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<16> idx_48
+ bit<16> idx_32
+ bit<16> idx_16
+ bit<16> idx_8
+}
+
+metadata instanceof metadata_t
+
+//
+// Registers.
+//
+regarray REG_ARR_1 size 0x1FFFFFF initval 0
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ jmpneq L1 h.ethernet.src_addr 0x102233445566
+ mov m.idx_48 0xa1a2
+ mov m.idx_32 0xb1b2
+ mov m.idx_16 0xc1
+ mov m.idx_8 0xd1
+ regprefetch REG_ARR_1 m.idx_48
+ regprefetch REG_ARR_1 m.idx_32
+ regprefetch REG_ARR_1 m.idx_16
+ regprefetch REG_ARR_1 m.idx_8
+ regadd REG_ARR_1 m.idx_48 h.ethernet.dst_addr
+ regadd REG_ARR_1 m.idx_32 h.ipv4.src_addr
+ regadd REG_ARR_1 m.idx_16 h.ipv4.total_len
+ regadd REG_ARR_1 m.idx_8 h.ipv4.protocol
+ L1 : emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/reg_044/ethdev.io b/dep/pipeline/reg_044/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/reg_044/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/reg_044/pcap_files/in_1.txt b/dep/pipeline/reg_044/pcap_files/in_1.txt
new file mode 100644
index 00000000..3365278b
--- /dev/null
+++ b/dep/pipeline/reg_044/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 12 34 56 78 90 12 10 22 33 44 55 66 08 00 45 c1
+000010 12 34 a1 a2 b1 b2 d1 06 4e b5 12 34 56 78 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/reg_044/readme.md b/dep/pipeline/reg_044/readme.md
new file mode 100644
index 00000000..2c0f1773
--- /dev/null
+++ b/dep/pipeline/reg_044/readme.md
@@ -0,0 +1,17 @@
+
+Test Case: test_reg_044
+-----------------------
+
+ Instruction being tested:
+ regprefetch REGARRAY t.field
+
+ Description:
+ Write some values to specific locations of register array via regwr
+ CLI command. Send a packet to DUT for updating the previously written
+ locations using regadd and this instruction. Verify the updated values
+ by reading them via regrd CLI command.
+
+ Verification:
+ The values read via regrd CLI command should be equal to the addition
+ of values sent via packet and those initially written using regwr CLI
+ command.
diff --git a/dep/pipeline/reg_044/reg_044.cli b/dep/pipeline/reg_044/reg_044.cli
new file mode 100644
index 00000000..ed18c677
--- /dev/null
+++ b/dep/pipeline/reg_044/reg_044.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/reg_044/reg_044.spec /tmp/pipeline/reg_044/reg_044.c
+pipeline libbuild /tmp/pipeline/reg_044/reg_044.c /tmp/pipeline/reg_044/reg_044.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/reg_044/reg_044.so io /tmp/pipeline/reg_044/ethdev.io numa 0
+pipeline PIPELINE0 table reg_044 add /tmp/pipeline/reg_044/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/reg_044/reg_044.spec b/dep/pipeline/reg_044/reg_044.spec
new file mode 100644
index 00000000..fa7ec7f7
--- /dev/null
+++ b/dep/pipeline/reg_044/reg_044.spec
@@ -0,0 +1,97 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2021 Intel Corporation
+
+//
+// Headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Registers.
+//
+regarray REG_ARR_1 size 0x1FFFFFF initval 0
+
+//
+// Actions
+//
+struct reg_044_args_t {
+ bit<32> idx_48
+ bit<32> idx_32
+ bit<32> idx_16
+ bit<32> idx_8
+}
+
+action reg_044_action args instanceof reg_044_args_t {
+ regprefetch REG_ARR_1 t.idx_48
+ regprefetch REG_ARR_1 t.idx_32
+ regprefetch REG_ARR_1 t.idx_16
+ regprefetch REG_ARR_1 t.idx_8
+ regadd REG_ARR_1 t.idx_48 h.ethernet.dst_addr
+ regadd REG_ARR_1 t.idx_32 h.ipv4.src_addr
+ regadd REG_ARR_1 t.idx_16 h.ipv4.total_len
+ regadd REG_ARR_1 t.idx_8 h.ipv4.protocol
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table reg_044 {
+ key {
+ h.ethernet.src_addr exact
+ }
+
+ actions {
+ reg_044_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ table reg_044
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/reg_044/table.txt b/dep/pipeline/reg_044/table.txt
new file mode 100644
index 00000000..c9237708
--- /dev/null
+++ b/dep/pipeline/reg_044/table.txt
@@ -0,0 +1 @@
+match 0x102233445566 action reg_044_action idx_48 0x1a1a2a3 idx_32 0x7fb1b2 idx_16 0x7fc1 idx_8 0x7f
diff --git a/dep/pipeline/reg_045/ethdev.io b/dep/pipeline/reg_045/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/reg_045/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/reg_045/pcap_files/in_1.txt b/dep/pipeline/reg_045/pcap_files/in_1.txt
new file mode 100644
index 00000000..3365278b
--- /dev/null
+++ b/dep/pipeline/reg_045/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 12 34 56 78 90 12 10 22 33 44 55 66 08 00 45 c1
+000010 12 34 a1 a2 b1 b2 d1 06 4e b5 12 34 56 78 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/reg_045/readme.md b/dep/pipeline/reg_045/readme.md
new file mode 100644
index 00000000..313830d7
--- /dev/null
+++ b/dep/pipeline/reg_045/readme.md
@@ -0,0 +1,17 @@
+
+Test Case: test_reg_045
+-----------------------
+
+ Instruction being tested:
+ regprefetch REGARRAY imm_value
+
+ Description:
+ Write some values to specific locations of register array via regwr
+ CLI command. Send a packet to DUT for updating the previously written
+ locations using regadd and this instruction. Verify the updated values
+ by reading them via regrd CLI command.
+
+ Verification:
+ The values read via regrd CLI command should be equal to the addition
+ of values sent via packet and those initially written using regwr CLI
+ command.
diff --git a/dep/pipeline/reg_045/reg_045.cli b/dep/pipeline/reg_045/reg_045.cli
new file mode 100644
index 00000000..2c3ae7e9
--- /dev/null
+++ b/dep/pipeline/reg_045/reg_045.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/reg_045/reg_045.spec /tmp/pipeline/reg_045/reg_045.c
+pipeline libbuild /tmp/pipeline/reg_045/reg_045.c /tmp/pipeline/reg_045/reg_045.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/reg_045/reg_045.so io /tmp/pipeline/reg_045/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/reg_045/reg_045.spec b/dep/pipeline/reg_045/reg_045.spec
new file mode 100644
index 00000000..b561a105
--- /dev/null
+++ b/dep/pipeline/reg_045/reg_045.spec
@@ -0,0 +1,62 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2021 Intel Corporation
+
+//
+// Headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Registers.
+//
+regarray REG_ARR_1 size 0x1FFFFFF initval 0
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ jmpneq L1 h.ethernet.src_addr 0x102233445566
+ regprefetch REG_ARR_1 0xa1a2
+ regprefetch REG_ARR_1 0xb1b2
+ regprefetch REG_ARR_1 0xc1
+ regprefetch REG_ARR_1 0xd1
+ regadd REG_ARR_1 0xa1a2 h.ethernet.dst_addr
+ regadd REG_ARR_1 0xb1b2 h.ipv4.src_addr
+ regadd REG_ARR_1 0xc1 h.ipv4.total_len
+ regadd REG_ARR_1 0xd1 h.ipv4.protocol
+ L1 : emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/ring_port_001/pcap_files/in_1.txt b/dep/pipeline/ring_port_001/pcap_files/in_1.txt
new file mode 100644
index 00000000..7a631072
--- /dev/null
+++ b/dep/pipeline/ring_port_001/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 10 22 33 44 55 66 aa bb cc dd 00 00 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/ring_port_001/pcap_files/out_1.txt b/dep/pipeline/ring_port_001/pcap_files/out_1.txt
new file mode 100644
index 00000000..e9709645
--- /dev/null
+++ b/dep/pipeline/ring_port_001/pcap_files/out_1.txt
@@ -0,0 +1,15 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 a0 a1 a2 a3 00 00 b0 b1 b2 b3 00 00 08 00 45 00
+000010 00 60 00 00 00 00 40 11 e8 fa c0 c1 00 00 d0 d1
+000020 00 00 e0 00 12 b5 00 4c 00 00 00 00 00 00 00 00
+000030 00 00 aa bb cc dd 00 00 10 22 33 44 55 66 08 00
+000040 45 00 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a
+000050 c8 00 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00
+000060 50 02 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/ring_port_001/readme.md b/dep/pipeline/ring_port_001/readme.md
new file mode 100644
index 00000000..e5d6c0fa
--- /dev/null
+++ b/dep/pipeline/ring_port_001/readme.md
@@ -0,0 +1,18 @@
+
+Test Case: test_ring_port_001
+-----------------------------
+
+ Feature being tested:
+ ring SWX port
+
+ Description:
+ Use two pipelines, one acting as producer (pipeline 0) and other acting
+ as consumer (pipeline 1). Pipeline 0 will swap the MAC addresses of
+ incoming packet and send the packet to pipeline 1. Pipeline 1 will do
+ vxlan encapsulation of incoming packet based on the configured rules
+ and send it to appropriate port.
+
+ Verification:
+ Send a packet to DUT with MAC addresses swapped so that pipeline 1 will
+ receive packet hitting the configured rule. Pipeline 1 should act
+ appropriately on that packet.
diff --git a/dep/pipeline/ring_port_001/ring_port_001.cli b/dep/pipeline/ring_port_001/ring_port_001.cli
new file mode 100644
index 00000000..7ca51884
--- /dev/null
+++ b/dep/pipeline/ring_port_001/ring_port_001.cli
@@ -0,0 +1,28 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/ring_port_001/ring_port_001_a.spec /tmp/pipeline/ring_port_001/ring_port_001_a.c
+pipeline libbuild /tmp/pipeline/ring_port_001/ring_port_001_a.c /tmp/pipeline/ring_port_001/ring_port_001_a.so
+
+pipeline codegen /tmp/pipeline/ring_port_001/ring_port_001_b.spec /tmp/pipeline/ring_port_001/ring_port_001_b.c
+pipeline libbuild /tmp/pipeline/ring_port_001/ring_port_001_b.c /tmp/pipeline/ring_port_001/ring_port_001_b.so
+
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+ring net_ring0 size 4096 numa 0
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/ring_port_001/ring_port_001_a.so io /tmp/pipeline/ring_port_001/ring_port_001_a.io numa 0
+pipeline PIPELINE1 build lib /tmp/pipeline/ring_port_001/ring_port_001_b.so io /tmp/pipeline/ring_port_001/ring_port_001_b.io numa 0
+pipeline PIPELINE1 table ring_port_001 add /tmp/pipeline/ring_port_001/table.txt
+pipeline PIPELINE1 commit
+
+thread 2 pipeline PIPELINE1 enable
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/ring_port_001/ring_port_001_a.io b/dep/pipeline/ring_port_001/ring_port_001_a.io
new file mode 100644
index 00000000..b5412153
--- /dev/null
+++ b/dep/pipeline/ring_port_001/ring_port_001_a.io
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ring net_ring0 bsz 1
diff --git a/dep/pipeline/ring_port_001/ring_port_001_a.spec b/dep/pipeline/ring_port_001/ring_port_001_a.spec
new file mode 100644
index 00000000..71cafa1f
--- /dev/null
+++ b/dep/pipeline/ring_port_001/ring_port_001_a.spec
@@ -0,0 +1,36 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<48> addr
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ mov m.addr h.ethernet.dst_addr
+ mov h.ethernet.dst_addr h.ethernet.src_addr
+ mov h.ethernet.src_addr m.addr
+ emit h.ethernet
+ tx m.port
+}
diff --git a/dep/pipeline/ring_port_001/ring_port_001_b.io b/dep/pipeline/ring_port_001/ring_port_001_b.io
new file mode 100644
index 00000000..d4435a18
--- /dev/null
+++ b/dep/pipeline/ring_port_001/ring_port_001_b.io
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ring net_ring0 bsz 1
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:05.0 txq 0 bsz 1
diff --git a/dep/pipeline/ring_port_001/ring_port_001_b.spec b/dep/pipeline/ring_port_001/ring_port_001_b.spec
new file mode 100644
index 00000000..89c90d3f
--- /dev/null
+++ b/dep/pipeline/ring_port_001/ring_port_001_b.spec
@@ -0,0 +1,202 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+struct udp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<16> length
+ bit<16> checksum
+}
+
+struct vxlan_h {
+ bit<8> flags
+ bit<24> reserved
+ bit<24> vni
+ bit<8> reserved2
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+header outer_ethernet instanceof ethernet_h
+header outer_ipv4 instanceof ipv4_h
+header outer_udp instanceof udp_h
+header outer_vxlan instanceof vxlan_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port_in
+ bit<32> port_out
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct ring_port_001_args_t {
+ bit<48> ethernet_dst_addr
+ bit<48> ethernet_src_addr
+ bit<16> ethernet_ethertype
+ bit<8> ipv4_ver_ihl
+ bit<8> ipv4_diffserv
+ bit<16> ipv4_total_len
+ bit<16> ipv4_identification
+ bit<16> ipv4_flags_offset
+ bit<8> ipv4_ttl
+ bit<8> ipv4_protocol
+ bit<16> ipv4_hdr_checksum
+ bit<32> ipv4_src_addr
+ bit<32> ipv4_dst_addr
+ bit<16> udp_src_port
+ bit<16> udp_dst_port
+ bit<16> udp_length
+ bit<16> udp_checksum
+ bit<8> vxlan_flags
+ bit<24> vxlan_reserved
+ bit<24> vxlan_vni
+ bit<8> vxlan_reserved2
+ bit<32> port_out
+}
+
+// Input frame:
+// Ethernet (14) | IPv4 (total_len)
+//
+// Output frame:
+// Ethernet (14) | IPv4 (20) | UDP (8) | VXLAN (8) | Input frame | Ethernet FCS (4)
+//
+// Note: The input frame has its FCS removed before encapsulation in the output
+// frame.
+//
+// Assumption: When read from the table, the outer IPv4 and UDP headers contain
+// the following fields:
+// - t.ipv4_total_len: Set to 50, which covers the length of:
+// - The outer IPv4 header (20 bytes);
+// - The outer UDP header (8 bytes);
+// - The outer VXLAN header (8 bytes);
+// - The inner Ethernet header (14 bytes);
+// - t.ipv4_hdr_checksum: Includes the above total length.
+// - t.udp_length: Set to 30, which covers the length of:
+// - The outer UDP header (8 bytes);
+// - The outer VXLAN header (8 bytes);
+// - The inner Ethernet header (14 bytes);
+// - t.udp_checksum: Set to 0.
+//
+// Once the total length of the inner IPv4 packet (h.ipv4.total_len) is known,
+// the outer IPv4 and UDP headers are updated as follows:
+// - h.outer_ipv4.total_len = t.ipv4_total_len + h.ipv4.total_len
+// - h.outer_ipv4.hdr_checksum = t.ipv4_hdr_checksum + h.ipv4.total_len
+// - h.outer_udp.length = t.udp_length + h.ipv4.total_len
+// - h.outer_udp.checksum: No change.
+//
+
+action ring_port_001_action args instanceof ring_port_001_args_t {
+ //Set the outer Ethernet header.
+ validate h.outer_ethernet
+ mov h.outer_ethernet.dst_addr t.ethernet_dst_addr
+ mov h.outer_ethernet.src_addr t.ethernet_src_addr
+ mov h.outer_ethernet.ethertype t.ethernet_ethertype
+
+ //Set the outer IPv4 header.
+ validate h.outer_ipv4
+ mov h.outer_ipv4.ver_ihl t.ipv4_ver_ihl
+ mov h.outer_ipv4.diffserv t.ipv4_diffserv
+ mov h.outer_ipv4.total_len t.ipv4_total_len
+ mov h.outer_ipv4.identification t.ipv4_identification
+ mov h.outer_ipv4.flags_offset t.ipv4_flags_offset
+ mov h.outer_ipv4.ttl t.ipv4_ttl
+ mov h.outer_ipv4.protocol t.ipv4_protocol
+ mov h.outer_ipv4.hdr_checksum t.ipv4_hdr_checksum
+ mov h.outer_ipv4.src_addr t.ipv4_src_addr
+ mov h.outer_ipv4.dst_addr t.ipv4_dst_addr
+
+ //Set the outer UDP header.
+ validate h.outer_udp
+ mov h.outer_udp.src_port t.udp_src_port
+ mov h.outer_udp.dst_port t.udp_dst_port
+ mov h.outer_udp.length t.udp_length
+ mov h.outer_udp.checksum t.udp_checksum
+
+ //Set the outer VXLAN header.
+ validate h.outer_vxlan
+ mov h.outer_vxlan.flags t.vxlan_flags
+ mov h.outer_vxlan.reserved t.vxlan_reserved
+ mov h.outer_vxlan.vni t.vxlan_vni
+ mov h.outer_vxlan.reserved2 t.vxlan_reserved2
+
+ //Set the output port.
+ mov m.port_out t.port_out
+
+ // Update h.outer_ipv4.total_len field.
+ add h.outer_ipv4.total_len h.ipv4.total_len
+
+ // Update h.outer_ipv4.hdr_checksum field.
+ ckadd h.outer_ipv4.hdr_checksum h.ipv4.total_len
+
+ // Update h.outer_udp.length field.
+ add h.outer_udp.length h.ipv4.total_len
+
+ return
+}
+
+action drop args none {
+ mov m.port_out 1
+ tx m.port_out
+}
+
+//
+// Tables.
+//
+table ring_port_001 {
+ key {
+ h.ethernet.dst_addr exact
+ }
+
+ actions {
+ ring_port_001_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port_in
+ extract h.ethernet
+ extract h.ipv4
+ table ring_port_001
+ emit h.outer_ethernet
+ emit h.outer_ipv4
+ emit h.outer_udp
+ emit h.outer_vxlan
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port_out
+}
diff --git a/dep/pipeline/ring_port_001/table.txt b/dep/pipeline/ring_port_001/table.txt
new file mode 100644
index 00000000..f509161d
--- /dev/null
+++ b/dep/pipeline/ring_port_001/table.txt
@@ -0,0 +1 @@
+match 0xaabbccdd0000 action ring_port_001_action ethernet_dst_addr 0xa0a1a2a30000 ethernet_src_addr 0xb0b1b2b30000 ethernet_ethertype 0x0800 ipv4_ver_ihl 0x45 ipv4_diffserv 0x0 ipv4_total_len 50 ipv4_identification 0x0 ipv4_flags_offset 0 ipv4_ttl 64 ipv4_protocol 17 ipv4_hdr_checksum 0xe928 ipv4_src_addr 0xc0c10000 ipv4_dst_addr 0xd0d10000 udp_src_port 0xe000 udp_dst_port 4789 udp_length 30 udp_checksum 0 vxlan_flags 0 vxlan_reserved 0 vxlan_vni 0 vxlan_reserved2 0 port_out 0
diff --git a/dep/pipeline/ring_port_002/pcap_files/in_1.txt b/dep/pipeline/ring_port_002/pcap_files/in_1.txt
new file mode 100644
index 00000000..7a631072
--- /dev/null
+++ b/dep/pipeline/ring_port_002/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 10 22 33 44 55 66 aa bb cc dd 00 00 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/ring_port_002/pcap_files/out_1.txt b/dep/pipeline/ring_port_002/pcap_files/out_1.txt
new file mode 100644
index 00000000..ed272ccc
--- /dev/null
+++ b/dep/pipeline/ring_port_002/pcap_files/out_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 10 22 33 44 55 66 aa bb cc dd 00 00 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/ring_port_002/readme.md b/dep/pipeline/ring_port_002/readme.md
new file mode 100644
index 00000000..4597aa13
--- /dev/null
+++ b/dep/pipeline/ring_port_002/readme.md
@@ -0,0 +1,16 @@
+
+Test Case: test_ring_port_002
+-----------------------------
+
+ Feature being tested:
+ ring SWX port
+
+ Description:
+ Use two pipelines, one acting as producer (pipeline 0) and other acting
+ as consumer (pipeline 1). Pipeline 0 will swap the MAC addresses of
+ incoming packet and send the packet to pipeline 1. Pipeline 1 will send
+ the packet to the link port.
+
+ Verification:
+ Received packet will have swapped mac addresses and received on the same
+ port.
diff --git a/dep/pipeline/ring_port_002/ring_port_002.cli b/dep/pipeline/ring_port_002/ring_port_002.cli
new file mode 100644
index 00000000..20c3c1e6
--- /dev/null
+++ b/dep/pipeline/ring_port_002/ring_port_002.cli
@@ -0,0 +1,24 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/ring_port_002/ring_port_002_a.spec /tmp/pipeline/ring_port_002/ring_port_002_a.c
+pipeline libbuild /tmp/pipeline/ring_port_002/ring_port_002_a.c /tmp/pipeline/ring_port_002/ring_port_002_a.so
+
+pipeline codegen /tmp/pipeline/ring_port_002/ring_port_002_b.spec /tmp/pipeline/ring_port_002/ring_port_002_b.c
+pipeline libbuild /tmp/pipeline/ring_port_002/ring_port_002_b.c /tmp/pipeline/ring_port_002/ring_port_002_b.so
+
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+ring RING0 size 32 numa 0
+
+pipeline PIPELINE0 build lib /tmp/pipeline/ring_port_002/ring_port_002_a.so io /tmp/pipeline/ring_port_002/ring_port_002_a.io numa 0
+pipeline PIPELINE1 build lib /tmp/pipeline/ring_port_002/ring_port_002_b.so io /tmp/pipeline/ring_port_002/ring_port_002_b.io numa 0
+
+thread 2 pipeline PIPELINE1 enable
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/ring_port_002/ring_port_002_a.io b/dep/pipeline/ring_port_002/ring_port_002_a.io
new file mode 100644
index 00000000..a4d53860
--- /dev/null
+++ b/dep/pipeline/ring_port_002/ring_port_002_a.io
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ring RING0 bsz 1
diff --git a/dep/pipeline/ring_port_002/ring_port_002_a.spec b/dep/pipeline/ring_port_002/ring_port_002_a.spec
new file mode 100644
index 00000000..71cafa1f
--- /dev/null
+++ b/dep/pipeline/ring_port_002/ring_port_002_a.spec
@@ -0,0 +1,36 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<48> addr
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ mov m.addr h.ethernet.dst_addr
+ mov h.ethernet.dst_addr h.ethernet.src_addr
+ mov h.ethernet.src_addr m.addr
+ emit h.ethernet
+ tx m.port
+}
diff --git a/dep/pipeline/ring_port_002/ring_port_002_b.io b/dep/pipeline/ring_port_002/ring_port_002_b.io
new file mode 100644
index 00000000..0004433a
--- /dev/null
+++ b/dep/pipeline/ring_port_002/ring_port_002_b.io
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ring RING0 bsz 1
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
diff --git a/dep/pipeline/ring_port_002/ring_port_002_b.spec b/dep/pipeline/ring_port_002/ring_port_002_b.spec
new file mode 100644
index 00000000..13a976cf
--- /dev/null
+++ b/dep/pipeline/ring_port_002/ring_port_002_b.spec
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port_in
+ bit<32> port_out
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port_in
+ tx m.port_in
+}
diff --git a/dep/pipeline/rx_tx_001/ethdev.io b/dep/pipeline/rx_tx_001/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/rx_tx_001/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/rx_tx_001/pcap_files/in_1.txt b/dep/pipeline/rx_tx_001/pcap_files/in_1.txt
new file mode 100644
index 00000000..75115c15
--- /dev/null
+++ b/dep/pipeline/rx_tx_001/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/rx_tx_001/pcap_files/out_1.txt b/dep/pipeline/rx_tx_001/pcap_files/out_1.txt
new file mode 100644
index 00000000..75115c15
--- /dev/null
+++ b/dep/pipeline/rx_tx_001/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/rx_tx_001/readme.md b/dep/pipeline/rx_tx_001/readme.md
new file mode 100644
index 00000000..0317e16b
--- /dev/null
+++ b/dep/pipeline/rx_tx_001/readme.md
@@ -0,0 +1,12 @@
+Test Case: test_rx_tx_001
+-------------------------
+
+ Instructions being tested:
+ rx m.field
+ tx m.field
+
+ Description:
+ For the received packet, without modifying it, transmit the packet back on the same port.
+
+ Verification:
+ The transmitted packet should be same as that of the received packet.
diff --git a/dep/pipeline/rx_tx_001/rx_tx_001.cli b/dep/pipeline/rx_tx_001/rx_tx_001.cli
new file mode 100755
index 00000000..051f5d0a
--- /dev/null
+++ b/dep/pipeline/rx_tx_001/rx_tx_001.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/rx_tx_001/rx_tx_001.spec /tmp/pipeline/rx_tx_001/rx_tx_001.c
+pipeline libbuild /tmp/pipeline/rx_tx_001/rx_tx_001.c /tmp/pipeline/rx_tx_001/rx_tx_001.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/rx_tx_001/rx_tx_001.so io /tmp/pipeline/rx_tx_001/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/rx_tx_001/rx_tx_001.spec b/dep/pipeline/rx_tx_001/rx_tx_001.spec
new file mode 100755
index 00000000..c365ce41
--- /dev/null
+++ b/dep/pipeline/rx_tx_001/rx_tx_001.spec
@@ -0,0 +1,19 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ tx m.port
+}
diff --git a/dep/pipeline/selector_001/cmd_files/cmd_3.txt b/dep/pipeline/selector_001/cmd_files/cmd_3.txt
new file mode 100644
index 00000000..ae5fe1e2
--- /dev/null
+++ b/dep/pipeline/selector_001/cmd_files/cmd_3.txt
@@ -0,0 +1 @@
+group 0 member 1 weight 1
diff --git a/dep/pipeline/selector_001/cmd_files/cmd_4.txt b/dep/pipeline/selector_001/cmd_files/cmd_4.txt
new file mode 100644
index 00000000..852b7e60
--- /dev/null
+++ b/dep/pipeline/selector_001/cmd_files/cmd_4.txt
@@ -0,0 +1 @@
+group 0 member 0 weight 1
diff --git a/dep/pipeline/selector_001/cmd_files/cmd_5.txt b/dep/pipeline/selector_001/cmd_files/cmd_5.txt
new file mode 100644
index 00000000..fd245e5c
--- /dev/null
+++ b/dep/pipeline/selector_001/cmd_files/cmd_5.txt
@@ -0,0 +1 @@
+group 0 member 2 weight 2
diff --git a/dep/pipeline/selector_001/cmd_files/cmd_6.txt b/dep/pipeline/selector_001/cmd_files/cmd_6.txt
new file mode 100644
index 00000000..d033d0c3
--- /dev/null
+++ b/dep/pipeline/selector_001/cmd_files/cmd_6.txt
@@ -0,0 +1,4 @@
+group 1 member 0 weight 1
+group 1 member 1 weight 1
+group 1 member 2 weight 2
+group 1 member 3 weight 4
diff --git a/dep/pipeline/selector_001/cmd_files/cmd_8.txt b/dep/pipeline/selector_001/cmd_files/cmd_8.txt
new file mode 100644
index 00000000..c4176f57
--- /dev/null
+++ b/dep/pipeline/selector_001/cmd_files/cmd_8.txt
@@ -0,0 +1 @@
+group 1 member 3
diff --git a/dep/pipeline/selector_001/ethdev.io b/dep/pipeline/selector_001/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/selector_001/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/selector_001/pcap_files/in_1.txt b/dep/pipeline/selector_001/pcap_files/in_1.txt
new file mode 100644
index 00000000..5426bdcc
--- /dev/null
+++ b/dep/pipeline/selector_001/pcap_files/in_1.txt
@@ -0,0 +1,47 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb 00 00 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 c8 00 00 0a 64 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb 00 00 00 01 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 c8 00 00 0a 64 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb 00 00 00 02 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 c8 00 00 0a 64 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 3
+000000 aa bb 00 00 00 03 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 c8 00 00 0a 64 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 4
+000000 aa bb 00 00 00 04 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 c8 00 00 0a 64 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 5
+000000 aa bb 00 00 00 05 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 c8 00 00 0a 64 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 6
+000000 aa bb 00 00 00 06 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 c8 00 00 0a 64 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 7
+000000 aa bb 00 00 00 07 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 c8 00 00 0a 64 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/selector_001/pcap_files/in_2.txt b/dep/pipeline/selector_001/pcap_files/in_2.txt
new file mode 100644
index 00000000..8a17cb6c
--- /dev/null
+++ b/dep/pipeline/selector_001/pcap_files/in_2.txt
@@ -0,0 +1,47 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb 00 00 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 c8 ab cd 0a 64 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb 00 00 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 c8 ef 98 0a 64 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb 00 00 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 e8 00 00 0a 56 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 3
+000000 aa bb 00 00 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 12 98 65 0a 98 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 4
+000000 aa bb 00 00 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 65 23 ab fe 43 41
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 5
+000000 aa bb 00 00 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 67 ff cd de fd 54
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 6
+000000 aa bb 00 00 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 23 32 01 ba 46 89
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 7
+000000 aa bb 00 00 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 87 12 32 65 69 12
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/selector_001/pcap_files/in_3.txt b/dep/pipeline/selector_001/pcap_files/in_3.txt
new file mode 100644
index 00000000..61ae5e7d
--- /dev/null
+++ b/dep/pipeline/selector_001/pcap_files/in_3.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb 00 00 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 c8 00 00 0a 64 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/selector_001/pcap_files/in_4.txt b/dep/pipeline/selector_001/pcap_files/in_4.txt
new file mode 100644
index 00000000..e9e9553a
--- /dev/null
+++ b/dep/pipeline/selector_001/pcap_files/in_4.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb 00 00 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 35 33 96 00 4b 8c 64 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 40 11 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb 00 00 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 67 33 64 00 4b 8c 64 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 72 11 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/selector_001/pcap_files/in_5.txt b/dep/pipeline/selector_001/pcap_files/in_5.txt
new file mode 100644
index 00000000..088ff87c
--- /dev/null
+++ b/dep/pipeline/selector_001/pcap_files/in_5.txt
@@ -0,0 +1,22 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb 00 00 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 da 33 4b 00 4b 8c 0a 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 e5 11 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb 00 00 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 67 33 64 00 4b 8c 64 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 72 11 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb 00 00 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 35 33 96 00 4b 8c 64 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 40 11 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/selector_001/pcap_files/in_6.txt b/dep/pipeline/selector_001/pcap_files/in_6.txt
new file mode 100644
index 00000000..368ff74e
--- /dev/null
+++ b/dep/pipeline/selector_001/pcap_files/in_6.txt
@@ -0,0 +1,27 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb 00 00 00 01 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 18 c8 00 00 33 64 4b
+000020 00 33 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 58 f6 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb 00 00 00 01 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 63 c8 00 00 33 64 00
+000020 00 33 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 41 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb 00 00 00 01 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 78 ca 01 00 00 00 01 00
+000020 00 00 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 83 a8 00 00 58 58 58 58 58 58
+# Packet 3
+000000 aa bb 00 00 00 01 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 1c 18 fa 00 00 33 64 4b
+000020 00 33 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 26 f6 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/selector_001/pcap_files/in_7.txt b/dep/pipeline/selector_001/pcap_files/in_7.txt
new file mode 100644
index 00000000..d5d746a6
--- /dev/null
+++ b/dep/pipeline/selector_001/pcap_files/in_7.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb 00 00 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 35 33 96 00 4b 8c 64 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 40 11 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/selector_001/pcap_files/in_8.txt b/dep/pipeline/selector_001/pcap_files/in_8.txt
new file mode 100644
index 00000000..9dd009c0
--- /dev/null
+++ b/dep/pipeline/selector_001/pcap_files/in_8.txt
@@ -0,0 +1,22 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb 00 00 00 01 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 18 c8 00 00 33 64 4b
+000020 00 33 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 58 f6 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb 00 00 00 01 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 78 ca 01 00 00 00 01 00
+000020 00 00 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 83 a8 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb 00 00 00 01 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 1c 18 fa 00 00 33 64 4b
+000020 00 33 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 26 f6 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/selector_001/pcap_files/out_1.txt b/dep/pipeline/selector_001/pcap_files/out_1.txt
new file mode 100644
index 00000000..5426bdcc
--- /dev/null
+++ b/dep/pipeline/selector_001/pcap_files/out_1.txt
@@ -0,0 +1,47 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb 00 00 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 c8 00 00 0a 64 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb 00 00 00 01 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 c8 00 00 0a 64 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb 00 00 00 02 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 c8 00 00 0a 64 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 3
+000000 aa bb 00 00 00 03 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 c8 00 00 0a 64 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 4
+000000 aa bb 00 00 00 04 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 c8 00 00 0a 64 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 5
+000000 aa bb 00 00 00 05 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 c8 00 00 0a 64 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 6
+000000 aa bb 00 00 00 06 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 c8 00 00 0a 64 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 7
+000000 aa bb 00 00 00 07 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 c8 00 00 0a 64 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/selector_001/pcap_files/out_2.txt b/dep/pipeline/selector_001/pcap_files/out_2.txt
new file mode 100644
index 00000000..8a17cb6c
--- /dev/null
+++ b/dep/pipeline/selector_001/pcap_files/out_2.txt
@@ -0,0 +1,47 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb 00 00 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 c8 ab cd 0a 64 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb 00 00 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 c8 ef 98 0a 64 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb 00 00 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 e8 00 00 0a 56 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 3
+000000 aa bb 00 00 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 12 98 65 0a 98 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 4
+000000 aa bb 00 00 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 65 23 ab fe 43 41
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 5
+000000 aa bb 00 00 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 67 ff cd de fd 54
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 6
+000000 aa bb 00 00 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 23 32 01 ba 46 89
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 7
+000000 aa bb 00 00 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 87 12 32 65 69 12
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/selector_001/pcap_files/out_3.txt b/dep/pipeline/selector_001/pcap_files/out_3.txt
new file mode 100644
index 00000000..61ae5e7d
--- /dev/null
+++ b/dep/pipeline/selector_001/pcap_files/out_3.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb 00 00 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 c8 00 00 0a 64 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/selector_001/pcap_files/out_41.txt b/dep/pipeline/selector_001/pcap_files/out_41.txt
new file mode 100644
index 00000000..d5d746a6
--- /dev/null
+++ b/dep/pipeline/selector_001/pcap_files/out_41.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb 00 00 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 35 33 96 00 4b 8c 64 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 40 11 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/selector_001/pcap_files/out_42.txt b/dep/pipeline/selector_001/pcap_files/out_42.txt
new file mode 100644
index 00000000..f99c614d
--- /dev/null
+++ b/dep/pipeline/selector_001/pcap_files/out_42.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb 00 00 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 67 33 64 00 4b 8c 64 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 72 11 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/selector_001/pcap_files/out_51.txt b/dep/pipeline/selector_001/pcap_files/out_51.txt
new file mode 100644
index 00000000..1504a84d
--- /dev/null
+++ b/dep/pipeline/selector_001/pcap_files/out_51.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb 00 00 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 da 33 4b 00 4b 8c 0a 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 e5 11 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/selector_001/pcap_files/out_52.txt b/dep/pipeline/selector_001/pcap_files/out_52.txt
new file mode 100644
index 00000000..f99c614d
--- /dev/null
+++ b/dep/pipeline/selector_001/pcap_files/out_52.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb 00 00 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 67 33 64 00 4b 8c 64 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 72 11 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/selector_001/pcap_files/out_53.txt b/dep/pipeline/selector_001/pcap_files/out_53.txt
new file mode 100644
index 00000000..d5d746a6
--- /dev/null
+++ b/dep/pipeline/selector_001/pcap_files/out_53.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb 00 00 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 35 33 96 00 4b 8c 64 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 40 11 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/selector_001/pcap_files/out_61.txt b/dep/pipeline/selector_001/pcap_files/out_61.txt
new file mode 100644
index 00000000..b37164ca
--- /dev/null
+++ b/dep/pipeline/selector_001/pcap_files/out_61.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb 00 00 00 01 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 18 c8 00 00 33 64 4b
+000020 00 33 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 58 f6 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/selector_001/pcap_files/out_62.txt b/dep/pipeline/selector_001/pcap_files/out_62.txt
new file mode 100644
index 00000000..64a88eb0
--- /dev/null
+++ b/dep/pipeline/selector_001/pcap_files/out_62.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb 00 00 00 01 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 63 c8 00 00 33 64 00
+000020 00 33 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 41 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/selector_001/pcap_files/out_63.txt b/dep/pipeline/selector_001/pcap_files/out_63.txt
new file mode 100644
index 00000000..1edcc789
--- /dev/null
+++ b/dep/pipeline/selector_001/pcap_files/out_63.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb 00 00 00 01 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 78 ca 01 00 00 00 01 00
+000020 00 00 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 83 a8 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/selector_001/pcap_files/out_64.txt b/dep/pipeline/selector_001/pcap_files/out_64.txt
new file mode 100644
index 00000000..6702fbce
--- /dev/null
+++ b/dep/pipeline/selector_001/pcap_files/out_64.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb 00 00 00 01 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 1c 18 fa 00 00 33 64 4b
+000020 00 33 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 26 f6 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/selector_001/pcap_files/out_7.txt b/dep/pipeline/selector_001/pcap_files/out_7.txt
new file mode 100644
index 00000000..d5d746a6
--- /dev/null
+++ b/dep/pipeline/selector_001/pcap_files/out_7.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb 00 00 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 35 33 96 00 4b 8c 64 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 40 11 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/selector_001/pcap_files/out_81.txt b/dep/pipeline/selector_001/pcap_files/out_81.txt
new file mode 100644
index 00000000..b37164ca
--- /dev/null
+++ b/dep/pipeline/selector_001/pcap_files/out_81.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb 00 00 00 01 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e 18 c8 00 00 33 64 4b
+000020 00 33 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 58 f6 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/selector_001/pcap_files/out_82.txt b/dep/pipeline/selector_001/pcap_files/out_82.txt
new file mode 100644
index 00000000..1edcc789
--- /dev/null
+++ b/dep/pipeline/selector_001/pcap_files/out_82.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb 00 00 00 01 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 78 ca 01 00 00 00 01 00
+000020 00 00 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 83 a8 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/selector_001/pcap_files/out_83.txt b/dep/pipeline/selector_001/pcap_files/out_83.txt
new file mode 100644
index 00000000..6702fbce
--- /dev/null
+++ b/dep/pipeline/selector_001/pcap_files/out_83.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb 00 00 00 01 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 1c 18 fa 00 00 33 64 4b
+000020 00 33 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 26 f6 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/selector_001/readme.md b/dep/pipeline/selector_001/readme.md
new file mode 100644
index 00000000..af4ef50b
--- /dev/null
+++ b/dep/pipeline/selector_001/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_selector_002
+----------------------------
+
+ Description:
+
+ In this simple example, the base table and the member table are striped out in order to focus
+ exclusively on illustrating the selector table. The group_id is read from the destination MAC
+ address and the selector n-tuple is represented by the Protocol, the source IP address and the
+ destination IP address fields. The member_id produced by the selector table is used to identify
+ the output port which facilitates the testing of different member weights by simply comparing the
+ rates of output packets sent on different ports.
diff --git a/dep/pipeline/selector_001/selector_001.cli b/dep/pipeline/selector_001/selector_001.cli
new file mode 100644
index 00000000..87a566a3
--- /dev/null
+++ b/dep/pipeline/selector_001/selector_001.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/selector_001/selector_001.spec /tmp/pipeline/selector_001/selector_001.c
+pipeline libbuild /tmp/pipeline/selector_001/selector_001.c /tmp/pipeline/selector_001/selector_001.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/selector_001/selector_001.so io /tmp/pipeline/selector_001/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/selector_001/selector_001.spec b/dep/pipeline/selector_001/selector_001.spec
new file mode 100644
index 00000000..22a9eaf4
--- /dev/null
+++ b/dep/pipeline/selector_001/selector_001.spec
@@ -0,0 +1,70 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port_in
+ bit<32> port_out
+ bit<32> group_id
+}
+
+metadata instanceof metadata_t
+
+//
+// Tables
+//
+selector selector_001 {
+ group_id m.group_id
+
+ selector {
+ h.ipv4.protocol
+ h.ipv4.src_addr
+ h.ipv4.dst_addr
+ }
+
+ member_id m.port_out
+
+ n_groups_max 2
+ n_members_per_group_max 8
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port_in
+ extract h.ethernet
+ extract h.ipv4
+ mov m.group_id h.ethernet.dst_addr
+ table selector_001
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port_out
+}
diff --git a/dep/pipeline/selector_002/cmd_files/cmd_1.txt b/dep/pipeline/selector_002/cmd_files/cmd_1.txt
new file mode 100644
index 00000000..a5938b8a
--- /dev/null
+++ b/dep/pipeline/selector_002/cmd_files/cmd_1.txt
@@ -0,0 +1,27 @@
+// VRF #0
+match 0 0x00000000/0xC0000000 action selector_002_action_01 nexthop_group_id 0
+match 0 0x40000000/0xC0000000 action selector_002_action_01 nexthop_group_id 1
+match 0 0x80000000/0xC0000000 action selector_002_action_01 nexthop_group_id 2
+match 0 0xC0000000/0xC0000000 action selector_002_action_01 nexthop_group_id 3
+
+// VRF #1
+match 1 0x00000000/0xC0000000 action selector_002_action_01 nexthop_group_id 4
+match 1 0x40000000/0xC0000000 action selector_002_action_01 nexthop_group_id 5
+match 1 0x80000000/0xC0000000 action selector_002_action_01 nexthop_group_id 6
+match 1 0xC0000000/0xC0000000 action selector_002_action_01 nexthop_group_id 7
+
+// VRF #2
+match 2 0x00000000/0xC0000000 action selector_002_action_01 nexthop_group_id 8
+match 2 0x40000000/0xC0000000 action selector_002_action_01 nexthop_group_id 9
+match 2 0x80000000/0xC0000000 action selector_002_action_01 nexthop_group_id 10
+match 2 0xC0000000/0xC0000000 action selector_002_action_01 nexthop_group_id 11
+
+// VRF #3
+match 3 0x00000000/0x00000000 action selector_002_action_01 nexthop_group_id 4
+match 3 0x80000000/0x80000000 action selector_002_action_01 nexthop_group_id 5
+match 3 0xC0000000/0xC0000000 action selector_002_action_01 nexthop_group_id 6
+
+// VRF #4
+match 4 0x00000000/0x00000000 action selector_002_action_01 nexthop_group_id 8
+match 4 0x80000000/0x80000000 action selector_002_action_01 nexthop_group_id 9
+match 4 0xC0000000/0xC0000000 action selector_002_action_01 nexthop_group_id 10
diff --git a/dep/pipeline/selector_002/cmd_files/cmd_2.txt b/dep/pipeline/selector_002/cmd_files/cmd_2.txt
new file mode 100644
index 00000000..e5c1344d
--- /dev/null
+++ b/dep/pipeline/selector_002/cmd_files/cmd_2.txt
@@ -0,0 +1,51 @@
+// Nexthop group #0 (Single member)
+group 0 member 0 weight 1
+
+// Nexthop group #1 (Single member)
+group 1 member 1 weight 1
+
+// Nexthop group #2 (Single member)
+group 2 member 2 weight 1
+
+// Nexthop group #3 (Single member)
+group 3 member 3 weight 1
+
+// Nexthop group #4 (ECMP)
+group 4 member 4 weight 1
+group 4 member 5 weight 1
+
+// Nexthop group #5 (ECMP)
+group 5 member 5 weight 1
+group 5 member 6 weight 1
+
+// Nexthop group #6 (ECMP)
+group 6 member 6 weight 1
+group 6 member 7 weight 1
+
+// Nexthop group #7 (ECMP)
+group 7 member 7 weight 1
+group 7 member 4 weight 1
+
+// Nexthop group #8 (WCMP)
+group 8 member 8 weight 4
+group 8 member 9 weight 2
+group 8 member 10 weight 1
+group 8 member 11 weight 1
+
+// Nexthop group #9 (WCMP)
+group 9 member 9 weight 4
+group 9 member 10 weight 2
+group 9 member 11 weight 1
+group 9 member 8 weight 1
+
+// Nexthop group #10 (WCMP)
+group 10 member 10 weight 4
+group 10 member 11 weight 2
+group 10 member 8 weight 1
+group 10 member 9 weight 1
+
+// Nexthop group #11 (WCMP)
+group 11 member 11 weight 4
+group 11 member 8 weight 2
+group 11 member 9 weight 1
+group 11 member 10 weight 1
diff --git a/dep/pipeline/selector_002/cmd_files/cmd_3.txt b/dep/pipeline/selector_002/cmd_files/cmd_3.txt
new file mode 100644
index 00000000..2bdb2fcc
--- /dev/null
+++ b/dep/pipeline/selector_002/cmd_files/cmd_3.txt
@@ -0,0 +1,14 @@
+match 0 action selector_002_action_02 ethernet_dst_addr 0xaabbcc000000 ethernet_src_addr 0xddeeff000000 ethernet_ethertype 0x0800 port_out 0
+match 1 action selector_002_action_02 ethernet_dst_addr 0xaabbcc000001 ethernet_src_addr 0xddeeff000001 ethernet_ethertype 0x0800 port_out 1
+match 2 action selector_002_action_02 ethernet_dst_addr 0xaabbcc000002 ethernet_src_addr 0xddeeff000002 ethernet_ethertype 0x0800 port_out 2
+match 3 action selector_002_action_02 ethernet_dst_addr 0xaabbcc000003 ethernet_src_addr 0xddeeff000003 ethernet_ethertype 0x0800 port_out 3
+
+match 4 action selector_002_action_02 ethernet_dst_addr 0xaabbcc000004 ethernet_src_addr 0xddeeff000004 ethernet_ethertype 0x0800 port_out 0
+match 5 action selector_002_action_02 ethernet_dst_addr 0xaabbcc000005 ethernet_src_addr 0xddeeff000005 ethernet_ethertype 0x0800 port_out 1
+match 6 action selector_002_action_02 ethernet_dst_addr 0xaabbcc000006 ethernet_src_addr 0xddeeff000006 ethernet_ethertype 0x0800 port_out 2
+match 7 action selector_002_action_02 ethernet_dst_addr 0xaabbcc000007 ethernet_src_addr 0xddeeff000007 ethernet_ethertype 0x0800 port_out 3
+
+match 8 action selector_002_action_02 ethernet_dst_addr 0xaabbcc000008 ethernet_src_addr 0xddeeff000008 ethernet_ethertype 0x0800 port_out 0
+match 9 action selector_002_action_02 ethernet_dst_addr 0xaabbcc000009 ethernet_src_addr 0xddeeff000009 ethernet_ethertype 0x0800 port_out 1
+match 10 action selector_002_action_02 ethernet_dst_addr 0xaabbcc00000a ethernet_src_addr 0xddeeff00000a ethernet_ethertype 0x0800 port_out 2
+match 11 action selector_002_action_02 ethernet_dst_addr 0xaabbcc00000b ethernet_src_addr 0xddeeff00000b ethernet_ethertype 0x0800 port_out 3
diff --git a/dep/pipeline/selector_002/ethdev.io b/dep/pipeline/selector_002/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/selector_002/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/selector_002/pcap_files/in_1.txt b/dep/pipeline/selector_002/pcap_files/in_1.txt
new file mode 100644
index 00000000..e107eaf3
--- /dev/null
+++ b/dep/pipeline/selector_002/pcap_files/in_1.txt
@@ -0,0 +1,153 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# ----------------------VRF ID = 0--------------------------------------------#
+# Packet 0
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 48 c0 00 00 00 00 32 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 53 9e 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 16 c0 00 00 00 00 64 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 21 9e 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 e4 bf 00 00 00 00 96 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 ef 9d 00 00 58 58 58 58 58 58
+# Packet 3
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 b2 bf 00 00 00 00 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 bd 9d 00 00 58 58 58 58 58 58
+# ----------------------------------------------------------------------------#
+# ----------------------VRF ID = 1--------------------------------------------#
+# Packet 0
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 47 c5 00 00 00 01 32 fa
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 52 a3 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 48 bf 00 00 00 01 32 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 53 9d 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 15 c5 00 00 00 01 64 fa
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 20 a3 00 00 58 58 58 58 58 58
+# Packet 3
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 16 bf 00 00 00 01 64 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 21 9d 00 00 58 58 58 58 58 58
+# Packet 4
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 e4 be 00 00 00 01 96 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 ef 9c 00 00 58 58 58 58 58 58
+# Packet 5
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 e3 c4 00 00 00 01 96 fa
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 ee a2 00 00 58 58 58 58 58 58
+# Packet 6
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 b2 be 00 00 00 01 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 bd 9c 00 00 58 58 58 58 58 58
+# Packet 7
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 b1 c4 00 00 00 01 c8 fa
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 bc a2 00 00 58 58 58 58 58 58
+# ----------------------------------------------------------------------------#
+# ----------------------VRF ID = 2--------------------------------------------#
+# Packet 0
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 7a c4 00 00 00 02 00 00
+000020 00 04 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 85 a2 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 7a c6 00 00 00 02 00 00
+000020 00 02 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 85 a4 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 7a b3 00 00 00 02 00 00
+000020 00 15 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 85 91 00 00 58 58 58 58 58 58
+# Packet 3
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 7a c7 00 00 00 02 00 00
+000020 00 01 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 85 a5 00 00 58 58 58 58 58 58
+# Packet 4
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 16 c4 00 00 00 02 64 00
+000020 00 04 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 21 a2 00 00 58 58 58 58 58 58
+# Packet 5
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 16 c6 00 00 00 02 64 00
+000020 00 02 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 21 a4 00 00 58 58 58 58 58 58
+# Packet 6
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 16 c7 00 00 00 02 64 00
+000020 00 01 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 21 a5 00 00 58 58 58 58 58 58
+# Packet 7
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 16 b3 00 00 00 02 64 00
+000020 00 15 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 21 91 00 00 58 58 58 58 58 58
+# Packet 8
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 fa c3 00 00 00 02 80 00
+000020 00 04 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 05 a2 00 00 58 58 58 58 58 58
+# Packet 9
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 fa c6 00 00 00 02 80 00
+000020 00 01 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 05 a5 00 00 58 58 58 58 58 58
+# Packet 10
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 fa b3 00 00 00 02 80 00
+000020 00 14 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 05 92 00 00 58 58 58 58 58 58
+# Packet 11
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 fa c5 00 00 00 02 80 00
+000020 00 02 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 05 a4 00 00 58 58 58 58 58 58
+# Packet 12
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 ba c6 00 00 00 02 c0 00
+000020 00 01 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 c5 a4 00 00 58 58 58 58 58 58
+# Packet 13
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 ba c3 00 00 00 02 c0 00
+000020 00 04 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 c5 a1 00 00 58 58 58 58 58 58
+# Packet 14
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 ba b6 00 00 00 02 c0 00
+000020 00 11 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 c5 94 00 00 58 58 58 58 58 58
+# Packet 15
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 ba c2 00 00 00 02 c0 00
+000020 00 05 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 c5 a0 00 00 58 58 58 58 58 58
+# ----------------------------------------------------------------------------#
diff --git a/dep/pipeline/selector_002/pcap_files/out_1.txt b/dep/pipeline/selector_002/pcap_files/out_1.txt
new file mode 100644
index 00000000..a39038d5
--- /dev/null
+++ b/dep/pipeline/selector_002/pcap_files/out_1.txt
@@ -0,0 +1,42 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc 00 00 00 dd ee ff 00 00 00 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 49 c0 00 00 00 00 32 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 53 9e 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc 00 00 04 dd ee ff 00 00 04 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 48 c5 00 00 00 01 32 fa
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 52 a3 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc 00 00 04 dd ee ff 00 00 04 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 b2 c4 00 00 00 01 c8 fa
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 bc a2 00 00 58 58 58 58 58 58
+# Packet 3
+000000 aa bb cc 00 00 08 dd ee ff 00 00 08 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 7b c4 00 00 00 02 00 00
+000020 00 04 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 85 a2 00 00 58 58 58 58 58 58
+# Packet 4
+000000 aa bb cc 00 00 08 dd ee ff 00 00 08 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 17 b3 00 00 00 02 64 00
+000020 00 15 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 21 91 00 00 58 58 58 58 58 58
+# Packet 5
+000000 aa bb cc 00 00 08 dd ee ff 00 00 08 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 fb b3 00 00 00 02 80 00
+000020 00 14 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 05 92 00 00 58 58 58 58 58 58
+# Packet 6
+000000 aa bb cc 00 00 08 dd ee ff 00 00 08 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 bb c3 00 00 00 02 c0 00
+000020 00 04 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 c5 a1 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/selector_002/pcap_files/out_2.txt b/dep/pipeline/selector_002/pcap_files/out_2.txt
new file mode 100644
index 00000000..83eb34cc
--- /dev/null
+++ b/dep/pipeline/selector_002/pcap_files/out_2.txt
@@ -0,0 +1,42 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc 00 00 01 dd ee ff 00 00 01 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 17 c0 00 00 00 00 64 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 21 9e 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc 00 00 05 dd ee ff 00 00 05 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 49 bf 00 00 00 01 32 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 53 9d 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc 00 00 05 dd ee ff 00 00 05 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 16 c5 00 00 00 01 64 fa
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 20 a3 00 00 58 58 58 58 58 58
+# Packet 3
+000000 aa bb cc 00 00 09 dd ee ff 00 00 09 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 7b c6 00 00 00 02 00 00
+000020 00 02 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 85 a4 00 00 58 58 58 58 58 58
+# Packet 4
+000000 aa bb cc 00 00 09 dd ee ff 00 00 09 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 17 c4 00 00 00 02 64 00
+000020 00 04 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 21 a2 00 00 58 58 58 58 58 58
+# Packet 5
+000000 aa bb cc 00 00 09 dd ee ff 00 00 09 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 fb c5 00 00 00 02 80 00
+000020 00 02 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 05 a4 00 00 58 58 58 58 58 58
+# Packet 6
+000000 aa bb cc 00 00 09 dd ee ff 00 00 09 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 bb b6 00 00 00 02 c0 00
+000020 00 11 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 c5 94 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/selector_002/pcap_files/out_3.txt b/dep/pipeline/selector_002/pcap_files/out_3.txt
new file mode 100644
index 00000000..1f682ebc
--- /dev/null
+++ b/dep/pipeline/selector_002/pcap_files/out_3.txt
@@ -0,0 +1,42 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc 00 00 02 dd ee ff 00 00 02 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 e5 bf 00 00 00 00 96 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 ef 9d 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc 00 00 06 dd ee ff 00 00 06 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 17 bf 00 00 00 01 64 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 21 9d 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc 00 00 06 dd ee ff 00 00 06 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 e5 be 00 00 00 01 96 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 ef 9c 00 00 58 58 58 58 58 58
+# Packet 3
+000000 aa bb cc 00 00 0a dd ee ff 00 00 0a 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 7b b3 00 00 00 02 00 00
+000020 00 15 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 85 91 00 00 58 58 58 58 58 58
+# Packet 4
+000000 aa bb cc 00 00 0a dd ee ff 00 00 0a 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 17 c6 00 00 00 02 64 00
+000020 00 02 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 21 a4 00 00 58 58 58 58 58 58
+# Packet 5
+000000 aa bb cc 00 00 0a dd ee ff 00 00 0a 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 fb c3 00 00 00 02 80 00
+000020 00 04 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 05 a2 00 00 58 58 58 58 58 58
+# Packet 6
+000000 aa bb cc 00 00 0a dd ee ff 00 00 0a 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 bb c2 00 00 00 02 c0 00
+000020 00 05 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 c5 a0 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/selector_002/pcap_files/out_4.txt b/dep/pipeline/selector_002/pcap_files/out_4.txt
new file mode 100644
index 00000000..0632a854
--- /dev/null
+++ b/dep/pipeline/selector_002/pcap_files/out_4.txt
@@ -0,0 +1,42 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc 00 00 03 dd ee ff 00 00 03 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 b3 bf 00 00 00 00 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 bd 9d 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc 00 00 07 dd ee ff 00 00 07 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 e4 c4 00 00 00 01 96 fa
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 ee a2 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc 00 00 07 dd ee ff 00 00 07 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 b3 be 00 00 00 01 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 bd 9c 00 00 58 58 58 58 58 58
+# Packet 3
+000000 aa bb cc 00 00 0b dd ee ff 00 00 0b 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 7b c7 00 00 00 02 00 00
+000020 00 01 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 85 a5 00 00 58 58 58 58 58 58
+# Packet 4
+000000 aa bb cc 00 00 0b dd ee ff 00 00 0b 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 17 c7 00 00 00 02 64 00
+000020 00 01 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 21 a5 00 00 58 58 58 58 58 58
+# Packet 5
+000000 aa bb cc 00 00 0b dd ee ff 00 00 0b 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 fb c6 00 00 00 02 80 00
+000020 00 01 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 05 a5 00 00 58 58 58 58 58 58
+# Packet 6
+000000 aa bb cc 00 00 0b dd ee ff 00 00 0b 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 bb c6 00 00 00 02 c0 00
+000020 00 01 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 c5 a4 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/selector_002/readme.md b/dep/pipeline/selector_002/readme.md
new file mode 100644
index 00000000..3e9c2f0c
--- /dev/null
+++ b/dep/pipeline/selector_002/readme.md
@@ -0,0 +1,22 @@
+
+Test Case: test_selector_002
+----------------------------
+
+ Description:
+
+ This use case illustrates a Forwarding Information Base (FIB) with Virtual Routing and
+ Forwarding (VRF) and Equal-Cost Multi-Path (ECMP) support. A FIB essentially is the data plane
+ copy of the routing table. The VRF support allows for multiple logical routing tables to
+ co-exist as part of the same "physical" routing table; the VRF ID typically identifies the
+ logical table to provide the matching route for the IP destination address of the input packet.
+ The ECMP provides a load balancing mechanism for the packet forwarding by allowing for multiple
+ next hops (of equal or different weights, in case of Weighted-Cost Multi-Path (WCMP) to be
+ provided for each route.
+
+ In this use case, the VRF ID is read from the IP source address of the input packet as
+ opposed to a more complex classification scheme being used. The routing table produces the ID
+ of the group of next hops associated with the current route, out of which a single next hop
+ is selected based on a hashing scheme that preserves the packet order within each flow (with
+ the flow defined here by a typical 3-tuple) by always selecting the same next hop for packets
+ that are part of the same flow. The next hop provides the Ethernet header and the output port
+ for the outgoing packet.
diff --git a/dep/pipeline/selector_002/selector_002.cli b/dep/pipeline/selector_002/selector_002.cli
new file mode 100644
index 00000000..3c75e5c1
--- /dev/null
+++ b/dep/pipeline/selector_002/selector_002.cli
@@ -0,0 +1,37 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/selector_002/selector_002.spec /tmp/pipeline/selector_002/selector_002.c
+pipeline libbuild /tmp/pipeline/selector_002/selector_002.c /tmp/pipeline/selector_002/selector_002.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/selector_002/selector_002.so io /tmp/pipeline/selector_002/ethdev.io numa 0
+
+pipeline PIPELINE0 table selector_002_1_table add /tmp/pipeline/selector_002/cmd_files/cmd_1.txt
+pipeline PIPELINE0 selector selector_002_2_table group add
+pipeline PIPELINE0 selector selector_002_2_table group add
+pipeline PIPELINE0 selector selector_002_2_table group add
+pipeline PIPELINE0 selector selector_002_2_table group add
+pipeline PIPELINE0 selector selector_002_2_table group add
+pipeline PIPELINE0 selector selector_002_2_table group add
+pipeline PIPELINE0 selector selector_002_2_table group add
+pipeline PIPELINE0 selector selector_002_2_table group add
+pipeline PIPELINE0 selector selector_002_2_table group add
+pipeline PIPELINE0 selector selector_002_2_table group add
+pipeline PIPELINE0 selector selector_002_2_table group add
+pipeline PIPELINE0 selector selector_002_2_table group add
+pipeline PIPELINE0 selector selector_002_2_table group member add /tmp/pipeline/selector_002/cmd_files/cmd_2.txt
+pipeline PIPELINE0 table selector_002_3_table add /tmp/pipeline/selector_002/cmd_files/cmd_3.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/selector_002/selector_002.spec b/dep/pipeline/selector_002/selector_002.spec
new file mode 100644
index 00000000..4858eaea
--- /dev/null
+++ b/dep/pipeline/selector_002/selector_002.spec
@@ -0,0 +1,146 @@
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port_in
+ bit<32> port_out
+ bit<32> vrf_id
+ bit<32> dst_addr
+ bit<32> nexthop_group_id
+ bit<32> nexthop_id
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct selector_002_action_01_args_t {
+ bit<32> nexthop_group_id
+}
+
+action selector_002_action_01 args instanceof selector_002_action_01_args_t {
+ mov m.nexthop_group_id t.nexthop_group_id
+ return
+}
+
+struct selector_002_action_02_args_t {
+ bit<48> ethernet_dst_addr
+ bit<48> ethernet_src_addr
+ bit<16> ethernet_ethertype
+ bit<32> port_out
+}
+
+action selector_002_action_02 args instanceof selector_002_action_02_args_t {
+ //Set Ethernet header.
+ mov h.ethernet.dst_addr t.ethernet_dst_addr
+ mov h.ethernet.src_addr t.ethernet_src_addr
+ mov h.ethernet.ethertype t.ethernet_ethertype
+ validate h.ethernet
+
+ //Decrement the TTL and update the checksum within the IPv4 header.
+ cksub h.ipv4.hdr_checksum h.ipv4.ttl
+ sub h.ipv4.ttl 0x1
+ ckadd h.ipv4.hdr_checksum h.ipv4.ttl
+
+ //Set the output port.
+ mov m.port_out t.port_out
+
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Tables
+//
+table selector_002_1_table {
+ key {
+ m.vrf_id exact
+ m.dst_addr lpm
+ }
+
+ actions {
+ selector_002_action_01
+ drop
+ }
+
+ default_action drop args none
+
+ size 1048576
+}
+
+selector selector_002_2_table {
+ group_id m.nexthop_group_id
+
+ selector {
+ h.ipv4.protocol
+ h.ipv4.src_addr
+ h.ipv4.dst_addr
+ }
+
+ member_id m.nexthop_id
+
+ n_groups_max 65536
+
+ n_members_per_group_max 64
+}
+
+table selector_002_3_table {
+ key {
+ m.nexthop_id exact
+ }
+
+ actions {
+ selector_002_action_02
+ drop
+ }
+
+ default_action drop args none
+
+ size 1048576
+}
+
+//
+// Pipeline
+//
+apply {
+ rx m.port_in
+ extract h.ethernet
+ extract h.ipv4
+ mov m.vrf_id h.ipv4.src_addr
+ mov m.dst_addr h.ipv4.dst_addr
+ table selector_002_1_table
+ table selector_002_2_table
+ table selector_002_3_table
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port_out
+}
diff --git a/dep/pipeline/shl_001/ethdev.io b/dep/pipeline/shl_001/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/shl_001/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/shl_001/pcap_files/in_1.txt b/dep/pipeline/shl_001/pcap_files/in_1.txt
new file mode 100644
index 00000000..75115c15
--- /dev/null
+++ b/dep/pipeline/shl_001/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/shl_001/pcap_files/out_1.txt b/dep/pipeline/shl_001/pcap_files/out_1.txt
new file mode 100644
index 00000000..d95c2191
--- /dev/null
+++ b/dep/pipeline/shl_001/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 01 12 23 34 45 50 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/shl_001/readme.md b/dep/pipeline/shl_001/readme.md
new file mode 100644
index 00000000..31bd2e1b
--- /dev/null
+++ b/dep/pipeline/shl_001/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_shl_001
+-------------------------
+
+ Instructions being tested:
+ shl m.field m.field
+
+ Description:
+ For the received packet, left shift the destination MAC address by 4 and transmit the packet back on the same port.
+
+ Verification:
+ Destination MAC address of the transmitted packet should be shifted left by 4 with respect to the destination MAC address of the received packet.
diff --git a/dep/pipeline/shl_001/shl_001.cli b/dep/pipeline/shl_001/shl_001.cli
new file mode 100644
index 00000000..74cd3203
--- /dev/null
+++ b/dep/pipeline/shl_001/shl_001.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/shl_001/shl_001.spec /tmp/pipeline/shl_001/shl_001.c
+pipeline libbuild /tmp/pipeline/shl_001/shl_001.c /tmp/pipeline/shl_001/shl_001.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/shl_001/shl_001.so io /tmp/pipeline/shl_001/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/shl_001/shl_001.spec b/dep/pipeline/shl_001/shl_001.spec
new file mode 100644
index 00000000..de397272
--- /dev/null
+++ b/dep/pipeline/shl_001/shl_001.spec
@@ -0,0 +1,38 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<48> addr
+ bit<8> shift
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ mov m.shift 0x04
+ mov m.addr h.ethernet.dst_addr
+ shl m.addr m.shift
+ mov h.ethernet.dst_addr m.addr
+ emit h.ethernet
+ tx m.port
+}
diff --git a/dep/pipeline/shl_002/ethdev.io b/dep/pipeline/shl_002/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/shl_002/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/shl_002/pcap_files/in_1.txt b/dep/pipeline/shl_002/pcap_files/in_1.txt
new file mode 100644
index 00000000..14d39adf
--- /dev/null
+++ b/dep/pipeline/shl_002/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 00 00 00 00 02 ff 00 00 00 00 10 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b6 64 00 00 09 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 94 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/shl_002/pcap_files/out_1.txt b/dep/pipeline/shl_002/pcap_files/out_1.txt
new file mode 100644
index 00000000..47e60c26
--- /dev/null
+++ b/dep/pipeline/shl_002/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 00 00 00 00 02 ff 00 00 00 00 10 08 00 45 00
+000010 00 2e 00 01 00 00 00 06 ad 80 90 00 00 24 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 94 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/shl_002/readme.md b/dep/pipeline/shl_002/readme.md
new file mode 100644
index 00000000..27faad04
--- /dev/null
+++ b/dep/pipeline/shl_002/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_shl_002
+-------------------------
+
+ Instructions being tested:
+ shl m.field h.field
+
+ Description:
+ For the received packet, ip head checksum = ip header checksum << ip protocol value, ip ttl = ip ttl << ip protocol value , and ip src addr = ip src addr << ethernet dst addr
+
+ Verification:
+ Verify using input and output pcap files.
diff --git a/dep/pipeline/shl_002/shl_002.cli b/dep/pipeline/shl_002/shl_002.cli
new file mode 100644
index 00000000..7b58c84f
--- /dev/null
+++ b/dep/pipeline/shl_002/shl_002.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/shl_002/shl_002.spec /tmp/pipeline/shl_002/shl_002.c
+pipeline libbuild /tmp/pipeline/shl_002/shl_002.c /tmp/pipeline/shl_002/shl_002.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/shl_002/shl_002.so io /tmp/pipeline/shl_002/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/shl_002/shl_002.spec b/dep/pipeline/shl_002/shl_002.spec
new file mode 100644
index 00000000..61cc7c84
--- /dev/null
+++ b/dep/pipeline/shl_002/shl_002.spec
@@ -0,0 +1,61 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<16> ip_hdr_checksum
+ bit<8> ip_ttl
+ bit<32> ip_src_addr
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ mov m.ip_hdr_checksum h.ipv4.hdr_checksum
+ mov m.ip_ttl h.ipv4.ttl
+ mov m.ip_src_addr h.ipv4.src_addr
+ shl m.ip_hdr_checksum h.ipv4.protocol // >
+ shl m.ip_ttl h.ipv4.protocol // =
+ shl m.ip_src_addr h.ethernet.dst_addr // <
+ mov h.ipv4.hdr_checksum m.ip_hdr_checksum
+ mov h.ipv4.ttl m.ip_ttl
+ mov h.ipv4.src_addr m.ip_src_addr
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/shl_003/ethdev.io b/dep/pipeline/shl_003/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/shl_003/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/shl_003/pcap_files/in_1.txt b/dep/pipeline/shl_003/pcap_files/in_1.txt
new file mode 100644
index 00000000..14d39adf
--- /dev/null
+++ b/dep/pipeline/shl_003/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 00 00 00 00 02 ff 00 00 00 00 10 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b6 64 00 00 09 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 94 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/shl_003/pcap_files/out_1.txt b/dep/pipeline/shl_003/pcap_files/out_1.txt
new file mode 100644
index 00000000..47e60c26
--- /dev/null
+++ b/dep/pipeline/shl_003/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 00 00 00 00 02 ff 00 00 00 00 10 08 00 45 00
+000010 00 2e 00 01 00 00 00 06 ad 80 90 00 00 24 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 94 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/shl_003/readme.md b/dep/pipeline/shl_003/readme.md
new file mode 100644
index 00000000..ab59ecca
--- /dev/null
+++ b/dep/pipeline/shl_003/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_shl_003
+-------------------------
+
+ Instructions being tested:
+ shl h.field m.field
+
+ Description:
+ For the received packet, ip head checksum = ip header checksum << ip protocol value, ip ttl = ip ttl << ip protocol value , and ip src addr = ip src addr << ethernet dst addr
+
+ Verification:
+ Verify using input and output pcap files.
diff --git a/dep/pipeline/shl_003/shl_003.cli b/dep/pipeline/shl_003/shl_003.cli
new file mode 100644
index 00000000..73169356
--- /dev/null
+++ b/dep/pipeline/shl_003/shl_003.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/shl_003/shl_003.spec /tmp/pipeline/shl_003/shl_003.c
+pipeline libbuild /tmp/pipeline/shl_003/shl_003.c /tmp/pipeline/shl_003/shl_003.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/shl_003/shl_003.so io /tmp/pipeline/shl_003/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/shl_003/shl_003.spec b/dep/pipeline/shl_003/shl_003.spec
new file mode 100644
index 00000000..d09058a0
--- /dev/null
+++ b/dep/pipeline/shl_003/shl_003.spec
@@ -0,0 +1,56 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<48> eth_dst_addr
+ bit<8> ip_protocol
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ mov m.ip_protocol h.ipv4.protocol
+ mov m.eth_dst_addr h.ethernet.dst_addr
+ shl h.ipv4.hdr_checksum m.ip_protocol // >
+ shl h.ipv4.ttl m.ip_protocol // =
+ shl h.ipv4.src_addr m.eth_dst_addr // <
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/shl_004/ethdev.io b/dep/pipeline/shl_004/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/shl_004/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/shl_004/pcap_files/in_1.txt b/dep/pipeline/shl_004/pcap_files/in_1.txt
new file mode 100644
index 00000000..14d39adf
--- /dev/null
+++ b/dep/pipeline/shl_004/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 00 00 00 00 02 ff 00 00 00 00 10 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b6 64 00 00 09 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 94 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/shl_004/pcap_files/out_1.txt b/dep/pipeline/shl_004/pcap_files/out_1.txt
new file mode 100644
index 00000000..47e60c26
--- /dev/null
+++ b/dep/pipeline/shl_004/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 00 00 00 00 02 ff 00 00 00 00 10 08 00 45 00
+000010 00 2e 00 01 00 00 00 06 ad 80 90 00 00 24 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 94 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/shl_004/readme.md b/dep/pipeline/shl_004/readme.md
new file mode 100644
index 00000000..eb8cb2b9
--- /dev/null
+++ b/dep/pipeline/shl_004/readme.md
@@ -0,0 +1,12 @@
+Test Case: test_shl_004
+-------------------------
+
+ Instructions being tested:
+ shl h.field h.field
+
+ Description:
+ For the received packet, ip head checksum = ip header checksum << ip protocol value, ip ttl = ip ttl << ip protocol value , and ip src addr = ip src addr << ethernet dst addr
+
+
+ Verification:
+ Verify using input and output pcap files.
diff --git a/dep/pipeline/shl_004/shl_004.cli b/dep/pipeline/shl_004/shl_004.cli
new file mode 100644
index 00000000..db77e67b
--- /dev/null
+++ b/dep/pipeline/shl_004/shl_004.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/shl_004/shl_004.spec /tmp/pipeline/shl_004/shl_004.c
+pipeline libbuild /tmp/pipeline/shl_004/shl_004.c /tmp/pipeline/shl_004/shl_004.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/shl_004/shl_004.so io /tmp/pipeline/shl_004/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/shl_004/shl_004.spec b/dep/pipeline/shl_004/shl_004.spec
new file mode 100644
index 00000000..0c7fdc39
--- /dev/null
+++ b/dep/pipeline/shl_004/shl_004.spec
@@ -0,0 +1,52 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ shl h.ipv4.hdr_checksum h.ipv4.protocol // >
+ shl h.ipv4.ttl h.ipv4.protocol // =
+ shl h.ipv4.src_addr h.ethernet.dst_addr // <
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/shl_005/ethdev.io b/dep/pipeline/shl_005/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/shl_005/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/shl_005/pcap_files/in_1.txt b/dep/pipeline/shl_005/pcap_files/in_1.txt
new file mode 100644
index 00000000..75115c15
--- /dev/null
+++ b/dep/pipeline/shl_005/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/shl_005/pcap_files/out_1.txt b/dep/pipeline/shl_005/pcap_files/out_1.txt
new file mode 100644
index 00000000..d95c2191
--- /dev/null
+++ b/dep/pipeline/shl_005/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 01 12 23 34 45 50 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/shl_005/readme.md b/dep/pipeline/shl_005/readme.md
new file mode 100644
index 00000000..59c5ff04
--- /dev/null
+++ b/dep/pipeline/shl_005/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_shl_005
+-------------------------
+
+ Instructions being tested:
+ shl m.field immediate_value
+
+ Description:
+ For the received packet, left shift the destination MAC address by 4 and transmit the packet back on the same port.
+
+ Verification:
+ Destination MAC address of the transmitted packet should be shifted left by 4 with respect to the destination MAC address of the received packet.
diff --git a/dep/pipeline/shl_005/shl_005.cli b/dep/pipeline/shl_005/shl_005.cli
new file mode 100644
index 00000000..eb68b451
--- /dev/null
+++ b/dep/pipeline/shl_005/shl_005.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/shl_005/shl_005.spec /tmp/pipeline/shl_005/shl_005.c
+pipeline libbuild /tmp/pipeline/shl_005/shl_005.c /tmp/pipeline/shl_005/shl_005.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/shl_005/shl_005.so io /tmp/pipeline/shl_005/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/shl_005/shl_005.spec b/dep/pipeline/shl_005/shl_005.spec
new file mode 100644
index 00000000..8af1d0e7
--- /dev/null
+++ b/dep/pipeline/shl_005/shl_005.spec
@@ -0,0 +1,36 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<48> addr
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ mov m.addr h.ethernet.dst_addr
+ shl m.addr 0x04
+ mov h.ethernet.dst_addr m.addr
+ emit h.ethernet
+ tx m.port
+}
diff --git a/dep/pipeline/shl_006/ethdev.io b/dep/pipeline/shl_006/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/shl_006/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/shl_006/pcap_files/in_1.txt b/dep/pipeline/shl_006/pcap_files/in_1.txt
new file mode 100644
index 00000000..75115c15
--- /dev/null
+++ b/dep/pipeline/shl_006/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/shl_006/pcap_files/out_1.txt b/dep/pipeline/shl_006/pcap_files/out_1.txt
new file mode 100644
index 00000000..d95c2191
--- /dev/null
+++ b/dep/pipeline/shl_006/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 01 12 23 34 45 50 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/shl_006/readme.md b/dep/pipeline/shl_006/readme.md
new file mode 100644
index 00000000..bfce84b0
--- /dev/null
+++ b/dep/pipeline/shl_006/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_shl_006
+-----------------------
+
+ Instructions being tested:
+ shl h.field immediate_value
+
+ Description:
+ For the received packet, left shift the destination MAC address by 4 and transmit the packet back on the same port.
+
+ Verification:
+ Destination MAC address of the transmitted packet should be shifted left by 4 with respect to the destination MAC address of the received packet.
diff --git a/dep/pipeline/shl_006/shl_006.cli b/dep/pipeline/shl_006/shl_006.cli
new file mode 100644
index 00000000..677e5daa
--- /dev/null
+++ b/dep/pipeline/shl_006/shl_006.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/shl_006/shl_006.spec /tmp/pipeline/shl_006/shl_006.c
+pipeline libbuild /tmp/pipeline/shl_006/shl_006.c /tmp/pipeline/shl_006/shl_006.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/shl_006/shl_006.so io /tmp/pipeline/shl_006/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/shl_006/shl_006.spec b/dep/pipeline/shl_006/shl_006.spec
new file mode 100644
index 00000000..aba08fb4
--- /dev/null
+++ b/dep/pipeline/shl_006/shl_006.spec
@@ -0,0 +1,33 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ shl h.ethernet.dst_addr 0x04
+ emit h.ethernet
+ tx m.port
+}
diff --git a/dep/pipeline/shl_007/ethdev.io b/dep/pipeline/shl_007/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/shl_007/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/shl_007/pcap_files/in_1.txt b/dep/pipeline/shl_007/pcap_files/in_1.txt
new file mode 100644
index 00000000..6b124802
--- /dev/null
+++ b/dep/pipeline/shl_007/pcap_files/in_1.txt
@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 22 00 01 00 00 40 11 4e b6 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 0e c9 88 58 58 58 58 58 58
diff --git a/dep/pipeline/shl_007/pcap_files/out_1.txt b/dep/pipeline/shl_007/pcap_files/out_1.txt
new file mode 100644
index 00000000..46d6824a
--- /dev/null
+++ b/dep/pipeline/shl_007/pcap_files/out_1.txt
@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 22 00 01 00 00 40 11 4e b6 c8 00 00 14 c8 00
+000020 00 0a 00 64 00 c8 00 0e c9 88 58 58 58 58 58 58
diff --git a/dep/pipeline/shl_007/readme.md b/dep/pipeline/shl_007/readme.md
new file mode 100644
index 00000000..74a60095
--- /dev/null
+++ b/dep/pipeline/shl_007/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_shl_007
+-----------------------
+
+ Instructions being tested:
+ shl h.field t.field
+
+ Description:
+ For a packet with matching destination IP address, source IP is shifted left by the value stored in the table.
+
+ Verification:
+ Source IP address of the received packet on the same port will be shifted left by the amount mentioned in the table
diff --git a/dep/pipeline/shl_007/shl_007.cli b/dep/pipeline/shl_007/shl_007.cli
new file mode 100755
index 00000000..a4d473f4
--- /dev/null
+++ b/dep/pipeline/shl_007/shl_007.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/shl_007/shl_007.spec /tmp/pipeline/shl_007/shl_007.c
+pipeline libbuild /tmp/pipeline/shl_007/shl_007.c /tmp/pipeline/shl_007/shl_007.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/shl_007/shl_007.so io /tmp/pipeline/shl_007/ethdev.io numa 0
+pipeline PIPELINE0 table shl_007 add /tmp/pipeline/shl_007/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/shl_007/shl_007.spec b/dep/pipeline/shl_007/shl_007.spec
new file mode 100755
index 00000000..ba0536e4
--- /dev/null
+++ b/dep/pipeline/shl_007/shl_007.spec
@@ -0,0 +1,82 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct shl_007_args_t {
+ bit<8> addr
+}
+
+action shl_007_action args instanceof shl_007_args_t {
+ shl h.ipv4.src_addr t.addr
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Table
+//
+table shl_007 {
+ key {
+ h.ipv4.dst_addr exact
+ }
+
+ actions {
+ shl_007_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ table shl_007
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/shl_007/table.txt b/dep/pipeline/shl_007/table.txt
new file mode 100755
index 00000000..65011035
--- /dev/null
+++ b/dep/pipeline/shl_007/table.txt
@@ -0,0 +1 @@
+match 0xc800000a action shl_007_action addr 0x1
diff --git a/dep/pipeline/shl_008/ethdev.io b/dep/pipeline/shl_008/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/shl_008/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/shl_008/pcap_files/in_1.txt b/dep/pipeline/shl_008/pcap_files/in_1.txt
new file mode 100644
index 00000000..6b124802
--- /dev/null
+++ b/dep/pipeline/shl_008/pcap_files/in_1.txt
@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 22 00 01 00 00 40 11 4e b6 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 0e c9 88 58 58 58 58 58 58
diff --git a/dep/pipeline/shl_008/pcap_files/out_1.txt b/dep/pipeline/shl_008/pcap_files/out_1.txt
new file mode 100644
index 00000000..47701836
--- /dev/null
+++ b/dep/pipeline/shl_008/pcap_files/out_1.txt
@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 22 00 01 00 00 80 11 4e b6 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 0e c9 88 58 58 58 58 58 58
diff --git a/dep/pipeline/shl_008/readme.md b/dep/pipeline/shl_008/readme.md
new file mode 100644
index 00000000..03424316
--- /dev/null
+++ b/dep/pipeline/shl_008/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_shl_008
+-----------------------
+
+ Instructions being tested:
+ shl m.field t.field
+
+ Description:
+ For a packet with matching destination IP address, TTL value is shifted left by the amount mentioned in the table.
+
+ Verification:
+ TTL value of the received packet will be shifted left by the value mentioned in the table.
diff --git a/dep/pipeline/shl_008/shl_008.cli b/dep/pipeline/shl_008/shl_008.cli
new file mode 100755
index 00000000..9e7d0f2e
--- /dev/null
+++ b/dep/pipeline/shl_008/shl_008.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/shl_008/shl_008.spec /tmp/pipeline/shl_008/shl_008.c
+pipeline libbuild /tmp/pipeline/shl_008/shl_008.c /tmp/pipeline/shl_008/shl_008.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/shl_008/shl_008.so io /tmp/pipeline/shl_008/ethdev.io numa 0
+pipeline PIPELINE0 table shl_008 add /tmp/pipeline/shl_008/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/shl_008/shl_008.spec b/dep/pipeline/shl_008/shl_008.spec
new file mode 100755
index 00000000..8624fc5c
--- /dev/null
+++ b/dep/pipeline/shl_008/shl_008.spec
@@ -0,0 +1,85 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port
+ bit<8> ttl
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct src_pat_args_t {
+ bit<8> ttl
+}
+
+action shl_008_action args instanceof src_pat_args_t {
+ mov m.ttl h.ipv4.ttl
+ shl m.ttl t.ttl
+ mov h.ipv4.ttl m.ttl
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Table
+//
+table shl_008 {
+ key {
+ h.ipv4.dst_addr exact
+ }
+
+ actions {
+ shl_008_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ table shl_008
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/shl_008/table.txt b/dep/pipeline/shl_008/table.txt
new file mode 100755
index 00000000..b47e3326
--- /dev/null
+++ b/dep/pipeline/shl_008/table.txt
@@ -0,0 +1 @@
+match 0xc800000a action shl_008_action ttl 0x1
diff --git a/dep/pipeline/shr_001/ethdev.io b/dep/pipeline/shr_001/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/shr_001/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/shr_001/pcap_files/in_1.txt b/dep/pipeline/shr_001/pcap_files/in_1.txt
new file mode 100644
index 00000000..75115c15
--- /dev/null
+++ b/dep/pipeline/shr_001/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/shr_001/pcap_files/out_1.txt b/dep/pipeline/shr_001/pcap_files/out_1.txt
new file mode 100644
index 00000000..15ec41f4
--- /dev/null
+++ b/dep/pipeline/shr_001/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 01 12 23 34 45 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/shr_001/readme.md b/dep/pipeline/shr_001/readme.md
new file mode 100644
index 00000000..0d63185e
--- /dev/null
+++ b/dep/pipeline/shr_001/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_shr_001
+-------------------------
+
+ Instructions being tested:
+ shr m.field m.field
+
+ Description:
+ For the received packet, right shift the destination MAC address by 4 and transmit the packet back on the same port.
+
+ Verification:
+ Destination MAC address of the transmitted packet should be shifted right by 4 with respect to the destination MAC address of the received packet.
diff --git a/dep/pipeline/shr_001/shr_001.cli b/dep/pipeline/shr_001/shr_001.cli
new file mode 100644
index 00000000..9afb685f
--- /dev/null
+++ b/dep/pipeline/shr_001/shr_001.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/shr_001/shr_001.spec /tmp/pipeline/shr_001/shr_001.c
+pipeline libbuild /tmp/pipeline/shr_001/shr_001.c /tmp/pipeline/shr_001/shr_001.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/shr_001/shr_001.so io /tmp/pipeline/shr_001/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/shr_001/shr_001.spec b/dep/pipeline/shr_001/shr_001.spec
new file mode 100644
index 00000000..73fba08a
--- /dev/null
+++ b/dep/pipeline/shr_001/shr_001.spec
@@ -0,0 +1,38 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<48> addr
+ bit<8> shift
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ mov m.shift 0x04
+ mov m.addr h.ethernet.dst_addr
+ shr m.addr m.shift
+ mov h.ethernet.dst_addr m.addr
+ emit h.ethernet
+ tx m.port
+}
diff --git a/dep/pipeline/shr_002/ethdev.io b/dep/pipeline/shr_002/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/shr_002/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/shr_002/pcap_files/in_1.txt b/dep/pipeline/shr_002/pcap_files/in_1.txt
new file mode 100644
index 00000000..d5dd3b7f
--- /dev/null
+++ b/dep/pipeline/shr_002/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 00 00 00 01 01 ff 00 00 00 00 10 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b6 64 00 00 09 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 94 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/shr_002/pcap_files/out_1.txt b/dep/pipeline/shr_002/pcap_files/out_1.txt
new file mode 100644
index 00000000..1c619e2e
--- /dev/null
+++ b/dep/pipeline/shr_002/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 00 00 00 01 01 03 fc 00 00 00 00 08 00 45 00
+000010 00 2e 00 01 00 00 01 06 4e b6 32 00 00 04 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 94 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/shr_002/readme.md b/dep/pipeline/shr_002/readme.md
new file mode 100644
index 00000000..c5f50d42
--- /dev/null
+++ b/dep/pipeline/shr_002/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_shr_002
+-----------------------
+
+ Instructions being tested:
+ shr m.field h.field
+
+ Description:
+ For the received packet, ethernet src addr = ethernet src addr >> ipv4 protocol, ipv4 ttl = ipv4 ttl >> ipv4 protocol , and ipv4 src addr = ipv4 src addr >> ethernet dst addr
+
+ Verification:
+ Verify using input and output pcap files.
diff --git a/dep/pipeline/shr_002/shr_002.cli b/dep/pipeline/shr_002/shr_002.cli
new file mode 100644
index 00000000..dc9d4db8
--- /dev/null
+++ b/dep/pipeline/shr_002/shr_002.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/shr_002/shr_002.spec /tmp/pipeline/shr_002/shr_002.c
+pipeline libbuild /tmp/pipeline/shr_002/shr_002.c /tmp/pipeline/shr_002/shr_002.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/shr_002/shr_002.so io /tmp/pipeline/shr_002/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/shr_002/shr_002.spec b/dep/pipeline/shr_002/shr_002.spec
new file mode 100644
index 00000000..1e3de47b
--- /dev/null
+++ b/dep/pipeline/shr_002/shr_002.spec
@@ -0,0 +1,61 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<48> eth_src_addr
+ bit<32> ip_src_addr
+ bit<8> ip_ttl
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ mov m.eth_src_addr h.ethernet.src_addr
+ mov m.ip_src_addr h.ipv4.src_addr
+ mov m.ip_ttl h.ipv4.ttl
+ shr m.eth_src_addr h.ipv4.protocol // >
+ shr m.ip_ttl h.ipv4.protocol // =
+ shr m.ip_src_addr h.ethernet.dst_addr // <
+ mov h.ethernet.src_addr m.eth_src_addr
+ mov h.ipv4.ttl m.ip_ttl
+ mov h.ipv4.src_addr m.ip_src_addr
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/shr_003/ethdev.io b/dep/pipeline/shr_003/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/shr_003/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/shr_003/pcap_files/in_1.txt b/dep/pipeline/shr_003/pcap_files/in_1.txt
new file mode 100644
index 00000000..d5dd3b7f
--- /dev/null
+++ b/dep/pipeline/shr_003/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 00 00 00 01 01 ff 00 00 00 00 10 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b6 64 00 00 09 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 94 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/shr_003/pcap_files/out_1.txt b/dep/pipeline/shr_003/pcap_files/out_1.txt
new file mode 100644
index 00000000..1c619e2e
--- /dev/null
+++ b/dep/pipeline/shr_003/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 00 00 00 01 01 03 fc 00 00 00 00 08 00 45 00
+000010 00 2e 00 01 00 00 01 06 4e b6 32 00 00 04 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 94 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/shr_003/readme.md b/dep/pipeline/shr_003/readme.md
new file mode 100644
index 00000000..cca67d60
--- /dev/null
+++ b/dep/pipeline/shr_003/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_shr_003
+-----------------------
+
+ Instructions being tested:
+ shr h.field m.field
+
+ Description:
+ For the received packet, ethernet src addr = ethernet src addr >> ipv4 protocol, ipv4 ttl = ipv4 ttl >> ipv4 protocol , and ipv4 src addr = ipv4 src addr >> ethernet dst addr
+
+ Verification:
+ Verify using input and output pcap files.
diff --git a/dep/pipeline/shr_003/shr_003.cli b/dep/pipeline/shr_003/shr_003.cli
new file mode 100644
index 00000000..bab6d439
--- /dev/null
+++ b/dep/pipeline/shr_003/shr_003.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/shr_003/shr_003.spec /tmp/pipeline/shr_003/shr_003.c
+pipeline libbuild /tmp/pipeline/shr_003/shr_003.c /tmp/pipeline/shr_003/shr_003.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/shr_003/shr_003.so io /tmp/pipeline/shr_003/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/shr_003/shr_003.spec b/dep/pipeline/shr_003/shr_003.spec
new file mode 100644
index 00000000..fc3a9eb5
--- /dev/null
+++ b/dep/pipeline/shr_003/shr_003.spec
@@ -0,0 +1,56 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<8> ipv4_protocol
+ bit<48> eth_dst_addr
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ mov m.ipv4_protocol h.ipv4.protocol
+ mov m.eth_dst_addr h.ethernet.dst_addr
+ shr h.ethernet.src_addr m.ipv4_protocol // >
+ shr h.ipv4.ttl m.ipv4_protocol // =
+ shr h.ipv4.src_addr m.eth_dst_addr // <
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/shr_004/ethdev.io b/dep/pipeline/shr_004/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/shr_004/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/shr_004/pcap_files/in_1.txt b/dep/pipeline/shr_004/pcap_files/in_1.txt
new file mode 100644
index 00000000..d5dd3b7f
--- /dev/null
+++ b/dep/pipeline/shr_004/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 00 00 00 01 01 ff 00 00 00 00 10 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b6 64 00 00 09 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 94 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/shr_004/pcap_files/out_1.txt b/dep/pipeline/shr_004/pcap_files/out_1.txt
new file mode 100644
index 00000000..1c619e2e
--- /dev/null
+++ b/dep/pipeline/shr_004/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 00 00 00 01 01 03 fc 00 00 00 00 08 00 45 00
+000010 00 2e 00 01 00 00 01 06 4e b6 32 00 00 04 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 94 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/shr_004/readme.md b/dep/pipeline/shr_004/readme.md
new file mode 100644
index 00000000..0a40681a
--- /dev/null
+++ b/dep/pipeline/shr_004/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_shr_004
+-----------------------
+
+ Instructions being tested:
+ shr h.field h.field
+
+ Description:
+ For the received packet, ethernet src addr = ethernet src addr >> ipv4 protocol, ipv4 ttl = ipv4 ttl >> ipv4 protocol , and ipv4 src addr = ipv4 src addr >> ethernet dst addr
+
+ Verification:
+ Verify using input and output pcap files.
diff --git a/dep/pipeline/shr_004/shr_004.cli b/dep/pipeline/shr_004/shr_004.cli
new file mode 100644
index 00000000..9ec02ac1
--- /dev/null
+++ b/dep/pipeline/shr_004/shr_004.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/shr_004/shr_004.spec /tmp/pipeline/shr_004/shr_004.c
+pipeline libbuild /tmp/pipeline/shr_004/shr_004.c /tmp/pipeline/shr_004/shr_004.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/shr_004/shr_004.so io /tmp/pipeline/shr_004/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/shr_004/shr_004.spec b/dep/pipeline/shr_004/shr_004.spec
new file mode 100644
index 00000000..4c5cb4be
--- /dev/null
+++ b/dep/pipeline/shr_004/shr_004.spec
@@ -0,0 +1,52 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ shr h.ethernet.src_addr h.ipv4.protocol // >
+ shr h.ipv4.ttl h.ipv4.protocol // =
+ shr h.ipv4.src_addr h.ethernet.dst_addr // <
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/shr_005/ethdev.io b/dep/pipeline/shr_005/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/shr_005/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/shr_005/pcap_files/in_1.txt b/dep/pipeline/shr_005/pcap_files/in_1.txt
new file mode 100644
index 00000000..75115c15
--- /dev/null
+++ b/dep/pipeline/shr_005/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/shr_005/pcap_files/out_1.txt b/dep/pipeline/shr_005/pcap_files/out_1.txt
new file mode 100644
index 00000000..15ec41f4
--- /dev/null
+++ b/dep/pipeline/shr_005/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 01 12 23 34 45 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/shr_005/readme.md b/dep/pipeline/shr_005/readme.md
new file mode 100644
index 00000000..2e23da93
--- /dev/null
+++ b/dep/pipeline/shr_005/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_shr_005
+-----------------------
+
+ Instructions being tested:
+ shr m.field immediate_value
+
+ Description:
+ For the received packet, right shift the destination MAC address by 4 and transmit the packet back on the same port.
+
+ Verification:
+ Destination MAC address of the transmitted packet should be shifted right by 4 with respect to the destination MAC address of the received packet.
diff --git a/dep/pipeline/shr_005/shr_005.cli b/dep/pipeline/shr_005/shr_005.cli
new file mode 100644
index 00000000..cf711775
--- /dev/null
+++ b/dep/pipeline/shr_005/shr_005.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/shr_005/shr_005.spec /tmp/pipeline/shr_005/shr_005.c
+pipeline libbuild /tmp/pipeline/shr_005/shr_005.c /tmp/pipeline/shr_005/shr_005.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/shr_005/shr_005.so io /tmp/pipeline/shr_005/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/shr_005/shr_005.spec b/dep/pipeline/shr_005/shr_005.spec
new file mode 100644
index 00000000..ae7ceeab
--- /dev/null
+++ b/dep/pipeline/shr_005/shr_005.spec
@@ -0,0 +1,36 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<48> addr
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ mov m.addr h.ethernet.dst_addr
+ shr m.addr 0x04
+ mov h.ethernet.dst_addr m.addr
+ emit h.ethernet
+ tx m.port
+}
diff --git a/dep/pipeline/shr_006/ethdev.io b/dep/pipeline/shr_006/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/shr_006/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/shr_006/pcap_files/in_1.txt b/dep/pipeline/shr_006/pcap_files/in_1.txt
new file mode 100644
index 00000000..75115c15
--- /dev/null
+++ b/dep/pipeline/shr_006/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/shr_006/pcap_files/out_1.txt b/dep/pipeline/shr_006/pcap_files/out_1.txt
new file mode 100644
index 00000000..15ec41f4
--- /dev/null
+++ b/dep/pipeline/shr_006/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 01 12 23 34 45 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/shr_006/readme.md b/dep/pipeline/shr_006/readme.md
new file mode 100644
index 00000000..acd60bd8
--- /dev/null
+++ b/dep/pipeline/shr_006/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_shr_006
+-----------------------
+
+ Instructions being tested:
+ shr h.field immediate_value
+
+ Description:
+ For the received packet, right shift the destination MAC address by 4 and transmit the packet back on the same port.
+
+ Verification:
+ Destination MAC address of the transmitted packet should be shifted right by 4 with respect to the destination MAC address of the received packet.
diff --git a/dep/pipeline/shr_006/shr_006.cli b/dep/pipeline/shr_006/shr_006.cli
new file mode 100644
index 00000000..3803977b
--- /dev/null
+++ b/dep/pipeline/shr_006/shr_006.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/shr_006/shr_006.spec /tmp/pipeline/shr_006/shr_006.c
+pipeline libbuild /tmp/pipeline/shr_006/shr_006.c /tmp/pipeline/shr_006/shr_006.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/shr_006/shr_006.so io /tmp/pipeline/shr_006/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/shr_006/shr_006.spec b/dep/pipeline/shr_006/shr_006.spec
new file mode 100644
index 00000000..5f0d1c27
--- /dev/null
+++ b/dep/pipeline/shr_006/shr_006.spec
@@ -0,0 +1,33 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ shr h.ethernet.dst_addr 0x04
+ emit h.ethernet
+ tx m.port
+}
diff --git a/dep/pipeline/shr_007/ethdev.io b/dep/pipeline/shr_007/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/shr_007/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/shr_007/pcap_files/in_1.txt b/dep/pipeline/shr_007/pcap_files/in_1.txt
new file mode 100644
index 00000000..6b124802
--- /dev/null
+++ b/dep/pipeline/shr_007/pcap_files/in_1.txt
@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 22 00 01 00 00 40 11 4e b6 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 0e c9 88 58 58 58 58 58 58
diff --git a/dep/pipeline/shr_007/pcap_files/out_1.txt b/dep/pipeline/shr_007/pcap_files/out_1.txt
new file mode 100644
index 00000000..826d960e
--- /dev/null
+++ b/dep/pipeline/shr_007/pcap_files/out_1.txt
@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 22 00 01 00 00 40 11 4e b6 32 00 00 05 c8 00
+000020 00 0a 00 64 00 c8 00 0e c9 88 58 58 58 58 58 58
diff --git a/dep/pipeline/shr_007/readme.md b/dep/pipeline/shr_007/readme.md
new file mode 100644
index 00000000..da6f6171
--- /dev/null
+++ b/dep/pipeline/shr_007/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_shr_007
+-----------------------
+
+ Instructions being tested:
+ shr h.field t.field
+
+ Description:
+ For a packet with matching destination IP address, source IP address is shifted right by the value stored in the table.
+
+ Verification:
+ Source IP address of the received packet on the same port will be shifted right by the amount mentioned in the table.
diff --git a/dep/pipeline/shr_007/shr_007.cli b/dep/pipeline/shr_007/shr_007.cli
new file mode 100755
index 00000000..b05bc753
--- /dev/null
+++ b/dep/pipeline/shr_007/shr_007.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/shr_007/shr_007.spec /tmp/pipeline/shr_007/shr_007.c
+pipeline libbuild /tmp/pipeline/shr_007/shr_007.c /tmp/pipeline/shr_007/shr_007.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/shr_007/shr_007.so io /tmp/pipeline/shr_007/ethdev.io numa 0
+pipeline PIPELINE0 table shr_007 add /tmp/pipeline/shr_007/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/shr_007/shr_007.spec b/dep/pipeline/shr_007/shr_007.spec
new file mode 100755
index 00000000..a76b8a97
--- /dev/null
+++ b/dep/pipeline/shr_007/shr_007.spec
@@ -0,0 +1,82 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct shr_007_args_t {
+ bit<8> addr
+}
+
+action shr_007_action args instanceof shr_007_args_t {
+ shr h.ipv4.src_addr t.addr
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Table
+//
+table shr_007 {
+ key {
+ h.ipv4.dst_addr exact
+ }
+
+ actions {
+ shr_007_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ table shr_007
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/shr_007/table.txt b/dep/pipeline/shr_007/table.txt
new file mode 100755
index 00000000..3d06f27b
--- /dev/null
+++ b/dep/pipeline/shr_007/table.txt
@@ -0,0 +1 @@
+match 0xc800000a action shr_007_action addr 0x1
diff --git a/dep/pipeline/shr_008/ethdev.io b/dep/pipeline/shr_008/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/shr_008/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/shr_008/pcap_files/in_1.txt b/dep/pipeline/shr_008/pcap_files/in_1.txt
new file mode 100644
index 00000000..6b124802
--- /dev/null
+++ b/dep/pipeline/shr_008/pcap_files/in_1.txt
@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 22 00 01 00 00 40 11 4e b6 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 0e c9 88 58 58 58 58 58 58
diff --git a/dep/pipeline/shr_008/pcap_files/out_1.txt b/dep/pipeline/shr_008/pcap_files/out_1.txt
new file mode 100644
index 00000000..8ea7101b
--- /dev/null
+++ b/dep/pipeline/shr_008/pcap_files/out_1.txt
@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 22 00 01 00 00 20 11 4e b6 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 0e c9 88 58 58 58 58 58 58
diff --git a/dep/pipeline/shr_008/readme.md b/dep/pipeline/shr_008/readme.md
new file mode 100644
index 00000000..6652a415
--- /dev/null
+++ b/dep/pipeline/shr_008/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_shr_008
+-----------------------
+
+ Instructions being tested:
+ shr m.field t.field
+
+ Description:
+ For a packet with matching destination IP address, TTL value is shifted right by the amount mentioned in the table.
+
+ Verification:
+ TTL value of the received packet will be shifted right by the value mentioned in the table.
diff --git a/dep/pipeline/shr_008/shr_008.cli b/dep/pipeline/shr_008/shr_008.cli
new file mode 100755
index 00000000..ab7ac2fe
--- /dev/null
+++ b/dep/pipeline/shr_008/shr_008.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/shr_008/shr_008.spec /tmp/pipeline/shr_008/shr_008.c
+pipeline libbuild /tmp/pipeline/shr_008/shr_008.c /tmp/pipeline/shr_008/shr_008.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/shr_008/shr_008.so io /tmp/pipeline/shr_008/ethdev.io numa 0
+pipeline PIPELINE0 table shr_008 add /tmp/pipeline/shr_008/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/shr_008/shr_008.spec b/dep/pipeline/shr_008/shr_008.spec
new file mode 100755
index 00000000..0b461281
--- /dev/null
+++ b/dep/pipeline/shr_008/shr_008.spec
@@ -0,0 +1,85 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port
+ bit<8> ttl
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct shr_008_args_t {
+ bit<8> ttl
+}
+
+action shr_008_action args instanceof shr_008_args_t {
+ mov m.ttl h.ipv4.ttl
+ shr m.ttl t.ttl
+ mov h.ipv4.ttl m.ttl
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Table
+//
+table shr_008 {
+ key {
+ h.ipv4.dst_addr exact
+ }
+
+ actions {
+ shr_008_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ table shr_008
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/shr_008/table.txt b/dep/pipeline/shr_008/table.txt
new file mode 100755
index 00000000..cf424f56
--- /dev/null
+++ b/dep/pipeline/shr_008/table.txt
@@ -0,0 +1 @@
+match 0xc800000a action shr_008_action ttl 0x1
diff --git a/dep/pipeline/sub_001/ethdev.io b/dep/pipeline/sub_001/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/sub_001/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/sub_001/pcap_files/in_1.txt b/dep/pipeline/sub_001/pcap_files/in_1.txt
new file mode 100644
index 00000000..75115c15
--- /dev/null
+++ b/dep/pipeline/sub_001/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/sub_001/pcap_files/out_1.txt b/dep/pipeline/sub_001/pcap_files/out_1.txt
new file mode 100644
index 00000000..d0510ac5
--- /dev/null
+++ b/dep/pipeline/sub_001/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 54 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/sub_001/readme.md b/dep/pipeline/sub_001/readme.md
new file mode 100644
index 00000000..5b9337f2
--- /dev/null
+++ b/dep/pipeline/sub_001/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_sub_001
+-----------------------
+
+ Instruction being tested:
+ sub h.field immediate_value
+
+ Description:
+ Subtract one from the destination MAC address of the received packet and transmit it back on the same port.
+
+ Verification:
+ Destination MAC address of the transmitted packet should be one less than the destination MAC address of the received packet.
diff --git a/dep/pipeline/sub_001/sub_001.cli b/dep/pipeline/sub_001/sub_001.cli
new file mode 100644
index 00000000..98609e3a
--- /dev/null
+++ b/dep/pipeline/sub_001/sub_001.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/sub_001/sub_001.spec /tmp/pipeline/sub_001/sub_001.c
+pipeline libbuild /tmp/pipeline/sub_001/sub_001.c /tmp/pipeline/sub_001/sub_001.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/sub_001/sub_001.so io /tmp/pipeline/sub_001/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/sub_001/sub_001.spec b/dep/pipeline/sub_001/sub_001.spec
new file mode 100644
index 00000000..ed586014
--- /dev/null
+++ b/dep/pipeline/sub_001/sub_001.spec
@@ -0,0 +1,33 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ sub h.ethernet.dst_addr 1
+ emit h.ethernet
+ tx m.port
+}
diff --git a/dep/pipeline/sub_002/ethdev.io b/dep/pipeline/sub_002/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/sub_002/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/sub_002/pcap_files/in_1.txt b/dep/pipeline/sub_002/pcap_files/in_1.txt
new file mode 100644
index 00000000..b7a672b6
--- /dev/null
+++ b/dep/pipeline/sub_002/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 0f 0f 0f 0f 0f 0f ff f0 f0 f0 f0 f0 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b6 64 00 00 09 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 94 00 00 58 58 58 58 58 58
+# Packet 1
+000000 0f 0f 0f 0f 0f 0f 00 00 00 00 00 10 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b6 64 00 00 09 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 94 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/sub_002/pcap_files/out_1.txt b/dep/pipeline/sub_002/pcap_files/out_1.txt
new file mode 100644
index 00000000..79f3a03f
--- /dev/null
+++ b/dep/pipeline/sub_002/pcap_files/out_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 0f 0f 0f 0f 0f 0f ff f0 f0 f0 f0 c2 08 00 45 00
+000010 00 2e 00 01 00 00 8a 06 4e b6 9b ff ff ff c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 94 00 00 58 58 58 58 58 58
+# Packet 1
+000000 0f 0f 0f 0f 0f 0f ff ff ff ff ff e2 08 00 45 00
+000010 00 2e 00 01 00 00 8a 06 4e b6 9b ff ff ff c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 94 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/sub_002/readme.md b/dep/pipeline/sub_002/readme.md
new file mode 100644
index 00000000..18118271
--- /dev/null
+++ b/dep/pipeline/sub_002/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_sub_002
+-----------------------
+
+ Instruction being tested:
+ sub h.field h.field
+
+ Description:
+ For the received packet, ethernet src addr = ethernet src addr - ipv4 total length, ipv4 src addr = ipv4 src addr - ipv4 dst addr ,and ipv4 ttl = ipv4 ttl - ipv4 header checksum
+
+ Verification:
+ Verify using input and output pcap files.
diff --git a/dep/pipeline/sub_002/sub_002.cli b/dep/pipeline/sub_002/sub_002.cli
new file mode 100644
index 00000000..0281ba30
--- /dev/null
+++ b/dep/pipeline/sub_002/sub_002.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/sub_002/sub_002.spec /tmp/pipeline/sub_002/sub_002.c
+pipeline libbuild /tmp/pipeline/sub_002/sub_002.c /tmp/pipeline/sub_002/sub_002.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/sub_002/sub_002.so io /tmp/pipeline/sub_002/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/sub_002/sub_002.spec b/dep/pipeline/sub_002/sub_002.spec
new file mode 100644
index 00000000..5b5242c4
--- /dev/null
+++ b/dep/pipeline/sub_002/sub_002.spec
@@ -0,0 +1,51 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ sub h.ethernet.src_addr h.ipv4.total_len // >
+ sub h.ipv4.src_addr h.ipv4.dst_addr // =
+ sub h.ipv4.ttl h.ipv4.hdr_checksum // <
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/sub_003/ethdev.io b/dep/pipeline/sub_003/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/sub_003/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/sub_003/pcap_files/in_1.txt b/dep/pipeline/sub_003/pcap_files/in_1.txt
new file mode 100644
index 00000000..75115c15
--- /dev/null
+++ b/dep/pipeline/sub_003/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/sub_003/pcap_files/out_1.txt b/dep/pipeline/sub_003/pcap_files/out_1.txt
new file mode 100644
index 00000000..d0510ac5
--- /dev/null
+++ b/dep/pipeline/sub_003/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 54 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/sub_003/readme.md b/dep/pipeline/sub_003/readme.md
new file mode 100644
index 00000000..1a19bb6f
--- /dev/null
+++ b/dep/pipeline/sub_003/readme.md
@@ -0,0 +1,12 @@
+Test Case: test_sub_003
+-----------------------
+
+ Instruction being tested:
+ sub m.field immediate_value
+
+ Description:
+ Decrement by one the destination MAC address of the received packet by copying that field into metadata and transmit it back on
+ the same port.
+
+ Verification:
+ Destination MAC address of the transmitted packet should be the one less than that of the received packet.
diff --git a/dep/pipeline/sub_003/sub_003.cli b/dep/pipeline/sub_003/sub_003.cli
new file mode 100644
index 00000000..e90a7660
--- /dev/null
+++ b/dep/pipeline/sub_003/sub_003.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/sub_003/sub_003.spec /tmp/pipeline/sub_003/sub_003.c
+pipeline libbuild /tmp/pipeline/sub_003/sub_003.c /tmp/pipeline/sub_003/sub_003.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/sub_003/sub_003.so io /tmp/pipeline/sub_003/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/sub_003/sub_003.spec b/dep/pipeline/sub_003/sub_003.spec
new file mode 100644
index 00000000..4a8d9ed8
--- /dev/null
+++ b/dep/pipeline/sub_003/sub_003.spec
@@ -0,0 +1,36 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<48> addr
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ mov m.addr h.ethernet.dst_addr
+ sub m.addr 1
+ mov h.ethernet.dst_addr m.addr
+ emit h.ethernet
+ tx m.port
+}
diff --git a/dep/pipeline/sub_004/ethdev.io b/dep/pipeline/sub_004/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/sub_004/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/sub_004/pcap_files/in_1.txt b/dep/pipeline/sub_004/pcap_files/in_1.txt
new file mode 100644
index 00000000..e23beaaf
--- /dev/null
+++ b/dep/pipeline/sub_004/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 0f 0f 0f 0f 0f 0f ff f0 f0 f0 f0 f0 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b6 64 00 00 09 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 94 00 00 58 58 58 58 58 58
+# Packet 1
+000000 0f 0f 0f 0f 0f 0f 00 00 00 f0 f0 f0 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b6 64 00 00 09 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 94 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/sub_004/pcap_files/out_1.txt b/dep/pipeline/sub_004/pcap_files/out_1.txt
new file mode 100644
index 00000000..c910d165
--- /dev/null
+++ b/dep/pipeline/sub_004/pcap_files/out_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 0f 0f 0f 0f 0f 0f ff f0 28 f0 f0 e6 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e ac 9b ff ff ff c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 94 00 00 58 58 58 58 58 58
+# Packet 1
+000000 0f 0f 0f 0f 0f 0f ff ff 38 f0 f0 e6 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e ac 9b ff ff ff c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 94 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/sub_004/readme.md b/dep/pipeline/sub_004/readme.md
new file mode 100644
index 00000000..fa81f776
--- /dev/null
+++ b/dep/pipeline/sub_004/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_sub_004
+-----------------------
+
+ Instruction being tested:
+ sub m.field h.field
+
+ Description:
+ For the received packet, ethernet src addr = ethernet src addr - ipv4 dst addr, ipv4 src addr = ipv4 src addr - ipv4 dst addr ,and ipv4 ttl = ipv4 ttl - ipv4 dst addr
+
+ Verification:
+ Verify using input and output pcap files.
diff --git a/dep/pipeline/sub_004/sub_004.cli b/dep/pipeline/sub_004/sub_004.cli
new file mode 100644
index 00000000..89f13dd4
--- /dev/null
+++ b/dep/pipeline/sub_004/sub_004.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/sub_004/sub_004.spec /tmp/pipeline/sub_004/sub_004.c
+pipeline libbuild /tmp/pipeline/sub_004/sub_004.c /tmp/pipeline/sub_004/sub_004.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/sub_004/sub_004.so io /tmp/pipeline/sub_004/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/sub_004/sub_004.spec b/dep/pipeline/sub_004/sub_004.spec
new file mode 100644
index 00000000..0e3a9dc8
--- /dev/null
+++ b/dep/pipeline/sub_004/sub_004.spec
@@ -0,0 +1,60 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<48> eth_src_addr
+ bit<32> ip_src_addr
+ bit<16> ip_hdr_checksum
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ mov m.eth_src_addr h.ethernet.src_addr
+ mov m.ip_src_addr h.ipv4.src_addr
+ mov m.ip_hdr_checksum h.ipv4.hdr_checksum
+ sub m.eth_src_addr h.ipv4.dst_addr // >
+ sub m.ip_src_addr h.ipv4.dst_addr // =
+ sub m.ip_hdr_checksum h.ipv4.dst_addr // <
+ mov h.ethernet.src_addr m.eth_src_addr
+ mov h.ipv4.src_addr m.ip_src_addr
+ mov h.ipv4.hdr_checksum m.ip_hdr_checksum
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/sub_005/ethdev.io b/dep/pipeline/sub_005/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/sub_005/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/sub_005/pcap_files/in_1.txt b/dep/pipeline/sub_005/pcap_files/in_1.txt
new file mode 100644
index 00000000..b7a672b6
--- /dev/null
+++ b/dep/pipeline/sub_005/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 0f 0f 0f 0f 0f 0f ff f0 f0 f0 f0 f0 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b6 64 00 00 09 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 94 00 00 58 58 58 58 58 58
+# Packet 1
+000000 0f 0f 0f 0f 0f 0f 00 00 00 00 00 10 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b6 64 00 00 09 c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 94 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/sub_005/pcap_files/out_1.txt b/dep/pipeline/sub_005/pcap_files/out_1.txt
new file mode 100644
index 00000000..79f3a03f
--- /dev/null
+++ b/dep/pipeline/sub_005/pcap_files/out_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 0f 0f 0f 0f 0f 0f ff f0 f0 f0 f0 c2 08 00 45 00
+000010 00 2e 00 01 00 00 8a 06 4e b6 9b ff ff ff c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 94 00 00 58 58 58 58 58 58
+# Packet 1
+000000 0f 0f 0f 0f 0f 0f ff ff ff ff ff e2 08 00 45 00
+000010 00 2e 00 01 00 00 8a 06 4e b6 9b ff ff ff c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 94 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/sub_005/readme.md b/dep/pipeline/sub_005/readme.md
new file mode 100644
index 00000000..3252b833
--- /dev/null
+++ b/dep/pipeline/sub_005/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_sub_005
+-----------------------
+
+ Instruction being tested:
+ sub h.field m.field
+
+ Description:
+ For the received packet, ethernet src addr = ethernet src addr - ipv4 total length, ipv4 src addr = ipv4 src addr - ipv4 dst addr , and ipv4 ttl = ipv4 ttl - ipv4 header checksum
+
+ Verification:
+ Verify using input and output pcap files.
diff --git a/dep/pipeline/sub_005/sub_005.cli b/dep/pipeline/sub_005/sub_005.cli
new file mode 100644
index 00000000..0bbc2deb
--- /dev/null
+++ b/dep/pipeline/sub_005/sub_005.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/sub_005/sub_005.spec /tmp/pipeline/sub_005/sub_005.c
+pipeline libbuild /tmp/pipeline/sub_005/sub_005.c /tmp/pipeline/sub_005/sub_005.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/sub_005/sub_005.so io /tmp/pipeline/sub_005/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/sub_005/sub_005.spec b/dep/pipeline/sub_005/sub_005.spec
new file mode 100644
index 00000000..e707dbbf
--- /dev/null
+++ b/dep/pipeline/sub_005/sub_005.spec
@@ -0,0 +1,58 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<16> ipv4_total_len
+ bit<32> ipv4_dst_addr
+ bit<16> ipv4_hdr_checksum
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+
+ mov m.ipv4_total_len h.ipv4.total_len
+ mov m.ipv4_dst_addr h.ipv4.dst_addr
+ mov m.ipv4_hdr_checksum h.ipv4.hdr_checksum
+ sub h.ethernet.src_addr m.ipv4_total_len
+ sub h.ipv4.src_addr m.ipv4_dst_addr
+ sub h.ipv4.ttl m.ipv4_hdr_checksum
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/sub_006/ethdev.io b/dep/pipeline/sub_006/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/sub_006/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/sub_006/pcap_files/in_1.txt b/dep/pipeline/sub_006/pcap_files/in_1.txt
new file mode 100644
index 00000000..583686b6
--- /dev/null
+++ b/dep/pipeline/sub_006/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 30 32 34 36 38 3a 20 21 22 23 24 25 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/sub_006/pcap_files/out_1.txt b/dep/pipeline/sub_006/pcap_files/out_1.txt
new file mode 100644
index 00000000..c7e0552c
--- /dev/null
+++ b/dep/pipeline/sub_006/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 10 11 12 13 14 15 20 21 22 23 24 25 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/sub_006/readme.md b/dep/pipeline/sub_006/readme.md
new file mode 100644
index 00000000..7750e8bc
--- /dev/null
+++ b/dep/pipeline/sub_006/readme.md
@@ -0,0 +1,12 @@
+Test Case: test_sub_006
+-----------------------
+
+ Instruction being tested:
+ sub m.field m.field
+
+ Description:
+ For the received packet, subtract the source MAC address from the destination MAC address and transmit it back on the same port.
+
+ Verification:
+ Destination MAC address of the transmitted packet should be the difference of destination and source MAC addresses respectively
+ of the received packet.
diff --git a/dep/pipeline/sub_006/sub_006.cli b/dep/pipeline/sub_006/sub_006.cli
new file mode 100644
index 00000000..0d0ae78d
--- /dev/null
+++ b/dep/pipeline/sub_006/sub_006.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/sub_006/sub_006.spec /tmp/pipeline/sub_006/sub_006.c
+pipeline libbuild /tmp/pipeline/sub_006/sub_006.c /tmp/pipeline/sub_006/sub_006.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/sub_006/sub_006.so io /tmp/pipeline/sub_006/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/sub_006/sub_006.spec b/dep/pipeline/sub_006/sub_006.spec
new file mode 100644
index 00000000..fa0cfd56
--- /dev/null
+++ b/dep/pipeline/sub_006/sub_006.spec
@@ -0,0 +1,38 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<48> addr_1
+ bit<48> addr_2
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ mov m.addr_1 h.ethernet.src_addr
+ mov m.addr_2 h.ethernet.dst_addr
+ sub m.addr_2 m.addr_1
+ mov h.ethernet.dst_addr m.addr_2
+ emit h.ethernet
+ tx m.port
+}
diff --git a/dep/pipeline/sub_007/ethdev.io b/dep/pipeline/sub_007/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/sub_007/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/sub_007/pcap_files/in_1.txt b/dep/pipeline/sub_007/pcap_files/in_1.txt
new file mode 100644
index 00000000..6b124802
--- /dev/null
+++ b/dep/pipeline/sub_007/pcap_files/in_1.txt
@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 22 00 01 00 00 40 11 4e b6 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 0e c9 88 58 58 58 58 58 58
diff --git a/dep/pipeline/sub_007/pcap_files/out_1.txt b/dep/pipeline/sub_007/pcap_files/out_1.txt
new file mode 100644
index 00000000..f29c562d
--- /dev/null
+++ b/dep/pipeline/sub_007/pcap_files/out_1.txt
@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 22 00 01 00 00 3f 11 4e b6 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 0e c9 88 58 58 58 58 58 58
diff --git a/dep/pipeline/sub_007/readme.md b/dep/pipeline/sub_007/readme.md
new file mode 100644
index 00000000..81eb79a1
--- /dev/null
+++ b/dep/pipeline/sub_007/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_sub_007
+-----------------------
+
+ Instructions being tested:
+ sub h.field t.field
+
+ Description
+ For a packet with matching destination MAC address, Reduce the TTL of the packet by the value in the table and transmit the packet in the same port.
+
+ Verification:
+ TTL value of the received packet is decremented by the value stored in the table.
diff --git a/dep/pipeline/sub_007/sub_007.cli b/dep/pipeline/sub_007/sub_007.cli
new file mode 100755
index 00000000..c557630f
--- /dev/null
+++ b/dep/pipeline/sub_007/sub_007.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/sub_007/sub_007.spec /tmp/pipeline/sub_007/sub_007.c
+pipeline libbuild /tmp/pipeline/sub_007/sub_007.c /tmp/pipeline/sub_007/sub_007.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/sub_007/sub_007.so io /tmp/pipeline/sub_007/ethdev.io numa 0
+pipeline PIPELINE0 table sub_007 add /tmp/pipeline/sub_007/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/sub_007/sub_007.spec b/dep/pipeline/sub_007/sub_007.spec
new file mode 100755
index 00000000..d4a34751
--- /dev/null
+++ b/dep/pipeline/sub_007/sub_007.spec
@@ -0,0 +1,82 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct sub_007_args_t {
+ bit<8> ttl
+}
+
+action sub_007_action args instanceof sub_007_args_t {
+ sub h.ipv4.ttl t.ttl
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Table
+//
+table sub_007 {
+ key {
+ h.ethernet.dst_addr exact
+ }
+
+ actions {
+ sub_007_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ table sub_007
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/sub_007/table.txt b/dep/pipeline/sub_007/table.txt
new file mode 100755
index 00000000..5d608a0f
--- /dev/null
+++ b/dep/pipeline/sub_007/table.txt
@@ -0,0 +1 @@
+match 0x525400124457 action sub_007_action ttl 0x1
diff --git a/dep/pipeline/sub_008/ethdev.io b/dep/pipeline/sub_008/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/sub_008/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/sub_008/pcap_files/in_1.txt b/dep/pipeline/sub_008/pcap_files/in_1.txt
new file mode 100644
index 00000000..6b124802
--- /dev/null
+++ b/dep/pipeline/sub_008/pcap_files/in_1.txt
@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 22 00 01 00 00 40 11 4e b6 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 0e c9 88 58 58 58 58 58 58
diff --git a/dep/pipeline/sub_008/pcap_files/out_1.txt b/dep/pipeline/sub_008/pcap_files/out_1.txt
new file mode 100644
index 00000000..03ea4b29
--- /dev/null
+++ b/dep/pipeline/sub_008/pcap_files/out_1.txt
@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 22 00 01 00 00 40 11 4e b6 64 00 00 09 c8 00
+000020 00 0a 00 64 00 c8 00 0e c9 88 58 58 58 58 58 58
diff --git a/dep/pipeline/sub_008/readme.md b/dep/pipeline/sub_008/readme.md
new file mode 100644
index 00000000..407e7c39
--- /dev/null
+++ b/dep/pipeline/sub_008/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_sub_008
+-----------------------
+
+ Instructions being tested:
+ sub m.field t.field
+
+ Description:
+ For a packet with matching destination IP address, Decrement the source IP address by the value present in the table and send the packet on the same port.
+
+ Verification:
+ Source IP address of the received packet will have decremented by the value stored in the table.
diff --git a/dep/pipeline/sub_008/sub_008.cli b/dep/pipeline/sub_008/sub_008.cli
new file mode 100755
index 00000000..1b7106ff
--- /dev/null
+++ b/dep/pipeline/sub_008/sub_008.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/sub_008/sub_008.spec /tmp/pipeline/sub_008/sub_008.c
+pipeline libbuild /tmp/pipeline/sub_008/sub_008.c /tmp/pipeline/sub_008/sub_008.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/sub_008/sub_008.so io /tmp/pipeline/sub_008/ethdev.io numa 0
+pipeline PIPELINE0 table sub_008 add /tmp/pipeline/sub_008/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/sub_008/sub_008.spec b/dep/pipeline/sub_008/sub_008.spec
new file mode 100755
index 00000000..ff2bb86f
--- /dev/null
+++ b/dep/pipeline/sub_008/sub_008.spec
@@ -0,0 +1,85 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port
+ bit<32> addr
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct sub_008_args_t {
+ bit<32> value
+}
+
+action sub_008_action args instanceof sub_008_args_t {
+ mov m.addr h.ipv4.src_addr
+ sub m.addr t.value
+ mov h.ipv4.src_addr m.addr
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Table
+//
+table sub_008 {
+ key {
+ h.ipv4.dst_addr exact
+ }
+
+ actions {
+ sub_008_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ table sub_008
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/sub_008/table.txt b/dep/pipeline/sub_008/table.txt
new file mode 100755
index 00000000..f9eec795
--- /dev/null
+++ b/dep/pipeline/sub_008/table.txt
@@ -0,0 +1 @@
+match 0xc800000a action sub_008_action value 0x1
diff --git a/dep/pipeline/table_001/ethdev.io b/dep/pipeline/table_001/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/table_001/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/table_001/pcap_files/in_1.txt b/dep/pipeline/table_001/pcap_files/in_1.txt
new file mode 100644
index 00000000..75115c15
--- /dev/null
+++ b/dep/pipeline/table_001/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/table_001/pcap_files/out_1.txt b/dep/pipeline/table_001/pcap_files/out_1.txt
new file mode 100644
index 00000000..af99918e
--- /dev/null
+++ b/dep/pipeline/table_001/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 11 22 33 44 55 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/table_001/readme.md b/dep/pipeline/table_001/readme.md
new file mode 100644
index 00000000..8e397c3e
--- /dev/null
+++ b/dep/pipeline/table_001/readme.md
@@ -0,0 +1,12 @@
+Test Case: test_table_001
+-------------------------
+
+ Instruction being tested:
+ table TABLE_NAME
+ return
+
+ Description:
+ Copy the destination MAC address of the received packet into the source MAC address and transmit the packet back on the same port.
+
+ Verification:
+ Source and destination MAC address fields of transmitted packets by DUT should have same value.
diff --git a/dep/pipeline/table_001/table_001.cli b/dep/pipeline/table_001/table_001.cli
new file mode 100644
index 00000000..756839fd
--- /dev/null
+++ b/dep/pipeline/table_001/table_001.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/table_001/table_001.spec /tmp/pipeline/table_001/table_001.c
+pipeline libbuild /tmp/pipeline/table_001/table_001.c /tmp/pipeline/table_001/table_001.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/table_001/table_001.so io /tmp/pipeline/table_001/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/table_001/table_001.spec b/dep/pipeline/table_001/table_001.spec
new file mode 100644
index 00000000..50928c7f
--- /dev/null
+++ b/dep/pipeline/table_001/table_001.spec
@@ -0,0 +1,55 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions.
+//
+action table_001_action args none {
+ mov h.ethernet.src_addr h.ethernet.dst_addr
+ return
+}
+
+//
+// Tables.
+//
+table table_001 {
+ key {
+ }
+
+ actions {
+ table_001_action
+ }
+
+ default_action table_001_action args none const
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ table table_001
+ emit h.ethernet
+ tx m.port
+}
diff --git a/dep/pipeline/table_002/cmd_files/cmd_2.txt b/dep/pipeline/table_002/cmd_files/cmd_2.txt
new file mode 100644
index 00000000..578266db
--- /dev/null
+++ b/dep/pipeline/table_002/cmd_files/cmd_2.txt
@@ -0,0 +1 @@
+match 0xaabbccdd0000 action table_002_action_01 ethernet_dst_addr 0xa0a1a2a30000 ethernet_src_addr 0xb0b1b2b30000 ethernet_ethertype 0x0800
diff --git a/dep/pipeline/table_002/cmd_files/cmd_3.txt b/dep/pipeline/table_002/cmd_files/cmd_3.txt
new file mode 100644
index 00000000..27f9c92e
--- /dev/null
+++ b/dep/pipeline/table_002/cmd_files/cmd_3.txt
@@ -0,0 +1 @@
+match 0xaabbccdd0001 action table_002_action_01 ethernet_dst_addr 0xa0a1a2a30001 ethernet_src_addr 0xb0b1b2b30001 ethernet_ethertype 0x0800
diff --git a/dep/pipeline/table_002/cmd_files/cmd_4_1.txt b/dep/pipeline/table_002/cmd_files/cmd_4_1.txt
new file mode 100644
index 00000000..578266db
--- /dev/null
+++ b/dep/pipeline/table_002/cmd_files/cmd_4_1.txt
@@ -0,0 +1 @@
+match 0xaabbccdd0000 action table_002_action_01 ethernet_dst_addr 0xa0a1a2a30000 ethernet_src_addr 0xb0b1b2b30000 ethernet_ethertype 0x0800
diff --git a/dep/pipeline/table_002/cmd_files/cmd_4_2.txt b/dep/pipeline/table_002/cmd_files/cmd_4_2.txt
new file mode 100644
index 00000000..27f9c92e
--- /dev/null
+++ b/dep/pipeline/table_002/cmd_files/cmd_4_2.txt
@@ -0,0 +1 @@
+match 0xaabbccdd0001 action table_002_action_01 ethernet_dst_addr 0xa0a1a2a30001 ethernet_src_addr 0xb0b1b2b30001 ethernet_ethertype 0x0800
diff --git a/dep/pipeline/table_002/cmd_files/cmd_5_1.txt b/dep/pipeline/table_002/cmd_files/cmd_5_1.txt
new file mode 100644
index 00000000..55641674
--- /dev/null
+++ b/dep/pipeline/table_002/cmd_files/cmd_5_1.txt
@@ -0,0 +1 @@
+match 0xaabbccdd0000 action table_002_action_01 ethernet_dst_addr 0xa0a1a2a30000 ethernet_src_addr 0xb0b1b2b30000 ethernet_ethertype 0x800
diff --git a/dep/pipeline/table_002/cmd_files/cmd_5_2.txt b/dep/pipeline/table_002/cmd_files/cmd_5_2.txt
new file mode 100644
index 00000000..180ac95c
--- /dev/null
+++ b/dep/pipeline/table_002/cmd_files/cmd_5_2.txt
@@ -0,0 +1 @@
+match 0xaabbccdd0000 action table_002_action_02 ethernet_dst_addr 0xa0a1a2a30000 ethernet_src_addr 0xb0b1b2b30000 ethernet_ethertype 0x0800
diff --git a/dep/pipeline/table_002/cmd_files/cmd_6_1.txt b/dep/pipeline/table_002/cmd_files/cmd_6_1.txt
new file mode 100644
index 00000000..180ac95c
--- /dev/null
+++ b/dep/pipeline/table_002/cmd_files/cmd_6_1.txt
@@ -0,0 +1 @@
+match 0xaabbccdd0000 action table_002_action_02 ethernet_dst_addr 0xa0a1a2a30000 ethernet_src_addr 0xb0b1b2b30000 ethernet_ethertype 0x0800
diff --git a/dep/pipeline/table_002/cmd_files/cmd_6_2.txt b/dep/pipeline/table_002/cmd_files/cmd_6_2.txt
new file mode 100644
index 00000000..578266db
--- /dev/null
+++ b/dep/pipeline/table_002/cmd_files/cmd_6_2.txt
@@ -0,0 +1 @@
+match 0xaabbccdd0000 action table_002_action_01 ethernet_dst_addr 0xa0a1a2a30000 ethernet_src_addr 0xb0b1b2b30000 ethernet_ethertype 0x0800
diff --git a/dep/pipeline/table_002/ethdev.io b/dep/pipeline/table_002/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/table_002/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/table_002/pcap_files/in_1.txt b/dep/pipeline/table_002/pcap_files/in_1.txt
new file mode 100644
index 00000000..4d830793
--- /dev/null
+++ b/dep/pipeline/table_002/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/table_002/pcap_files/in_2.txt b/dep/pipeline/table_002/pcap_files/in_2.txt
new file mode 100644
index 00000000..1aecb299
--- /dev/null
+++ b/dep/pipeline/table_002/pcap_files/in_2.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 01 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/table_002/pcap_files/in_3.txt b/dep/pipeline/table_002/pcap_files/in_3.txt
new file mode 100644
index 00000000..e36ffd14
--- /dev/null
+++ b/dep/pipeline/table_002/pcap_files/in_3.txt
@@ -0,0 +1,22 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 02 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc dd 00 01 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/table_002/pcap_files/in_4_1.txt b/dep/pipeline/table_002/pcap_files/in_4_1.txt
new file mode 100644
index 00000000..882df21d
--- /dev/null
+++ b/dep/pipeline/table_002/pcap_files/in_4_1.txt
@@ -0,0 +1,22 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 01 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc dd 00 02 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/table_002/pcap_files/in_4_2.txt b/dep/pipeline/table_002/pcap_files/in_4_2.txt
new file mode 100644
index 00000000..882df21d
--- /dev/null
+++ b/dep/pipeline/table_002/pcap_files/in_4_2.txt
@@ -0,0 +1,22 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 01 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc dd 00 02 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/table_002/pcap_files/in_5_1.txt b/dep/pipeline/table_002/pcap_files/in_5_1.txt
new file mode 100644
index 00000000..1aecb299
--- /dev/null
+++ b/dep/pipeline/table_002/pcap_files/in_5_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 01 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/table_002/pcap_files/in_6_1.txt b/dep/pipeline/table_002/pcap_files/in_6_1.txt
new file mode 100644
index 00000000..1aecb299
--- /dev/null
+++ b/dep/pipeline/table_002/pcap_files/in_6_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 01 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/table_002/pcap_files/in_6_2.txt b/dep/pipeline/table_002/pcap_files/in_6_2.txt
new file mode 100644
index 00000000..1aecb299
--- /dev/null
+++ b/dep/pipeline/table_002/pcap_files/in_6_2.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 01 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/table_002/pcap_files/out_1.txt b/dep/pipeline/table_002/pcap_files/out_1.txt
new file mode 100644
index 00000000..af0fc303
--- /dev/null
+++ b/dep/pipeline/table_002/pcap_files/out_1.txt
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
diff --git a/dep/pipeline/table_002/pcap_files/out_2.txt b/dep/pipeline/table_002/pcap_files/out_2.txt
new file mode 100644
index 00000000..568e4959
--- /dev/null
+++ b/dep/pipeline/table_002/pcap_files/out_2.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 a0 a1 a2 a3 00 00 b0 b1 b2 b3 00 00 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/table_002/pcap_files/out_3.txt b/dep/pipeline/table_002/pcap_files/out_3.txt
new file mode 100644
index 00000000..e3037eec
--- /dev/null
+++ b/dep/pipeline/table_002/pcap_files/out_3.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 a0 a1 a2 a3 00 00 b0 b1 b2 b3 00 00 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 a0 a1 a2 a3 00 01 b0 b1 b2 b3 00 01 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/table_002/pcap_files/out_4_1.txt b/dep/pipeline/table_002/pcap_files/out_4_1.txt
new file mode 100644
index 00000000..a0ccfcd7
--- /dev/null
+++ b/dep/pipeline/table_002/pcap_files/out_4_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 a0 a1 a2 a3 00 01 b0 b1 b2 b3 00 01 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/table_002/pcap_files/out_4_2.txt b/dep/pipeline/table_002/pcap_files/out_4_2.txt
new file mode 100644
index 00000000..af0fc303
--- /dev/null
+++ b/dep/pipeline/table_002/pcap_files/out_4_2.txt
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
diff --git a/dep/pipeline/table_002/pcap_files/out_5_1.txt b/dep/pipeline/table_002/pcap_files/out_5_1.txt
new file mode 100644
index 00000000..568e4959
--- /dev/null
+++ b/dep/pipeline/table_002/pcap_files/out_5_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 a0 a1 a2 a3 00 00 b0 b1 b2 b3 00 00 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/table_002/pcap_files/out_6_1.txt b/dep/pipeline/table_002/pcap_files/out_6_1.txt
new file mode 100644
index 00000000..af0fc303
--- /dev/null
+++ b/dep/pipeline/table_002/pcap_files/out_6_1.txt
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
diff --git a/dep/pipeline/table_002/pcap_files/out_6_2.txt b/dep/pipeline/table_002/pcap_files/out_6_2.txt
new file mode 100644
index 00000000..568e4959
--- /dev/null
+++ b/dep/pipeline/table_002/pcap_files/out_6_2.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 a0 a1 a2 a3 00 00 b0 b1 b2 b3 00 00 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/table_002/readme.md b/dep/pipeline/table_002/readme.md
new file mode 100644
index 00000000..abbe59bf
--- /dev/null
+++ b/dep/pipeline/table_002/readme.md
@@ -0,0 +1,37 @@
+Test Case: test_table_002
+-------------------------
+
+ Description:
+ Testing the table update scenarios.
+
+ Scenario: Empty Table
+ Test: Lookup miss for any packet.
+ CMD_FILE: None
+ PCAP Files: in_1.txt, out_1.txt
+
+ Scenario: Table with a Single Key
+ Test: Lookup hit for the right packet, lookup miss with any other packet.
+ CMD_FILE: cmd_2.txt
+ PCAP Files: in_2.txt, out_2.txt
+
+ Scenario: Table with 2 Keys
+ Test: Lookup hit for the right packets (hitting key A or key B), lookup miss for any other packet. To check whether
+ adding key B does not (incorrectly) override key A in the table.
+ CMD_FILE: cmd_3.txt
+ PCAP Files: in_3.txt, out_3.txt
+
+ Scenario: Key Deletion
+ Test: Table with 2 rules (key A first, key B second), lookup hit for both.
+ Delete key A => lookup MISS for key A (deleted), lookup HIT for key B (still in the table).
+ Delete key B => lookup MISS for both keys A and B (deleted).
+ CMD_FILE: cmd_4_1.txt, cmd_4_2.txt
+ PCAP Files: in_4_1.txt, out_4_1.txt, in_4_2.txt, out_4_2.txt, in_4_3.txt, out_4_3.txt
+
+ Scenario: Action update
+ Test: Add key A with action X => lookup hit for key A with action X executed. Add the same key A with action Y =>
+ lookup hit for key A with action Y being executed at this point.
+
+ Scenario: Default Entry Test
+ Empty table => lookup MISS with default action executed.
+ Add key A => lookup hit for the right packet with the specific key associated action executed, lookup miss for
+ any other packets with default action executed.
diff --git a/dep/pipeline/table_002/table_002.cli b/dep/pipeline/table_002/table_002.cli
new file mode 100644
index 00000000..c71515f3
--- /dev/null
+++ b/dep/pipeline/table_002/table_002.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/table_002/table_002.spec /tmp/pipeline/table_002/table_002.c
+pipeline libbuild /tmp/pipeline/table_002/table_002.c /tmp/pipeline/table_002/table_002.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/table_002/table_002.so io /tmp/pipeline/table_002/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/table_002/table_002.spec b/dep/pipeline/table_002/table_002.spec
new file mode 100644
index 00000000..a352c662
--- /dev/null
+++ b/dep/pipeline/table_002/table_002.spec
@@ -0,0 +1,80 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port
+}
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct table_002_args_t {
+ bit<48> ethernet_dst_addr
+ bit<48> ethernet_src_addr
+ bit<16> ethernet_ethertype
+}
+
+action table_002_action_01 args instanceof table_002_args_t {
+ mov h.ethernet.dst_addr t.ethernet_dst_addr
+ mov h.ethernet.src_addr t.ethernet_src_addr
+ mov h.ethernet.ethertype t.ethernet_ethertype
+ validate h.ethernet
+ return
+}
+
+action table_002_action_02 args instanceof table_002_args_t {
+ mov h.ethernet.dst_addr t.ethernet_dst_addr
+ mov h.ethernet.src_addr t.ethernet_src_addr
+ mov h.ethernet.ethertype t.ethernet_ethertype
+ validate h.ethernet
+ xor m.port 1
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table table_002_table {
+ key {
+ h.ethernet.dst_addr exact
+ }
+
+ actions {
+ table_002_action_01
+ table_002_action_02
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ table table_002_table
+ emit h.ethernet
+ tx m.port
+}
diff --git a/dep/pipeline/table_003/cmd_files/cmd_2.txt b/dep/pipeline/table_003/cmd_files/cmd_2.txt
new file mode 100644
index 00000000..e26589c3
--- /dev/null
+++ b/dep/pipeline/table_003/cmd_files/cmd_2.txt
@@ -0,0 +1 @@
+match 0xaabbccdd0000/0xffffffffc000 priority 1 action table_003_action_01 ethernet_dst_addr 0xa0a1a2a30000 ethernet_src_addr 0xb0b1b2b30000 ethernet_ethertype 0x0800
diff --git a/dep/pipeline/table_003/cmd_files/cmd_3.txt b/dep/pipeline/table_003/cmd_files/cmd_3.txt
new file mode 100644
index 00000000..00f512bb
--- /dev/null
+++ b/dep/pipeline/table_003/cmd_files/cmd_3.txt
@@ -0,0 +1 @@
+match 0xaabbccdd8000/0xffffffffc000 priority 0 action table_003_action_01 ethernet_dst_addr 0xc0c1c2c30000 ethernet_src_addr 0xd0d1d2d30000 ethernet_ethertype 0x0800
diff --git a/dep/pipeline/table_003/cmd_files/cmd_4_1.txt b/dep/pipeline/table_003/cmd_files/cmd_4_1.txt
new file mode 100644
index 00000000..7060c9ce
--- /dev/null
+++ b/dep/pipeline/table_003/cmd_files/cmd_4_1.txt
@@ -0,0 +1 @@
+match 0xaabbccdd8000/0xffffffffc000 action table_003_action_01 ethernet_dst_addr 0xa0a1a2a30000 ethernet_src_addr 0xb0b1b2b30000 ethernet_ethertype 0x0800
diff --git a/dep/pipeline/table_003/cmd_files/cmd_4_2.txt b/dep/pipeline/table_003/cmd_files/cmd_4_2.txt
new file mode 100644
index 00000000..ad450bdc
--- /dev/null
+++ b/dep/pipeline/table_003/cmd_files/cmd_4_2.txt
@@ -0,0 +1 @@
+match 0xaabbccdd0000/0xffffffffc000 action table_003_action_01 ethernet_dst_addr 0xa0a1a2a30000 ethernet_src_addr 0xb0b1b2b30000 ethernet_ethertype 0x0800
diff --git a/dep/pipeline/table_003/cmd_files/cmd_5_1.txt b/dep/pipeline/table_003/cmd_files/cmd_5_1.txt
new file mode 100644
index 00000000..ad450bdc
--- /dev/null
+++ b/dep/pipeline/table_003/cmd_files/cmd_5_1.txt
@@ -0,0 +1 @@
+match 0xaabbccdd0000/0xffffffffc000 action table_003_action_01 ethernet_dst_addr 0xa0a1a2a30000 ethernet_src_addr 0xb0b1b2b30000 ethernet_ethertype 0x0800
diff --git a/dep/pipeline/table_003/cmd_files/cmd_5_2.txt b/dep/pipeline/table_003/cmd_files/cmd_5_2.txt
new file mode 100644
index 00000000..54b13f33
--- /dev/null
+++ b/dep/pipeline/table_003/cmd_files/cmd_5_2.txt
@@ -0,0 +1 @@
+match 0xaabbccdd0000/0xffffffffc000 action table_003_action_02 ethernet_dst_addr 0xa0a1a2a30000 ethernet_src_addr 0xb0b1b2b30000 ethernet_ethertype 0x0800
diff --git a/dep/pipeline/table_003/cmd_files/cmd_6_1_1.txt b/dep/pipeline/table_003/cmd_files/cmd_6_1_1.txt
new file mode 100644
index 00000000..54b13f33
--- /dev/null
+++ b/dep/pipeline/table_003/cmd_files/cmd_6_1_1.txt
@@ -0,0 +1 @@
+match 0xaabbccdd0000/0xffffffffc000 action table_003_action_02 ethernet_dst_addr 0xa0a1a2a30000 ethernet_src_addr 0xb0b1b2b30000 ethernet_ethertype 0x0800
diff --git a/dep/pipeline/table_003/cmd_files/cmd_6_1_2.txt b/dep/pipeline/table_003/cmd_files/cmd_6_1_2.txt
new file mode 100644
index 00000000..bbe3cfb2
--- /dev/null
+++ b/dep/pipeline/table_003/cmd_files/cmd_6_1_2.txt
@@ -0,0 +1 @@
+match 0xaabbccdd0000/0xffffffffc000 action table_003_action_01 ethernet_dst_addr 0xd0d1d2d30000 ethernet_src_addr 0xe0e1e2e30000 ethernet_ethertype 0x0800
diff --git a/dep/pipeline/table_003/cmd_files/cmd_6_2.txt b/dep/pipeline/table_003/cmd_files/cmd_6_2.txt
new file mode 100644
index 00000000..ad450bdc
--- /dev/null
+++ b/dep/pipeline/table_003/cmd_files/cmd_6_2.txt
@@ -0,0 +1 @@
+match 0xaabbccdd0000/0xffffffffc000 action table_003_action_01 ethernet_dst_addr 0xa0a1a2a30000 ethernet_src_addr 0xb0b1b2b30000 ethernet_ethertype 0x0800
diff --git a/dep/pipeline/table_003/ethdev.io b/dep/pipeline/table_003/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/table_003/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/table_003/pcap_files/in_1.txt b/dep/pipeline/table_003/pcap_files/in_1.txt
new file mode 100644
index 00000000..4d830793
--- /dev/null
+++ b/dep/pipeline/table_003/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/table_003/pcap_files/in_2.txt b/dep/pipeline/table_003/pcap_files/in_2.txt
new file mode 100644
index 00000000..2aef7242
--- /dev/null
+++ b/dep/pipeline/table_003/pcap_files/in_2.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 11 22 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd c1 22 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/table_003/pcap_files/in_3.txt b/dep/pipeline/table_003/pcap_files/in_3.txt
new file mode 100644
index 00000000..a0b18ced
--- /dev/null
+++ b/dep/pipeline/table_003/pcap_files/in_3.txt
@@ -0,0 +1,22 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd a3 54 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd cd 02 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc dd 3c 01 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/table_003/pcap_files/in_4_1.txt b/dep/pipeline/table_003/pcap_files/in_4_1.txt
new file mode 100644
index 00000000..6fb119b7
--- /dev/null
+++ b/dep/pipeline/table_003/pcap_files/in_4_1.txt
@@ -0,0 +1,22 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd a3 54 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 3c 01 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc dd cd 02 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/table_003/pcap_files/in_4_2.txt b/dep/pipeline/table_003/pcap_files/in_4_2.txt
new file mode 100644
index 00000000..6fb119b7
--- /dev/null
+++ b/dep/pipeline/table_003/pcap_files/in_4_2.txt
@@ -0,0 +1,22 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd a3 54 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 3c 01 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc dd cd 02 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/table_003/pcap_files/in_5_1.txt b/dep/pipeline/table_003/pcap_files/in_5_1.txt
new file mode 100644
index 00000000..6fb119b7
--- /dev/null
+++ b/dep/pipeline/table_003/pcap_files/in_5_1.txt
@@ -0,0 +1,22 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd a3 54 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 3c 01 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc dd cd 02 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/table_003/pcap_files/in_6_1.txt b/dep/pipeline/table_003/pcap_files/in_6_1.txt
new file mode 100644
index 00000000..6fb119b7
--- /dev/null
+++ b/dep/pipeline/table_003/pcap_files/in_6_1.txt
@@ -0,0 +1,22 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd a3 54 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 3c 01 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc dd cd 02 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/table_003/pcap_files/in_6_2.txt b/dep/pipeline/table_003/pcap_files/in_6_2.txt
new file mode 100644
index 00000000..6fb119b7
--- /dev/null
+++ b/dep/pipeline/table_003/pcap_files/in_6_2.txt
@@ -0,0 +1,22 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd a3 54 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 3c 01 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc dd cd 02 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/table_003/pcap_files/out_1.txt b/dep/pipeline/table_003/pcap_files/out_1.txt
new file mode 100644
index 00000000..af0fc303
--- /dev/null
+++ b/dep/pipeline/table_003/pcap_files/out_1.txt
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
diff --git a/dep/pipeline/table_003/pcap_files/out_2.txt b/dep/pipeline/table_003/pcap_files/out_2.txt
new file mode 100644
index 00000000..568e4959
--- /dev/null
+++ b/dep/pipeline/table_003/pcap_files/out_2.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 a0 a1 a2 a3 00 00 b0 b1 b2 b3 00 00 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/table_003/pcap_files/out_3.txt b/dep/pipeline/table_003/pcap_files/out_3.txt
new file mode 100644
index 00000000..143bd601
--- /dev/null
+++ b/dep/pipeline/table_003/pcap_files/out_3.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 c0 c1 c2 c3 00 00 d0 d1 d2 d3 00 00 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 a0 a1 a2 a3 00 00 b0 b1 b2 b3 00 00 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/table_003/pcap_files/out_4_1.txt b/dep/pipeline/table_003/pcap_files/out_4_1.txt
new file mode 100644
index 00000000..568e4959
--- /dev/null
+++ b/dep/pipeline/table_003/pcap_files/out_4_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 a0 a1 a2 a3 00 00 b0 b1 b2 b3 00 00 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/table_003/pcap_files/out_4_2.txt b/dep/pipeline/table_003/pcap_files/out_4_2.txt
new file mode 100644
index 00000000..af0fc303
--- /dev/null
+++ b/dep/pipeline/table_003/pcap_files/out_4_2.txt
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
diff --git a/dep/pipeline/table_003/pcap_files/out_5_1.txt b/dep/pipeline/table_003/pcap_files/out_5_1.txt
new file mode 100644
index 00000000..568e4959
--- /dev/null
+++ b/dep/pipeline/table_003/pcap_files/out_5_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 a0 a1 a2 a3 00 00 b0 b1 b2 b3 00 00 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/table_003/pcap_files/out_6_1.txt b/dep/pipeline/table_003/pcap_files/out_6_1.txt
new file mode 100644
index 00000000..2a7677ff
--- /dev/null
+++ b/dep/pipeline/table_003/pcap_files/out_6_1.txt
@@ -0,0 +1,22 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 d0 d1 d2 d3 00 00 e0 e1 e2 e3 00 00 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 d0 d1 d2 d3 00 00 e0 e1 e2 e3 00 00 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 d0 d1 d2 d3 00 00 e0 e1 e2 e3 00 00 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/table_003/pcap_files/out_6_2.txt b/dep/pipeline/table_003/pcap_files/out_6_2.txt
new file mode 100644
index 00000000..ad71f7e5
--- /dev/null
+++ b/dep/pipeline/table_003/pcap_files/out_6_2.txt
@@ -0,0 +1,22 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 d0 d1 d2 d3 00 00 e0 e1 e2 e3 00 00 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 a0 a1 a2 a3 00 00 b0 b1 b2 b3 00 00 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 d0 d1 d2 d3 00 00 e0 e1 e2 e3 00 00 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/table_003/readme.md b/dep/pipeline/table_003/readme.md
new file mode 100644
index 00000000..ae147608
--- /dev/null
+++ b/dep/pipeline/table_003/readme.md
@@ -0,0 +1,38 @@
+
+Test Case: test_table_003
+-------------------------
+
+ Description:
+ Testing the table update scenarios for wildcard match table type.
+
+ Scenario: Empty Table
+ Test: Lookup miss for any packet.
+ CMD_FILE: None
+ PCAP Files: in_1.txt, out_1.txt
+
+ Scenario: Table with a Single Key
+ Test: Lookup hit for the right packet, lookup miss with any other packet.
+ CMD_FILE: cmd_2.txt
+ PCAP Files: in_2.txt, out_2.txt
+
+ Scenario: Table with 2 Keys
+ Test: Lookup hit for the right packets (hitting key A or key B), lookup miss for any other
+ packet. To check whether adding key B does not (incorrectly) override key A in the table.
+ CMD_FILE: cmd_3.txt
+ PCAP Files: in_3.txt, out_3.txt
+
+ Scenario: Key Deletion
+ Test: Table with 2 rules (key A first, key B second), lookup hit for both.
+ Delete key A => lookup MISS for key A (deleted), lookup HIT for key B (still in the table).
+ Delete key B => lookup MISS for both keys A and B (deleted).
+ CMD_FILE: cmd_4_1.txt, cmd_4_2.txt
+ PCAP Files: in_4_1.txt, out_4_1.txt, in_4_2.txt, out_4_2.txt
+
+ Scenario: Action Update
+ Test: Add key A with action X => lookup hit for key A with action X executed.
+ Add the same key A with action Y => lookup hit for key A with action Y being executed at this point.
+
+ Scenario: Default Entry Test
+ Empty table => lookup MISS with default action executed.
+ Add key A => lookup hit for the right packet with the specific key associated action executed,
+ lookup miss for any other packets with default action executed.
diff --git a/dep/pipeline/table_003/table_003.cli b/dep/pipeline/table_003/table_003.cli
new file mode 100644
index 00000000..5cfcb2d0
--- /dev/null
+++ b/dep/pipeline/table_003/table_003.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/table_003/table_003.spec /tmp/pipeline/table_003/table_003.c
+pipeline libbuild /tmp/pipeline/table_003/table_003.c /tmp/pipeline/table_003/table_003.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/table_003/table_003.so io /tmp/pipeline/table_003/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/table_003/table_003.spec b/dep/pipeline/table_003/table_003.spec
new file mode 100644
index 00000000..7691dbdb
--- /dev/null
+++ b/dep/pipeline/table_003/table_003.spec
@@ -0,0 +1,80 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port
+}
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct table_003_args_t {
+ bit<48> ethernet_dst_addr
+ bit<48> ethernet_src_addr
+ bit<16> ethernet_ethertype
+}
+
+action table_003_action_01 args instanceof table_003_args_t {
+ mov h.ethernet.dst_addr t.ethernet_dst_addr
+ mov h.ethernet.src_addr t.ethernet_src_addr
+ mov h.ethernet.ethertype t.ethernet_ethertype
+ validate h.ethernet
+ return
+}
+
+action table_003_action_02 args instanceof table_003_args_t {
+ mov h.ethernet.dst_addr t.ethernet_dst_addr
+ mov h.ethernet.src_addr t.ethernet_src_addr
+ mov h.ethernet.ethertype t.ethernet_ethertype
+ validate h.ethernet
+ xor m.port 1
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table table_003_table {
+ key {
+ h.ethernet.dst_addr wildcard
+ }
+
+ actions {
+ table_003_action_01
+ table_003_action_02
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ table table_003_table
+ emit h.ethernet
+ tx m.port
+}
diff --git a/dep/pipeline/table_004/ethdev.io b/dep/pipeline/table_004/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/table_004/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/table_004/pcap_files/in_1.txt b/dep/pipeline/table_004/pcap_files/in_1.txt
new file mode 100644
index 00000000..aceecbf9
--- /dev/null
+++ b/dep/pipeline/table_004/pcap_files/in_1.txt
@@ -0,0 +1,32 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e ab cd 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 1a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e ab cd 00 00 40 06 4e b5 64 00 00 0b c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e ab cd 00 00 40 16 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 3
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e ab dc 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 4
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e ab cd 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0b 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/table_004/pcap_files/out_1.txt b/dep/pipeline/table_004/pcap_files/out_1.txt
new file mode 100644
index 00000000..21b4c6e6
--- /dev/null
+++ b/dep/pipeline/table_004/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 a0 a1 a2 a3 00 00 b0 b1 b2 b3 00 00 08 00 45 00
+000010 00 2e ab cd 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0b 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/table_004/readme.md b/dep/pipeline/table_004/readme.md
new file mode 100644
index 00000000..831e928b
--- /dev/null
+++ b/dep/pipeline/table_004/readme.md
@@ -0,0 +1,14 @@
+
+Test Case: test_table_004
+-------------------------
+
+ Scenario:
+ Table with both exact and wildcard match table types present together.
+
+ Description:
+ Lookup HIT for the packets matching the key(s) configured in table and associated action to
+ be executed. Lookup MISS for packets not matching with any of the keys configured in the
+ table and default action to be executed for them.
+
+ Verification:
+ Behavior should be as per the description.
diff --git a/dep/pipeline/table_004/table.txt b/dep/pipeline/table_004/table.txt
new file mode 100644
index 00000000..ef50471a
--- /dev/null
+++ b/dep/pipeline/table_004/table.txt
@@ -0,0 +1 @@
+match 0xc8000000/0xfffffff0 0x6400000a 0x06/0xff 0xabcd action table_004_action ethernet_dst_addr 0xa0a1a2a30000 ethernet_src_addr 0xb0b1b2b30000 ethernet_ethertype 0x0800
diff --git a/dep/pipeline/table_004/table_004.cli b/dep/pipeline/table_004/table_004.cli
new file mode 100644
index 00000000..af935211
--- /dev/null
+++ b/dep/pipeline/table_004/table_004.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/table_004/table_004.spec /tmp/pipeline/table_004/table_004.c
+pipeline libbuild /tmp/pipeline/table_004/table_004.c /tmp/pipeline/table_004/table_004.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/table_004/table_004.so io /tmp/pipeline/table_004/ethdev.io numa 0
+pipeline PIPELINE0 table table_004 add /tmp/pipeline/table_004/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/table_004/table_004.spec b/dep/pipeline/table_004/table_004.spec
new file mode 100644
index 00000000..1e707c22
--- /dev/null
+++ b/dep/pipeline/table_004/table_004.spec
@@ -0,0 +1,90 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> version_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_frag_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct table_004_args_t {
+ bit<48> ethernet_dst_addr
+ bit<48> ethernet_src_addr
+ bit<16> ethernet_ethertype
+}
+
+action table_004_action args instanceof table_004_args_t {
+ mov h.ethernet.dst_addr t.ethernet_dst_addr
+ mov h.ethernet.src_addr t.ethernet_src_addr
+ mov h.ethernet.ethertype t.ethernet_ethertype
+ validate h.ethernet
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table table_004 {
+ key {
+ h.ipv4.dst_addr wildcard
+ h.ipv4.src_addr exact
+ h.ipv4.protocol wildcard
+ h.ipv4.identification exact
+ }
+
+ actions {
+ table_004_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ table table_004
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/table_005/cmd_files/cmd_1.txt b/dep/pipeline/table_005/cmd_files/cmd_1.txt
new file mode 100644
index 00000000..a5c4f2cf
--- /dev/null
+++ b/dep/pipeline/table_005/cmd_files/cmd_1.txt
@@ -0,0 +1 @@
+match 0xaabbccdd0000 action table_005_action_01 ethernet_src_addr 0xb0b1b2b30000
\ No newline at end of file
diff --git a/dep/pipeline/table_005/ethdev.io b/dep/pipeline/table_005/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/table_005/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/table_005/pcap_files/in_1.txt b/dep/pipeline/table_005/pcap_files/in_1.txt
new file mode 100644
index 00000000..53a98bc8
--- /dev/null
+++ b/dep/pipeline/table_005/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 11 22 33 44 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/table_005/pcap_files/out_1.txt b/dep/pipeline/table_005/pcap_files/out_1.txt
new file mode 100644
index 00000000..23008c80
--- /dev/null
+++ b/dep/pipeline/table_005/pcap_files/out_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 b0 b1 b2 b3 00 00 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 11 22 33 44 55 66 aa bb cc dd ee ff 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/table_005/readme.md b/dep/pipeline/table_005/readme.md
new file mode 100644
index 00000000..cf6878b7
--- /dev/null
+++ b/dep/pipeline/table_005/readme.md
@@ -0,0 +1,10 @@
+Test Case: test_table_005
+-------------------------
+ Instruction to be tested
+ table (default_action action args none | ARGS VALUE ... [const])
+
+ Description:
+ Default action arguments are none. Whenever packet is missed then its MAC destination address is updated
+
+ Verification:
+ Packet which is not matching is should have updated value of MAC address.
diff --git a/dep/pipeline/table_005/table_005.cli b/dep/pipeline/table_005/table_005.cli
new file mode 100644
index 00000000..816ef2db
--- /dev/null
+++ b/dep/pipeline/table_005/table_005.cli
@@ -0,0 +1,23 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/table_005/table_005.spec /tmp/pipeline/table_005/table_005.c
+pipeline libbuild /tmp/pipeline/table_005/table_005.c /tmp/pipeline/table_005/table_005.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/table_005/table_005.so io /tmp/pipeline/table_005/ethdev.io numa 0
+pipeline PIPELINE0 table table_005_table add /tmp/pipeline/table_005/cmd_files/cmd_1.txt
+pipeline PIPELINE0 commit
+
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/table_005/table_005.spec b/dep/pipeline/table_005/table_005.spec
new file mode 100644
index 00000000..ee8252b5
--- /dev/null
+++ b/dep/pipeline/table_005/table_005.spec
@@ -0,0 +1,68 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port
+}
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct table_005_args_t {
+ bit<48> ethernet_src_addr
+}
+
+action table_005_action_01 args instanceof table_005_args_t {
+ mov h.ethernet.src_addr t.ethernet_src_addr
+ return
+}
+
+action table_005_default_action_01 args none {
+ mov h.ethernet.dst_addr 0x112233445566
+ mov h.ethernet.src_addr 0xaabbccddeeff
+ mov h.ethernet.ethertype 0x0800
+ return
+}
+
+//
+// Tables.
+//
+table table_005_table {
+ key {
+ h.ethernet.dst_addr exact
+ }
+
+ actions {
+ table_005_action_01
+ table_005_default_action_01
+ }
+
+ default_action table_005_default_action_01 args none
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ table table_005_table
+ emit h.ethernet
+ tx m.port
+}
diff --git a/dep/pipeline/table_006/cmd_files/cmd_1.txt b/dep/pipeline/table_006/cmd_files/cmd_1.txt
new file mode 100644
index 00000000..40787545
--- /dev/null
+++ b/dep/pipeline/table_006/cmd_files/cmd_1.txt
@@ -0,0 +1 @@
+match 0xaabbccdd0000 action table_006_action_01 ethernet_src_addr 0xb0b1b2b30000
diff --git a/dep/pipeline/table_006/ethdev.io b/dep/pipeline/table_006/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/table_006/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/table_006/pcap_files/in_1.txt b/dep/pipeline/table_006/pcap_files/in_1.txt
new file mode 100644
index 00000000..3e200794
--- /dev/null
+++ b/dep/pipeline/table_006/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 33 33 33 33 33 33 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 11 22 33 44 00 00 33 33 33 33 33 33 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/table_006/pcap_files/out_0.txt b/dep/pipeline/table_006/pcap_files/out_0.txt
new file mode 100644
index 00000000..0c272265
--- /dev/null
+++ b/dep/pipeline/table_006/pcap_files/out_0.txt
@@ -0,0 +1,15 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 a0 a1 a2 a3 00 00 b0 b1 b2 b3 00 00 08 00 45 00
+000010 00 60 00 00 00 00 40 11 e8 fa c0 c1 00 00 d0 d1
+000020 00 00 e0 00 12 b5 00 4c 00 00 00 00 00 00 00 00
+000030 00 00 11 22 33 44 00 00 33 33 33 33 33 33 08 00
+000040 45 00 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a
+000050 c8 00 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00
+000060 50 02 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/table_006/pcap_files/out_1.txt b/dep/pipeline/table_006/pcap_files/out_1.txt
new file mode 100644
index 00000000..b7387fa8
--- /dev/null
+++ b/dep/pipeline/table_006/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 b0 b1 b2 b3 00 00 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/table_006/readme.md b/dep/pipeline/table_006/readme.md
new file mode 100644
index 00000000..6f21bd34
--- /dev/null
+++ b/dep/pipeline/table_006/readme.md
@@ -0,0 +1,12 @@
+Test Case: test_table_006
+-------------------------
+ Instruction to be tested
+ table (default_action action args none | ARGS VALUE ... [const])
+
+ Description:
+ This testcase verify the parameterized default action. Along with that this testcase also
+ verifies the endianess of the data. In this testcase whenever any lookup miss. We will
+ add vxlan header on the top of the packet.
+
+ Verification:
+ Packet which is not matching is should have vxlan header on the top of the packet.
diff --git a/dep/pipeline/table_006/table_006.cli b/dep/pipeline/table_006/table_006.cli
new file mode 100644
index 00000000..31c4aa73
--- /dev/null
+++ b/dep/pipeline/table_006/table_006.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/table_006/table_006.spec /tmp/pipeline/table_006/table_006.c
+pipeline libbuild /tmp/pipeline/table_006/table_006.c /tmp/pipeline/table_006/table_006.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/table_006/table_006.so io /tmp/pipeline/table_006/ethdev.io numa 0
+pipeline PIPELINE0 table table_006_table add /tmp/pipeline/table_006/cmd_files/cmd_1.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/table_006/table_006.spec b/dep/pipeline/table_006/table_006.spec
new file mode 100644
index 00000000..9f7c80c7
--- /dev/null
+++ b/dep/pipeline/table_006/table_006.spec
@@ -0,0 +1,178 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+struct udp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<16> length
+ bit<16> checksum
+}
+
+struct vxlan_h {
+ bit<8> flags
+ bit<24> reserved
+ bit<24> vni
+ bit<8> reserved2
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+header outer_ethernet instanceof ethernet_h
+header outer_ipv4 instanceof ipv4_h
+header outer_udp instanceof udp_h
+header outer_vxlan instanceof vxlan_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port_in
+ bit<32> port_out
+}
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct table_006_args_t {
+ bit<48> ethernet_src_addr
+}
+
+action table_006_action_01 args instanceof table_006_args_t {
+ mov h.ethernet.src_addr t.ethernet_src_addr
+ mov m.port_out m.port_in
+ return
+}
+
+//
+// Actions
+//
+struct vxlan_encap_args_t {
+ bit<48> ethernet_dst_addr
+ bit<48> ethernet_src_addr
+ bit<16> ethernet_ethertype
+ bit<8> ipv4_ver_ihl
+ bit<8> ipv4_diffserv
+ bit<16> ipv4_total_len
+ bit<16> ipv4_identification
+ bit<16> ipv4_flags_offset
+ bit<8> ipv4_ttl
+ bit<8> ipv4_protocol
+ bit<16> ipv4_hdr_checksum
+ bit<32> ipv4_src_addr
+ bit<32> ipv4_dst_addr
+ bit<16> udp_src_port
+ bit<16> udp_dst_port
+ bit<16> udp_length
+ bit<16> udp_checksum
+ bit<8> vxlan_flags
+ bit<24> vxlan_reserved
+ bit<24> vxlan_vni
+ bit<8> vxlan_reserved2
+ bit<32> port_out
+}
+
+action table_006_default_action_01 args instanceof vxlan_encap_args_t {
+ //Set the outer Ethernet header.
+ validate h.outer_ethernet
+ mov h.outer_ethernet.dst_addr t.ethernet_dst_addr
+ mov h.outer_ethernet.src_addr t.ethernet_src_addr
+ mov h.outer_ethernet.ethertype t.ethernet_ethertype
+
+ //Set the outer IPv4 header.
+ validate h.outer_ipv4
+ mov h.outer_ipv4.ver_ihl t.ipv4_ver_ihl
+ mov h.outer_ipv4.diffserv t.ipv4_diffserv
+ mov h.outer_ipv4.total_len t.ipv4_total_len
+ mov h.outer_ipv4.identification t.ipv4_identification
+ mov h.outer_ipv4.flags_offset t.ipv4_flags_offset
+ mov h.outer_ipv4.ttl t.ipv4_ttl
+ mov h.outer_ipv4.protocol t.ipv4_protocol
+ mov h.outer_ipv4.hdr_checksum t.ipv4_hdr_checksum
+ mov h.outer_ipv4.src_addr t.ipv4_src_addr
+ mov h.outer_ipv4.dst_addr t.ipv4_dst_addr
+
+ //Set the outer UDP header.
+ validate h.outer_udp
+ mov h.outer_udp.src_port t.udp_src_port
+ mov h.outer_udp.dst_port t.udp_dst_port
+ mov h.outer_udp.length t.udp_length
+ mov h.outer_udp.checksum t.udp_checksum
+
+ //Set the outer VXLAN header.
+ validate h.outer_vxlan
+ mov h.outer_vxlan.flags t.vxlan_flags
+ mov h.outer_vxlan.reserved t.vxlan_reserved
+ mov h.outer_vxlan.vni t.vxlan_vni
+ mov h.outer_vxlan.reserved2 t.vxlan_reserved2
+
+ //Set the output port.
+ mov m.port_out t.port_out
+
+ //Update h.outer_ipv4.total_len field.
+ add h.outer_ipv4.total_len h.ipv4.total_len
+
+ //Update h.outer_ipv4.hdr_checksum field.
+ ckadd h.outer_ipv4.hdr_checksum h.ipv4.total_len
+
+ //Update h.outer_udp.length field.
+ add h.outer_udp.length h.ipv4.total_len
+
+ return
+}
+
+//
+// Tables.
+//
+table table_006_table {
+ key {
+ h.ethernet.dst_addr exact
+ }
+
+ actions {
+ table_006_action_01
+ table_006_default_action_01
+ }
+
+ default_action table_006_default_action_01 args ethernet_dst_addr 0xa0a1a2a30000 ethernet_src_addr 0xb0b1b2b30000 ethernet_ethertype 0x0800 ipv4_ver_ihl 0x45 ipv4_diffserv 0 ipv4_total_len 50 ipv4_identification 0 ipv4_flags_offset 0 ipv4_ttl 64 ipv4_protocol 17 ipv4_hdr_checksum 0xe928 ipv4_src_addr 0xc0c10000 ipv4_dst_addr 0xd0d10000 udp_src_port 0xe000 udp_dst_port 4789 udp_length 30 udp_checksum 0 vxlan_flags 0 vxlan_reserved 0 vxlan_vni 0 vxlan_reserved2 0 port_out 0
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port_in
+ extract h.ethernet
+ extract h.ipv4
+ table table_006_table
+ emit h.outer_ethernet
+ emit h.outer_ipv4
+ emit h.outer_udp
+ emit h.outer_vxlan
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port_out
+}
diff --git a/dep/pipeline/table_007/cmd_files/cmd_1.txt b/dep/pipeline/table_007/cmd_files/cmd_1.txt
new file mode 100644
index 00000000..b70c0d0e
--- /dev/null
+++ b/dep/pipeline/table_007/cmd_files/cmd_1.txt
@@ -0,0 +1 @@
+match 0xaabbccdd0000 action table_007_action_01 ethernet_src_addr 0xb0b1b2b30000
\ No newline at end of file
diff --git a/dep/pipeline/table_007/ethdev.io b/dep/pipeline/table_007/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/table_007/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/table_007/pcap_files/in_1.txt b/dep/pipeline/table_007/pcap_files/in_1.txt
new file mode 100644
index 00000000..53a98bc8
--- /dev/null
+++ b/dep/pipeline/table_007/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 11 22 33 44 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/table_007/pcap_files/out_1.txt b/dep/pipeline/table_007/pcap_files/out_1.txt
new file mode 100644
index 00000000..23008c80
--- /dev/null
+++ b/dep/pipeline/table_007/pcap_files/out_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 b0 b1 b2 b3 00 00 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 11 22 33 44 55 66 aa bb cc dd ee ff 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/table_007/readme.md b/dep/pipeline/table_007/readme.md
new file mode 100644
index 00000000..d572f38c
--- /dev/null
+++ b/dep/pipeline/table_007/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_table_007
+-------------------------
+ Instruction to be tested
+ table (default_action action args none | ARGS VALUE ... [const])
+
+ Description:
+ This testcase verify the parameterizes defult action. In this testcase the packets which miss
+ table lookup have its ethernet header updated.
+
+ Verification:
+ Packet which is not matching is should have updated value of ethernet header.
diff --git a/dep/pipeline/table_007/table_007.cli b/dep/pipeline/table_007/table_007.cli
new file mode 100644
index 00000000..f9a2b493
--- /dev/null
+++ b/dep/pipeline/table_007/table_007.cli
@@ -0,0 +1,23 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/table_007/table_007.spec /tmp/pipeline/table_007/table_007.c
+pipeline libbuild /tmp/pipeline/table_007/table_007.c /tmp/pipeline/table_007/table_007.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/table_007/table_007.so io /tmp/pipeline/table_007/ethdev.io numa 0
+pipeline PIPELINE0 table table_007_table add /tmp/pipeline/table_007/cmd_files/cmd_1.txt
+pipeline PIPELINE0 commit
+
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/table_007/table_007.spec b/dep/pipeline/table_007/table_007.spec
new file mode 100644
index 00000000..39c272db
--- /dev/null
+++ b/dep/pipeline/table_007/table_007.spec
@@ -0,0 +1,74 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port
+}
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct table_007_args_t {
+ bit<48> ethernet_src_addr
+}
+
+action table_007_action_01 args instanceof table_007_args_t {
+ mov h.ethernet.src_addr t.ethernet_src_addr
+ return
+}
+
+struct table_007_default_args_t {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+action table_007_default_action_01 args instanceof table_007_default_args_t {
+ mov h.ethernet.dst_addr t.dst_addr
+ mov h.ethernet.src_addr t.src_addr
+ mov h.ethernet.ethertype t.ethertype
+ return
+}
+
+//
+// Tables.
+//
+table table_007_table {
+ key {
+ h.ethernet.dst_addr exact
+ }
+
+ actions {
+ table_007_action_01
+ table_007_default_action_01
+ }
+
+ default_action table_007_default_action_01 args dst_addr 0x112233445566 src_addr 0xaabbccddeeff ethertype 0x0800
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ table table_007_table
+ emit h.ethernet
+ tx m.port
+}
diff --git a/dep/pipeline/table_008/cmd_files/cmd_1.txt b/dep/pipeline/table_008/cmd_files/cmd_1.txt
new file mode 100644
index 00000000..f20f4577
--- /dev/null
+++ b/dep/pipeline/table_008/cmd_files/cmd_1.txt
@@ -0,0 +1 @@
+match 0xaabbccdd0000 action table_008_action_01 ethernet_src_addr 0xb0b1b2b30000
diff --git a/dep/pipeline/table_008/cmd_files/cmd_2.txt b/dep/pipeline/table_008/cmd_files/cmd_2.txt
new file mode 100644
index 00000000..65eb3fc2
--- /dev/null
+++ b/dep/pipeline/table_008/cmd_files/cmd_2.txt
@@ -0,0 +1 @@
+action table_008_default_action_02 dst_addr 0x778899aabbcc src_addr 0xaabbccddeeff ethertype 0x0800
diff --git a/dep/pipeline/table_008/ethdev.io b/dep/pipeline/table_008/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/table_008/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/table_008/pcap_files/in_1.txt b/dep/pipeline/table_008/pcap_files/in_1.txt
new file mode 100644
index 00000000..53a98bc8
--- /dev/null
+++ b/dep/pipeline/table_008/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 11 22 33 44 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/table_008/pcap_files/out_1.txt b/dep/pipeline/table_008/pcap_files/out_1.txt
new file mode 100644
index 00000000..23008c80
--- /dev/null
+++ b/dep/pipeline/table_008/pcap_files/out_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 b0 b1 b2 b3 00 00 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 11 22 33 44 55 66 aa bb cc dd ee ff 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/table_008/pcap_files/out_2.txt b/dep/pipeline/table_008/pcap_files/out_2.txt
new file mode 100644
index 00000000..95302c9a
--- /dev/null
+++ b/dep/pipeline/table_008/pcap_files/out_2.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 b0 b1 b2 b3 00 00 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 77 88 99 aa bb cc aa bb cc dd ee ff 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/table_008/readme.md b/dep/pipeline/table_008/readme.md
new file mode 100644
index 00000000..0fc09564
--- /dev/null
+++ b/dep/pipeline/table_008/readme.md
@@ -0,0 +1,15 @@
+Test Case: test_table_008
+-------------------------
+ Instruction to be tested
+ table (default_action action args none | ARGS VALUE ... [const])
+
+ Description:
+ This testcase verify the updating the default action at runtime. First packet
+ will be applied with default action mentioned in the spec file then the
+ default action is updated using CLI commands. The packet will follow the
+ updated default action in case of lookup miss. This testcase will also verify
+ the updating a none argument default action with parameterized default action.
+
+ Verification:
+ Packet which miss the table lookup will applied with default action based in the
+ timing when the packet is sent.
diff --git a/dep/pipeline/table_008/table_008.cli b/dep/pipeline/table_008/table_008.cli
new file mode 100644
index 00000000..d29a5ba2
--- /dev/null
+++ b/dep/pipeline/table_008/table_008.cli
@@ -0,0 +1,23 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/table_008/table_008.spec /tmp/pipeline/table_008/table_008.c
+pipeline libbuild /tmp/pipeline/table_008/table_008.c /tmp/pipeline/table_008/table_008.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/table_008/table_008.so io /tmp/pipeline/table_008/ethdev.io numa 0
+pipeline PIPELINE0 table table_008_table add /tmp/pipeline/table_008/cmd_files/cmd_1.txt
+pipeline PIPELINE0 commit
+
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/table_008/table_008.spec b/dep/pipeline/table_008/table_008.spec
new file mode 100644
index 00000000..39a1143b
--- /dev/null
+++ b/dep/pipeline/table_008/table_008.spec
@@ -0,0 +1,82 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port
+}
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct table_008_args_t {
+ bit<48> ethernet_src_addr
+}
+
+action table_008_action_01 args instanceof table_008_args_t {
+ mov h.ethernet.src_addr t.ethernet_src_addr
+ return
+}
+
+action table_008_default_action_01 args none {
+ mov h.ethernet.dst_addr 0x112233445566
+ mov h.ethernet.src_addr 0xaabbccddeeff
+ mov h.ethernet.ethertype 0x0800
+ return
+}
+
+struct table_008_default_args_t {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+action table_008_default_action_02 args instanceof table_008_default_args_t {
+ mov h.ethernet.dst_addr t.dst_addr
+ mov h.ethernet.src_addr t.src_addr
+ mov h.ethernet.ethertype t.ethertype
+ return
+}
+
+//
+// Tables.
+//
+table table_008_table {
+ key {
+ h.ethernet.dst_addr exact
+ }
+
+ actions {
+ table_008_action_01
+ table_008_default_action_01
+ table_008_default_action_02
+ }
+
+ default_action table_008_default_action_01 args none
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ table table_008_table
+ emit h.ethernet
+ tx m.port
+}
diff --git a/dep/pipeline/table_009/cmd_files/cmd_1.txt b/dep/pipeline/table_009/cmd_files/cmd_1.txt
new file mode 100644
index 00000000..5200a1fb
--- /dev/null
+++ b/dep/pipeline/table_009/cmd_files/cmd_1.txt
@@ -0,0 +1 @@
+match 0xa0a1a2a3a4a5a6a7a8a9aaabacadaeaf action table_009_action_01
\ No newline at end of file
diff --git a/dep/pipeline/table_009/ethdev.io b/dep/pipeline/table_009/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/table_009/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/table_009/pcap_files/in_1.txt b/dep/pipeline/table_009/pcap_files/in_1.txt
new file mode 100644
index 00000000..f4d47ee2
--- /dev/null
+++ b/dep/pipeline/table_009/pcap_files/in_1.txt
@@ -0,0 +1,19 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc de 00 00 00 00 00 00 00 00 86 dd 60 00
+000010 00 00 00 1a 06 40 10 00 20 00 30 00 40 00 50 00
+000020 60 00 70 00 80 00 a0 a1 a2 a3 a4 a5 a6 a7 a8 a9
+000030 aa ab ac ad ae af 00 64 00 c8 00 00 00 0f 00 00
+000040 00 0a 50 02 20 00 08 48 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc de 00 00 00 00 00 00 00 00 86 dd 60 00
+000010 00 00 00 1a 06 40 10 00 0d b8 00 00 00 01 02 07
+000020 3f ff fe 68 df 11 20 01 0d b8 00 00 00 01 02 07
+000030 3f ff fe 68 df 44 00 64 00 c8 00 00 00 0f 00 00
+000040 00 0a 50 02 20 00 fa e6 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/table_009/pcap_files/out_1.txt b/dep/pipeline/table_009/pcap_files/out_1.txt
new file mode 100644
index 00000000..615dc7c0
--- /dev/null
+++ b/dep/pipeline/table_009/pcap_files/out_1.txt
@@ -0,0 +1,19 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc de 00 00 aa bb cc de 00 00 86 dd 60 00
+000010 00 00 00 1a 06 40 10 00 20 00 30 00 40 00 50 00
+000020 60 00 70 00 80 00 a0 a1 a2 a3 a4 a5 a6 a7 a8 a9
+000030 aa ab ac ad ae af 00 64 00 c8 00 00 00 0f 00 00
+000040 00 0a 50 02 20 00 08 48 00 00 58 58 58 58 58 58
+# Packet 1
+000000 00 00 00 00 00 00 00 00 00 00 00 00 86 dd 60 00
+000010 00 00 00 1a 06 40 10 00 0d b8 00 00 00 01 02 07
+000020 3f ff fe 68 df 11 20 01 0d b8 00 00 00 01 02 07
+000030 3f ff fe 68 df 44 00 64 00 c8 00 00 00 0f 00 00
+000040 00 0a 50 02 20 00 fa e6 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/table_009/readme.md b/dep/pipeline/table_009/readme.md
new file mode 100644
index 00000000..cc71d44a
--- /dev/null
+++ b/dep/pipeline/table_009/readme.md
@@ -0,0 +1,14 @@
+Test Case: test_table_009
+-------------------------
+
+ Scenario being tested:
+ To use IPv6 address as table key field for exact match and performing simple action.
+
+ Description:
+ Copy the destination MAC address of the received packet into the source MAC address
+ and transmit the packet back on the same port for the matched action.
+ Copy the source MAC address of the received packet into the destination MAC address
+ and transmit the packet back on the same port for the unmatched action.
+
+ Verification:
+ Packet verification should happen according to the description.
\ No newline at end of file
diff --git a/dep/pipeline/table_009/table_009.cli b/dep/pipeline/table_009/table_009.cli
new file mode 100644
index 00000000..d452d9fe
--- /dev/null
+++ b/dep/pipeline/table_009/table_009.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/table_009/table_009.spec /tmp/pipeline/table_009/table_009.c
+pipeline libbuild /tmp/pipeline/table_009/table_009.c /tmp/pipeline/table_009/table_009.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/table_009/table_009.so io /tmp/pipeline/table_009/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/table_009/table_009.spec b/dep/pipeline/table_009/table_009.spec
new file mode 100644
index 00000000..211abe1f
--- /dev/null
+++ b/dep/pipeline/table_009/table_009.spec
@@ -0,0 +1,75 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+struct ipv6_h {
+ bit<32> ver_tc_label
+ bit<16> payload_length
+ bit<8> next_header
+ bit<8> hop_limit
+ bit<128> src_addr
+ bit<128> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv6 instanceof ipv6_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions.
+//
+action table_009_action_01 args none {
+ mov h.ethernet.src_addr h.ethernet.dst_addr
+ return
+}
+
+action table_009_action_02 args none {
+ mov h.ethernet.dst_addr h.ethernet.src_addr
+ return
+}
+
+//
+// Tables.
+//
+table table_009 {
+ key {
+ h.ipv6.dst_addr exact
+ }
+
+ actions {
+ table_009_action_01
+ table_009_action_02
+ }
+
+ default_action table_009_action_02 args none const
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv6
+ table table_009
+ emit h.ethernet
+ emit h.ipv6
+ tx m.port
+}
diff --git a/dep/pipeline/table_010/cmd_files/cmd_1.txt b/dep/pipeline/table_010/cmd_files/cmd_1.txt
new file mode 100644
index 00000000..a5ae0f91
--- /dev/null
+++ b/dep/pipeline/table_010/cmd_files/cmd_1.txt
@@ -0,0 +1 @@
+match 0xa0a1a2a3a4a5a6a7a8a9aaabacadaeaf action table_010_action_01 ipv6_ver_tc_label 0x70000000 ipv6_payload_length 50 ipv6_dst_addr 0xb0b1b2b3b4b5b6b7b8b9babbbcbdbebf
\ No newline at end of file
diff --git a/dep/pipeline/table_010/ethdev.io b/dep/pipeline/table_010/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/table_010/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/table_010/pcap_files/in_1.txt b/dep/pipeline/table_010/pcap_files/in_1.txt
new file mode 100644
index 00000000..f4d47ee2
--- /dev/null
+++ b/dep/pipeline/table_010/pcap_files/in_1.txt
@@ -0,0 +1,19 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc de 00 00 00 00 00 00 00 00 86 dd 60 00
+000010 00 00 00 1a 06 40 10 00 20 00 30 00 40 00 50 00
+000020 60 00 70 00 80 00 a0 a1 a2 a3 a4 a5 a6 a7 a8 a9
+000030 aa ab ac ad ae af 00 64 00 c8 00 00 00 0f 00 00
+000040 00 0a 50 02 20 00 08 48 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc de 00 00 00 00 00 00 00 00 86 dd 60 00
+000010 00 00 00 1a 06 40 10 00 0d b8 00 00 00 01 02 07
+000020 3f ff fe 68 df 11 20 01 0d b8 00 00 00 01 02 07
+000030 3f ff fe 68 df 44 00 64 00 c8 00 00 00 0f 00 00
+000040 00 0a 50 02 20 00 fa e6 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/table_010/pcap_files/out_1.txt b/dep/pipeline/table_010/pcap_files/out_1.txt
new file mode 100644
index 00000000..31db9c1e
--- /dev/null
+++ b/dep/pipeline/table_010/pcap_files/out_1.txt
@@ -0,0 +1,19 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc de 00 00 00 00 00 00 00 00 86 dd 70 00
+000010 00 00 00 32 06 40 10 00 20 00 30 00 40 00 50 00
+000020 60 00 70 00 80 00 b0 b1 b2 b3 b4 b5 b6 b7 b8 b9
+000030 ba bb bc bd be bf 00 64 00 c8 00 00 00 0f 00 00
+000040 00 0a 50 02 20 00 08 48 00 00 58 58 58 58 58 58
+# Packet 1
+000000 00 00 00 00 00 00 00 00 00 00 00 00 86 dd 60 00
+000010 00 00 00 1a 06 40 10 00 0d b8 00 00 00 01 02 07
+000020 3f ff fe 68 df 11 20 01 0d b8 00 00 00 01 02 07
+000030 3f ff fe 68 df 44 00 64 00 c8 00 00 00 0f 00 00
+000040 00 0a 50 02 20 00 fa e6 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/table_010/readme.md b/dep/pipeline/table_010/readme.md
new file mode 100644
index 00000000..f17d1a97
--- /dev/null
+++ b/dep/pipeline/table_010/readme.md
@@ -0,0 +1,15 @@
+Test Case: test_table_010
+-------------------------
+
+ Scenario being tested:
+ To verify an action with an IPv6 address as an argument.
+
+ Description:
+ Copy the ipv6 version flow classification field, payload length and destination address
+ from table mentioned field to headers, for a matched ipv6 destination address field.
+ Transmit the packet back on the same port.
+ Copy the source MAC address of the received packet into the destination MAC address
+ and transmit the packet back on the same port for the unmatched action.
+
+ Verification:
+ Packet verification should happen according to the description.
\ No newline at end of file
diff --git a/dep/pipeline/table_010/table_010.cli b/dep/pipeline/table_010/table_010.cli
new file mode 100644
index 00000000..932c5770
--- /dev/null
+++ b/dep/pipeline/table_010/table_010.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/table_010/table_010.spec /tmp/pipeline/table_010/table_010.c
+pipeline libbuild /tmp/pipeline/table_010/table_010.c /tmp/pipeline/table_010/table_010.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/table_010/table_010.so io /tmp/pipeline/table_010/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/table_010/table_010.spec b/dep/pipeline/table_010/table_010.spec
new file mode 100644
index 00000000..99be0805
--- /dev/null
+++ b/dep/pipeline/table_010/table_010.spec
@@ -0,0 +1,84 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+struct ipv6_h {
+ bit<32> ver_tc_label
+ bit<16> payload_length
+ bit<8> next_header
+ bit<8> hop_limit
+ bit<128> src_addr
+ bit<128> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv6 instanceof ipv6_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+struct table_010_action_01_args_t {
+ bit<32> ipv6_ver_tc_label
+ bit<16> ipv6_payload_length
+ bit<128> ipv6_dst_addr
+}
+
+//
+// Actions.
+//
+action table_010_action_01 args instanceof table_010_action_01_args_t {
+ validate h.ipv6
+ mov h.ipv6.ver_tc_label t.ipv6_ver_tc_label
+ mov h.ipv6.payload_length t.ipv6_payload_length
+ mov h.ipv6.dst_addr t.ipv6_dst_addr
+ return
+}
+
+action table_010_action_02 args none {
+ mov h.ethernet.dst_addr h.ethernet.src_addr
+ return
+}
+
+//
+// Tables.
+//
+table table_010 {
+ key {
+ h.ipv6.dst_addr exact
+ }
+
+ actions {
+ table_010_action_01
+ table_010_action_02
+ }
+
+ default_action table_010_action_02 args none const
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv6
+ table table_010
+ emit h.ethernet
+ emit h.ipv6
+ tx m.port
+}
diff --git a/dep/pipeline/table_011/cmd_files/cmd_1.txt b/dep/pipeline/table_011/cmd_files/cmd_1.txt
new file mode 100644
index 00000000..f43dda4d
--- /dev/null
+++ b/dep/pipeline/table_011/cmd_files/cmd_1.txt
@@ -0,0 +1,2 @@
+match 0xa0a1a2a3a4a5a6a7a8a9aaabacadaeaf action table_011_action_01 ipv6_ver_tc_label 0x70000000 ipv6_payload_length 50 ipv6_next_header 17 ipv6_hop_limit 64 ipv6_src_addr 0xa0a1a2a3a4a5a6a7a8a9aaabacadaeaf ipv6_dst_addr 0xb0b1b2b3b4b5b6b7b8b9babbbcbdbebf
+match 0xc0c1c2c3c4c5c6c7c8c9cacbcccdcecf action table_011_action_02
\ No newline at end of file
diff --git a/dep/pipeline/table_011/ethdev.io b/dep/pipeline/table_011/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/table_011/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/table_011/pcap_files/in_1.txt b/dep/pipeline/table_011/pcap_files/in_1.txt
new file mode 100644
index 00000000..b36d48b1
--- /dev/null
+++ b/dep/pipeline/table_011/pcap_files/in_1.txt
@@ -0,0 +1,13 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc de 00 00 00 00 00 00 00 00 86 dd 60 00
+000010 00 00 00 1a 06 40 10 00 20 00 30 00 40 00 50 00
+000020 60 00 70 00 80 00 a0 a1 a2 a3 a4 a5 a6 a7 a8 a9
+000030 aa ab ac ad ae af 00 64 00 c8 00 00 00 0f 00 00
+000040 00 0a 50 02 20 00 08 48 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/table_011/pcap_files/in_2.txt b/dep/pipeline/table_011/pcap_files/in_2.txt
new file mode 100644
index 00000000..22b9c0e7
--- /dev/null
+++ b/dep/pipeline/table_011/pcap_files/in_2.txt
@@ -0,0 +1,13 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc de 00 00 00 00 00 00 00 00 86 dd 60 00
+000010 00 00 00 1a 06 40 10 00 20 00 30 00 40 00 50 00
+000020 60 00 70 00 80 00 c0 c1 c2 c3 c4 c5 c6 c7 c8 c9
+000030 ca cb cc cd ce cf 00 64 00 c8 00 00 00 0f 00 00
+000040 00 0a 50 02 20 00 07 47 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/table_011/pcap_files/out_1.txt b/dep/pipeline/table_011/pcap_files/out_1.txt
new file mode 100644
index 00000000..1bb44cfb
--- /dev/null
+++ b/dep/pipeline/table_011/pcap_files/out_1.txt
@@ -0,0 +1,13 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc de 00 00 00 00 00 00 00 00 86 dd 70 00
+000010 00 00 00 32 11 40 a0 a1 a2 a3 a4 a5 a6 a7 a8 a9
+000020 aa ab ac ad ae af b0 b1 b2 b3 b4 b5 b6 b7 b8 b9
+000030 ba bb bc bd be bf 00 64 00 c8 00 00 00 0f 00 00
+000040 00 0a 50 02 20 00 08 48 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/table_011/pcap_files/out_2.txt b/dep/pipeline/table_011/pcap_files/out_2.txt
new file mode 100644
index 00000000..9a14d830
--- /dev/null
+++ b/dep/pipeline/table_011/pcap_files/out_2.txt
@@ -0,0 +1,13 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 00 00 00 00 00 00 00 00 00 00 00 86 dd 60 00
+000010 00 00 00 1a 06 40 10 00 20 00 30 00 40 00 50 00
+000020 60 00 70 00 80 00 c0 c1 c2 c3 c4 c5 c6 c7 c8 c9
+000030 ca cb cc cd ce cf 00 64 00 c8 00 00 00 0f 00 00
+000040 00 0a 50 02 20 00 07 47 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/table_011/readme.md b/dep/pipeline/table_011/readme.md
new file mode 100644
index 00000000..e9a611f6
--- /dev/null
+++ b/dep/pipeline/table_011/readme.md
@@ -0,0 +1,14 @@
+Test Case: test_table_011
+-------------------------
+
+ Sdenario being tested:
+ To encap action that sets the entire IPv6 header passed as action argument.
+
+ Description:
+ Encap the entire IPv6 header passed as an action argument and transmit the packet
+ on the same port, for matched action.
+ Copy the source MAC address of the received packet into the destination MAC address
+ and transmit the packet back on the same port for the unmatched action.
+
+ Verification:
+ Packet verification should happen according to the description.
\ No newline at end of file
diff --git a/dep/pipeline/table_011/table_011.cli b/dep/pipeline/table_011/table_011.cli
new file mode 100644
index 00000000..c19d7129
--- /dev/null
+++ b/dep/pipeline/table_011/table_011.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/table_011/table_011.spec /tmp/pipeline/table_011/table_011.c
+pipeline libbuild /tmp/pipeline/table_011/table_011.c /tmp/pipeline/table_011/table_011.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/table_011/table_011.so io /tmp/pipeline/table_011/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/table_011/table_011.spec b/dep/pipeline/table_011/table_011.spec
new file mode 100644
index 00000000..a59543f8
--- /dev/null
+++ b/dep/pipeline/table_011/table_011.spec
@@ -0,0 +1,93 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+struct ipv6_h {
+ bit<32> ver_tc_label
+ bit<16> payload_length
+ bit<8> next_header
+ bit<8> hop_limit
+ bit<128> src_addr
+ bit<128> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv6 instanceof ipv6_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+struct table_011_action_01_args_t {
+ bit<32> ipv6_ver_tc_label
+ bit<16> ipv6_payload_length
+ bit<8> ipv6_next_header
+ bit<8> ipv6_hop_limit
+ bit<128> ipv6_src_addr
+ bit<128> ipv6_dst_addr
+}
+
+//
+// Actions.
+//
+action table_011_action_01 args instanceof table_011_action_01_args_t {
+ //Set the IPv6 header.
+ validate h.ipv6
+
+ mov h.ipv6.ver_tc_label t.ipv6_ver_tc_label
+ mov h.ipv6.payload_length t.ipv6_payload_length
+ mov h.ipv6.next_header t.ipv6_next_header
+ mov h.ipv6.hop_limit t.ipv6_hop_limit
+ mov h.ipv6.src_addr t.ipv6_src_addr
+ mov h.ipv6.dst_addr t.ipv6_dst_addr
+
+ return
+}
+
+action table_011_action_02 args none {
+ mov h.ethernet.dst_addr h.ethernet.src_addr
+ return
+}
+
+//
+// Tables.
+//
+table table_011 {
+ key {
+ h.ipv6.dst_addr exact
+ }
+
+ actions {
+ table_011_action_01
+ table_011_action_02
+ }
+
+ default_action table_011_action_01 args ipv6_ver_tc_label 0x60000000 ipv6_payload_length 70 ipv6_next_header 17 ipv6_hop_limit 64 ipv6_src_addr 0xa0a1a2a3a4a5a6a7a8a9aaabacadaeaf ipv6_dst_addr 0xb0b1b2b3b4b5b6b7b8b9babbbcbdbebf
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv6
+ table table_011
+ emit h.ethernet
+ emit h.ipv6
+ tx m.port
+}
diff --git a/dep/pipeline/table_012/cmd_files/cmd_1.txt b/dep/pipeline/table_012/cmd_files/cmd_1.txt
new file mode 100644
index 00000000..a0b4d115
--- /dev/null
+++ b/dep/pipeline/table_012/cmd_files/cmd_1.txt
@@ -0,0 +1,2 @@
+match 0x002E000100004006B2BE action table_012_action_01 ipv4_len_id_flags_tt_protocol_checksum 0x002E000100002806CABE
+match 0x002E000100002806CABE action table_012_action_02
\ No newline at end of file
diff --git a/dep/pipeline/table_012/ethdev.io b/dep/pipeline/table_012/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/table_012/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/table_012/pcap_files/in_1.txt b/dep/pipeline/table_012/pcap_files/in_1.txt
new file mode 100644
index 00000000..467a008b
--- /dev/null
+++ b/dep/pipeline/table_012/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc de 00 00 a4 bf 01 70 70 b0 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 b2 be 64 00 00 01 64 00
+000020 00 0a 00 64 00 c8 00 00 00 0f 00 00 00 0a 50 02
+000030 20 00 bd 83 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc de 00 00 a4 bf 01 70 70 b0 08 00 45 00
+000010 00 2e 00 01 00 00 28 06 ca be 64 00 00 01 64 00
+000020 00 0a 00 64 00 c8 00 00 00 0f 00 00 00 0a 50 02
+000030 20 00 bd 83 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/table_012/pcap_files/out_1.txt b/dep/pipeline/table_012/pcap_files/out_1.txt
new file mode 100644
index 00000000..3dad8ff9
--- /dev/null
+++ b/dep/pipeline/table_012/pcap_files/out_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc de 00 00 a4 bf 01 70 70 b0 08 00 45 00
+000010 00 2e 00 01 00 00 28 06 ca be 64 00 00 01 64 00
+000020 00 0a 00 64 00 c8 00 00 00 0f 00 00 00 0a 50 02
+000030 20 00 bd 83 00 00 58 58 58 58 58 58
+# Packet 1
+000000 a4 bf 01 70 70 b0 a4 bf 01 70 70 b0 08 00 45 00
+000010 00 2e 00 01 00 00 28 06 ca be 64 00 00 01 64 00
+000020 00 0a 00 64 00 c8 00 00 00 0f 00 00 00 0a 50 02
+000030 20 00 bd 83 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/table_012/readme.md b/dep/pipeline/table_012/readme.md
new file mode 100644
index 00000000..5d127925
--- /dev/null
+++ b/dep/pipeline/table_012/readme.md
@@ -0,0 +1,15 @@
+Test Case: test_table_012
+-------------------------
+
+ Sdenario being tested:
+ To use large field 64 < x-bits < 128 bit ( x = 80-bits here) as action argument as action argument.
+
+ Description:
+ Copy the ipv4 length, identification number, flags offset, time to live, protocol and
+ checksum from table mentioned field to headers, for a matched ipv4 len_id_flags_tt_protocol_checksum field.
+ Transmit the packet back on the same port.
+ Copy the source MAC address of the received packet into the destination MAC address
+ and transmit the packet back on the same port for the unmatched action.
+
+ Verification:
+ Packet verification should happen according to the description.
\ No newline at end of file
diff --git a/dep/pipeline/table_012/table_012.cli b/dep/pipeline/table_012/table_012.cli
new file mode 100644
index 00000000..594ebe75
--- /dev/null
+++ b/dep/pipeline/table_012/table_012.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/table_012/table_012.spec /tmp/pipeline/table_012/table_012.c
+pipeline libbuild /tmp/pipeline/table_012/table_012.c /tmp/pipeline/table_012/table_012.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/table_012/table_012.so io /tmp/pipeline/table_012/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/table_012/table_012.spec b/dep/pipeline/table_012/table_012.spec
new file mode 100644
index 00000000..c6422b04
--- /dev/null
+++ b/dep/pipeline/table_012/table_012.spec
@@ -0,0 +1,80 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<80> len_id_flags_tt_protocol_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<64> temp_64
+ bit<80> temp_80
+}
+
+metadata instanceof metadata_t
+
+struct table_012_action_01_args_t {
+ bit<80> ipv4_len_id_flags_tt_protocol_checksum
+}
+
+//
+// Actions.
+//
+action table_012_action_01 args instanceof table_012_action_01_args_t {
+ validate h.ipv4
+ mov h.ipv4.len_id_flags_tt_protocol_checksum t.ipv4_len_id_flags_tt_protocol_checksum
+ return
+}
+
+action table_012_action_02 args none {
+ mov h.ethernet.dst_addr h.ethernet.src_addr
+ return
+}
+
+//
+// Tables.
+//
+table table_012 {
+ key {
+ h.ipv4.len_id_flags_tt_protocol_checksum exact
+ }
+
+ actions {
+ table_012_action_01
+ table_012_action_02
+ }
+
+ default_action table_012_action_02 args none const
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ table table_012
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/table_013/cmd_files/cmd_1.txt b/dep/pipeline/table_013/cmd_files/cmd_1.txt
new file mode 100644
index 00000000..3a8d6d08
--- /dev/null
+++ b/dep/pipeline/table_013/cmd_files/cmd_1.txt
@@ -0,0 +1,2 @@
+match 0x40a0a1a2a3a4a5a6a7a8a9aaabacadaeaf action table_013_action_01 ipv6_ver_tc_label 0x60000000 ipv6_payload_length 50 ipv6_next_header 06 ipv6_hop_src_addr 0x40c0c1c2c3c4c5c6c7c8c9cacbcccdcecf ipv6_dst_addr 0xd0d1d2d3d4d5d6d7d8d9dadbdcdddedf
+match 0x40c0c1c2c3c4c5c6c7c8c9cacbcccdcecf action table_013_action_02
\ No newline at end of file
diff --git a/dep/pipeline/table_013/ethdev.io b/dep/pipeline/table_013/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/table_013/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/table_013/pcap_files/in_1.txt b/dep/pipeline/table_013/pcap_files/in_1.txt
new file mode 100644
index 00000000..5b4492d8
--- /dev/null
+++ b/dep/pipeline/table_013/pcap_files/in_1.txt
@@ -0,0 +1,19 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc de 00 00 00 00 00 00 00 00 86 dd 60 00
+000010 00 00 00 1a 06 40 a0 a1 a2 a3 a4 a5 a6 a7 a8 a9
+000020 aa ab ac ad ae af b0 b1 b2 b3 b4 b5 b6 b7 b8 b9
+000030 ba bb bc bd be bf 00 64 00 c8 00 00 00 0f 00 00
+000040 00 0a 50 02 20 00 8a 84 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc de 00 00 00 00 00 00 00 00 86 dd 60 00
+000010 00 00 00 1a 06 40 c0 c1 c2 c3 c4 c5 c6 c7 c8 c9
+000020 ca cb cc cd ce cf d0 d1 d2 d3 d4 d5 d6 d7 d8 d9
+000030 da db dc dd de df 00 64 00 c8 00 00 00 0f 00 00
+000040 00 0a 50 02 20 00 88 82 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/table_013/pcap_files/out_1.txt b/dep/pipeline/table_013/pcap_files/out_1.txt
new file mode 100644
index 00000000..ead63e80
--- /dev/null
+++ b/dep/pipeline/table_013/pcap_files/out_1.txt
@@ -0,0 +1,19 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc de 00 00 00 00 00 00 00 00 86 dd 60 00
+000010 00 00 00 32 06 40 c0 c1 c2 c3 c4 c5 c6 c7 c8 c9
+000020 ca cb cc cd ce cf d0 d1 d2 d3 d4 d5 d6 d7 d8 d9
+000030 da db dc dd de df 00 64 00 c8 00 00 00 0f 00 00
+000040 00 0a 50 02 20 00 8a 84 00 00 58 58 58 58 58 58
+# Packet 1
+000000 00 00 00 00 00 00 00 00 00 00 00 00 86 dd 60 00
+000010 00 00 00 1a 06 40 c0 c1 c2 c3 c4 c5 c6 c7 c8 c9
+000020 ca cb cc cd ce cf d0 d1 d2 d3 d4 d5 d6 d7 d8 d9
+000030 da db dc dd de df 00 64 00 c8 00 00 00 0f 00 00
+000040 00 0a 50 02 20 00 88 82 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/table_013/readme.md b/dep/pipeline/table_013/readme.md
new file mode 100644
index 00000000..c23be802
--- /dev/null
+++ b/dep/pipeline/table_013/readme.md
@@ -0,0 +1,14 @@
+Test Case: test_table_013
+-------------------------
+
+ Sdenario being tested:
+ To use large field greater than 128 bits ( 136-bits here) as action argument as action argument.
+
+ Description:
+ Encap the IPV6 header fields from table mentioned fields, for a matched ipv6 hop_src_addr field.
+ Transmit the packet back on the same port.
+ Copy the source MAC address of the received packet into the destination MAC address
+ and transmit the packet back on the same port for the unmatched action.
+
+ Verification:
+ Packet verification should happen according to the description.
\ No newline at end of file
diff --git a/dep/pipeline/table_013/table_013.cli b/dep/pipeline/table_013/table_013.cli
new file mode 100644
index 00000000..3aab17d1
--- /dev/null
+++ b/dep/pipeline/table_013/table_013.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/table_013/table_013.spec /tmp/pipeline/table_013/table_013.c
+pipeline libbuild /tmp/pipeline/table_013/table_013.c /tmp/pipeline/table_013/table_013.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/table_013/table_013.so io /tmp/pipeline/table_013/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/table_013/table_013.spec b/dep/pipeline/table_013/table_013.spec
new file mode 100644
index 00000000..b7493bea
--- /dev/null
+++ b/dep/pipeline/table_013/table_013.spec
@@ -0,0 +1,91 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+struct ipv6_h {
+ bit<32> ver_tc_label
+ bit<16> payload_length
+ bit<8> next_header
+ bit<136> hop_src_addr
+ bit<128> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv6 instanceof ipv6_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+struct table_013_action_01_args_t {
+ bit<32> ipv6_ver_tc_label
+ bit<16> ipv6_payload_length
+ bit<8> ipv6_next_header
+ bit<136> ipv6_hop_src_addr
+ bit<128> ipv6_dst_addr
+}
+
+//
+// Actions.
+//
+action table_013_action_01 args instanceof table_013_action_01_args_t {
+
+ //Set the IPv6 header.
+ validate h.ipv6
+
+ mov h.ipv6.ver_tc_label t.ipv6_ver_tc_label
+ mov h.ipv6.payload_length t.ipv6_payload_length
+ mov h.ipv6.next_header t.ipv6_next_header
+ mov h.ipv6.hop_src_addr t.ipv6_hop_src_addr
+ mov h.ipv6.dst_addr t.ipv6_dst_addr
+
+ return
+}
+
+action table_013_action_02 args none {
+ mov h.ethernet.dst_addr h.ethernet.src_addr
+ return
+}
+
+//
+// Tables.
+//
+table table_013 {
+ key {
+ h.ipv6.hop_src_addr exact
+ }
+
+ actions {
+ table_013_action_01
+ table_013_action_02
+ }
+
+ default_action table_013_action_02 args none const
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv6
+ table table_013
+ emit h.ethernet
+ emit h.ipv6
+ tx m.port
+}
diff --git a/dep/pipeline/table_014/cmd_files/cmd_1.txt b/dep/pipeline/table_014/cmd_files/cmd_1.txt
new file mode 100644
index 00000000..45a1fe27
--- /dev/null
+++ b/dep/pipeline/table_014/cmd_files/cmd_1.txt
@@ -0,0 +1 @@
+match 0x64000001 0xC8000001 0x0064 0x12B5 0x000064 0x11 0x65000001 0x65000002 0x5555 0x00C8 action table_014_action_01 t_vni 200
\ No newline at end of file
diff --git a/dep/pipeline/table_014/ethdev.io b/dep/pipeline/table_014/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/table_014/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/table_014/pcap_files/in_1.txt b/dep/pipeline/table_014/pcap_files/in_1.txt
new file mode 100644
index 00000000..b700ecd7
--- /dev/null
+++ b/dep/pipeline/table_014/pcap_files/in_1.txt
@@ -0,0 +1,15 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc de 10 00 cc ee cc de 01 02 08 00 45 00
+000010 00 58 00 01 00 00 40 11 4e 92 64 00 00 01 c8 00
+000020 00 01 00 64 12 b5 00 44 53 58 0c 00 00 03 00 00
+000030 64 00 12 23 34 56 00 00 aa bb cc de 01 02 08 00
+000040 45 00 00 26 00 01 00 00 40 11 b0 c3 65 00 00 01
+000050 65 00 00 02 55 55 00 c8 00 12 25 f0 58 58 58 58
+000060 58 58 58 58 58 58
\ No newline at end of file
diff --git a/dep/pipeline/table_014/pcap_files/in_2.txt b/dep/pipeline/table_014/pcap_files/in_2.txt
new file mode 100644
index 00000000..f0650b54
--- /dev/null
+++ b/dep/pipeline/table_014/pcap_files/in_2.txt
@@ -0,0 +1,16 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc de 10 00 cc ee cc de 01 02 86 dd 60 00
+000000 aa bb cc de 10 00 cc ee cc de 01 02 08 00 45 00
+000010 00 58 00 01 00 00 40 11 4e 92 64 00 00 01 c8 00
+000020 00 01 00 64 12 b5 00 44 53 73 0c 00 00 03 00 00
+000030 64 00 12 23 34 56 00 00 aa bb cc de 01 02 08 00
+000040 45 00 00 26 00 01 00 00 40 11 b0 a8 65 00 00 0a
+000050 65 00 00 14 01 f4 00 c8 00 12 79 36 58 58 58 58
+000060 58 58 58 58 58 58
\ No newline at end of file
diff --git a/dep/pipeline/table_014/pcap_files/out_1.txt b/dep/pipeline/table_014/pcap_files/out_1.txt
new file mode 100644
index 00000000..177a0e7c
--- /dev/null
+++ b/dep/pipeline/table_014/pcap_files/out_1.txt
@@ -0,0 +1,15 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc de 10 00 cc ee cc de 01 02 08 00 45 00
+000010 00 58 00 01 00 00 40 11 4e 92 64 00 00 01 c8 00
+000020 00 01 00 64 12 b5 00 44 53 58 0c 00 00 03 00 00
+000030 c8 00 12 23 34 56 00 00 aa bb cc de 01 02 08 00
+000040 45 00 00 26 00 01 00 00 40 11 b0 c3 65 00 00 01
+000050 65 00 00 02 55 55 00 c8 00 12 25 f0 58 58 58 58
+000060 58 58 58 58 58 58
diff --git a/dep/pipeline/table_014/pcap_files/out_2.txt b/dep/pipeline/table_014/pcap_files/out_2.txt
new file mode 100644
index 00000000..c7444c3b
--- /dev/null
+++ b/dep/pipeline/table_014/pcap_files/out_2.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 12 23 34 56 00 00 aa bb cc de 01 02 08 00 45 00
+000010 00 26 00 01 00 00 40 11 b0 a8 65 00 00 0a 65 00
+000020 00 14 01 f4 00 c8 00 12 79 36 58 58 58 58 58 58
+000030 58 58 58 58
diff --git a/dep/pipeline/table_014/readme.md b/dep/pipeline/table_014/readme.md
new file mode 100644
index 00000000..0148ca11
--- /dev/null
+++ b/dep/pipeline/table_014/readme.md
@@ -0,0 +1,15 @@
+Test Case: test_table_014
+-----------------------
+
+ Scenario being tested:
+ Exact match table with key structure type as a header, match criteria as an
+ exact match, key element alignment as contiguous and key size < 64 bytes.
+
+ Description:
+ The test case receives Ethernet -> IPv4 -> UDP -> VXLAN -> Ethernet -> IPv4 -> UDP
+ packet sequence as an input. If the packet matches the configured action rule, the
+ associated respective action must take place. If the packet does not match the specified
+ criteria, the default action should take place.
+
+ Verification:
+ The packet verification for the testcase should happen according to the description.
\ No newline at end of file
diff --git a/dep/pipeline/table_014/table_014.cli b/dep/pipeline/table_014/table_014.cli
new file mode 100644
index 00000000..ca5a8fb6
--- /dev/null
+++ b/dep/pipeline/table_014/table_014.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+pipeline codegen /tmp/pipeline/table_014/table_014.spec /tmp/pipeline/table_014/table_014.c
+pipeline libbuild /tmp/pipeline/table_014/table_014.c /tmp/pipeline/table_014/table_014.so
+
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/table_014/table_014.so io /tmp/pipeline/table_014/ethdev.io numa 0
+
+pipeline PIPELINE0 table table_014 add /tmp/pipeline/table_014/cmd_files/cmd_1.txt
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/table_014/table_014.spec b/dep/pipeline/table_014/table_014.spec
new file mode 100644
index 00000000..05565022
--- /dev/null
+++ b/dep/pipeline/table_014/table_014.spec
@@ -0,0 +1,161 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+// IPv4 Header
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+// UDP Header
+struct udp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<16> length
+ bit<16> checksum
+}
+
+// VXLAN Header
+struct vxlan_h {
+ bit<8> flags
+ bit<24> reserved
+ bit<24> vni
+ bit<8> reserved2
+}
+
+// Key structure
+struct vlan_key_h {
+ bit<32> outer_ipv4_src_addr
+ bit<32> outer_ipv4_dst_addr
+ bit<16> outer_udp_src_port
+ bit<16> outer_udp_dst_port
+ bit<24> vni
+ bit<8> protocol
+ bit<32> inner_ipv4_src_addr
+ bit<32> inner_ipv4_dst_addr
+ bit<16> inner_udp_src_port
+ bit<16> inner_udp_dst_port
+}
+
+// Header instances
+header outer_ethernet instanceof ethernet_h
+header outer_ipv4 instanceof ipv4_h
+header outer_udp instanceof udp_h
+header vxlan instanceof vxlan_h
+header inner_ethernet instanceof ethernet_h
+header inner_ipv4 instanceof ipv4_h
+header inner_udp instanceof udp_h
+header vlan_key_header instanceof vlan_key_h
+
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+struct table_014_action_01_args_t {
+ bit<24> t_vni
+}
+
+// Action 01: Update field in the header data
+action table_014_action_01 args instanceof table_014_action_01_args_t {
+ mov h.vxlan.vni t.t_vni
+ return
+}
+
+// Action 02: Decapsulation
+action table_014_action_02 args none {
+ invalidate h.outer_ethernet
+ invalidate h.outer_ipv4
+ invalidate h.outer_udp
+ invalidate h.vxlan
+ return
+}
+
+table table_014 {
+
+ key {
+ h.vlan_key_header.outer_ipv4_src_addr exact
+ h.vlan_key_header.outer_ipv4_dst_addr exact
+ h.vlan_key_header.outer_udp_src_port exact
+ h.vlan_key_header.outer_udp_dst_port exact
+ h.vlan_key_header.vni exact
+ h.vlan_key_header.protocol exact
+ h.vlan_key_header.inner_ipv4_src_addr exact
+ h.vlan_key_header.inner_ipv4_dst_addr exact
+ h.vlan_key_header.inner_udp_src_port exact
+ h.vlan_key_header.inner_udp_dst_port exact
+ }
+
+ actions {
+ table_014_action_01
+ table_014_action_02
+ }
+
+ default_action table_014_action_02 args none const
+ size 1048576
+}
+
+apply {
+ // Receive packet
+ rx m.port
+ extract h.outer_ethernet
+ // Verify if packets are arrived in correct
+ // order. If not, go to END.
+ // Ethernet -> IPv4 -> UDP -> VXLAN ->
+ // Ethernet -> IPv4 -> UDP
+ jmpneq END h.outer_ethernet.ether_type 0x0800
+ extract h.outer_ipv4
+ jmpneq END h.outer_ipv4.protocol 0x11
+ extract h.outer_udp
+ jmpneq END h.outer_udp.dst_port 4789
+ extract h.vxlan
+ extract h.inner_ethernet
+ jmpneq END h.inner_ethernet.ether_type 0x0800
+ extract h.inner_ipv4
+ jmpneq END h.inner_ipv4.protocol 0x11
+ extract h.inner_udp
+
+ // Copy the required key data fields from header
+ // into the metadata key fields.
+ mov h.vlan_key_header.outer_ipv4_src_addr h.outer_ipv4.src_addr
+ mov h.vlan_key_header.outer_ipv4_dst_addr h.outer_ipv4.dst_addr
+ mov h.vlan_key_header.outer_udp_src_port h.outer_udp.src_port
+ mov h.vlan_key_header.outer_udp_dst_port h.outer_udp.dst_port
+ mov h.vlan_key_header.vni h.vxlan.vni
+ mov h.vlan_key_header.protocol h.inner_ipv4.protocol
+ mov h.vlan_key_header.inner_ipv4_src_addr h.inner_ipv4.src_addr
+ mov h.vlan_key_header.inner_ipv4_dst_addr h.inner_ipv4.dst_addr
+ mov h.vlan_key_header.inner_udp_src_port h.inner_udp.src_port
+ mov h.vlan_key_header.inner_udp_dst_port h.inner_udp.dst_port
+
+ // Table operations
+ table table_014
+
+ // Transmit packets
+ END : emit h.outer_ethernet
+ emit h.outer_ipv4
+ emit h.outer_udp
+ emit h.vxlan
+ emit h.inner_ethernet
+ emit h.inner_ipv4
+ emit h.inner_udp
+ tx m.port
+}
diff --git a/dep/pipeline/table_015/cmd_files/cmd_1.txt b/dep/pipeline/table_015/cmd_files/cmd_1.txt
new file mode 100644
index 00000000..6c6e68f0
--- /dev/null
+++ b/dep/pipeline/table_015/cmd_files/cmd_1.txt
@@ -0,0 +1 @@
+match 0x64000001 0xC8000001 0x0064 0x12B5 0x000064 0x11 0x65000001 0x65000002 0x5555 0x00C8 action table_015_action_01 t_vni 200
diff --git a/dep/pipeline/table_015/ethdev.io b/dep/pipeline/table_015/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/table_015/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/table_015/pcap_files/in_1.txt b/dep/pipeline/table_015/pcap_files/in_1.txt
new file mode 100644
index 00000000..b700ecd7
--- /dev/null
+++ b/dep/pipeline/table_015/pcap_files/in_1.txt
@@ -0,0 +1,15 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc de 10 00 cc ee cc de 01 02 08 00 45 00
+000010 00 58 00 01 00 00 40 11 4e 92 64 00 00 01 c8 00
+000020 00 01 00 64 12 b5 00 44 53 58 0c 00 00 03 00 00
+000030 64 00 12 23 34 56 00 00 aa bb cc de 01 02 08 00
+000040 45 00 00 26 00 01 00 00 40 11 b0 c3 65 00 00 01
+000050 65 00 00 02 55 55 00 c8 00 12 25 f0 58 58 58 58
+000060 58 58 58 58 58 58
\ No newline at end of file
diff --git a/dep/pipeline/table_015/pcap_files/in_2.txt b/dep/pipeline/table_015/pcap_files/in_2.txt
new file mode 100644
index 00000000..f0650b54
--- /dev/null
+++ b/dep/pipeline/table_015/pcap_files/in_2.txt
@@ -0,0 +1,16 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc de 10 00 cc ee cc de 01 02 86 dd 60 00
+000000 aa bb cc de 10 00 cc ee cc de 01 02 08 00 45 00
+000010 00 58 00 01 00 00 40 11 4e 92 64 00 00 01 c8 00
+000020 00 01 00 64 12 b5 00 44 53 73 0c 00 00 03 00 00
+000030 64 00 12 23 34 56 00 00 aa bb cc de 01 02 08 00
+000040 45 00 00 26 00 01 00 00 40 11 b0 a8 65 00 00 0a
+000050 65 00 00 14 01 f4 00 c8 00 12 79 36 58 58 58 58
+000060 58 58 58 58 58 58
\ No newline at end of file
diff --git a/dep/pipeline/table_015/pcap_files/out_1.txt b/dep/pipeline/table_015/pcap_files/out_1.txt
new file mode 100644
index 00000000..177a0e7c
--- /dev/null
+++ b/dep/pipeline/table_015/pcap_files/out_1.txt
@@ -0,0 +1,15 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc de 10 00 cc ee cc de 01 02 08 00 45 00
+000010 00 58 00 01 00 00 40 11 4e 92 64 00 00 01 c8 00
+000020 00 01 00 64 12 b5 00 44 53 58 0c 00 00 03 00 00
+000030 c8 00 12 23 34 56 00 00 aa bb cc de 01 02 08 00
+000040 45 00 00 26 00 01 00 00 40 11 b0 c3 65 00 00 01
+000050 65 00 00 02 55 55 00 c8 00 12 25 f0 58 58 58 58
+000060 58 58 58 58 58 58
diff --git a/dep/pipeline/table_015/pcap_files/out_2.txt b/dep/pipeline/table_015/pcap_files/out_2.txt
new file mode 100644
index 00000000..c7444c3b
--- /dev/null
+++ b/dep/pipeline/table_015/pcap_files/out_2.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 12 23 34 56 00 00 aa bb cc de 01 02 08 00 45 00
+000010 00 26 00 01 00 00 40 11 b0 a8 65 00 00 0a 65 00
+000020 00 14 01 f4 00 c8 00 12 79 36 58 58 58 58 58 58
+000030 58 58 58 58
diff --git a/dep/pipeline/table_015/readme.md b/dep/pipeline/table_015/readme.md
new file mode 100644
index 00000000..5df1cb65
--- /dev/null
+++ b/dep/pipeline/table_015/readme.md
@@ -0,0 +1,15 @@
+Test Case: test_table_015
+-----------------------
+
+ Scenario being tested:
+ Exact match table with key structure type as a metadata, match criteria as an
+ exact match, key element alignment as contiguous and key size < 64 bytes.
+
+ Description:
+ The test case receives Ethernet -> IPv4 -> UDP -> VXLAN -> Ethernet -> IPv4 -> UDP
+ packet sequence as an input. If the packet matches the configured action rule, the
+ associated respective action must take place. If the packet does not match the specified
+ criteria, the default action should take place.
+
+ Verification:
+ The packet verification for the testcase should happen according to the description.
\ No newline at end of file
diff --git a/dep/pipeline/table_015/table_015.cli b/dep/pipeline/table_015/table_015.cli
new file mode 100644
index 00000000..af502b21
--- /dev/null
+++ b/dep/pipeline/table_015/table_015.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+pipeline codegen /tmp/pipeline/table_015/table_015.spec /tmp/pipeline/table_015/table_015.c
+pipeline libbuild /tmp/pipeline/table_015/table_015.c /tmp/pipeline/table_015/table_015.so
+
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/table_015/table_015.so io /tmp/pipeline/table_015/ethdev.io numa 0
+
+pipeline PIPELINE0 table table_015 add /tmp/pipeline/table_015/cmd_files/cmd_1.txt
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/table_015/table_015.spec b/dep/pipeline/table_015/table_015.spec
new file mode 100644
index 00000000..8561cc13
--- /dev/null
+++ b/dep/pipeline/table_015/table_015.spec
@@ -0,0 +1,161 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+// IPv4 Header
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+// UDP Header
+struct udp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<16> length
+ bit<16> checksum
+}
+
+// VXLAN Header
+struct vxlan_h {
+ bit<8> flags
+ bit<24> reserved
+ bit<24> vni
+ bit<8> reserved2
+}
+
+// Header instances
+header outer_ethernet instanceof ethernet_h
+header outer_ipv4 instanceof ipv4_h
+header outer_udp instanceof udp_h
+header vxlan instanceof vxlan_h
+header inner_ethernet instanceof ethernet_h
+header inner_ipv4 instanceof ipv4_h
+header inner_udp instanceof udp_h
+
+
+//
+// Packet meta-data.
+//
+
+struct metadata_t {
+ bit<32> port
+ bit<32> outer_ipv4_src_addr
+ bit<32> outer_ipv4_dst_addr
+ bit<16> outer_udp_src_port
+ bit<16> outer_udp_dst_port
+ bit<24> vni
+ bit<8> protocol
+ bit<32> inner_ipv4_src_addr
+ bit<32> inner_ipv4_dst_addr
+ bit<16> inner_udp_src_port
+ bit<16> inner_udp_dst_port
+}
+
+metadata instanceof metadata_t
+
+struct table_015_action_01_args_t {
+ bit<24> t_vni
+}
+
+// Action 01: Update field in the header data
+action table_015_action_01 args instanceof table_015_action_01_args_t {
+ mov h.vxlan.vni t.t_vni
+ return
+}
+
+// Action 02: Decapsulation
+action table_015_action_02 args none {
+ invalidate h.outer_ethernet
+ invalidate h.outer_ipv4
+ invalidate h.outer_udp
+ invalidate h.vxlan
+ return
+}
+
+table table_015 {
+
+ key {
+ m.outer_ipv4_src_addr exact
+ m.outer_ipv4_dst_addr exact
+ m.outer_udp_src_port exact
+ m.outer_udp_dst_port exact
+ m.vni exact
+ m.protocol exact
+ m.inner_ipv4_src_addr exact
+ m.inner_ipv4_dst_addr exact
+ m.inner_udp_src_port exact
+ m.inner_udp_dst_port exact
+ }
+
+ actions {
+ table_015_action_01
+ table_015_action_02
+ }
+
+ default_action table_015_action_02 args none const
+ size 1048576
+}
+
+apply {
+ // Receive packet
+ rx m.port
+ extract h.outer_ethernet
+ // Verify if packets are arrived in correct
+ // order. If not, go to END.
+ // Ethernet -> IPv4 -> UDP -> VXLAN ->
+ // Ethernet -> IPv4 -> UDP
+ jmpneq END h.outer_ethernet.ether_type 0x0800
+ extract h.outer_ipv4
+ jmpneq END h.outer_ipv4.protocol 0x11
+ extract h.outer_udp
+ jmpneq END h.outer_udp.dst_port 4789
+ extract h.vxlan
+ extract h.inner_ethernet
+ jmpneq END h.inner_ethernet.ether_type 0x0800
+ extract h.inner_ipv4
+ jmpneq END h.inner_ipv4.protocol 0x11
+ extract h.inner_udp
+
+ // Copy the required key data fields from header
+ // into the metadata key fields.
+ mov m.outer_ipv4_src_addr h.outer_ipv4.src_addr
+ mov m.outer_ipv4_dst_addr h.outer_ipv4.dst_addr
+ mov m.outer_udp_src_port h.outer_udp.src_port
+ mov m.outer_udp_dst_port h.outer_udp.dst_port
+ mov m.vni h.vxlan.vni
+ mov m.protocol h.inner_ipv4.protocol
+ mov m.inner_ipv4_src_addr h.inner_ipv4.src_addr
+ mov m.inner_ipv4_dst_addr h.inner_ipv4.dst_addr
+ mov m.inner_udp_src_port h.inner_udp.src_port
+ mov m.inner_udp_dst_port h.inner_udp.dst_port
+
+ // Table operations
+ table table_015
+
+ // Transmit packets
+ END : emit h.outer_ethernet
+ emit h.outer_ipv4
+ emit h.outer_udp
+ emit h.vxlan
+ emit h.inner_ethernet
+ emit h.inner_ipv4
+ emit h.inner_udp
+ tx m.port
+}
diff --git a/dep/pipeline/table_016/cmd_files/cmd_1.txt b/dep/pipeline/table_016/cmd_files/cmd_1.txt
new file mode 100644
index 00000000..34bab27e
--- /dev/null
+++ b/dep/pipeline/table_016/cmd_files/cmd_1.txt
@@ -0,0 +1 @@
+match 0x40000000000000000000000000000001 0x50000000000000000000000000000001 0x0064 0x12B5 0x000064 0x11 0x20000000000000000000000000000100 0x20000000000000000000000000000101 0x5555 0x00C8 action table_016_action_01 t_vni 200
\ No newline at end of file
diff --git a/dep/pipeline/table_016/ethdev.io b/dep/pipeline/table_016/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/table_016/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/table_016/pcap_files/in_1.txt b/dep/pipeline/table_016/pcap_files/in_1.txt
new file mode 100644
index 00000000..2afb50c7
--- /dev/null
+++ b/dep/pipeline/table_016/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc de 00 00 cc ee cc de 11 22 86 dd 60 00
+000010 00 00 00 58 11 40 40 00 00 00 00 00 00 00 00 00
+000020 00 00 00 00 00 01 50 00 00 00 00 00 00 00 00 00
+000030 00 00 00 00 00 01 00 64 12 b5 00 58 31 fc 0c 00
+000040 00 03 00 00 64 00 12 23 34 56 00 02 aa bb cc de
+000050 04 01 86 dd 60 00 00 00 00 12 11 40 20 00 00 00
+000060 00 00 00 00 00 00 00 00 00 00 01 00 20 00 00 00
+000070 00 00 00 00 00 00 00 00 00 00 01 01 55 55 00 c8
+000080 00 12 ad f2 58 58 58 58 58 58 58 58 58 58
\ No newline at end of file
diff --git a/dep/pipeline/table_016/pcap_files/in_2.txt b/dep/pipeline/table_016/pcap_files/in_2.txt
new file mode 100644
index 00000000..9f304f73
--- /dev/null
+++ b/dep/pipeline/table_016/pcap_files/in_2.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc de 10 00 cc ee cc de 01 02 86 dd 60 00
+000010 00 00 00 58 11 40 40 00 00 00 00 00 00 00 00 00
+000020 00 00 00 00 00 01 50 00 00 00 00 00 00 00 00 00
+000030 00 00 00 00 00 01 00 64 12 b5 00 58 34 fd 0c 00
+000040 00 03 00 00 64 00 12 23 34 56 00 00 aa bb cc de
+000050 01 02 86 dd 60 00 00 00 00 12 11 40 20 00 00 00
+000060 00 00 00 00 00 00 00 00 00 00 00 01 20 00 00 00
+000070 00 00 00 00 00 00 00 00 00 00 00 02 01 f4 00 c8
+000080 00 12 03 52 58 58 58 58 58 58 58 58 58 58
\ No newline at end of file
diff --git a/dep/pipeline/table_016/pcap_files/out_1.txt b/dep/pipeline/table_016/pcap_files/out_1.txt
new file mode 100644
index 00000000..cd29cf06
--- /dev/null
+++ b/dep/pipeline/table_016/pcap_files/out_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc de 00 00 cc ee cc de 11 22 86 dd 60 00
+000010 00 00 00 58 11 40 40 00 00 00 00 00 00 00 00 00
+000020 00 00 00 00 00 01 50 00 00 00 00 00 00 00 00 00
+000030 00 00 00 00 00 01 00 64 12 b5 00 58 31 fc 0c 00
+000040 00 03 00 00 c8 00 12 23 34 56 00 02 aa bb cc de
+000050 04 01 86 dd 60 00 00 00 00 12 11 40 20 00 00 00
+000060 00 00 00 00 00 00 00 00 00 00 01 00 20 00 00 00
+000070 00 00 00 00 00 00 00 00 00 00 01 01 55 55 00 c8
+000080 00 12 ad f2 58 58 58 58 58 58 58 58 58 58
diff --git a/dep/pipeline/table_016/pcap_files/out_2.txt b/dep/pipeline/table_016/pcap_files/out_2.txt
new file mode 100644
index 00000000..b8a7244c
--- /dev/null
+++ b/dep/pipeline/table_016/pcap_files/out_2.txt
@@ -0,0 +1,13 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 12 23 34 56 00 00 aa bb cc de 01 02 86 dd 60 00
+000010 00 00 00 12 11 40 20 00 00 00 00 00 00 00 00 00
+000020 00 00 00 00 00 01 20 00 00 00 00 00 00 00 00 00
+000030 00 00 00 00 00 02 01 f4 00 c8 00 12 03 52 58 58
+000040 58 58 58 58 58 58 58 58
diff --git a/dep/pipeline/table_016/readme.md b/dep/pipeline/table_016/readme.md
new file mode 100644
index 00000000..8475c078
--- /dev/null
+++ b/dep/pipeline/table_016/readme.md
@@ -0,0 +1,15 @@
+Test Case: test_table_016
+-----------------------
+
+ Scenario being tested:
+ Exact match table with key structure type as a header, match criteria as an
+ exact match, key element alignment as contiguous and key size > 64 bytes.
+
+ Description:
+ The test case receives Ethernet -> IPv6 -> UDP -> VXLAN -> Ethernet -> IPv6 -> UDP
+ packet sequence as an input. If the packet matches the configured action rule, the
+ associated respective action must take place. If the packet does not match the specified
+ criteria, the default action should take place.
+
+ Verification:
+ The packet verification for the testcase should happen according to the description.
\ No newline at end of file
diff --git a/dep/pipeline/table_016/table_016.cli b/dep/pipeline/table_016/table_016.cli
new file mode 100644
index 00000000..c7ea39d5
--- /dev/null
+++ b/dep/pipeline/table_016/table_016.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+pipeline codegen /tmp/pipeline/table_016/table_016.spec /tmp/pipeline/table_016/table_016.c
+pipeline libbuild /tmp/pipeline/table_016/table_016.c /tmp/pipeline/table_016/table_016.so
+
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/table_016/table_016.so io /tmp/pipeline/table_016/ethdev.io numa 0
+
+pipeline PIPELINE0 table table_016 add /tmp/pipeline/table_016/cmd_files/cmd_1.txt
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/table_016/table_016.spec b/dep/pipeline/table_016/table_016.spec
new file mode 100644
index 00000000..ada9b515
--- /dev/null
+++ b/dep/pipeline/table_016/table_016.spec
@@ -0,0 +1,157 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+// IPv6 Header
+struct ipv6_h {
+ bit<32> ver_tc_label
+ bit<16> payload_length
+ bit<8> next_header
+ bit<8> hop_limit
+ bit<128> src_addr
+ bit<128> dst_addr
+}
+
+// UDP Header
+struct udp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<16> length
+ bit<16> checksum
+}
+
+// VXLAN Header
+struct vxlan_h {
+ bit<8> flags
+ bit<24> reserved
+ bit<24> vni
+ bit<8> reserved2
+}
+
+// Key structure
+struct vlan_key_h {
+ bit<128> outer_ipv6_src_addr
+ bit<128> outer_ipv6_dst_addr
+ bit<16> outer_udp_src_port
+ bit<16> outer_udp_dst_port
+ bit<24> vni
+ bit<8> next_header
+ bit<128> inner_ipv6_src_addr
+ bit<128> inner_ipv6_dst_addr
+ bit<16> inner_udp_src_port
+ bit<16> inner_udp_dst_port
+}
+
+// Header instances
+header outer_ethernet instanceof ethernet_h
+header outer_ipv6 instanceof ipv6_h
+header outer_udp instanceof udp_h
+header vxlan instanceof vxlan_h
+header inner_ethernet instanceof ethernet_h
+header inner_ipv6 instanceof ipv6_h
+header inner_udp instanceof udp_h
+header vlan_key_header instanceof vlan_key_h
+
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+struct table_016_action_01_args_t {
+ bit<24> t_vni
+}
+
+// Action 01: Update field in the header data
+action table_016_action_01 args instanceof table_016_action_01_args_t {
+ mov h.vxlan.vni t.t_vni
+ return
+}
+
+// Action 02: Decapsulation
+action table_016_action_02 args none {
+ invalidate h.outer_ethernet
+ invalidate h.outer_ipv6
+ invalidate h.outer_udp
+ invalidate h.vxlan
+ return
+}
+
+table table_016 {
+
+ key {
+ h.vlan_key_header.outer_ipv6_src_addr exact
+ h.vlan_key_header.outer_ipv6_dst_addr exact
+ h.vlan_key_header.outer_udp_src_port exact
+ h.vlan_key_header.outer_udp_dst_port exact
+ h.vlan_key_header.vni exact
+ h.vlan_key_header.next_header exact
+ h.vlan_key_header.inner_ipv6_src_addr exact
+ h.vlan_key_header.inner_ipv6_dst_addr exact
+ h.vlan_key_header.inner_udp_src_port exact
+ h.vlan_key_header.inner_udp_dst_port exact
+ }
+
+ actions {
+ table_016_action_01
+ table_016_action_02
+ }
+
+ default_action table_016_action_02 args none const
+ size 1048576
+}
+
+apply {
+ // Receive packet
+ rx m.port
+ extract h.outer_ethernet
+ // Verify if packets are arrived in correct
+ // order. If not, go to END.
+ // Ethernet -> IPv6 -> UDP -> VXLAN ->
+ // Ethernet -> IPv6 -> UDP
+ jmpneq END h.outer_ethernet.ether_type 0x86dd
+ extract h.outer_ipv6
+ jmpneq END h.outer_ipv6.next_header 0x11
+ extract h.outer_udp
+ jmpneq END h.outer_udp.dst_port 4789
+ extract h.vxlan
+ extract h.inner_ethernet
+ jmpneq END h.inner_ethernet.ether_type 0x86dd
+ extract h.inner_ipv6
+ jmpneq END h.inner_ipv6.next_header 0x11
+ extract h.inner_udp
+
+ // Copy the required key data fields from header
+ // into the metadata key fields.
+ mov h.vlan_key_header.outer_ipv6_src_addr h.outer_ipv6.src_addr
+ mov h.vlan_key_header.outer_ipv6_dst_addr h.outer_ipv6.dst_addr
+ mov h.vlan_key_header.outer_udp_src_port h.outer_udp.src_port
+ mov h.vlan_key_header.outer_udp_dst_port h.outer_udp.dst_port
+ mov h.vlan_key_header.vni h.vxlan.vni
+ mov h.vlan_key_header.next_header h.inner_ipv6.next_header
+ mov h.vlan_key_header.inner_ipv6_src_addr h.inner_ipv6.src_addr
+ mov h.vlan_key_header.inner_ipv6_dst_addr h.inner_ipv6.dst_addr
+ mov h.vlan_key_header.inner_udp_src_port h.inner_udp.src_port
+ mov h.vlan_key_header.inner_udp_dst_port h.inner_udp.dst_port
+
+ // Table operations
+ table table_016
+
+ // Transmit packets
+ END : emit h.outer_ethernet
+ emit h.outer_ipv6
+ emit h.outer_udp
+ emit h.vxlan
+ emit h.inner_ethernet
+ emit h.inner_ipv6
+ emit h.inner_udp
+ tx m.port
+}
diff --git a/dep/pipeline/table_017/cmd_files/cmd_1.txt b/dep/pipeline/table_017/cmd_files/cmd_1.txt
new file mode 100644
index 00000000..ca645878
--- /dev/null
+++ b/dep/pipeline/table_017/cmd_files/cmd_1.txt
@@ -0,0 +1 @@
+match 0x40000000000000000000000000000001 0x50000000000000000000000000000001 0x0064 0x12B5 0x000064 0x11 0x20000000000000000000000000000100 0x20000000000000000000000000000101 0x5555 0x00C8 action table_017_action_01 t_vni 200
diff --git a/dep/pipeline/table_017/ethdev.io b/dep/pipeline/table_017/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/table_017/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/table_017/pcap_files/in_1.txt b/dep/pipeline/table_017/pcap_files/in_1.txt
new file mode 100644
index 00000000..2afb50c7
--- /dev/null
+++ b/dep/pipeline/table_017/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc de 00 00 cc ee cc de 11 22 86 dd 60 00
+000010 00 00 00 58 11 40 40 00 00 00 00 00 00 00 00 00
+000020 00 00 00 00 00 01 50 00 00 00 00 00 00 00 00 00
+000030 00 00 00 00 00 01 00 64 12 b5 00 58 31 fc 0c 00
+000040 00 03 00 00 64 00 12 23 34 56 00 02 aa bb cc de
+000050 04 01 86 dd 60 00 00 00 00 12 11 40 20 00 00 00
+000060 00 00 00 00 00 00 00 00 00 00 01 00 20 00 00 00
+000070 00 00 00 00 00 00 00 00 00 00 01 01 55 55 00 c8
+000080 00 12 ad f2 58 58 58 58 58 58 58 58 58 58
\ No newline at end of file
diff --git a/dep/pipeline/table_017/pcap_files/in_2.txt b/dep/pipeline/table_017/pcap_files/in_2.txt
new file mode 100644
index 00000000..9f304f73
--- /dev/null
+++ b/dep/pipeline/table_017/pcap_files/in_2.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc de 10 00 cc ee cc de 01 02 86 dd 60 00
+000010 00 00 00 58 11 40 40 00 00 00 00 00 00 00 00 00
+000020 00 00 00 00 00 01 50 00 00 00 00 00 00 00 00 00
+000030 00 00 00 00 00 01 00 64 12 b5 00 58 34 fd 0c 00
+000040 00 03 00 00 64 00 12 23 34 56 00 00 aa bb cc de
+000050 01 02 86 dd 60 00 00 00 00 12 11 40 20 00 00 00
+000060 00 00 00 00 00 00 00 00 00 00 00 01 20 00 00 00
+000070 00 00 00 00 00 00 00 00 00 00 00 02 01 f4 00 c8
+000080 00 12 03 52 58 58 58 58 58 58 58 58 58 58
\ No newline at end of file
diff --git a/dep/pipeline/table_017/pcap_files/out_1.txt b/dep/pipeline/table_017/pcap_files/out_1.txt
new file mode 100644
index 00000000..cd29cf06
--- /dev/null
+++ b/dep/pipeline/table_017/pcap_files/out_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc de 00 00 cc ee cc de 11 22 86 dd 60 00
+000010 00 00 00 58 11 40 40 00 00 00 00 00 00 00 00 00
+000020 00 00 00 00 00 01 50 00 00 00 00 00 00 00 00 00
+000030 00 00 00 00 00 01 00 64 12 b5 00 58 31 fc 0c 00
+000040 00 03 00 00 c8 00 12 23 34 56 00 02 aa bb cc de
+000050 04 01 86 dd 60 00 00 00 00 12 11 40 20 00 00 00
+000060 00 00 00 00 00 00 00 00 00 00 01 00 20 00 00 00
+000070 00 00 00 00 00 00 00 00 00 00 01 01 55 55 00 c8
+000080 00 12 ad f2 58 58 58 58 58 58 58 58 58 58
diff --git a/dep/pipeline/table_017/pcap_files/out_2.txt b/dep/pipeline/table_017/pcap_files/out_2.txt
new file mode 100644
index 00000000..b8a7244c
--- /dev/null
+++ b/dep/pipeline/table_017/pcap_files/out_2.txt
@@ -0,0 +1,13 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 12 23 34 56 00 00 aa bb cc de 01 02 86 dd 60 00
+000010 00 00 00 12 11 40 20 00 00 00 00 00 00 00 00 00
+000020 00 00 00 00 00 01 20 00 00 00 00 00 00 00 00 00
+000030 00 00 00 00 00 02 01 f4 00 c8 00 12 03 52 58 58
+000040 58 58 58 58 58 58 58 58
diff --git a/dep/pipeline/table_017/readme.md b/dep/pipeline/table_017/readme.md
new file mode 100644
index 00000000..41456759
--- /dev/null
+++ b/dep/pipeline/table_017/readme.md
@@ -0,0 +1,15 @@
+Test Case: test_table_017
+-----------------------
+
+ Scenario being tested:
+ Exact match table with key structure type as a metadata, match criteria as an
+ exact match, key element alignment as contiguous and key size > 64 bytes.
+
+ Description:
+ The test case receives Ethernet -> IPv6 -> UDP -> VXLAN -> Ethernet -> IPv6 -> UDP
+ packet sequence as an input. If the packet matches the configured action rule, the
+ associated respective action must take place. If the packet does not match the specified
+ criteria, the default action should take place.
+
+ Verification:
+ The packet verification for the testcase should happen according to the description.
\ No newline at end of file
diff --git a/dep/pipeline/table_017/table_017.cli b/dep/pipeline/table_017/table_017.cli
new file mode 100644
index 00000000..ea437f3c
--- /dev/null
+++ b/dep/pipeline/table_017/table_017.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+pipeline codegen /tmp/pipeline/table_017/table_017.spec /tmp/pipeline/table_017/table_017.c
+pipeline libbuild /tmp/pipeline/table_017/table_017.c /tmp/pipeline/table_017/table_017.so
+
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/table_017/table_017.so io /tmp/pipeline/table_017/ethdev.io numa 0
+
+pipeline PIPELINE0 table table_017 add /tmp/pipeline/table_017/cmd_files/cmd_1.txt
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/table_017/table_017.spec b/dep/pipeline/table_017/table_017.spec
new file mode 100644
index 00000000..51dc1bdb
--- /dev/null
+++ b/dep/pipeline/table_017/table_017.spec
@@ -0,0 +1,157 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+// IPv6 Header
+struct ipv6_h {
+ bit<32> ver_tc_label
+ bit<16> payload_length
+ bit<8> next_header
+ bit<8> hop_limit
+ bit<128> src_addr
+ bit<128> dst_addr
+}
+
+// UDP Header
+struct udp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<16> length
+ bit<16> checksum
+}
+
+// VXLAN Header
+struct vxlan_h {
+ bit<8> flags
+ bit<24> reserved
+ bit<24> vni
+ bit<8> reserved2
+}
+
+// Header instances
+header outer_ethernet instanceof ethernet_h
+header outer_ipv6 instanceof ipv6_h
+header outer_udp instanceof udp_h
+header vxlan instanceof vxlan_h
+header inner_ethernet instanceof ethernet_h
+header inner_ipv6 instanceof ipv6_h
+header inner_udp instanceof udp_h
+
+
+//
+// Packet meta-data.
+//
+
+struct metadata_t {
+ bit<32> port
+ bit<128> outer_ipv6_src_addr
+ bit<128> outer_ipv6_dst_addr
+ bit<16> outer_udp_src_port
+ bit<16> outer_udp_dst_port
+ bit<24> vni
+ bit<8> next_header
+ bit<128> inner_ipv6_src_addr
+ bit<128> inner_ipv6_dst_addr
+ bit<16> inner_udp_src_port
+ bit<16> inner_udp_dst_port
+}
+
+metadata instanceof metadata_t
+
+struct table_017_action_01_args_t {
+ bit<24> t_vni
+}
+
+// Action 01: Update field in the header data
+action table_017_action_01 args instanceof table_017_action_01_args_t {
+ mov h.vxlan.vni t.t_vni
+ return
+}
+
+// Action 02: Decapsulation
+action table_017_action_02 args none {
+ invalidate h.outer_ethernet
+ invalidate h.outer_ipv6
+ invalidate h.outer_udp
+ invalidate h.vxlan
+ return
+}
+
+table table_017 {
+
+ key {
+ m.outer_ipv6_src_addr exact
+ m.outer_ipv6_dst_addr exact
+ m.outer_udp_src_port exact
+ m.outer_udp_dst_port exact
+ m.vni exact
+ m.next_header exact
+ m.inner_ipv6_src_addr exact
+ m.inner_ipv6_dst_addr exact
+ m.inner_udp_src_port exact
+ m.inner_udp_dst_port exact
+ }
+
+ actions {
+ table_017_action_01
+ table_017_action_02
+ }
+
+ default_action table_017_action_02 args none const
+ size 1048576
+}
+
+apply {
+ // Receive packet
+ rx m.port
+ extract h.outer_ethernet
+ // Verify if packets are arrived in correct
+ // order. If not, go to END.
+ // Ethernet -> IPv6 -> UDP -> VXLAN ->
+ // Ethernet -> IPv6 -> UDP
+ jmpneq END h.outer_ethernet.ether_type 0x86dd
+ extract h.outer_ipv6
+ jmpneq END h.outer_ipv6.next_header 0x11
+ extract h.outer_udp
+ jmpneq END h.outer_udp.dst_port 4789
+ extract h.vxlan
+ extract h.inner_ethernet
+ jmpneq END h.inner_ethernet.ether_type 0x86dd
+ extract h.inner_ipv6
+ jmpneq END h.inner_ipv6.next_header 0x11
+ extract h.inner_udp
+
+ // Copy the required key data fields from header
+ // into the metadata key fields.
+ mov m.outer_ipv6_src_addr h.outer_ipv6.src_addr
+ mov m.outer_ipv6_dst_addr h.outer_ipv6.dst_addr
+ mov m.outer_udp_src_port h.outer_udp.src_port
+ mov m.outer_udp_dst_port h.outer_udp.dst_port
+ mov m.vni h.vxlan.vni
+ mov m.next_header h.inner_ipv6.next_header
+ mov m.inner_ipv6_src_addr h.inner_ipv6.src_addr
+ mov m.inner_ipv6_dst_addr h.inner_ipv6.dst_addr
+ mov m.inner_udp_src_port h.inner_udp.src_port
+ mov m.inner_udp_dst_port h.inner_udp.dst_port
+
+ // Table operations
+ table table_017
+
+ // Transmit packets
+ END : emit h.outer_ethernet
+ emit h.outer_ipv6
+ emit h.outer_udp
+ emit h.vxlan
+ emit h.inner_ethernet
+ emit h.inner_ipv6
+ emit h.inner_udp
+ tx m.port
+}
diff --git a/dep/pipeline/table_018/cmd_files/cmd_1.txt b/dep/pipeline/table_018/cmd_files/cmd_1.txt
new file mode 100644
index 00000000..b3829d32
--- /dev/null
+++ b/dep/pipeline/table_018/cmd_files/cmd_1.txt
@@ -0,0 +1 @@
+match 0x64000001 0xC8000001 0x000064 0x11 0x65000001 0x65000002 0x5555 0x00C8 action table_018_action_01 t_vni 200
diff --git a/dep/pipeline/table_018/ethdev.io b/dep/pipeline/table_018/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/table_018/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/table_018/pcap_files/in_1.txt b/dep/pipeline/table_018/pcap_files/in_1.txt
new file mode 100644
index 00000000..b700ecd7
--- /dev/null
+++ b/dep/pipeline/table_018/pcap_files/in_1.txt
@@ -0,0 +1,15 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc de 10 00 cc ee cc de 01 02 08 00 45 00
+000010 00 58 00 01 00 00 40 11 4e 92 64 00 00 01 c8 00
+000020 00 01 00 64 12 b5 00 44 53 58 0c 00 00 03 00 00
+000030 64 00 12 23 34 56 00 00 aa bb cc de 01 02 08 00
+000040 45 00 00 26 00 01 00 00 40 11 b0 c3 65 00 00 01
+000050 65 00 00 02 55 55 00 c8 00 12 25 f0 58 58 58 58
+000060 58 58 58 58 58 58
\ No newline at end of file
diff --git a/dep/pipeline/table_018/pcap_files/in_2.txt b/dep/pipeline/table_018/pcap_files/in_2.txt
new file mode 100644
index 00000000..f0650b54
--- /dev/null
+++ b/dep/pipeline/table_018/pcap_files/in_2.txt
@@ -0,0 +1,16 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc de 10 00 cc ee cc de 01 02 86 dd 60 00
+000000 aa bb cc de 10 00 cc ee cc de 01 02 08 00 45 00
+000010 00 58 00 01 00 00 40 11 4e 92 64 00 00 01 c8 00
+000020 00 01 00 64 12 b5 00 44 53 73 0c 00 00 03 00 00
+000030 64 00 12 23 34 56 00 00 aa bb cc de 01 02 08 00
+000040 45 00 00 26 00 01 00 00 40 11 b0 a8 65 00 00 0a
+000050 65 00 00 14 01 f4 00 c8 00 12 79 36 58 58 58 58
+000060 58 58 58 58 58 58
\ No newline at end of file
diff --git a/dep/pipeline/table_018/pcap_files/out_1.txt b/dep/pipeline/table_018/pcap_files/out_1.txt
new file mode 100644
index 00000000..177a0e7c
--- /dev/null
+++ b/dep/pipeline/table_018/pcap_files/out_1.txt
@@ -0,0 +1,15 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc de 10 00 cc ee cc de 01 02 08 00 45 00
+000010 00 58 00 01 00 00 40 11 4e 92 64 00 00 01 c8 00
+000020 00 01 00 64 12 b5 00 44 53 58 0c 00 00 03 00 00
+000030 c8 00 12 23 34 56 00 00 aa bb cc de 01 02 08 00
+000040 45 00 00 26 00 01 00 00 40 11 b0 c3 65 00 00 01
+000050 65 00 00 02 55 55 00 c8 00 12 25 f0 58 58 58 58
+000060 58 58 58 58 58 58
diff --git a/dep/pipeline/table_018/pcap_files/out_2.txt b/dep/pipeline/table_018/pcap_files/out_2.txt
new file mode 100644
index 00000000..c7444c3b
--- /dev/null
+++ b/dep/pipeline/table_018/pcap_files/out_2.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 12 23 34 56 00 00 aa bb cc de 01 02 08 00 45 00
+000010 00 26 00 01 00 00 40 11 b0 a8 65 00 00 0a 65 00
+000020 00 14 01 f4 00 c8 00 12 79 36 58 58 58 58 58 58
+000030 58 58 58 58
diff --git a/dep/pipeline/table_018/readme.md b/dep/pipeline/table_018/readme.md
new file mode 100644
index 00000000..5cb144c0
--- /dev/null
+++ b/dep/pipeline/table_018/readme.md
@@ -0,0 +1,15 @@
+Test Case: test_table_018
+-----------------------
+
+ Scenario being tested:
+ Exact match table with key structure type as a header, match criteria as an
+ exact match, key element alignment as non-contiguous and key size < 64 bytes.
+
+ Description:
+ The test case receives Ethernet -> IPv4 -> UDP -> VXLAN -> Ethernet -> IPv4 -> UDP
+ packet sequence as an input. If the packet matches the configured action rule, the
+ associated respective action must take place. If the packet does not match the specified
+ criteria, the default action should take place.
+
+ Verification:
+ The packet verification for the testcase should happen according to the description.
\ No newline at end of file
diff --git a/dep/pipeline/table_018/table_018.cli b/dep/pipeline/table_018/table_018.cli
new file mode 100644
index 00000000..1acb7ef1
--- /dev/null
+++ b/dep/pipeline/table_018/table_018.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+pipeline codegen /tmp/pipeline/table_018/table_018.spec /tmp/pipeline/table_018/table_018.c
+pipeline libbuild /tmp/pipeline/table_018/table_018.c /tmp/pipeline/table_018/table_018.so
+
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/table_018/table_018.so io /tmp/pipeline/table_018/ethdev.io numa 0
+
+pipeline PIPELINE0 table table_018 add /tmp/pipeline/table_018/cmd_files/cmd_1.txt
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/table_018/table_018.spec b/dep/pipeline/table_018/table_018.spec
new file mode 100644
index 00000000..abd0b342
--- /dev/null
+++ b/dep/pipeline/table_018/table_018.spec
@@ -0,0 +1,156 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+// IPv4 Header
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+// UDP Header
+struct udp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<16> length
+ bit<16> checksum
+}
+
+// VXLAN Header
+struct vxlan_h {
+ bit<8> flags
+ bit<24> reserved
+ bit<24> vni
+ bit<8> reserved2
+}
+
+struct vlan_key_h {
+ bit<32> outer_ipv4_src_addr
+ bit<32> outer_ipv4_dst_addr
+ bit<16> outer_udp_src_port
+ bit<16> outer_udp_dst_port
+ bit<24> vni
+ bit<8> protocol
+ bit<32> inner_ipv4_src_addr
+ bit<32> inner_ipv4_dst_addr
+ bit<16> inner_udp_src_port
+ bit<16> inner_udp_dst_port
+}
+
+// Header instances
+header outer_ethernet instanceof ethernet_h
+header outer_ipv4 instanceof ipv4_h
+header outer_udp instanceof udp_h
+header vxlan instanceof vxlan_h
+header inner_ethernet instanceof ethernet_h
+header inner_ipv4 instanceof ipv4_h
+header inner_udp instanceof udp_h
+header vlan_key_header instanceof vlan_key_h
+
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+struct table_018_action_01_args_t {
+ bit<24> t_vni
+}
+
+// Action 01: Update field in the header data
+action table_018_action_01 args instanceof table_018_action_01_args_t {
+ mov h.vxlan.vni t.t_vni
+ return
+}
+
+// Action 02: Decapsulation
+action table_018_action_02 args none {
+ invalidate h.outer_ethernet
+ invalidate h.outer_ipv4
+ invalidate h.outer_udp
+ invalidate h.vxlan
+ return
+}
+
+table table_018 {
+
+ key {
+ h.vlan_key_header.outer_ipv4_src_addr exact
+ h.vlan_key_header.outer_ipv4_dst_addr exact
+ h.vlan_key_header.vni exact
+ h.vlan_key_header.protocol exact
+ h.vlan_key_header.inner_ipv4_src_addr exact
+ h.vlan_key_header.inner_ipv4_dst_addr exact
+ h.vlan_key_header.inner_udp_src_port exact
+ h.vlan_key_header.inner_udp_dst_port exact
+ }
+
+ actions {
+ table_018_action_01
+ table_018_action_02
+ }
+
+ default_action table_018_action_02 args none const
+ size 1048576
+}
+
+apply {
+ // Receive packet
+ rx m.port
+ extract h.outer_ethernet
+ // Verify if packets are arrived in correct
+ // order. If not, go to END.
+ // Ethernet -> IPv4 -> UDP -> VXLAN ->
+ // Ethernet -> IPv4 -> UDP
+ jmpneq END h.outer_ethernet.ether_type 0x0800
+ extract h.outer_ipv4
+ jmpneq END h.outer_ipv4.protocol 0x11
+ extract h.outer_udp
+ jmpneq END h.outer_udp.dst_port 4789
+ extract h.vxlan
+ extract h.inner_ethernet
+ jmpneq END h.inner_ethernet.ether_type 0x0800
+ extract h.inner_ipv4
+ jmpneq END h.inner_ipv4.protocol 0x11
+ extract h.inner_udp
+
+ // Copy the required key data fields from header
+ // into the metadata key fields.
+ mov h.vlan_key_header.outer_ipv4_src_addr h.outer_ipv4.src_addr
+ mov h.vlan_key_header.outer_ipv4_dst_addr h.outer_ipv4.dst_addr
+ mov h.vlan_key_header.vni h.vxlan.vni
+ mov h.vlan_key_header.protocol h.inner_ipv4.protocol
+ mov h.vlan_key_header.inner_ipv4_src_addr h.inner_ipv4.src_addr
+ mov h.vlan_key_header.inner_ipv4_dst_addr h.inner_ipv4.dst_addr
+ mov h.vlan_key_header.inner_udp_src_port h.inner_udp.src_port
+ mov h.vlan_key_header.inner_udp_dst_port h.inner_udp.dst_port
+
+ // Table operations
+ table table_018
+
+ // Transmit packets
+ END : emit h.outer_ethernet
+ emit h.outer_ipv4
+ emit h.outer_udp
+ emit h.vxlan
+ emit h.inner_ethernet
+ emit h.inner_ipv4
+ emit h.inner_udp
+ tx m.port
+}
diff --git a/dep/pipeline/table_019/cmd_files/cmd_1.txt b/dep/pipeline/table_019/cmd_files/cmd_1.txt
new file mode 100644
index 00000000..966f85cf
--- /dev/null
+++ b/dep/pipeline/table_019/cmd_files/cmd_1.txt
@@ -0,0 +1 @@
+match 0x64000001 0xC8000001 0x000064 0x11 0x65000001 0x65000002 0x5555 0x00C8 action table_019_action_01 t_vni 200
diff --git a/dep/pipeline/table_019/ethdev.io b/dep/pipeline/table_019/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/table_019/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/table_019/pcap_files/in_1.txt b/dep/pipeline/table_019/pcap_files/in_1.txt
new file mode 100644
index 00000000..b700ecd7
--- /dev/null
+++ b/dep/pipeline/table_019/pcap_files/in_1.txt
@@ -0,0 +1,15 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc de 10 00 cc ee cc de 01 02 08 00 45 00
+000010 00 58 00 01 00 00 40 11 4e 92 64 00 00 01 c8 00
+000020 00 01 00 64 12 b5 00 44 53 58 0c 00 00 03 00 00
+000030 64 00 12 23 34 56 00 00 aa bb cc de 01 02 08 00
+000040 45 00 00 26 00 01 00 00 40 11 b0 c3 65 00 00 01
+000050 65 00 00 02 55 55 00 c8 00 12 25 f0 58 58 58 58
+000060 58 58 58 58 58 58
\ No newline at end of file
diff --git a/dep/pipeline/table_019/pcap_files/in_2.txt b/dep/pipeline/table_019/pcap_files/in_2.txt
new file mode 100644
index 00000000..f0650b54
--- /dev/null
+++ b/dep/pipeline/table_019/pcap_files/in_2.txt
@@ -0,0 +1,16 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc de 10 00 cc ee cc de 01 02 86 dd 60 00
+000000 aa bb cc de 10 00 cc ee cc de 01 02 08 00 45 00
+000010 00 58 00 01 00 00 40 11 4e 92 64 00 00 01 c8 00
+000020 00 01 00 64 12 b5 00 44 53 73 0c 00 00 03 00 00
+000030 64 00 12 23 34 56 00 00 aa bb cc de 01 02 08 00
+000040 45 00 00 26 00 01 00 00 40 11 b0 a8 65 00 00 0a
+000050 65 00 00 14 01 f4 00 c8 00 12 79 36 58 58 58 58
+000060 58 58 58 58 58 58
\ No newline at end of file
diff --git a/dep/pipeline/table_019/pcap_files/out_1.txt b/dep/pipeline/table_019/pcap_files/out_1.txt
new file mode 100644
index 00000000..177a0e7c
--- /dev/null
+++ b/dep/pipeline/table_019/pcap_files/out_1.txt
@@ -0,0 +1,15 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc de 10 00 cc ee cc de 01 02 08 00 45 00
+000010 00 58 00 01 00 00 40 11 4e 92 64 00 00 01 c8 00
+000020 00 01 00 64 12 b5 00 44 53 58 0c 00 00 03 00 00
+000030 c8 00 12 23 34 56 00 00 aa bb cc de 01 02 08 00
+000040 45 00 00 26 00 01 00 00 40 11 b0 c3 65 00 00 01
+000050 65 00 00 02 55 55 00 c8 00 12 25 f0 58 58 58 58
+000060 58 58 58 58 58 58
diff --git a/dep/pipeline/table_019/pcap_files/out_2.txt b/dep/pipeline/table_019/pcap_files/out_2.txt
new file mode 100644
index 00000000..c7444c3b
--- /dev/null
+++ b/dep/pipeline/table_019/pcap_files/out_2.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 12 23 34 56 00 00 aa bb cc de 01 02 08 00 45 00
+000010 00 26 00 01 00 00 40 11 b0 a8 65 00 00 0a 65 00
+000020 00 14 01 f4 00 c8 00 12 79 36 58 58 58 58 58 58
+000030 58 58 58 58
diff --git a/dep/pipeline/table_019/readme.md b/dep/pipeline/table_019/readme.md
new file mode 100644
index 00000000..c7c132bb
--- /dev/null
+++ b/dep/pipeline/table_019/readme.md
@@ -0,0 +1,15 @@
+Test Case: test_table_019
+-----------------------
+
+ Scenario being tested:
+ Exact match table with key structure type as a metadata, match criteria as an
+ exact match, key element alignment as non-contiguous and key size < 64 bytes.
+
+ Description:
+ The test case receives Ethernet -> IPv4 -> UDP -> VXLAN -> Ethernet -> IPv4 -> UDP
+ packet sequence as an input. If the packet matches the configured action rule, the
+ associated respective action must take place. If the packet does not match the specified
+ criteria, the default action should take place.
+
+ Verification:
+ The packet verification for the testcase should happen according to the description.
\ No newline at end of file
diff --git a/dep/pipeline/table_019/table_019.cli b/dep/pipeline/table_019/table_019.cli
new file mode 100644
index 00000000..553944bc
--- /dev/null
+++ b/dep/pipeline/table_019/table_019.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+pipeline codegen /tmp/pipeline/table_019/table_019.spec /tmp/pipeline/table_019/table_019.c
+pipeline libbuild /tmp/pipeline/table_019/table_019.c /tmp/pipeline/table_019/table_019.so
+
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/table_019/table_019.so io /tmp/pipeline/table_019/ethdev.io numa 0
+
+pipeline PIPELINE0 table table_019 add /tmp/pipeline/table_019/cmd_files/cmd_1.txt
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/table_019/table_019.spec b/dep/pipeline/table_019/table_019.spec
new file mode 100644
index 00000000..f3691c8c
--- /dev/null
+++ b/dep/pipeline/table_019/table_019.spec
@@ -0,0 +1,157 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+// IPv4 Header
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+// UDP Header
+struct udp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<16> length
+ bit<16> checksum
+}
+
+// VXLAN Header
+struct vxlan_h {
+ bit<8> flags
+ bit<24> reserved
+ bit<24> vni
+ bit<8> reserved2
+}
+
+// Header instances
+header outer_ethernet instanceof ethernet_h
+header outer_ipv4 instanceof ipv4_h
+header outer_udp instanceof udp_h
+header vxlan instanceof vxlan_h
+header inner_ethernet instanceof ethernet_h
+header inner_ipv4 instanceof ipv4_h
+header inner_udp instanceof udp_h
+
+
+//
+// Packet meta-data.
+//
+
+struct metadata_t {
+ bit<32> port
+ bit<32> outer_ipv4_src_addr
+ bit<32> outer_ipv4_dst_addr
+ bit<16> outer_udp_src_port
+ bit<16> outer_udp_dst_port
+ bit<24> vni
+ bit<8> protocol
+ bit<32> inner_ipv4_src_addr
+ bit<32> inner_ipv4_dst_addr
+ bit<16> inner_udp_src_port
+ bit<16> inner_udp_dst_port
+}
+
+metadata instanceof metadata_t
+
+struct table_019_action_01_args_t {
+ bit<24> t_vni
+}
+
+// Action 01: Update field in the header data
+action table_019_action_01 args instanceof table_019_action_01_args_t {
+ mov h.vxlan.vni t.t_vni
+ return
+}
+
+// Action 02: Decapsulation
+action table_019_action_02 args none {
+ invalidate h.outer_ethernet
+ invalidate h.outer_ipv4
+ invalidate h.outer_udp
+ invalidate h.vxlan
+ return
+}
+
+table table_019 {
+
+ key {
+ m.outer_ipv4_src_addr exact
+ m.outer_ipv4_dst_addr exact
+ m.vni exact
+ m.protocol exact
+ m.inner_ipv4_src_addr exact
+ m.inner_ipv4_dst_addr exact
+ m.inner_udp_src_port exact
+ m.inner_udp_dst_port exact
+ }
+
+ actions {
+ table_019_action_01
+ table_019_action_02
+ }
+
+ default_action table_019_action_02 args none const
+ size 1048576
+}
+
+apply {
+ // Receive packet
+ rx m.port
+ extract h.outer_ethernet
+ // Verify if packets are arrived in correct
+ // order. If not, go to END.
+ // Ethernet -> IPv4 -> UDP -> VXLAN ->
+ // Ethernet -> IPv4 -> UDP
+ jmpneq END h.outer_ethernet.ether_type 0x0800
+ extract h.outer_ipv4
+ jmpneq END h.outer_ipv4.protocol 0x11
+ extract h.outer_udp
+ jmpneq END h.outer_udp.dst_port 4789
+ extract h.vxlan
+ extract h.inner_ethernet
+ jmpneq END h.inner_ethernet.ether_type 0x0800
+ extract h.inner_ipv4
+ jmpneq END h.inner_ipv4.protocol 0x11
+ extract h.inner_udp
+
+ // Copy the required key data fields from header
+ // into the metadata key fields.
+ mov m.outer_ipv4_src_addr h.outer_ipv4.src_addr
+ mov m.outer_ipv4_dst_addr h.outer_ipv4.dst_addr
+ mov m.vni h.vxlan.vni
+ mov m.protocol h.inner_ipv4.protocol
+ mov m.inner_ipv4_src_addr h.inner_ipv4.src_addr
+ mov m.inner_ipv4_dst_addr h.inner_ipv4.dst_addr
+ mov m.inner_udp_src_port h.inner_udp.src_port
+ mov m.inner_udp_dst_port h.inner_udp.dst_port
+
+ // Table operations
+ table table_019
+
+ // Transmit packets
+ END : emit h.outer_ethernet
+ emit h.outer_ipv4
+ emit h.outer_udp
+ emit h.vxlan
+ emit h.inner_ethernet
+ emit h.inner_ipv4
+ emit h.inner_udp
+ tx m.port
+}
diff --git a/dep/pipeline/table_020/cmd_files/cmd_1.txt b/dep/pipeline/table_020/cmd_files/cmd_1.txt
new file mode 100644
index 00000000..dcdafd1f
--- /dev/null
+++ b/dep/pipeline/table_020/cmd_files/cmd_1.txt
@@ -0,0 +1 @@
+match 0x40000000000000000000000000000001 0x50000000000000000000000000000001 0x000064 0x11 0x20000000000000000000000000000100 0x20000000000000000000000000000101 0x5555 0x00C8 action table_020_action_01 t_vni 200
diff --git a/dep/pipeline/table_020/ethdev.io b/dep/pipeline/table_020/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/table_020/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/table_020/pcap_files/in_1.txt b/dep/pipeline/table_020/pcap_files/in_1.txt
new file mode 100644
index 00000000..2afb50c7
--- /dev/null
+++ b/dep/pipeline/table_020/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc de 00 00 cc ee cc de 11 22 86 dd 60 00
+000010 00 00 00 58 11 40 40 00 00 00 00 00 00 00 00 00
+000020 00 00 00 00 00 01 50 00 00 00 00 00 00 00 00 00
+000030 00 00 00 00 00 01 00 64 12 b5 00 58 31 fc 0c 00
+000040 00 03 00 00 64 00 12 23 34 56 00 02 aa bb cc de
+000050 04 01 86 dd 60 00 00 00 00 12 11 40 20 00 00 00
+000060 00 00 00 00 00 00 00 00 00 00 01 00 20 00 00 00
+000070 00 00 00 00 00 00 00 00 00 00 01 01 55 55 00 c8
+000080 00 12 ad f2 58 58 58 58 58 58 58 58 58 58
\ No newline at end of file
diff --git a/dep/pipeline/table_020/pcap_files/in_2.txt b/dep/pipeline/table_020/pcap_files/in_2.txt
new file mode 100644
index 00000000..9f304f73
--- /dev/null
+++ b/dep/pipeline/table_020/pcap_files/in_2.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc de 10 00 cc ee cc de 01 02 86 dd 60 00
+000010 00 00 00 58 11 40 40 00 00 00 00 00 00 00 00 00
+000020 00 00 00 00 00 01 50 00 00 00 00 00 00 00 00 00
+000030 00 00 00 00 00 01 00 64 12 b5 00 58 34 fd 0c 00
+000040 00 03 00 00 64 00 12 23 34 56 00 00 aa bb cc de
+000050 01 02 86 dd 60 00 00 00 00 12 11 40 20 00 00 00
+000060 00 00 00 00 00 00 00 00 00 00 00 01 20 00 00 00
+000070 00 00 00 00 00 00 00 00 00 00 00 02 01 f4 00 c8
+000080 00 12 03 52 58 58 58 58 58 58 58 58 58 58
\ No newline at end of file
diff --git a/dep/pipeline/table_020/pcap_files/out_1.txt b/dep/pipeline/table_020/pcap_files/out_1.txt
new file mode 100644
index 00000000..cd29cf06
--- /dev/null
+++ b/dep/pipeline/table_020/pcap_files/out_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc de 00 00 cc ee cc de 11 22 86 dd 60 00
+000010 00 00 00 58 11 40 40 00 00 00 00 00 00 00 00 00
+000020 00 00 00 00 00 01 50 00 00 00 00 00 00 00 00 00
+000030 00 00 00 00 00 01 00 64 12 b5 00 58 31 fc 0c 00
+000040 00 03 00 00 c8 00 12 23 34 56 00 02 aa bb cc de
+000050 04 01 86 dd 60 00 00 00 00 12 11 40 20 00 00 00
+000060 00 00 00 00 00 00 00 00 00 00 01 00 20 00 00 00
+000070 00 00 00 00 00 00 00 00 00 00 01 01 55 55 00 c8
+000080 00 12 ad f2 58 58 58 58 58 58 58 58 58 58
diff --git a/dep/pipeline/table_020/pcap_files/out_2.txt b/dep/pipeline/table_020/pcap_files/out_2.txt
new file mode 100644
index 00000000..b8a7244c
--- /dev/null
+++ b/dep/pipeline/table_020/pcap_files/out_2.txt
@@ -0,0 +1,13 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 12 23 34 56 00 00 aa bb cc de 01 02 86 dd 60 00
+000010 00 00 00 12 11 40 20 00 00 00 00 00 00 00 00 00
+000020 00 00 00 00 00 01 20 00 00 00 00 00 00 00 00 00
+000030 00 00 00 00 00 02 01 f4 00 c8 00 12 03 52 58 58
+000040 58 58 58 58 58 58 58 58
diff --git a/dep/pipeline/table_020/readme.md b/dep/pipeline/table_020/readme.md
new file mode 100644
index 00000000..b41b3197
--- /dev/null
+++ b/dep/pipeline/table_020/readme.md
@@ -0,0 +1,15 @@
+Test Case: test_table_020
+-----------------------
+
+ Scenario being tested:
+ Exact match table with key structure type as a header, match criteria as an
+ exact match, key element alignment as non-contiguous and key size > 64 bytes.
+
+ Description:
+ The test case receives Ethernet -> IPv6 -> UDP -> VXLAN -> Ethernet -> IPv6 -> UDP
+ packet sequence as an input. If the packet matches the configured action rule, the
+ associated respective action must take place. If the packet does not match the specified
+ criteria, the default action should take place.
+
+ Verification:
+ The packet verification for the testcase should happen according to the description.
\ No newline at end of file
diff --git a/dep/pipeline/table_020/table_020.cli b/dep/pipeline/table_020/table_020.cli
new file mode 100644
index 00000000..9632085b
--- /dev/null
+++ b/dep/pipeline/table_020/table_020.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+pipeline codegen /tmp/pipeline/table_020/table_020.spec /tmp/pipeline/table_020/table_020.c
+pipeline libbuild /tmp/pipeline/table_020/table_020.c /tmp/pipeline/table_020/table_020.so
+
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/table_020/table_020.so io /tmp/pipeline/table_020/ethdev.io numa 0
+
+pipeline PIPELINE0 table table_020 add /tmp/pipeline/table_020/cmd_files/cmd_1.txt
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/table_020/table_020.spec b/dep/pipeline/table_020/table_020.spec
new file mode 100644
index 00000000..f5ed6e7e
--- /dev/null
+++ b/dep/pipeline/table_020/table_020.spec
@@ -0,0 +1,153 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+// IPv6 Header
+struct ipv6_h {
+ bit<32> ver_tc_label
+ bit<16> payload_length
+ bit<8> next_header
+ bit<8> hop_limit
+ bit<128> src_addr
+ bit<128> dst_addr
+}
+
+// UDP Header
+struct udp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<16> length
+ bit<16> checksum
+}
+
+// VXLAN Header
+struct vxlan_h {
+ bit<8> flags
+ bit<24> reserved
+ bit<24> vni
+ bit<8> reserved2
+}
+
+// Key structure
+struct vlan_key_h {
+ bit<128> outer_ipv6_src_addr
+ bit<128> outer_ipv6_dst_addr
+ bit<16> outer_udp_src_port
+ bit<16> outer_udp_dst_port
+ bit<24> vni
+ bit<8> next_header
+ bit<128> inner_ipv6_src_addr
+ bit<128> inner_ipv6_dst_addr
+ bit<16> inner_udp_src_port
+ bit<16> inner_udp_dst_port
+}
+
+// Header instances
+header outer_ethernet instanceof ethernet_h
+header outer_ipv6 instanceof ipv6_h
+header outer_udp instanceof udp_h
+header vxlan instanceof vxlan_h
+header inner_ethernet instanceof ethernet_h
+header inner_ipv6 instanceof ipv6_h
+header inner_udp instanceof udp_h
+header vlan_key_header instanceof vlan_key_h
+
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+struct table_020_action_01_args_t {
+ bit<24> t_vni
+}
+
+// Action 01: Update field in the header data
+action table_020_action_01 args instanceof table_020_action_01_args_t {
+ mov h.vxlan.vni t.t_vni
+ return
+}
+
+// Action 02: Decapsulation
+action table_020_action_02 args none {
+ invalidate h.outer_ethernet
+ invalidate h.outer_ipv6
+ invalidate h.outer_udp
+ invalidate h.vxlan
+ return
+}
+
+table table_020 {
+
+ key {
+ h.vlan_key_header.outer_ipv6_src_addr exact
+ h.vlan_key_header.outer_ipv6_dst_addr exact
+ h.vlan_key_header.vni exact
+ h.vlan_key_header.next_header exact
+ h.vlan_key_header.inner_ipv6_src_addr exact
+ h.vlan_key_header.inner_ipv6_dst_addr exact
+ h.vlan_key_header.inner_udp_src_port exact
+ h.vlan_key_header.inner_udp_dst_port exact
+ }
+
+ actions {
+ table_020_action_01
+ table_020_action_02
+ }
+
+ default_action table_020_action_02 args none const
+ size 1048576
+}
+
+apply {
+ // Receive packet
+ rx m.port
+ extract h.outer_ethernet
+ // Verify if packets are arrived in correct
+ // order. If not, go to END.
+ // Ethernet -> IPv6 -> UDP -> VXLAN ->
+ // Ethernet -> IPv6 -> UDP
+ jmpneq END h.outer_ethernet.ether_type 0x86dd
+ extract h.outer_ipv6
+ jmpneq END h.outer_ipv6.next_header 0x11
+ extract h.outer_udp
+ jmpneq END h.outer_udp.dst_port 4789
+ extract h.vxlan
+ extract h.inner_ethernet
+ jmpneq END h.inner_ethernet.ether_type 0x86dd
+ extract h.inner_ipv6
+ jmpneq END h.inner_ipv6.next_header 0x11
+ extract h.inner_udp
+
+ // Copy the required key data fields from header
+ // into the metadata key fields.
+ mov h.vlan_key_header.outer_ipv6_src_addr h.outer_ipv6.src_addr
+ mov h.vlan_key_header.outer_ipv6_dst_addr h.outer_ipv6.dst_addr
+ mov h.vlan_key_header.vni h.vxlan.vni
+ mov h.vlan_key_header.next_header h.inner_ipv6.next_header
+ mov h.vlan_key_header.inner_ipv6_src_addr h.inner_ipv6.src_addr
+ mov h.vlan_key_header.inner_ipv6_dst_addr h.inner_ipv6.dst_addr
+ mov h.vlan_key_header.inner_udp_src_port h.inner_udp.src_port
+ mov h.vlan_key_header.inner_udp_dst_port h.inner_udp.dst_port
+
+ // Table operations
+ table table_020
+
+ // Transmit packets
+ END : emit h.outer_ethernet
+ emit h.outer_ipv6
+ emit h.outer_udp
+ emit h.vxlan
+ emit h.inner_ethernet
+ emit h.inner_ipv6
+ emit h.inner_udp
+ tx m.port
+}
diff --git a/dep/pipeline/table_021/cmd_files/cmd_1.txt b/dep/pipeline/table_021/cmd_files/cmd_1.txt
new file mode 100644
index 00000000..24319efb
--- /dev/null
+++ b/dep/pipeline/table_021/cmd_files/cmd_1.txt
@@ -0,0 +1 @@
+match 0x40000000000000000000000000000001 0x50000000000000000000000000000001 0x000064 0x11 0x20000000000000000000000000000100 0x20000000000000000000000000000101 0x5555 0x00C8 action table_021_action_01 t_vni 200
diff --git a/dep/pipeline/table_021/ethdev.io b/dep/pipeline/table_021/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/table_021/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/table_021/pcap_files/in_1.txt b/dep/pipeline/table_021/pcap_files/in_1.txt
new file mode 100644
index 00000000..2afb50c7
--- /dev/null
+++ b/dep/pipeline/table_021/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc de 00 00 cc ee cc de 11 22 86 dd 60 00
+000010 00 00 00 58 11 40 40 00 00 00 00 00 00 00 00 00
+000020 00 00 00 00 00 01 50 00 00 00 00 00 00 00 00 00
+000030 00 00 00 00 00 01 00 64 12 b5 00 58 31 fc 0c 00
+000040 00 03 00 00 64 00 12 23 34 56 00 02 aa bb cc de
+000050 04 01 86 dd 60 00 00 00 00 12 11 40 20 00 00 00
+000060 00 00 00 00 00 00 00 00 00 00 01 00 20 00 00 00
+000070 00 00 00 00 00 00 00 00 00 00 01 01 55 55 00 c8
+000080 00 12 ad f2 58 58 58 58 58 58 58 58 58 58
\ No newline at end of file
diff --git a/dep/pipeline/table_021/pcap_files/in_2.txt b/dep/pipeline/table_021/pcap_files/in_2.txt
new file mode 100644
index 00000000..9f304f73
--- /dev/null
+++ b/dep/pipeline/table_021/pcap_files/in_2.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc de 10 00 cc ee cc de 01 02 86 dd 60 00
+000010 00 00 00 58 11 40 40 00 00 00 00 00 00 00 00 00
+000020 00 00 00 00 00 01 50 00 00 00 00 00 00 00 00 00
+000030 00 00 00 00 00 01 00 64 12 b5 00 58 34 fd 0c 00
+000040 00 03 00 00 64 00 12 23 34 56 00 00 aa bb cc de
+000050 01 02 86 dd 60 00 00 00 00 12 11 40 20 00 00 00
+000060 00 00 00 00 00 00 00 00 00 00 00 01 20 00 00 00
+000070 00 00 00 00 00 00 00 00 00 00 00 02 01 f4 00 c8
+000080 00 12 03 52 58 58 58 58 58 58 58 58 58 58
\ No newline at end of file
diff --git a/dep/pipeline/table_021/pcap_files/out_1.txt b/dep/pipeline/table_021/pcap_files/out_1.txt
new file mode 100644
index 00000000..cd29cf06
--- /dev/null
+++ b/dep/pipeline/table_021/pcap_files/out_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc de 00 00 cc ee cc de 11 22 86 dd 60 00
+000010 00 00 00 58 11 40 40 00 00 00 00 00 00 00 00 00
+000020 00 00 00 00 00 01 50 00 00 00 00 00 00 00 00 00
+000030 00 00 00 00 00 01 00 64 12 b5 00 58 31 fc 0c 00
+000040 00 03 00 00 c8 00 12 23 34 56 00 02 aa bb cc de
+000050 04 01 86 dd 60 00 00 00 00 12 11 40 20 00 00 00
+000060 00 00 00 00 00 00 00 00 00 00 01 00 20 00 00 00
+000070 00 00 00 00 00 00 00 00 00 00 01 01 55 55 00 c8
+000080 00 12 ad f2 58 58 58 58 58 58 58 58 58 58
diff --git a/dep/pipeline/table_021/pcap_files/out_2.txt b/dep/pipeline/table_021/pcap_files/out_2.txt
new file mode 100644
index 00000000..b8a7244c
--- /dev/null
+++ b/dep/pipeline/table_021/pcap_files/out_2.txt
@@ -0,0 +1,13 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 12 23 34 56 00 00 aa bb cc de 01 02 86 dd 60 00
+000010 00 00 00 12 11 40 20 00 00 00 00 00 00 00 00 00
+000020 00 00 00 00 00 01 20 00 00 00 00 00 00 00 00 00
+000030 00 00 00 00 00 02 01 f4 00 c8 00 12 03 52 58 58
+000040 58 58 58 58 58 58 58 58
diff --git a/dep/pipeline/table_021/readme.md b/dep/pipeline/table_021/readme.md
new file mode 100644
index 00000000..ecc5a7c2
--- /dev/null
+++ b/dep/pipeline/table_021/readme.md
@@ -0,0 +1,15 @@
+Test Case: test_table_021
+-----------------------
+
+ Scenario being tested:
+ Exact match table with key structure type as a metadata, match criteria as an
+ exact match, key element alignment as non-contiguous and key size > 64 bytes.
+
+ Description:
+ The test case receives Ethernet -> IPv6 -> UDP -> VXLAN -> Ethernet -> IPv6 -> UDP
+ packet sequence as an input. If the packet matches the configured action rule, the
+ associated respective action must take place. If the packet does not match the specified
+ criteria, the default action should take place.
+
+ Verification:
+ The packet verification for the testcase should happen according to the description.
\ No newline at end of file
diff --git a/dep/pipeline/table_021/table_021.cli b/dep/pipeline/table_021/table_021.cli
new file mode 100644
index 00000000..a2e4ca88
--- /dev/null
+++ b/dep/pipeline/table_021/table_021.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+pipeline codegen /tmp/pipeline/table_021/table_021.spec /tmp/pipeline/table_021/table_021.c
+pipeline libbuild /tmp/pipeline/table_021/table_021.c /tmp/pipeline/table_021/table_021.so
+
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/table_021/table_021.so io /tmp/pipeline/table_021/ethdev.io numa 0
+
+pipeline PIPELINE0 table table_021 add /tmp/pipeline/table_021/cmd_files/cmd_1.txt
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/table_021/table_021.spec b/dep/pipeline/table_021/table_021.spec
new file mode 100644
index 00000000..61305c4d
--- /dev/null
+++ b/dep/pipeline/table_021/table_021.spec
@@ -0,0 +1,153 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+// IPv6 Header
+struct ipv6_h {
+ bit<32> ver_tc_label
+ bit<16> payload_length
+ bit<8> next_header
+ bit<8> hop_limit
+ bit<128> src_addr
+ bit<128> dst_addr
+}
+
+// UDP Header
+struct udp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<16> length
+ bit<16> checksum
+}
+
+// VXLAN Header
+struct vxlan_h {
+ bit<8> flags
+ bit<24> reserved
+ bit<24> vni
+ bit<8> reserved2
+}
+
+// Header instances
+header outer_ethernet instanceof ethernet_h
+header outer_ipv6 instanceof ipv6_h
+header outer_udp instanceof udp_h
+header vxlan instanceof vxlan_h
+header inner_ethernet instanceof ethernet_h
+header inner_ipv6 instanceof ipv6_h
+header inner_udp instanceof udp_h
+
+
+//
+// Packet meta-data.
+//
+
+struct metadata_t {
+ bit<32> port
+ bit<128> outer_ipv6_src_addr
+ bit<128> outer_ipv6_dst_addr
+ bit<16> outer_udp_src_port
+ bit<16> outer_udp_dst_port
+ bit<24> vni
+ bit<8> next_header
+ bit<128> inner_ipv6_src_addr
+ bit<128> inner_ipv6_dst_addr
+ bit<16> inner_udp_src_port
+ bit<16> inner_udp_dst_port
+}
+
+metadata instanceof metadata_t
+
+struct table_021_action_01_args_t {
+ bit<24> t_vni
+}
+
+// Action 01: Update field in the header data
+action table_021_action_01 args instanceof table_021_action_01_args_t {
+ mov h.vxlan.vni t.t_vni
+ return
+}
+
+// Action 02: Decapsulation
+action table_021_action_02 args none {
+ invalidate h.outer_ethernet
+ invalidate h.outer_ipv6
+ invalidate h.outer_udp
+ invalidate h.vxlan
+ return
+}
+
+table table_021 {
+
+ key {
+ m.outer_ipv6_src_addr exact
+ m.outer_ipv6_dst_addr exact
+ m.vni exact
+ m.next_header exact
+ m.inner_ipv6_src_addr exact
+ m.inner_ipv6_dst_addr exact
+ m.inner_udp_src_port exact
+ m.inner_udp_dst_port exact
+ }
+
+ actions {
+ table_021_action_01
+ table_021_action_02
+ }
+
+ default_action table_021_action_02 args none const
+ size 1048576
+}
+
+apply {
+ // Receive packet
+ rx m.port
+ extract h.outer_ethernet
+ // Verify if packets are arrived in correct
+ // order. If not, go to END.
+ // Ethernet -> IPv6 -> UDP -> VXLAN ->
+ // Ethernet -> IPv6 -> UDP
+ jmpneq END h.outer_ethernet.ether_type 0x86dd
+ extract h.outer_ipv6
+ jmpneq END h.outer_ipv6.next_header 0x11
+ extract h.outer_udp
+ jmpneq END h.outer_udp.dst_port 4789
+ extract h.vxlan
+ extract h.inner_ethernet
+ jmpneq END h.inner_ethernet.ether_type 0x86dd
+ extract h.inner_ipv6
+ jmpneq END h.inner_ipv6.next_header 0x11
+ extract h.inner_udp
+
+ // Copy the required key data fields from header
+ // into the metadata key fields.
+ mov m.outer_ipv6_src_addr h.outer_ipv6.src_addr
+ mov m.outer_ipv6_dst_addr h.outer_ipv6.dst_addr
+ mov m.vni h.vxlan.vni
+ mov m.next_header h.inner_ipv6.next_header
+ mov m.inner_ipv6_src_addr h.inner_ipv6.src_addr
+ mov m.inner_ipv6_dst_addr h.inner_ipv6.dst_addr
+ mov m.inner_udp_src_port h.inner_udp.src_port
+ mov m.inner_udp_dst_port h.inner_udp.dst_port
+
+ // Table operations
+ table table_021
+
+ // Transmit packets
+ END : emit h.outer_ethernet
+ emit h.outer_ipv6
+ emit h.outer_udp
+ emit h.vxlan
+ emit h.inner_ethernet
+ emit h.inner_ipv6
+ emit h.inner_udp
+ tx m.port
+}
diff --git a/dep/pipeline/u100_001/ethdev.io b/dep/pipeline/u100_001/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/u100_001/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/u100_001/pcap_files/in_1.txt b/dep/pipeline/u100_001/pcap_files/in_1.txt
new file mode 100644
index 00000000..2af8443d
--- /dev/null
+++ b/dep/pipeline/u100_001/pcap_files/in_1.txt
@@ -0,0 +1,72 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0 (Table 1)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1 (Table 1)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0b 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 2 (Table 1)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0c 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 3 (Table 1)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0d 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 4 (Table 2)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 3e b5 64 00 00 0a d8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 49 93 00 00 58 58 58 58 58 58
+# Packet 5 (Table 2)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 3e b5 64 00 00 0b d8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 49 93 00 00 58 58 58 58 58 58
+# Packet 6 (Table 2)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 3e b5 64 00 00 0c d8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 49 93 00 00 58 58 58 58 58 58
+# Packet 7 (Table 2)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 3e b5 64 00 00 0d d8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 49 93 00 00 58 58 58 58 58 58
+# Packet 8 (Table 3: TCP)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 90 c7 32 00 00 01 b8 00
+000020 00 01 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 9b a5 00 00 58 58 58 58 58 58
+# Packet 9 (Table 3: TCP)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 90 c7 32 00 00 01 b8 00
+000020 00 02 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 9b a5 00 00 58 58 58 58 58 58
+# Packet 10 (Table 3: TCP)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 90 c7 32 00 00 01 b8 00
+000020 00 03 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 9b a5 00 00 58 58 58 58 58 58
+# Packet 11 (Table 3: TCP)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 90 c7 32 00 00 01 b8 00
+000020 00 04 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 9b a5 00 00 58 58 58 58 58 58
+# Packet 12 (Not matching any table)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 90 c7 3a 22 00 01 b9 22
+000020 00 04 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 9b a5 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/u100_001/pcap_files/in_2.txt b/dep/pipeline/u100_001/pcap_files/in_2.txt
new file mode 100644
index 00000000..68346822
--- /dev/null
+++ b/dep/pipeline/u100_001/pcap_files/in_2.txt
@@ -0,0 +1,23 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0 (Table 3: UDP)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 22 00 01 00 00 40 11 90 c8 32 00 00 01 b8 00
+000020 00 01 00 64 00 c8 00 0e 0b 9b 58 58 58 58 58 58
+# Packet 1 (Table 3: UDP)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 22 00 01 00 00 40 11 90 c8 32 00 00 01 b8 00
+000020 00 02 00 64 00 c8 00 0e 0b 9b 58 58 58 58 58 58
+# Packet 1 (Table 3: UDP)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 22 00 01 00 00 40 11 90 c8 32 00 00 01 b8 00
+000020 00 03 00 64 00 c8 00 0e 0b 9b 58 58 58 58 58 58
+# Packet 1 (Table 3: UDP)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 22 00 01 00 00 40 11 90 c8 32 00 00 01 b8 00
+000020 00 04 00 64 00 c8 00 0e 0b 9b 58 58 58 58 58 58
diff --git a/dep/pipeline/u100_001/pcap_files/in_3.txt b/dep/pipeline/u100_001/pcap_files/in_3.txt
new file mode 100644
index 00000000..bd2c016a
--- /dev/null
+++ b/dep/pipeline/u100_001/pcap_files/in_3.txt
@@ -0,0 +1,23 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0 (Table 3: ICMP)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 22 00 01 00 00 40 01 90 d8 32 00 00 01 b8 00
+000020 00 01 00 00 f6 f6 00 00 00 00 58 58 58 58 58 58
+# Packet 1 (Table 3: ICMP)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 22 00 01 00 00 40 01 90 d7 32 00 00 01 b8 00
+000020 00 02 03 00 f3 f6 00 00 00 00 58 58 58 58 58 58
+# Packet 2 (Table 3: ICMP)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 22 00 01 00 00 40 01 90 d6 32 00 00 01 b8 00
+000020 00 03 03 01 f3 f5 00 00 00 00 58 58 58 58 58 58
+# Packet 3 (Table 3: ICMP)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 22 00 01 00 00 40 01 90 d5 32 00 00 01 b8 00
+000020 00 04 03 02 f3 f4 00 00 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/u100_001/pcap_files/in_4.txt b/dep/pipeline/u100_001/pcap_files/in_4.txt
new file mode 100644
index 00000000..308cbbb2
--- /dev/null
+++ b/dep/pipeline/u100_001/pcap_files/in_4.txt
@@ -0,0 +1,27 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0 (Table 3: IGMP)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 24 00 01 00 00 01 02 cf d5 32 00 00 01 b8 00
+000020 00 01 11 10 8d 8e 00 00 00 00 58 58 58 58 58 58
+000030 58 58
+# Packet 1 (Table 3: IGMP)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 24 00 01 00 00 01 02 cf d4 32 00 00 01 b8 00
+000020 00 02 11 20 8d 7e 00 00 00 00 58 58 58 58 58 58
+000030 58 58
+# Packet 2 (Table 3: IGMP)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 24 00 01 00 00 01 02 cf d3 32 00 00 01 b8 00
+000020 00 03 11 30 8d 6e 00 00 00 00 58 58 58 58 58 58
+000030 58 58
+# Packet 3 (Table 3: IGMP)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 24 00 01 00 00 01 02 cf d2 32 00 00 01 b8 00
+000020 00 04 11 40 8d 5e 00 00 00 00 58 58 58 58 58 58
+000030 58 58
diff --git a/dep/pipeline/u100_001/pcap_files/out_11.txt b/dep/pipeline/u100_001/pcap_files/out_11.txt
new file mode 100644
index 00000000..22220cd2
--- /dev/null
+++ b/dep/pipeline/u100_001/pcap_files/out_11.txt
@@ -0,0 +1,22 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 3e b5 64 00 00 0a d8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 49 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 90 c7 32 00 00 01 b8 00
+000020 00 01 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 9b a5 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/u100_001/pcap_files/out_12.txt b/dep/pipeline/u100_001/pcap_files/out_12.txt
new file mode 100644
index 00000000..e71eca23
--- /dev/null
+++ b/dep/pipeline/u100_001/pcap_files/out_12.txt
@@ -0,0 +1,22 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 a1 a2 a3 a4 00 00 b1 b2 b3 b4 00 00 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 4e b6 64 00 00 0a c8 00
+000020 00 0b 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 a1 a2 a3 a4 00 00 b1 b2 b3 b4 00 00 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 3e b6 64 00 00 0b d8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 49 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 a1 a2 a3 a4 00 00 b1 b2 b3 b4 00 00 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 90 c8 32 00 00 01 b8 00
+000020 00 02 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 9b a5 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/u100_001/pcap_files/out_13.txt b/dep/pipeline/u100_001/pcap_files/out_13.txt
new file mode 100644
index 00000000..72208d1f
--- /dev/null
+++ b/dep/pipeline/u100_001/pcap_files/out_13.txt
@@ -0,0 +1,22 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0c 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 3e b5 64 00 00 0c d8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 49 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 90 c7 32 00 00 01 b8 00
+000020 00 03 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 9b a5 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/u100_001/pcap_files/out_14.txt b/dep/pipeline/u100_001/pcap_files/out_14.txt
new file mode 100644
index 00000000..f9760205
--- /dev/null
+++ b/dep/pipeline/u100_001/pcap_files/out_14.txt
@@ -0,0 +1,22 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 c1 c2 c3 c4 00 00 d1 d2 d3 d4 00 00 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 4e b6 64 00 00 0a c8 00
+000020 00 0d 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 c1 c2 c3 c4 00 00 d1 d2 d3 d4 00 00 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 3e b6 64 00 00 0d d8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 49 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 c1 c2 c3 c4 00 00 d1 d2 d3 d4 00 00 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 90 c8 32 00 00 01 b8 00
+000020 00 04 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 9b a5 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/u100_001/pcap_files/out_21.txt b/dep/pipeline/u100_001/pcap_files/out_21.txt
new file mode 100644
index 00000000..5e474f81
--- /dev/null
+++ b/dep/pipeline/u100_001/pcap_files/out_21.txt
@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 22 00 01 00 00 40 11 90 c8 32 00 00 01 b8 00
+000020 00 01 00 64 00 c8 00 0e 0b 9b 58 58 58 58 58 58
diff --git a/dep/pipeline/u100_001/pcap_files/out_22.txt b/dep/pipeline/u100_001/pcap_files/out_22.txt
new file mode 100644
index 00000000..40f4676d
--- /dev/null
+++ b/dep/pipeline/u100_001/pcap_files/out_22.txt
@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 a1 a2 a3 a4 00 00 b1 b2 b3 b4 00 00 08 00 45 00
+000010 00 22 00 01 00 00 3f 11 90 c9 32 00 00 01 b8 00
+000020 00 02 00 64 00 c8 00 0e 0b 9b 58 58 58 58 58 58
diff --git a/dep/pipeline/u100_001/pcap_files/out_23.txt b/dep/pipeline/u100_001/pcap_files/out_23.txt
new file mode 100644
index 00000000..b2dfb057
--- /dev/null
+++ b/dep/pipeline/u100_001/pcap_files/out_23.txt
@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 22 00 01 00 00 40 11 90 c8 32 00 00 01 b8 00
+000020 00 03 00 64 00 c8 00 0e 0b 9b 58 58 58 58 58 58
diff --git a/dep/pipeline/u100_001/pcap_files/out_24.txt b/dep/pipeline/u100_001/pcap_files/out_24.txt
new file mode 100644
index 00000000..67525e7f
--- /dev/null
+++ b/dep/pipeline/u100_001/pcap_files/out_24.txt
@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 c1 c2 c3 c4 00 00 d1 d2 d3 d4 00 00 08 00 45 00
+000010 00 22 00 01 00 00 3f 11 90 c9 32 00 00 01 b8 00
+000020 00 04 00 64 00 c8 00 0e 0b 9b 58 58 58 58 58 58
diff --git a/dep/pipeline/u100_001/pcap_files/out_31.txt b/dep/pipeline/u100_001/pcap_files/out_31.txt
new file mode 100644
index 00000000..2d1ac78d
--- /dev/null
+++ b/dep/pipeline/u100_001/pcap_files/out_31.txt
@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 22 00 01 00 00 40 01 90 d8 32 00 00 01 b8 00
+000020 00 01 00 00 f6 f6 00 00 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/u100_001/pcap_files/out_32.txt b/dep/pipeline/u100_001/pcap_files/out_32.txt
new file mode 100644
index 00000000..e34101a9
--- /dev/null
+++ b/dep/pipeline/u100_001/pcap_files/out_32.txt
@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 a1 a2 a3 a4 00 00 b1 b2 b3 b4 00 00 08 00 45 00
+000010 00 22 00 01 00 00 3f 01 90 d8 32 00 00 01 b8 00
+000020 00 02 03 00 f3 f6 00 00 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/u100_001/pcap_files/out_33.txt b/dep/pipeline/u100_001/pcap_files/out_33.txt
new file mode 100644
index 00000000..f34fb303
--- /dev/null
+++ b/dep/pipeline/u100_001/pcap_files/out_33.txt
@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 22 00 01 00 00 40 01 90 d6 32 00 00 01 b8 00
+000020 00 03 03 01 f3 f5 00 00 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/u100_001/pcap_files/out_34.txt b/dep/pipeline/u100_001/pcap_files/out_34.txt
new file mode 100644
index 00000000..4ede34f1
--- /dev/null
+++ b/dep/pipeline/u100_001/pcap_files/out_34.txt
@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 c1 c2 c3 c4 00 00 d1 d2 d3 d4 00 00 08 00 45 00
+000010 00 22 00 01 00 00 3f 01 90 d6 32 00 00 01 b8 00
+000020 00 04 03 02 f3 f4 00 00 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/u100_001/pcap_files/out_41.txt b/dep/pipeline/u100_001/pcap_files/out_41.txt
new file mode 100644
index 00000000..f27e47cd
--- /dev/null
+++ b/dep/pipeline/u100_001/pcap_files/out_41.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 24 00 01 00 00 01 02 cf d5 32 00 00 01 b8 00
+000020 00 01 11 10 8d 8e 00 00 00 00 58 58 58 58 58 58
+000030 58 58
diff --git a/dep/pipeline/u100_001/pcap_files/out_42.txt b/dep/pipeline/u100_001/pcap_files/out_42.txt
new file mode 100644
index 00000000..ed52060d
--- /dev/null
+++ b/dep/pipeline/u100_001/pcap_files/out_42.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 a1 a2 a3 a4 00 00 b1 b2 b3 b4 00 00 08 00 45 00
+000010 00 24 00 01 00 00 00 02 cf d5 32 00 00 01 b8 00
+000020 00 02 11 20 8d 7e 00 00 00 00 58 58 58 58 58 58
+000030 58 58
diff --git a/dep/pipeline/u100_001/pcap_files/out_43.txt b/dep/pipeline/u100_001/pcap_files/out_43.txt
new file mode 100644
index 00000000..6cb9b1bb
--- /dev/null
+++ b/dep/pipeline/u100_001/pcap_files/out_43.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 24 00 01 00 00 01 02 cf d3 32 00 00 01 b8 00
+000020 00 03 11 30 8d 6e 00 00 00 00 58 58 58 58 58 58
+000030 58 58
diff --git a/dep/pipeline/u100_001/pcap_files/out_44.txt b/dep/pipeline/u100_001/pcap_files/out_44.txt
new file mode 100644
index 00000000..28e68443
--- /dev/null
+++ b/dep/pipeline/u100_001/pcap_files/out_44.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 c1 c2 c3 c4 00 00 d1 d2 d3 d4 00 00 08 00 45 00
+000010 00 24 00 01 00 00 00 02 cf d3 32 00 00 01 b8 00
+000020 00 04 11 40 8d 5e 00 00 00 00 58 58 58 58 58 58
+000030 58 58
diff --git a/dep/pipeline/u100_001/readme.md b/dep/pipeline/u100_001/readme.md
new file mode 100644
index 00000000..fecc113f
--- /dev/null
+++ b/dep/pipeline/u100_001/readme.md
@@ -0,0 +1,14 @@
+Test Case: test_u100_001
+-----------------------
+
+ Scenario being tested:
+ In this usecase, we are testing the action profile feature for various type of packets.
+
+ Description:
+ The test case receives various type of packets like IPv4, TCP, UDP, ICMP, IGMP.
+ Action profile is conconfigured to send the packet a particular port, perform l3
+ switching, and to drop the packets. Different type of packets have different match
+ fields. Also packet validation is also performed.
+
+ Verification:
+ The packet verification for the testcase should happen as per action profile configuration.
diff --git a/dep/pipeline/u100_001/table_1.txt b/dep/pipeline/u100_001/table_1.txt
new file mode 100644
index 00000000..9248f351
--- /dev/null
+++ b/dep/pipeline/u100_001/table_1.txt
@@ -0,0 +1,6 @@
+
+// match <ipv4_dst_add>
+match 0xc800000a action set_nexthop nexthop 1
+match 0xc800000b action set_nexthop nexthop 2
+match 0xc800000c action set_nexthop nexthop 3
+match 0xc800000d action set_nexthop nexthop 4
diff --git a/dep/pipeline/u100_001/table_2.txt b/dep/pipeline/u100_001/table_2.txt
new file mode 100644
index 00000000..86a3acc7
--- /dev/null
+++ b/dep/pipeline/u100_001/table_2.txt
@@ -0,0 +1,6 @@
+
+// match <ipv4_src_add> <ipv4_dst_add>
+match 0x6400000a 0xd800000a action set_nexthop nexthop 1
+match 0x6400000b 0xd800000a action set_nexthop nexthop 2
+match 0x6400000c 0xd800000a action set_nexthop nexthop 3
+match 0x6400000d 0xd800000a action set_nexthop nexthop 4
diff --git a/dep/pipeline/u100_001/table_3.txt b/dep/pipeline/u100_001/table_3.txt
new file mode 100644
index 00000000..4c760e4c
--- /dev/null
+++ b/dep/pipeline/u100_001/table_3.txt
@@ -0,0 +1,28 @@
+
+// ICMP Protocol
+// match <ipv4_src_add> <ipv4_dst_add> <ipv4_protocol_type> <icmp_type_code> <icmp_checksum>
+match 0x32000001 0xb8000001 0x1 0x0000 0xf6f6 action set_nexthop nexthop 1
+match 0x32000001 0xb8000002 0x1 0x0300 0xf3f6 action set_nexthop nexthop 2
+match 0x32000001 0xb8000003 0x1 0x0301 0xf3f5 action set_nexthop nexthop 3
+match 0x32000001 0xb8000004 0x1 0x0302 0xf3f4 action set_nexthop nexthop 4
+
+// IGMP Protocol
+// match <ipv4_src_add> <ipv4_dst_add> <ipv4_protocol_type> <igmp_type_max_response_time> <igmp_checksum>
+match 0x32000001 0xb8000001 0x2 0x1110 0x8d8e action set_nexthop nexthop 1
+match 0x32000001 0xb8000002 0x2 0x1120 0x8d7e action set_nexthop nexthop 2
+match 0x32000001 0xb8000003 0x2 0x1130 0x8d6e action set_nexthop nexthop 3
+match 0x32000001 0xb8000004 0x2 0x1140 0x8d5e action set_nexthop nexthop 4
+
+// TCP Protocol
+// match <ipv4_src_add> <ipv4_dst_add> <ipv4_protocol_type> <tcp_src_port> <tcp_dst_port>
+match 0x32000001 0xb8000001 0x6 0x0064 0x00c8 action set_nexthop nexthop 1
+match 0x32000001 0xb8000002 0x6 0x0064 0x00c8 action set_nexthop nexthop 2
+match 0x32000001 0xb8000003 0x6 0x0064 0x00c8 action set_nexthop nexthop 3
+match 0x32000001 0xb8000004 0x6 0x0064 0x00c8 action set_nexthop nexthop 4
+
+// UDP Protocol
+// match <ipv4_src_add> <ipv4_dst_add> <ipv4_protocol_type> <udp_src_port> <udp_dst_port>
+match 0x32000001 0xb8000001 0x11 0x0064 0x00c8 action set_nexthop nexthop 1
+match 0x32000001 0xb8000002 0x11 0x0064 0x00c8 action set_nexthop nexthop 2
+match 0x32000001 0xb8000003 0x11 0x0064 0x00c8 action set_nexthop nexthop 3
+match 0x32000001 0xb8000004 0x11 0x0064 0x00c8 action set_nexthop nexthop 4
diff --git a/dep/pipeline/u100_001/table_4.txt b/dep/pipeline/u100_001/table_4.txt
new file mode 100644
index 00000000..73337c22
--- /dev/null
+++ b/dep/pipeline/u100_001/table_4.txt
@@ -0,0 +1,7 @@
+
+// match <Ingress_nexthop_id>
+match 0x0000 action drop
+match 0x0001 action send port 0
+match 0x0002 action l3_switch port 1 new_mac_da 0xa1a2a3a40000 new_mac_sa 0xb1b2b3b40000
+match 0x0003 action send port 2
+match 0x0004 action l3_switch port 3 new_mac_da 0xc1c2c3c40000 new_mac_sa 0xd1d2d3d40000
diff --git a/dep/pipeline/u100_001/u100_001.cli b/dep/pipeline/u100_001/u100_001.cli
new file mode 100644
index 00000000..24d8858b
--- /dev/null
+++ b/dep/pipeline/u100_001/u100_001.cli
@@ -0,0 +1,30 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/u100_001/u100_001.spec /tmp/pipeline/u100_001/u100_001.c
+pipeline libbuild /tmp/pipeline/u100_001/u100_001.c /tmp/pipeline/u100_001/u100_001.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/u100_001/u100_001.so io /tmp/pipeline/u100_001/ethdev.io numa 0
+
+pipeline PIPELINE0 table ipv4_host_1 add /tmp/pipeline/u100_001/table_1.txt
+
+pipeline PIPELINE0 table ipv4_host_2 add /tmp/pipeline/u100_001/table_2.txt
+
+pipeline PIPELINE0 table ipv4_host_3 add /tmp/pipeline/u100_001/table_3.txt
+
+pipeline PIPELINE0 table nexthop add /tmp/pipeline/u100_001/table_4.txt
+
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/u100_001/u100_001.spec b/dep/pipeline/u100_001/u100_001.spec
new file mode 100644
index 00000000..07cefe3d
--- /dev/null
+++ b/dep/pipeline/u100_001/u100_001.spec
@@ -0,0 +1,246 @@
+
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+struct ipv4_h {
+ bit<8> version_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_frag_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+struct icmp_h {
+ bit<16> type_code
+ bit<16> checksum
+}
+
+struct igmp_h {
+ bit<16> type_code
+ bit<16> checksum
+}
+
+struct tcp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<32> seq_no
+ bit<32> ack_no
+ bit<8> data_offset_res
+ bit<8> flags
+ bit<16> window
+ bit<16> checksum
+ bit<16> urgent_ptr
+}
+
+struct udp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<16> len
+ bit<16> checksum
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+header icmp instanceof icmp_h
+header igmp instanceof igmp_h
+header tcp instanceof tcp_h
+header udp instanceof udp_h
+
+struct my_ingress_metadata_t {
+ bit<32> psa_ingress_parser_input_metadata_ingress_port
+ bit<32> psa_ingress_parser_input_metadata_packet_path
+ bit<32> psa_egress_parser_input_metadata_egress_port
+ bit<32> psa_egress_parser_input_metadata_packet_path
+ bit<32> psa_ingress_input_metadata_ingress_port
+ bit<32> psa_ingress_input_metadata_packet_path
+ bit<64> psa_ingress_input_metadata_ingress_timestamp
+ bit<8> psa_ingress_input_metadata_parser_error
+ bit<8> psa_ingress_output_metadata_class_of_service
+ bit<8> psa_ingress_output_metadata_clone
+ bit<16> psa_ingress_output_metadata_clone_session_id
+ bit<8> psa_ingress_output_metadata_drop
+ bit<8> psa_ingress_output_metadata_resubmit
+ bit<32> psa_ingress_output_metadata_multicast_group
+ bit<32> psa_ingress_output_metadata_egress_port
+ bit<8> psa_egress_input_metadata_class_of_service
+ bit<32> psa_egress_input_metadata_egress_port
+ bit<32> psa_egress_input_metadata_packet_path
+ bit<16> psa_egress_input_metadata_instance
+ bit<64> psa_egress_input_metadata_egress_timestamp
+ bit<8> psa_egress_input_metadata_parser_error
+ bit<32> psa_egress_deparser_input_metadata_egress_port
+ bit<8> psa_egress_output_metadata_clone
+ bit<16> psa_egress_output_metadata_clone_session_id
+ bit<8> psa_egress_output_metadata_drop
+ bit<32> local_metadata__l4_lookup_ipv4_src_addr0
+ bit<32> local_metadata__l4_lookup_ipv4_dst_addr1
+ bit<8> local_metadata__l4_lookup_ipv4_protocol2
+ bit<16> local_metadata__l4_lookup_word_13
+ bit<16> local_metadata__l4_lookup_word_24
+ bit<8> local_metadata__first_frag5
+ bit<8> local_metadata__ipv4_checksum_err6
+ bit<16> Ingress_nexthop_id_0
+ bit<8> Ingress_ttl_dec_0
+ bit<16> Ingress_csum_inc_0
+}
+metadata instanceof my_ingress_metadata_t
+
+struct l3_switch_arg_t {
+ bit<32> port
+ bit<48> new_mac_da
+ bit<48> new_mac_sa
+}
+
+struct send_arg_t {
+ bit<32> port
+}
+
+struct set_nexthop_arg_t {
+ bit<16> nexthop
+}
+
+action NoAction args none {
+ return
+}
+
+action send args instanceof send_arg_t {
+ mov m.psa_ingress_output_metadata_egress_port t.port
+ mov m.Ingress_ttl_dec_0 0x0
+ mov m.Ingress_csum_inc_0 0x0
+ return
+}
+
+action drop args none {
+ mov m.psa_ingress_output_metadata_drop 1
+ return
+}
+
+action l3_switch args instanceof l3_switch_arg_t {
+ mov h.ethernet.dst_addr t.new_mac_da
+ mov h.ethernet.src_addr t.new_mac_sa
+ mov m.Ingress_ttl_dec_0 0x1
+ mov m.Ingress_csum_inc_0 0x1
+ mov m.psa_ingress_output_metadata_egress_port t.port
+ return
+}
+
+action set_nexthop args instanceof set_nexthop_arg_t {
+ mov m.Ingress_nexthop_id_0 t.nexthop
+ return
+}
+
+table ipv4_host_1 {
+ key {
+ h.ipv4.dst_addr exact
+ }
+ actions {
+ set_nexthop
+ NoAction
+ }
+ default_action NoAction args none
+ size 0x400
+}
+
+table ipv4_host_2 {
+ key {
+ h.ipv4.src_addr exact
+ h.ipv4.dst_addr exact
+ }
+ actions {
+ set_nexthop
+ NoAction
+ }
+ default_action NoAction args none
+ size 0x10000
+}
+
+table ipv4_host_3 {
+ key {
+ m.local_metadata__l4_lookup_ipv4_src_addr0 exact
+ m.local_metadata__l4_lookup_ipv4_dst_addr1 exact
+ m.local_metadata__l4_lookup_ipv4_protocol2 exact
+ m.local_metadata__l4_lookup_word_13 exact
+ m.local_metadata__l4_lookup_word_24 exact
+ }
+ actions {
+ set_nexthop
+ NoAction
+ }
+ default_action NoAction args none
+ size 0x10000
+}
+
+table nexthop {
+ key {
+ m.Ingress_nexthop_id_0 exact
+ }
+ actions {
+ send
+ drop
+ l3_switch
+ NoAction
+ }
+ default_action NoAction args none
+ size 0x4000
+}
+
+apply {
+ rx m.psa_ingress_input_metadata_ingress_port
+ mov m.psa_ingress_output_metadata_drop 0x0
+ extract h.ethernet
+ jmpeq MYIP_PARSE_IPV4 h.ethernet.ether_type 0x800
+ jmp MYIP_ACCEPT
+ MYIP_PARSE_IPV4 : extract h.ipv4
+ mov m.local_metadata__l4_lookup_ipv4_dst_addr1 h.ipv4.dst_addr
+ mov m.local_metadata__l4_lookup_ipv4_src_addr0 h.ipv4.src_addr
+ mov m.local_metadata__l4_lookup_ipv4_protocol2 h.ipv4.protocol
+ jmpeq MYIP_PARSE_ICMP h.ipv4.protocol 0x1
+ jmpeq MYIP_PARSE_IGMP h.ipv4.protocol 0x2
+ jmpeq MYIP_PARSE_TCP h.ipv4.protocol 0x6
+ jmpeq MYIP_PARSE_UDP h.ipv4.protocol 0x11
+ jmp MYIP_ACCEPT
+ MYIP_PARSE_UDP : extract h.udp
+ mov m.local_metadata__l4_lookup_word_13 h.udp.src_port
+ mov m.local_metadata__l4_lookup_word_24 h.udp.dst_port
+ jmp MYIP_ACCEPT
+ MYIP_PARSE_TCP : extract h.tcp
+ mov m.local_metadata__l4_lookup_word_13 h.tcp.src_port
+ mov m.local_metadata__l4_lookup_word_24 h.tcp.dst_port
+ jmp MYIP_ACCEPT
+ MYIP_PARSE_ICMP : extract h.icmp
+ mov m.local_metadata__l4_lookup_word_13 h.icmp.type_code
+ mov m.local_metadata__l4_lookup_word_24 h.icmp.checksum
+ jmp MYIP_ACCEPT
+ MYIP_PARSE_IGMP : extract h.igmp
+ mov m.local_metadata__first_frag5 0x1
+ mov m.local_metadata__l4_lookup_word_13 h.igmp.type_code
+ mov m.local_metadata__l4_lookup_word_24 h.igmp.checksum
+ MYIP_ACCEPT : mov m.Ingress_nexthop_id_0 0x0
+ mov m.Ingress_ttl_dec_0 0x0
+ mov m.Ingress_csum_inc_0 0x0
+ table ipv4_host_1
+ jmph LABEL_0END
+ table ipv4_host_2
+ jmph LABEL_0END
+ table ipv4_host_3
+ LABEL_0END : table nexthop
+ sub h.ipv4.ttl m.Ingress_ttl_dec_0
+ add h.ipv4.hdr_checksum m.Ingress_csum_inc_0
+ jmpneq LABEL_DROP m.psa_ingress_output_metadata_drop 0x0
+ emit h.ethernet
+ emit h.ipv4
+ emit h.icmp
+ emit h.igmp
+ emit h.tcp
+ emit h.udp
+ tx m.psa_ingress_output_metadata_egress_port
+ LABEL_DROP : drop
+}
diff --git a/dep/pipeline/u100_002/ethdev.io b/dep/pipeline/u100_002/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/u100_002/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/u100_002/pcap_files/in_1.txt b/dep/pipeline/u100_002/pcap_files/in_1.txt
new file mode 100644
index 00000000..c535a517
--- /dev/null
+++ b/dep/pipeline/u100_002/pcap_files/in_1.txt
@@ -0,0 +1,75 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0 (Table 1)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1 (Table 1)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 81 00 00 10
+000010 08 00 45 00 00 2e 00 01 00 00 40 06 4e b5 64 00
+000020 00 0a c8 00 00 0b 00 64 00 c8 00 00 00 00 00 00
+000030 00 00 50 02 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 2 (Table 1)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 81 00 00 10
+000010 81 00 00 11 08 00 45 00 00 2e 00 01 00 00 40 06
+000020 4e b5 64 00 00 0a c8 00 00 0c 00 64 00 c8 00 00
+000030 00 00 00 00 00 00 50 02 20 00 59 93 00 00 58 58
+000040 58 58 58 58
+# Packet 3 (Table 1)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0d 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 4 (Table 2)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 3e b5 64 00 00 0a d8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 49 93 00 00 58 58 58 58 58 58
+# Packet 5 (Table 2)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 81 00 00 10
+000010 08 00 45 00 00 2e 00 01 00 00 40 06 3e b5 64 00
+000020 00 0b d8 00 00 0a 00 64 00 c8 00 00 00 00 00 00
+000030 00 00 50 02 20 00 49 93 00 00 58 58 58 58 58 58
+# Packet 6 (Table 2)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 81 00 00 10
+000010 81 00 00 11 08 00 45 00 00 2e 00 01 00 00 40 06
+000020 3e b5 64 00 00 0c d8 00 00 0a 00 64 00 c8 00 00
+000030 00 00 00 00 00 00 50 02 20 00 49 93 00 00 58 58
+000040 58 58 58 58
+# Packet 7 (Table 2)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 3e b5 64 00 00 0d d8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 49 93 00 00 58 58 58 58 58 58
+# Packet 8 (Table 3: TCP)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 90 c7 32 00 00 01 b8 00
+000020 00 01 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 9b a5 00 00 58 58 58 58 58 58
+# Packet 9 (Table 3: TCP)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 81 00 00 10
+000010 08 00 45 00 00 2e 00 01 00 00 40 06 90 c7 32 00
+000020 00 01 b8 00 00 02 00 64 00 c8 00 00 00 00 00 00
+000030 00 00 50 02 20 00 9b a5 00 00 58 58 58 58 58 58
+# Packet 10 (Table 3: TCP)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 81 00 00 10
+000010 81 00 00 11 08 00 45 00 00 2e 00 01 00 00 40 06
+000020 90 c7 32 00 00 01 b8 00 00 03 00 64 00 c8 00 00
+000030 00 00 00 00 00 00 50 02 20 00 9b a5 00 00 58 58
+000040 58 58 58 58
+# Packet 11 (Table 3: TCP)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 90 c7 32 00 00 01 b8 00
+000020 00 04 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 9b a5 00 00 58 58 58 58 58 58
+# Packet 12 (Not matching any table)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 90 c7 3a 22 00 01 b9 22
+000020 00 04 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 9b a5 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/u100_002/pcap_files/in_2.txt b/dep/pipeline/u100_002/pcap_files/in_2.txt
new file mode 100644
index 00000000..ddcd5f21
--- /dev/null
+++ b/dep/pipeline/u100_002/pcap_files/in_2.txt
@@ -0,0 +1,25 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0 (Table 3: UDP)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 22 00 01 00 00 40 11 90 c8 32 00 00 01 b8 00
+000020 00 01 00 64 00 c8 00 0e 0b 9b 58 58 58 58 58 58
+# Packet 1 (Table 3: UDP)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 81 00 00 10
+000010 08 00 45 00 00 22 00 01 00 00 40 11 90 c8 32 00
+000020 00 01 b8 00 00 02 00 64 00 c8 00 0e 0b 9b 58 58
+000030 58 58 58 58
+# Packet 2 (Table 3: UDP)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 81 00 00 10
+000010 81 00 00 11 08 00 45 00 00 22 00 01 00 00 40 11
+000020 90 c8 32 00 00 01 b8 00 00 03 00 64 00 c8 00 0e
+000030 0b 9b 58 58 58 58 58 58
+# Packet 3 (Table 3: UDP)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 22 00 01 00 00 40 11 90 c8 32 00 00 01 b8 00
+000020 00 04 00 64 00 c8 00 0e 0b 9b 58 58 58 58 58 58
diff --git a/dep/pipeline/u100_002/pcap_files/in_3.txt b/dep/pipeline/u100_002/pcap_files/in_3.txt
new file mode 100644
index 00000000..8775c6a2
--- /dev/null
+++ b/dep/pipeline/u100_002/pcap_files/in_3.txt
@@ -0,0 +1,25 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0 (Table 3: ICMP)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 22 00 01 00 00 40 01 90 d8 32 00 00 01 b8 00
+000020 00 01 00 00 f6 f6 00 00 00 00 58 58 58 58 58 58
+# Packet 1 (Table 3: ICMP)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 81 00 00 10
+000010 08 00 45 00 00 22 00 01 00 00 40 01 90 d7 32 00
+000020 00 01 b8 00 00 02 03 00 f3 f6 00 00 00 00 58 58
+000030 58 58 58 58
+# Packet 2 (Table 3: ICMP)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 81 00 00 10
+000010 81 00 00 11 08 00 45 00 00 22 00 01 00 00 40 01
+000020 90 d6 32 00 00 01 b8 00 00 03 03 01 f3 f5 00 00
+000030 00 00 58 58 58 58 58 58
+# Packet 3 (Table 3: ICMP)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 22 00 01 00 00 40 01 90 d5 32 00 00 01 b8 00
+000020 00 04 03 02 f3 f4 00 00 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/u100_002/pcap_files/in_4.txt b/dep/pipeline/u100_002/pcap_files/in_4.txt
new file mode 100644
index 00000000..49f57d12
--- /dev/null
+++ b/dep/pipeline/u100_002/pcap_files/in_4.txt
@@ -0,0 +1,27 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0 (Table 3: IGMP)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 24 00 01 00 00 ff 02 cf d5 32 00 00 01 b8 00
+000020 00 01 11 10 8d 8e 00 00 00 00 58 58 58 58 58 58
+000030 58 58
+# Packet 1 (Table 3: IGMP)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 81 00 00 10
+000010 08 00 45 00 00 24 00 01 00 00 ff 02 cf d4 32 00
+000020 00 01 b8 00 00 02 11 20 8d 7e 00 00 00 00 58 58
+000030 58 58 58 58 58 58
+# Packet 2 (Table 3: IGMP)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 81 00 00 10
+000010 81 00 00 11 08 00 45 00 00 24 00 01 00 00 ff 02
+000020 cf d3 32 00 00 01 b8 00 00 03 11 30 8d 6e 00 00
+000030 00 00 58 58 58 58 58 58 58 58
+# Packet 3 (Table 3: IGMP)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 24 00 01 00 00 ff 02 cf d2 32 00 00 01 b8 00
+000020 00 04 11 40 8d 5e 00 00 00 00 58 58 58 58 58 58
+000030 58 58
diff --git a/dep/pipeline/u100_002/pcap_files/in_5.txt b/dep/pipeline/u100_002/pcap_files/in_5.txt
new file mode 100644
index 00000000..2c0cc94d
--- /dev/null
+++ b/dep/pipeline/u100_002/pcap_files/in_5.txt
@@ -0,0 +1,31 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 86 dd 60 00
+000010 00 00 00 1a 06 40 ab cd ab cd ab cd ab cd ab cd
+000020 ab cd ab cd 00 01 12 34 12 34 12 34 12 34 12 34
+000030 12 34 12 34 00 01 00 64 00 c8 00 00 00 00 00 00
+000040 00 00 50 02 20 00 53 9a 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 86 dd 60 00
+000010 00 00 00 1a 06 40 ab cd ab cd ab cd ab cd ab cd
+000020 ab cd ab cd 00 01 12 34 12 34 12 34 12 34 12 34
+000030 12 34 12 34 00 02 00 64 00 c8 00 00 00 00 00 00
+000040 00 00 50 02 20 00 53 9a 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 86 dd 60 00
+000010 00 00 00 1a 06 40 ab cd ab cd ab cd ab cd ab cd
+000020 ab cd ab cd 00 01 12 34 12 34 12 34 12 34 12 34
+000030 12 34 12 34 00 03 00 64 00 c8 00 00 00 00 00 00
+000040 00 00 50 02 20 00 53 9a 00 00 58 58 58 58 58 58
+# Packet 3
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 86 dd 60 00
+000010 00 00 00 1a 06 40 ab cd ab cd ab cd ab cd ab cd
+000020 ab cd ab cd 00 01 12 34 12 34 12 34 12 34 12 34
+000030 12 34 12 34 00 04 00 64 00 c8 00 00 00 00 00 00
+000040 00 00 50 02 20 00 53 9a 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/u100_002/pcap_files/out_11.txt b/dep/pipeline/u100_002/pcap_files/out_11.txt
new file mode 100644
index 00000000..22220cd2
--- /dev/null
+++ b/dep/pipeline/u100_002/pcap_files/out_11.txt
@@ -0,0 +1,22 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 3e b5 64 00 00 0a d8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 49 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 90 c7 32 00 00 01 b8 00
+000020 00 01 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 9b a5 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/u100_002/pcap_files/out_12.txt b/dep/pipeline/u100_002/pcap_files/out_12.txt
new file mode 100644
index 00000000..0121d4fe
--- /dev/null
+++ b/dep/pipeline/u100_002/pcap_files/out_12.txt
@@ -0,0 +1,22 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 a1 a2 a3 a4 00 00 b1 b2 b3 b4 00 00 81 00 00 10
+000010 08 00 45 00 00 2e 00 01 00 00 3f 06 4f b4 64 00
+000020 00 0a c8 00 00 0b 00 64 00 c8 00 00 00 00 00 00
+000030 00 00 50 02 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 a1 a2 a3 a4 00 00 b1 b2 b3 b4 00 00 81 00 00 10
+000010 08 00 45 00 00 2e 00 01 00 00 3f 06 3f b4 64 00
+000020 00 0b d8 00 00 0a 00 64 00 c8 00 00 00 00 00 00
+000030 00 00 50 02 20 00 49 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 a1 a2 a3 a4 00 00 b1 b2 b3 b4 00 00 81 00 00 10
+000010 08 00 45 00 00 2e 00 01 00 00 3f 06 91 c6 32 00
+000020 00 01 b8 00 00 02 00 64 00 c8 00 00 00 00 00 00
+000030 00 00 50 02 20 00 9b a5 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/u100_002/pcap_files/out_13.txt b/dep/pipeline/u100_002/pcap_files/out_13.txt
new file mode 100644
index 00000000..2bbaf0c2
--- /dev/null
+++ b/dep/pipeline/u100_002/pcap_files/out_13.txt
@@ -0,0 +1,25 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 81 00 00 10
+000010 81 00 00 11 08 00 45 00 00 2e 00 01 00 00 40 06
+000020 4e b3 64 00 00 0a c8 00 00 0c 00 64 00 c8 00 00
+000030 00 00 00 00 00 00 50 02 20 00 59 93 00 00 58 58
+000040 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 81 00 00 10
+000010 81 00 00 11 08 00 45 00 00 2e 00 01 00 00 40 06
+000020 3e b3 64 00 00 0c d8 00 00 0a 00 64 00 c8 00 00
+000030 00 00 00 00 00 00 50 02 20 00 49 93 00 00 58 58
+000040 58 58 58 58
+# Packet 2
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 81 00 00 10
+000010 81 00 00 11 08 00 45 00 00 2e 00 01 00 00 40 06
+000020 90 c5 32 00 00 01 b8 00 00 03 00 64 00 c8 00 00
+000030 00 00 00 00 00 00 50 02 20 00 9b a5 00 00 58 58
+000040 58 58 58 58
diff --git a/dep/pipeline/u100_002/pcap_files/out_14.txt b/dep/pipeline/u100_002/pcap_files/out_14.txt
new file mode 100644
index 00000000..91ba6769
--- /dev/null
+++ b/dep/pipeline/u100_002/pcap_files/out_14.txt
@@ -0,0 +1,22 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 c1 c2 c3 c4 00 00 d1 d2 d3 d4 00 00 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 4f b2 64 00 00 0a c8 00
+000020 00 0d 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 c1 c2 c3 c4 00 00 d1 d2 d3 d4 00 00 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 3f b2 64 00 00 0d d8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 49 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 c1 c2 c3 c4 00 00 d1 d2 d3 d4 00 00 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 91 c4 32 00 00 01 b8 00
+000020 00 04 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 9b a5 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/u100_002/pcap_files/out_21.txt b/dep/pipeline/u100_002/pcap_files/out_21.txt
new file mode 100644
index 00000000..5e474f81
--- /dev/null
+++ b/dep/pipeline/u100_002/pcap_files/out_21.txt
@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 22 00 01 00 00 40 11 90 c8 32 00 00 01 b8 00
+000020 00 01 00 64 00 c8 00 0e 0b 9b 58 58 58 58 58 58
diff --git a/dep/pipeline/u100_002/pcap_files/out_22.txt b/dep/pipeline/u100_002/pcap_files/out_22.txt
new file mode 100644
index 00000000..66e973cd
--- /dev/null
+++ b/dep/pipeline/u100_002/pcap_files/out_22.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 a1 a2 a3 a4 00 00 b1 b2 b3 b4 00 00 81 00 00 10
+000010 08 00 45 00 00 22 00 01 00 00 3f 11 91 c7 32 00
+000020 00 01 b8 00 00 02 00 64 00 c8 00 0e 0b 9b 58 58
+000030 58 58 58 58
diff --git a/dep/pipeline/u100_002/pcap_files/out_23.txt b/dep/pipeline/u100_002/pcap_files/out_23.txt
new file mode 100644
index 00000000..7340bf8c
--- /dev/null
+++ b/dep/pipeline/u100_002/pcap_files/out_23.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 81 00 00 10
+000010 81 00 00 11 08 00 45 00 00 22 00 01 00 00 40 11
+000020 90 c6 32 00 00 01 b8 00 00 03 00 64 00 c8 00 0e
+000030 0b 9b 58 58 58 58 58 58
diff --git a/dep/pipeline/u100_002/pcap_files/out_24.txt b/dep/pipeline/u100_002/pcap_files/out_24.txt
new file mode 100644
index 00000000..653eb24e
--- /dev/null
+++ b/dep/pipeline/u100_002/pcap_files/out_24.txt
@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 c1 c2 c3 c4 00 00 d1 d2 d3 d4 00 00 08 00 45 00
+000010 00 22 00 01 00 00 3f 11 91 c5 32 00 00 01 b8 00
+000020 00 04 00 64 00 c8 00 0e 0b 9b 58 58 58 58 58 58
diff --git a/dep/pipeline/u100_002/pcap_files/out_31.txt b/dep/pipeline/u100_002/pcap_files/out_31.txt
new file mode 100644
index 00000000..2d1ac78d
--- /dev/null
+++ b/dep/pipeline/u100_002/pcap_files/out_31.txt
@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 22 00 01 00 00 40 01 90 d8 32 00 00 01 b8 00
+000020 00 01 00 00 f6 f6 00 00 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/u100_002/pcap_files/out_32.txt b/dep/pipeline/u100_002/pcap_files/out_32.txt
new file mode 100644
index 00000000..ad020e55
--- /dev/null
+++ b/dep/pipeline/u100_002/pcap_files/out_32.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 a1 a2 a3 a4 00 00 b1 b2 b3 b4 00 00 81 00 00 10
+000010 08 00 45 00 00 22 00 01 00 00 3f 01 91 d7 32 00
+000020 00 01 b8 00 00 02 03 00 f3 f6 00 00 00 00 58 58
+000030 58 58 58 58
diff --git a/dep/pipeline/u100_002/pcap_files/out_33.txt b/dep/pipeline/u100_002/pcap_files/out_33.txt
new file mode 100644
index 00000000..3c1fe2a4
--- /dev/null
+++ b/dep/pipeline/u100_002/pcap_files/out_33.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 81 00 00 10
+000010 81 00 00 11 08 00 45 00 00 22 00 01 00 00 40 01
+000020 90 d6 32 00 00 01 b8 00 00 03 03 01 f3 f5 00 00
+000030 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/u100_002/pcap_files/out_34.txt b/dep/pipeline/u100_002/pcap_files/out_34.txt
new file mode 100644
index 00000000..84d6e39f
--- /dev/null
+++ b/dep/pipeline/u100_002/pcap_files/out_34.txt
@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 c1 c2 c3 c4 00 00 d1 d2 d3 d4 00 00 08 00 45 00
+000010 00 22 00 01 00 00 3f 01 91 d5 32 00 00 01 b8 00
+000020 00 04 03 02 f3 f4 00 00 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/u100_002/pcap_files/out_41.txt b/dep/pipeline/u100_002/pcap_files/out_41.txt
new file mode 100644
index 00000000..3f987ce0
--- /dev/null
+++ b/dep/pipeline/u100_002/pcap_files/out_41.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 24 00 01 00 00 ff 02 d1 d4 32 00 00 01 b8 00
+000020 00 01 11 10 8d 8e 00 00 00 00 58 58 58 58 58 58
+000030 58 58
diff --git a/dep/pipeline/u100_002/pcap_files/out_42.txt b/dep/pipeline/u100_002/pcap_files/out_42.txt
new file mode 100644
index 00000000..1f4c1819
--- /dev/null
+++ b/dep/pipeline/u100_002/pcap_files/out_42.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 a1 a2 a3 a4 00 00 b1 b2 b3 b4 00 00 81 00 00 10
+000010 08 00 45 00 00 24 00 01 00 00 fe 02 d2 d3 32 00
+000020 00 01 b8 00 00 02 11 20 8d 7e 00 00 00 00 58 58
+000030 58 58 58 58 58 58
diff --git a/dep/pipeline/u100_002/pcap_files/out_43.txt b/dep/pipeline/u100_002/pcap_files/out_43.txt
new file mode 100644
index 00000000..fc2553a4
--- /dev/null
+++ b/dep/pipeline/u100_002/pcap_files/out_43.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 81 00 00 10
+000010 81 00 00 11 08 00 45 00 00 24 00 01 00 00 ff 02
+000020 d1 d2 32 00 00 01 b8 00 00 03 11 30 8d 6e 00 00
+000030 00 00 58 58 58 58 58 58 58 58
diff --git a/dep/pipeline/u100_002/pcap_files/out_44.txt b/dep/pipeline/u100_002/pcap_files/out_44.txt
new file mode 100644
index 00000000..db311d12
--- /dev/null
+++ b/dep/pipeline/u100_002/pcap_files/out_44.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 c1 c2 c3 c4 00 00 d1 d2 d3 d4 00 00 08 00 45 00
+000010 00 24 00 01 00 00 fe 02 d2 d1 32 00 00 01 b8 00
+000020 00 04 11 40 8d 5e 00 00 00 00 58 58 58 58 58 58
+000030 58 58
diff --git a/dep/pipeline/u100_002/pcap_files/out_51.txt b/dep/pipeline/u100_002/pcap_files/out_51.txt
new file mode 100644
index 00000000..db5b6106
--- /dev/null
+++ b/dep/pipeline/u100_002/pcap_files/out_51.txt
@@ -0,0 +1,13 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 86 dd 60 00
+000010 00 00 00 1a 06 40 ab cd ab cd ab cd ab cd ab cd
+000020 ab cd ab cd 00 01 12 34 12 34 12 34 12 34 12 34
+000030 12 34 12 34 00 01 00 64 00 c8 00 00 00 00 00 00
+000040 00 00 50 02 20 00 53 9a 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/u100_002/pcap_files/out_52.txt b/dep/pipeline/u100_002/pcap_files/out_52.txt
new file mode 100644
index 00000000..3a6c5158
--- /dev/null
+++ b/dep/pipeline/u100_002/pcap_files/out_52.txt
@@ -0,0 +1,13 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 a1 a2 a3 a4 00 00 b1 b2 b3 b4 00 00 86 dd 60 00
+000010 00 00 00 1a 06 3f ab cd ab cd ab cd ab cd ab cd
+000020 ab cd ab cd 00 01 12 34 12 34 12 34 12 34 12 34
+000030 12 34 12 34 00 02 00 64 00 c8 00 00 00 00 00 00
+000040 00 00 50 02 20 00 53 9a 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/u100_002/pcap_files/out_53.txt b/dep/pipeline/u100_002/pcap_files/out_53.txt
new file mode 100644
index 00000000..0f06acdd
--- /dev/null
+++ b/dep/pipeline/u100_002/pcap_files/out_53.txt
@@ -0,0 +1,13 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 86 dd 60 00
+000010 00 00 00 1a 06 40 ab cd ab cd ab cd ab cd ab cd
+000020 ab cd ab cd 00 01 12 34 12 34 12 34 12 34 12 34
+000030 12 34 12 34 00 03 00 64 00 c8 00 00 00 00 00 00
+000040 00 00 50 02 20 00 53 9a 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/u100_002/pcap_files/out_54.txt b/dep/pipeline/u100_002/pcap_files/out_54.txt
new file mode 100644
index 00000000..c3fb1b18
--- /dev/null
+++ b/dep/pipeline/u100_002/pcap_files/out_54.txt
@@ -0,0 +1,13 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 c1 c2 c3 c4 00 00 d1 d2 d3 d4 00 00 86 dd 60 00
+000010 00 00 00 1a 06 3f ab cd ab cd ab cd ab cd ab cd
+000020 ab cd ab cd 00 01 12 34 12 34 12 34 12 34 12 34
+000030 12 34 12 34 00 04 00 64 00 c8 00 00 00 00 00 00
+000040 00 00 50 02 20 00 53 9a 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/u100_002/readme.md b/dep/pipeline/u100_002/readme.md
new file mode 100644
index 00000000..a71d5edd
--- /dev/null
+++ b/dep/pipeline/u100_002/readme.md
@@ -0,0 +1,14 @@
+Test Case: test_u100_002
+-----------------------
+
+ Scenario being tested:
+ In this usecase, we are testing the action profile feature for various type of packets.
+
+ Description:
+ The test case receives various type of packets like IPv4, TCP, UDP, ICMP, IGMP.
+ Action profile is conconfigured to send the packet a particular port, perform l3
+ switching, and to drop the packets. Different type of packets have different match
+ fields. Also packet validation is also performed.
+
+ Verification:
+ The packet verification for the testcase should happen as per action profile configuration.
diff --git a/dep/pipeline/u100_002/table_1.txt b/dep/pipeline/u100_002/table_1.txt
new file mode 100644
index 00000000..9248f351
--- /dev/null
+++ b/dep/pipeline/u100_002/table_1.txt
@@ -0,0 +1,6 @@
+
+// match <ipv4_dst_add>
+match 0xc800000a action set_nexthop nexthop 1
+match 0xc800000b action set_nexthop nexthop 2
+match 0xc800000c action set_nexthop nexthop 3
+match 0xc800000d action set_nexthop nexthop 4
diff --git a/dep/pipeline/u100_002/table_2.txt b/dep/pipeline/u100_002/table_2.txt
new file mode 100644
index 00000000..86a3acc7
--- /dev/null
+++ b/dep/pipeline/u100_002/table_2.txt
@@ -0,0 +1,6 @@
+
+// match <ipv4_src_add> <ipv4_dst_add>
+match 0x6400000a 0xd800000a action set_nexthop nexthop 1
+match 0x6400000b 0xd800000a action set_nexthop nexthop 2
+match 0x6400000c 0xd800000a action set_nexthop nexthop 3
+match 0x6400000d 0xd800000a action set_nexthop nexthop 4
diff --git a/dep/pipeline/u100_002/table_3.txt b/dep/pipeline/u100_002/table_3.txt
new file mode 100644
index 00000000..4c760e4c
--- /dev/null
+++ b/dep/pipeline/u100_002/table_3.txt
@@ -0,0 +1,28 @@
+
+// ICMP Protocol
+// match <ipv4_src_add> <ipv4_dst_add> <ipv4_protocol_type> <icmp_type_code> <icmp_checksum>
+match 0x32000001 0xb8000001 0x1 0x0000 0xf6f6 action set_nexthop nexthop 1
+match 0x32000001 0xb8000002 0x1 0x0300 0xf3f6 action set_nexthop nexthop 2
+match 0x32000001 0xb8000003 0x1 0x0301 0xf3f5 action set_nexthop nexthop 3
+match 0x32000001 0xb8000004 0x1 0x0302 0xf3f4 action set_nexthop nexthop 4
+
+// IGMP Protocol
+// match <ipv4_src_add> <ipv4_dst_add> <ipv4_protocol_type> <igmp_type_max_response_time> <igmp_checksum>
+match 0x32000001 0xb8000001 0x2 0x1110 0x8d8e action set_nexthop nexthop 1
+match 0x32000001 0xb8000002 0x2 0x1120 0x8d7e action set_nexthop nexthop 2
+match 0x32000001 0xb8000003 0x2 0x1130 0x8d6e action set_nexthop nexthop 3
+match 0x32000001 0xb8000004 0x2 0x1140 0x8d5e action set_nexthop nexthop 4
+
+// TCP Protocol
+// match <ipv4_src_add> <ipv4_dst_add> <ipv4_protocol_type> <tcp_src_port> <tcp_dst_port>
+match 0x32000001 0xb8000001 0x6 0x0064 0x00c8 action set_nexthop nexthop 1
+match 0x32000001 0xb8000002 0x6 0x0064 0x00c8 action set_nexthop nexthop 2
+match 0x32000001 0xb8000003 0x6 0x0064 0x00c8 action set_nexthop nexthop 3
+match 0x32000001 0xb8000004 0x6 0x0064 0x00c8 action set_nexthop nexthop 4
+
+// UDP Protocol
+// match <ipv4_src_add> <ipv4_dst_add> <ipv4_protocol_type> <udp_src_port> <udp_dst_port>
+match 0x32000001 0xb8000001 0x11 0x0064 0x00c8 action set_nexthop nexthop 1
+match 0x32000001 0xb8000002 0x11 0x0064 0x00c8 action set_nexthop nexthop 2
+match 0x32000001 0xb8000003 0x11 0x0064 0x00c8 action set_nexthop nexthop 3
+match 0x32000001 0xb8000004 0x11 0x0064 0x00c8 action set_nexthop nexthop 4
diff --git a/dep/pipeline/u100_002/table_4.txt b/dep/pipeline/u100_002/table_4.txt
new file mode 100644
index 00000000..73337c22
--- /dev/null
+++ b/dep/pipeline/u100_002/table_4.txt
@@ -0,0 +1,7 @@
+
+// match <Ingress_nexthop_id>
+match 0x0000 action drop
+match 0x0001 action send port 0
+match 0x0002 action l3_switch port 1 new_mac_da 0xa1a2a3a40000 new_mac_sa 0xb1b2b3b40000
+match 0x0003 action send port 2
+match 0x0004 action l3_switch port 3 new_mac_da 0xc1c2c3c40000 new_mac_sa 0xd1d2d3d40000
diff --git a/dep/pipeline/u100_002/table_5.txt b/dep/pipeline/u100_002/table_5.txt
new file mode 100644
index 00000000..340b4571
--- /dev/null
+++ b/dep/pipeline/u100_002/table_5.txt
@@ -0,0 +1,6 @@
+
+// match <dst_addr_hi> <dst_addr_lo>
+match 0x1234123412341234 0x1234123412340001 action set_nexthop nexthop 0x1
+match 0x1234123412341234 0x1234123412340002 action set_nexthop nexthop 0x2
+match 0x1234123412341234 0x1234123412340003 action set_nexthop nexthop 0x3
+match 0x1234123412341234 0x1234123412340004 action set_nexthop nexthop 0x4
diff --git a/dep/pipeline/u100_002/u100_002.cli b/dep/pipeline/u100_002/u100_002.cli
new file mode 100644
index 00000000..f5cb5921
--- /dev/null
+++ b/dep/pipeline/u100_002/u100_002.cli
@@ -0,0 +1,32 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/u100_002/u100_002.spec /tmp/pipeline/u100_002/u100_002.c
+pipeline libbuild /tmp/pipeline/u100_002/u100_002.c /tmp/pipeline/u100_002/u100_002.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/u100_002/u100_002.so io /tmp/pipeline/u100_002/ethdev.io numa 0
+
+pipeline PIPELINE0 table ipv4_host_1 add /tmp/pipeline/u100_002/table_1.txt
+
+pipeline PIPELINE0 table ipv4_host_2 add /tmp/pipeline/u100_002/table_2.txt
+
+pipeline PIPELINE0 table ipv4_host_3 add /tmp/pipeline/u100_002/table_3.txt
+
+pipeline PIPELINE0 table ipv6_host add /tmp/pipeline/u100_002/table_5.txt
+
+pipeline PIPELINE0 table nexthop add /tmp/pipeline/u100_002/table_4.txt
+
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/u100_002/u100_002.spec b/dep/pipeline/u100_002/u100_002.spec
new file mode 100644
index 00000000..87cce6d2
--- /dev/null
+++ b/dep/pipeline/u100_002/u100_002.spec
@@ -0,0 +1,346 @@
+
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+struct ipv4_h {
+ bit<8> version_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_frag_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+struct ipv6_h {
+ bit<32> version_traffic_class_flow_label
+ bit<16> payload_len
+ bit<8> next_hdr
+ bit<8> hop_limit
+ bit<64> src_addr_hi
+ bit<64> src_addr_lo
+ bit<64> dst_addr_hi
+ bit<64> dst_addr_lo
+}
+
+struct icmp_h {
+ bit<16> type_code
+ bit<16> checksum
+}
+
+struct igmp_h {
+ bit<16> type_code
+ bit<16> checksum
+}
+
+struct tcp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<32> seq_no
+ bit<32> ack_no
+ bit<8> data_offset_res
+ bit<8> flags
+ bit<16> window
+ bit<16> checksum
+ bit<16> urgent_ptr
+}
+
+struct udp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<16> len
+ bit<16> checksum
+}
+
+struct cksum_state_t {
+ bit<16> state_0
+}
+
+struct vlan_tag_h {
+ bit<16> pcp_cfi_vid
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+header vlan_tag_0 instanceof vlan_tag_h
+header vlan_tag_1 instanceof vlan_tag_h
+
+header ipv4 instanceof ipv4_h
+header ipv6 instanceof ipv6_h
+header icmp instanceof icmp_h
+header igmp instanceof igmp_h
+header tcp instanceof tcp_h
+header udp instanceof udp_h
+header cksum_state instanceof cksum_state_t
+
+struct my_ingress_metadata_t {
+ bit<32> psa_ingress_parser_input_metadata_ingress_port
+ bit<32> psa_ingress_parser_input_metadata_packet_path
+ bit<32> psa_egress_parser_input_metadata_egress_port
+ bit<32> psa_egress_parser_input_metadata_packet_path
+ bit<32> psa_ingress_input_metadata_ingress_port
+ bit<32> psa_ingress_input_metadata_packet_path
+ bit<64> psa_ingress_input_metadata_ingress_timestamp
+ bit<8> psa_ingress_input_metadata_parser_error
+ bit<8> psa_ingress_output_metadata_class_of_service
+ bit<8> psa_ingress_output_metadata_clone
+ bit<16> psa_ingress_output_metadata_clone_session_id
+ bit<8> psa_ingress_output_metadata_drop
+ bit<8> psa_ingress_output_metadata_resubmit
+ bit<32> psa_ingress_output_metadata_multicast_group
+ bit<32> psa_ingress_output_metadata_egress_port
+ bit<8> psa_egress_input_metadata_class_of_service
+ bit<32> psa_egress_input_metadata_egress_port
+ bit<32> psa_egress_input_metadata_packet_path
+ bit<16> psa_egress_input_metadata_instance
+ bit<64> psa_egress_input_metadata_egress_timestamp
+ bit<8> psa_egress_input_metadata_parser_error
+ bit<32> psa_egress_deparser_input_metadata_egress_port
+ bit<8> psa_egress_output_metadata_clone
+ bit<16> psa_egress_output_metadata_clone_session_id
+ bit<8> psa_egress_output_metadata_drop
+ bit<32> local_metadata__l4_lookup_ipv4_src_addr0
+ bit<32> local_metadata__l4_lookup_ipv4_dst_addr1
+ bit<8> local_metadata__l4_lookup_ipv4_protocol2
+ bit<16> local_metadata__l4_lookup_word_13
+ bit<16> local_metadata__l4_lookup_word_24
+ bit<8> local_metadata__first_frag5
+ bit<8> local_metadata__ipv4_checksum_err6
+ bit<16> Ingress_nexthop_id_0
+ bit<8> Ingress_ttl_dec_0
+}
+metadata instanceof my_ingress_metadata_t
+
+struct l3_switch_arg_t {
+ bit<32> port
+ bit<48> new_mac_da
+ bit<48> new_mac_sa
+}
+
+struct send_arg_t {
+ bit<32> port
+}
+
+struct set_nexthop_arg_t {
+ bit<16> nexthop
+}
+
+action NoAction args none {
+ return
+}
+
+action send args instanceof send_arg_t {
+ mov m.psa_ingress_output_metadata_egress_port t.port
+ mov m.Ingress_ttl_dec_0 0x0
+ return
+}
+
+action drop args none {
+ mov m.psa_ingress_output_metadata_drop 1
+ return
+}
+
+action l3_switch args instanceof l3_switch_arg_t {
+ mov h.ethernet.dst_addr t.new_mac_da
+ mov h.ethernet.src_addr t.new_mac_sa
+ mov m.Ingress_ttl_dec_0 0x1
+ mov m.psa_ingress_output_metadata_egress_port t.port
+ return
+}
+
+action set_nexthop args instanceof set_nexthop_arg_t {
+ mov m.Ingress_nexthop_id_0 t.nexthop
+ return
+}
+
+table ipv4_host_1 {
+ key {
+ h.ipv4.dst_addr exact
+ }
+ actions {
+ set_nexthop
+ NoAction
+ }
+ default_action NoAction args none
+ size 0x400
+}
+
+table ipv4_host_2 {
+ key {
+ h.ipv4.src_addr exact
+ h.ipv4.dst_addr exact
+ }
+ actions {
+ set_nexthop
+ NoAction
+ }
+ default_action NoAction args none
+ size 0x10000
+}
+
+table ipv4_host_3 {
+ key {
+ m.local_metadata__l4_lookup_ipv4_src_addr0 exact
+ m.local_metadata__l4_lookup_ipv4_dst_addr1 exact
+ m.local_metadata__l4_lookup_ipv4_protocol2 exact
+ m.local_metadata__l4_lookup_word_13 exact
+ m.local_metadata__l4_lookup_word_24 exact
+ }
+ actions {
+ set_nexthop
+ NoAction
+ }
+ default_action NoAction args none
+ size 0x10000
+}
+
+table ipv6_host {
+ key {
+ h.ipv6.dst_addr_hi exact
+ h.ipv6.dst_addr_lo exact
+ }
+ actions {
+ set_nexthop
+ NoAction
+ }
+ default_action NoAction args none
+ size 0x8000
+}
+
+table nexthop {
+ key {
+ m.Ingress_nexthop_id_0 exact
+ }
+ actions {
+ send
+ drop
+ l3_switch
+ NoAction
+ }
+ default_action NoAction args none
+ size 0x4000
+}
+
+apply {
+ // Block 0
+ rx m.psa_ingress_input_metadata_ingress_port
+
+ // Block 1
+ mov m.psa_ingress_output_metadata_drop 0x0
+ extract h.ethernet
+ jmpeq MYIP_PARSE_VLAN_TAG h.ethernet.ether_type 0x8100
+ jmpeq MYIP_PARSE_IPV4 h.ethernet.ether_type 0x800
+ jmpeq MYIP_PARSE_IPV6 h.ethernet.ether_type 0x86dd
+ jmp MYIP_ACCEPT
+ MYIP_PARSE_VLAN_TAG : extract h.vlan_tag_0
+ jmpeq MYIP_PARSE_VLAN_TAG1 h.vlan_tag_0.ether_type 0x8100
+ jmpeq MYIP_PARSE_IPV4 h.vlan_tag_0.ether_type 0x800
+ jmp MYIP_ACCEPT
+ MYIP_PARSE_VLAN_TAG1 : extract h.vlan_tag_1
+ jmpeq MYIP_PARSE_VLAN_TAG2 h.vlan_tag_1.ether_type 0x8100
+ jmpeq MYIP_PARSE_IPV4 h.vlan_tag_1.ether_type 0x800
+ jmp MYIP_ACCEPT
+ MYIP_PARSE_VLAN_TAG2 : mov m.psa_ingress_input_metadata_parser_error 0x0
+ jmp MYIP_ACCEPT
+ MYIP_PARSE_IPV4 : extract h.ipv4
+ mov h.cksum_state.state_0 0x0
+ ckadd h.cksum_state.state_0 h.ipv4
+ cksub h.cksum_state.state_0 h.ipv4.hdr_checksum
+ mov m.local_metadata__l4_lookup_ipv4_dst_addr1 h.ipv4.dst_addr
+ mov m.local_metadata__l4_lookup_ipv4_src_addr0 h.ipv4.src_addr
+ mov m.local_metadata__l4_lookup_ipv4_protocol2 h.ipv4.protocol
+ jmpeq MYIP_PARSE_IPV4_NO_OPTIONS_PART1 h.ipv4.version_ihl 0x45
+ jmp MYIP_ACCEPT
+ MYIP_PARSE_IPV4_NO_OPTIONS_PART1 : jmpeq MYIP_PARSE_IPV4_NO_OPTIONS_PART2 h.ipv4.flags_frag_offset 0x0
+ jmp MYIP_ACCEPT
+ MYIP_PARSE_IPV4_NO_OPTIONS_PART2 : jmpeq MYIP_PARSE_ICMP h.ipv4.protocol 0x1
+ jmpeq MYIP_PARSE_IGMP h.ipv4.protocol 0x2
+ jmpeq MYIP_PARSE_TCP h.ipv4.protocol 0x6
+ jmpeq MYIP_PARSE_UDP h.ipv4.protocol 0x11
+ jmp MYIP_PARSE_FIRST_FRAGMENT
+ MYIP_PARSE_IPV6 : extract h.ipv6
+ jmpeq MYIP_PARSE_ICMP h.ipv6.next_hdr 0x1
+ jmpeq MYIP_PARSE_IGMP h.ipv6.next_hdr 0x2
+ jmpeq MYIP_PARSE_TCP h.ipv6.next_hdr 0x6
+ jmpeq MYIP_PARSE_UDP h.ipv6.next_hdr 0x11
+ jmp MYIP_PARSE_FIRST_FRAGMENT
+ MYIP_PARSE_UDP : extract h.udp
+ mov m.local_metadata__l4_lookup_word_13 h.udp.src_port
+ mov m.local_metadata__l4_lookup_word_24 h.udp.dst_port
+ jmp MYIP_PARSE_FIRST_FRAGMENT
+ MYIP_PARSE_TCP : extract h.tcp
+ mov m.local_metadata__l4_lookup_word_13 h.tcp.src_port
+ mov m.local_metadata__l4_lookup_word_24 h.tcp.dst_port
+ jmp MYIP_PARSE_FIRST_FRAGMENT
+ MYIP_PARSE_IGMP : extract h.igmp
+ mov m.local_metadata__l4_lookup_word_13 h.igmp.type_code
+ mov m.local_metadata__l4_lookup_word_24 h.igmp.checksum
+ jmp MYIP_PARSE_FIRST_FRAGMENT
+ MYIP_PARSE_ICMP : extract h.icmp
+ mov m.local_metadata__l4_lookup_word_13 h.icmp.type_code
+ mov m.local_metadata__l4_lookup_word_24 h.icmp.checksum
+ MYIP_PARSE_FIRST_FRAGMENT : mov m.local_metadata__first_frag5 0x1
+ MYIP_ACCEPT : mov m.Ingress_nexthop_id_0 0x0
+ mov m.Ingress_ttl_dec_0 0x0
+ jmpnv LABEL_0END h.ipv4
+ jmpnv LABEL_0END h.ipv6
+ mov m.local_metadata__first_frag5 0x0
+ LABEL_0END : jmpnv LABEL_1FALSE h.ipv4
+ jmplt LABEL_1END h.ipv4.ttl 0x2
+
+ // Block 2
+ table ipv4_host_1
+
+ // Block 3
+ jmph LABEL_1END
+
+ // Block 4
+ table ipv4_host_2
+
+ // Block 5
+ jmph LABEL_1END
+
+ // Block 6
+ table ipv4_host_3
+
+ // Block 7
+ jmp LABEL_1END
+
+ // Block 8
+ LABEL_1FALSE : jmpnv LABEL_1END h.ipv6
+ jmplt LABEL_1END h.ipv6.hop_limit 0x2
+
+ // Block 9
+ table ipv6_host
+
+ // Block 10
+ LABEL_1END : table nexthop
+
+ // Block 11
+ jmpnv LABEL_7FALSE h.ipv4
+ cksub h.cksum_state.state_0 h.ipv4.ttl
+ sub h.ipv4.ttl m.Ingress_ttl_dec_0
+ ckadd h.cksum_state.state_0 h.ipv4.ttl
+ mov h.ipv4.hdr_checksum h.cksum_state.state_0
+ jmp LABEL_7END
+ LABEL_7FALSE : jmpnv LABEL_7END h.ipv6
+ sub h.ipv6.hop_limit m.Ingress_ttl_dec_0
+ LABEL_7END : jmpneq LABEL_DROP m.psa_ingress_output_metadata_drop 0x0
+ emit h.ethernet
+ emit h.vlan_tag_0
+ emit h.vlan_tag_1
+ emit h.ipv4
+ emit h.ipv6
+ emit h.icmp
+ emit h.igmp
+ emit h.tcp
+ emit h.udp
+ tx m.psa_ingress_output_metadata_egress_port
+ LABEL_DROP : drop
+}
diff --git a/dep/pipeline/u100_003/ethdev.io b/dep/pipeline/u100_003/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/u100_003/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/u100_003/pcap_files/in_1.txt b/dep/pipeline/u100_003/pcap_files/in_1.txt
new file mode 100644
index 00000000..7eca7666
--- /dev/null
+++ b/dep/pipeline/u100_003/pcap_files/in_1.txt
@@ -0,0 +1,75 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0 (Table 1)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1 (Table 1)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 81 00 00 10
+000010 08 00 45 00 00 2e 00 01 00 00 40 06 4e b5 64 00
+000020 00 0a c8 00 00 0b 00 64 00 c8 00 00 00 00 00 00
+000030 00 00 50 02 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 2 (Table 1)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 81 00 00 10
+000010 81 00 00 11 08 00 45 00 00 2e 00 01 00 00 40 06
+000020 4e b5 64 00 00 0a c8 00 00 0c 00 64 00 c8 00 00
+000030 00 00 00 00 00 00 50 02 20 00 59 93 00 00 58 58
+000040 58 58 58 58
+# Packet 3 (Table 1)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0d 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 4 (Table 2)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 3e b5 64 00 00 0a d8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 49 93 00 00 58 58 58 58 58 58
+# Packet 5 (Table 2)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 81 00 00 10
+000010 08 00 45 00 00 2e 00 01 00 00 40 06 3e b5 64 00
+000020 00 0b d8 00 00 0a 00 64 00 c8 00 00 00 00 00 00
+000030 00 00 50 02 20 00 49 93 00 00 58 58 58 58 58 58
+# Packet 6 (Table 2)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 81 00 00 10
+000010 81 00 00 11 08 00 45 00 00 2e 00 01 00 00 40 06
+000020 3e b5 64 00 00 0c d8 00 00 0a 00 64 00 c8 00 00
+000030 00 00 00 00 00 00 50 02 20 00 49 93 00 00 58 58
+000040 58 58 58 58
+# Packet 7 (Table 2)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 3e b5 64 00 00 0d d8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 49 93 00 00 58 58 58 58 58 58
+# Packet 8 (Table 3: TCP)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 90 c7 32 00 00 01 b8 00
+000020 00 01 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 9b a5 00 00 58 58 58 58 58 58
+# Packet 9 (Table 3: TCP)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 81 00 00 10
+000010 08 00 45 00 00 2e 00 01 00 00 40 06 90 c6 32 00
+000020 00 01 b8 00 00 02 00 64 00 c8 00 00 00 00 00 00
+000030 00 00 50 02 20 00 9b a5 00 00 58 58 58 58 58 58
+# Packet 10 (Table 3: TCP)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 81 00 00 10
+000010 81 00 00 11 08 00 45 00 00 2e 00 01 00 00 40 06
+000020 90 c5 32 00 00 01 b8 00 00 03 00 64 00 c8 00 00
+000030 00 00 00 00 00 00 50 02 20 00 9b a5 00 00 58 58
+000040 58 58 58 58
+# Packet 11 (Table 3: TCP)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 90 c4 32 00 00 01 b8 00
+000020 00 04 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 9b a5 00 00 58 58 58 58 58 58
+# Packet 12 (Not matching any table)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 90 c7 3a 22 00 01 b9 22
+000020 00 04 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 9b a5 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/u100_003/pcap_files/in_2.txt b/dep/pipeline/u100_003/pcap_files/in_2.txt
new file mode 100644
index 00000000..4c780ee3
--- /dev/null
+++ b/dep/pipeline/u100_003/pcap_files/in_2.txt
@@ -0,0 +1,25 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0 (Table 3: UDP)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 22 00 01 00 00 40 11 90 c8 32 00 00 01 b8 00
+000020 00 01 00 64 00 c8 00 0e 0b 9b 58 58 58 58 58 58
+# Packet 1 (Table 3: UDP)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 81 00 00 10
+000010 08 00 45 00 00 22 00 01 00 00 40 11 90 c7 32 00
+000020 00 01 b8 00 00 02 00 64 00 c8 00 0e 0b 9b 58 58
+000030 58 58 58 58
+# Packet 2 (Table 3: UDP)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 81 00 00 10
+000010 81 00 00 11 08 00 45 00 00 22 00 01 00 00 40 11
+000020 90 c6 32 00 00 01 b8 00 00 03 00 64 00 c8 00 0e
+000030 0b 9b 58 58 58 58 58 58
+# Packet 3 (Table 3: UDP)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 22 00 01 00 00 40 11 90 c5 32 00 00 01 b8 00
+000020 00 04 00 64 00 c8 00 0e 0b 9b 58 58 58 58 58 58
diff --git a/dep/pipeline/u100_003/pcap_files/in_3.txt b/dep/pipeline/u100_003/pcap_files/in_3.txt
new file mode 100644
index 00000000..8775c6a2
--- /dev/null
+++ b/dep/pipeline/u100_003/pcap_files/in_3.txt
@@ -0,0 +1,25 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0 (Table 3: ICMP)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 22 00 01 00 00 40 01 90 d8 32 00 00 01 b8 00
+000020 00 01 00 00 f6 f6 00 00 00 00 58 58 58 58 58 58
+# Packet 1 (Table 3: ICMP)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 81 00 00 10
+000010 08 00 45 00 00 22 00 01 00 00 40 01 90 d7 32 00
+000020 00 01 b8 00 00 02 03 00 f3 f6 00 00 00 00 58 58
+000030 58 58 58 58
+# Packet 2 (Table 3: ICMP)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 81 00 00 10
+000010 81 00 00 11 08 00 45 00 00 22 00 01 00 00 40 01
+000020 90 d6 32 00 00 01 b8 00 00 03 03 01 f3 f5 00 00
+000030 00 00 58 58 58 58 58 58
+# Packet 3 (Table 3: ICMP)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 22 00 01 00 00 40 01 90 d5 32 00 00 01 b8 00
+000020 00 04 03 02 f3 f4 00 00 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/u100_003/pcap_files/in_4.txt b/dep/pipeline/u100_003/pcap_files/in_4.txt
new file mode 100644
index 00000000..6a042777
--- /dev/null
+++ b/dep/pipeline/u100_003/pcap_files/in_4.txt
@@ -0,0 +1,27 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0 (Table 3: IGMP)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 24 00 01 00 00 ff 02 d1 d4 32 00 00 01 b8 00
+000020 00 01 11 10 8d 8e 00 00 00 00 58 58 58 58 58 58
+000030 58 58
+# Packet 1 (Table 3: IGMP)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 81 00 00 10
+000010 08 00 45 00 00 24 00 01 00 00 ff 02 d1 d3 32 00
+000020 00 01 b8 00 00 02 11 20 8d 7e 00 00 00 00 58 58
+000030 58 58 58 58 58 58
+# Packet 2 (Table 3: IGMP)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 81 00 00 10
+000010 81 00 00 11 08 00 45 00 00 24 00 01 00 00 ff 02
+000020 d1 d2 32 00 00 01 b8 00 00 03 11 30 8d 6e 00 00
+000030 00 00 58 58 58 58 58 58 58 58
+# Packet 3 (Table 3: IGMP)
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 24 00 01 00 00 ff 02 d1 d1 32 00 00 01 b8 00
+000020 00 04 11 40 8d 5e 00 00 00 00 58 58 58 58 58 58
+000030 58 58
diff --git a/dep/pipeline/u100_003/pcap_files/in_5.txt b/dep/pipeline/u100_003/pcap_files/in_5.txt
new file mode 100644
index 00000000..2c0cc94d
--- /dev/null
+++ b/dep/pipeline/u100_003/pcap_files/in_5.txt
@@ -0,0 +1,31 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 86 dd 60 00
+000010 00 00 00 1a 06 40 ab cd ab cd ab cd ab cd ab cd
+000020 ab cd ab cd 00 01 12 34 12 34 12 34 12 34 12 34
+000030 12 34 12 34 00 01 00 64 00 c8 00 00 00 00 00 00
+000040 00 00 50 02 20 00 53 9a 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 86 dd 60 00
+000010 00 00 00 1a 06 40 ab cd ab cd ab cd ab cd ab cd
+000020 ab cd ab cd 00 01 12 34 12 34 12 34 12 34 12 34
+000030 12 34 12 34 00 02 00 64 00 c8 00 00 00 00 00 00
+000040 00 00 50 02 20 00 53 9a 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 86 dd 60 00
+000010 00 00 00 1a 06 40 ab cd ab cd ab cd ab cd ab cd
+000020 ab cd ab cd 00 01 12 34 12 34 12 34 12 34 12 34
+000030 12 34 12 34 00 03 00 64 00 c8 00 00 00 00 00 00
+000040 00 00 50 02 20 00 53 9a 00 00 58 58 58 58 58 58
+# Packet 3
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 86 dd 60 00
+000010 00 00 00 1a 06 40 ab cd ab cd ab cd ab cd ab cd
+000020 ab cd ab cd 00 01 12 34 12 34 12 34 12 34 12 34
+000030 12 34 12 34 00 04 00 64 00 c8 00 00 00 00 00 00
+000040 00 00 50 02 20 00 53 9a 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/u100_003/pcap_files/out_11.txt b/dep/pipeline/u100_003/pcap_files/out_11.txt
new file mode 100644
index 00000000..22220cd2
--- /dev/null
+++ b/dep/pipeline/u100_003/pcap_files/out_11.txt
@@ -0,0 +1,22 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 3e b5 64 00 00 0a d8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 49 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 90 c7 32 00 00 01 b8 00
+000020 00 01 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 9b a5 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/u100_003/pcap_files/out_12.txt b/dep/pipeline/u100_003/pcap_files/out_12.txt
new file mode 100644
index 00000000..0121d4fe
--- /dev/null
+++ b/dep/pipeline/u100_003/pcap_files/out_12.txt
@@ -0,0 +1,22 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 a1 a2 a3 a4 00 00 b1 b2 b3 b4 00 00 81 00 00 10
+000010 08 00 45 00 00 2e 00 01 00 00 3f 06 4f b4 64 00
+000020 00 0a c8 00 00 0b 00 64 00 c8 00 00 00 00 00 00
+000030 00 00 50 02 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 a1 a2 a3 a4 00 00 b1 b2 b3 b4 00 00 81 00 00 10
+000010 08 00 45 00 00 2e 00 01 00 00 3f 06 3f b4 64 00
+000020 00 0b d8 00 00 0a 00 64 00 c8 00 00 00 00 00 00
+000030 00 00 50 02 20 00 49 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 a1 a2 a3 a4 00 00 b1 b2 b3 b4 00 00 81 00 00 10
+000010 08 00 45 00 00 2e 00 01 00 00 3f 06 91 c6 32 00
+000020 00 01 b8 00 00 02 00 64 00 c8 00 00 00 00 00 00
+000030 00 00 50 02 20 00 9b a5 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/u100_003/pcap_files/out_13.txt b/dep/pipeline/u100_003/pcap_files/out_13.txt
new file mode 100644
index 00000000..2bbaf0c2
--- /dev/null
+++ b/dep/pipeline/u100_003/pcap_files/out_13.txt
@@ -0,0 +1,25 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 81 00 00 10
+000010 81 00 00 11 08 00 45 00 00 2e 00 01 00 00 40 06
+000020 4e b3 64 00 00 0a c8 00 00 0c 00 64 00 c8 00 00
+000030 00 00 00 00 00 00 50 02 20 00 59 93 00 00 58 58
+000040 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 81 00 00 10
+000010 81 00 00 11 08 00 45 00 00 2e 00 01 00 00 40 06
+000020 3e b3 64 00 00 0c d8 00 00 0a 00 64 00 c8 00 00
+000030 00 00 00 00 00 00 50 02 20 00 49 93 00 00 58 58
+000040 58 58 58 58
+# Packet 2
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 81 00 00 10
+000010 81 00 00 11 08 00 45 00 00 2e 00 01 00 00 40 06
+000020 90 c5 32 00 00 01 b8 00 00 03 00 64 00 c8 00 00
+000030 00 00 00 00 00 00 50 02 20 00 9b a5 00 00 58 58
+000040 58 58 58 58
diff --git a/dep/pipeline/u100_003/pcap_files/out_14.txt b/dep/pipeline/u100_003/pcap_files/out_14.txt
new file mode 100644
index 00000000..91ba6769
--- /dev/null
+++ b/dep/pipeline/u100_003/pcap_files/out_14.txt
@@ -0,0 +1,22 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 c1 c2 c3 c4 00 00 d1 d2 d3 d4 00 00 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 4f b2 64 00 00 0a c8 00
+000020 00 0d 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 c1 c2 c3 c4 00 00 d1 d2 d3 d4 00 00 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 3f b2 64 00 00 0d d8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 49 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 c1 c2 c3 c4 00 00 d1 d2 d3 d4 00 00 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 91 c4 32 00 00 01 b8 00
+000020 00 04 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 9b a5 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/u100_003/pcap_files/out_21.txt b/dep/pipeline/u100_003/pcap_files/out_21.txt
new file mode 100644
index 00000000..5e474f81
--- /dev/null
+++ b/dep/pipeline/u100_003/pcap_files/out_21.txt
@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 22 00 01 00 00 40 11 90 c8 32 00 00 01 b8 00
+000020 00 01 00 64 00 c8 00 0e 0b 9b 58 58 58 58 58 58
diff --git a/dep/pipeline/u100_003/pcap_files/out_22.txt b/dep/pipeline/u100_003/pcap_files/out_22.txt
new file mode 100644
index 00000000..66e973cd
--- /dev/null
+++ b/dep/pipeline/u100_003/pcap_files/out_22.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 a1 a2 a3 a4 00 00 b1 b2 b3 b4 00 00 81 00 00 10
+000010 08 00 45 00 00 22 00 01 00 00 3f 11 91 c7 32 00
+000020 00 01 b8 00 00 02 00 64 00 c8 00 0e 0b 9b 58 58
+000030 58 58 58 58
diff --git a/dep/pipeline/u100_003/pcap_files/out_23.txt b/dep/pipeline/u100_003/pcap_files/out_23.txt
new file mode 100644
index 00000000..7340bf8c
--- /dev/null
+++ b/dep/pipeline/u100_003/pcap_files/out_23.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 81 00 00 10
+000010 81 00 00 11 08 00 45 00 00 22 00 01 00 00 40 11
+000020 90 c6 32 00 00 01 b8 00 00 03 00 64 00 c8 00 0e
+000030 0b 9b 58 58 58 58 58 58
diff --git a/dep/pipeline/u100_003/pcap_files/out_24.txt b/dep/pipeline/u100_003/pcap_files/out_24.txt
new file mode 100644
index 00000000..653eb24e
--- /dev/null
+++ b/dep/pipeline/u100_003/pcap_files/out_24.txt
@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 c1 c2 c3 c4 00 00 d1 d2 d3 d4 00 00 08 00 45 00
+000010 00 22 00 01 00 00 3f 11 91 c5 32 00 00 01 b8 00
+000020 00 04 00 64 00 c8 00 0e 0b 9b 58 58 58 58 58 58
diff --git a/dep/pipeline/u100_003/pcap_files/out_31.txt b/dep/pipeline/u100_003/pcap_files/out_31.txt
new file mode 100644
index 00000000..2d1ac78d
--- /dev/null
+++ b/dep/pipeline/u100_003/pcap_files/out_31.txt
@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 22 00 01 00 00 40 01 90 d8 32 00 00 01 b8 00
+000020 00 01 00 00 f6 f6 00 00 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/u100_003/pcap_files/out_32.txt b/dep/pipeline/u100_003/pcap_files/out_32.txt
new file mode 100644
index 00000000..ad020e55
--- /dev/null
+++ b/dep/pipeline/u100_003/pcap_files/out_32.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 a1 a2 a3 a4 00 00 b1 b2 b3 b4 00 00 81 00 00 10
+000010 08 00 45 00 00 22 00 01 00 00 3f 01 91 d7 32 00
+000020 00 01 b8 00 00 02 03 00 f3 f6 00 00 00 00 58 58
+000030 58 58 58 58
diff --git a/dep/pipeline/u100_003/pcap_files/out_33.txt b/dep/pipeline/u100_003/pcap_files/out_33.txt
new file mode 100644
index 00000000..3c1fe2a4
--- /dev/null
+++ b/dep/pipeline/u100_003/pcap_files/out_33.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 81 00 00 10
+000010 81 00 00 11 08 00 45 00 00 22 00 01 00 00 40 01
+000020 90 d6 32 00 00 01 b8 00 00 03 03 01 f3 f5 00 00
+000030 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/u100_003/pcap_files/out_34.txt b/dep/pipeline/u100_003/pcap_files/out_34.txt
new file mode 100644
index 00000000..84d6e39f
--- /dev/null
+++ b/dep/pipeline/u100_003/pcap_files/out_34.txt
@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 c1 c2 c3 c4 00 00 d1 d2 d3 d4 00 00 08 00 45 00
+000010 00 22 00 01 00 00 3f 01 91 d5 32 00 00 01 b8 00
+000020 00 04 03 02 f3 f4 00 00 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/u100_003/pcap_files/out_41.txt b/dep/pipeline/u100_003/pcap_files/out_41.txt
new file mode 100644
index 00000000..3f987ce0
--- /dev/null
+++ b/dep/pipeline/u100_003/pcap_files/out_41.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 08 00 45 00
+000010 00 24 00 01 00 00 ff 02 d1 d4 32 00 00 01 b8 00
+000020 00 01 11 10 8d 8e 00 00 00 00 58 58 58 58 58 58
+000030 58 58
diff --git a/dep/pipeline/u100_003/pcap_files/out_42.txt b/dep/pipeline/u100_003/pcap_files/out_42.txt
new file mode 100644
index 00000000..1f4c1819
--- /dev/null
+++ b/dep/pipeline/u100_003/pcap_files/out_42.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 a1 a2 a3 a4 00 00 b1 b2 b3 b4 00 00 81 00 00 10
+000010 08 00 45 00 00 24 00 01 00 00 fe 02 d2 d3 32 00
+000020 00 01 b8 00 00 02 11 20 8d 7e 00 00 00 00 58 58
+000030 58 58 58 58 58 58
diff --git a/dep/pipeline/u100_003/pcap_files/out_43.txt b/dep/pipeline/u100_003/pcap_files/out_43.txt
new file mode 100644
index 00000000..fc2553a4
--- /dev/null
+++ b/dep/pipeline/u100_003/pcap_files/out_43.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 11 22 33 44 55 66 81 00 00 10
+000010 81 00 00 11 08 00 45 00 00 24 00 01 00 00 ff 02
+000020 d1 d2 32 00 00 01 b8 00 00 03 11 30 8d 6e 00 00
+000030 00 00 58 58 58 58 58 58 58 58
diff --git a/dep/pipeline/u100_003/pcap_files/out_44.txt b/dep/pipeline/u100_003/pcap_files/out_44.txt
new file mode 100644
index 00000000..db311d12
--- /dev/null
+++ b/dep/pipeline/u100_003/pcap_files/out_44.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 c1 c2 c3 c4 00 00 d1 d2 d3 d4 00 00 08 00 45 00
+000010 00 24 00 01 00 00 fe 02 d2 d1 32 00 00 01 b8 00
+000020 00 04 11 40 8d 5e 00 00 00 00 58 58 58 58 58 58
+000030 58 58
diff --git a/dep/pipeline/u100_003/pcap_files/out_51.txt b/dep/pipeline/u100_003/pcap_files/out_51.txt
new file mode 100644
index 00000000..db5b6106
--- /dev/null
+++ b/dep/pipeline/u100_003/pcap_files/out_51.txt
@@ -0,0 +1,13 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 86 dd 60 00
+000010 00 00 00 1a 06 40 ab cd ab cd ab cd ab cd ab cd
+000020 ab cd ab cd 00 01 12 34 12 34 12 34 12 34 12 34
+000030 12 34 12 34 00 01 00 64 00 c8 00 00 00 00 00 00
+000040 00 00 50 02 20 00 53 9a 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/u100_003/pcap_files/out_52.txt b/dep/pipeline/u100_003/pcap_files/out_52.txt
new file mode 100644
index 00000000..3a6c5158
--- /dev/null
+++ b/dep/pipeline/u100_003/pcap_files/out_52.txt
@@ -0,0 +1,13 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 a1 a2 a3 a4 00 00 b1 b2 b3 b4 00 00 86 dd 60 00
+000010 00 00 00 1a 06 3f ab cd ab cd ab cd ab cd ab cd
+000020 ab cd ab cd 00 01 12 34 12 34 12 34 12 34 12 34
+000030 12 34 12 34 00 02 00 64 00 c8 00 00 00 00 00 00
+000040 00 00 50 02 20 00 53 9a 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/u100_003/pcap_files/out_53.txt b/dep/pipeline/u100_003/pcap_files/out_53.txt
new file mode 100644
index 00000000..0f06acdd
--- /dev/null
+++ b/dep/pipeline/u100_003/pcap_files/out_53.txt
@@ -0,0 +1,13 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 86 dd 60 00
+000010 00 00 00 1a 06 40 ab cd ab cd ab cd ab cd ab cd
+000020 ab cd ab cd 00 01 12 34 12 34 12 34 12 34 12 34
+000030 12 34 12 34 00 03 00 64 00 c8 00 00 00 00 00 00
+000040 00 00 50 02 20 00 53 9a 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/u100_003/pcap_files/out_54.txt b/dep/pipeline/u100_003/pcap_files/out_54.txt
new file mode 100644
index 00000000..c3fb1b18
--- /dev/null
+++ b/dep/pipeline/u100_003/pcap_files/out_54.txt
@@ -0,0 +1,13 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 c1 c2 c3 c4 00 00 d1 d2 d3 d4 00 00 86 dd 60 00
+000010 00 00 00 1a 06 3f ab cd ab cd ab cd ab cd ab cd
+000020 ab cd ab cd 00 01 12 34 12 34 12 34 12 34 12 34
+000030 12 34 12 34 00 04 00 64 00 c8 00 00 00 00 00 00
+000040 00 00 50 02 20 00 53 9a 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/u100_003/readme.md b/dep/pipeline/u100_003/readme.md
new file mode 100644
index 00000000..78260045
--- /dev/null
+++ b/dep/pipeline/u100_003/readme.md
@@ -0,0 +1,15 @@
+Test Case: test_u100_003
+-----------------------
+
+ Scenario being tested:
+ In this usecase, we are testing the action selector feature for various type of packets.
+
+ Description:
+ The test case receives various type of packets like IPv4, IPv6, TCP, UDP, ICMP, IGMP.
+ Action profile is conconfigured to send the packet a particular port, perform l3
+ switching, and to drop the packets. Different type of packets have different match
+ fields. Also packet validation is also performed.
+
+ Verification:
+ The packet verification for the testcase should happen as per action selector
+ configuration.
diff --git a/dep/pipeline/u100_003/table_1.txt b/dep/pipeline/u100_003/table_1.txt
new file mode 100644
index 00000000..9248f351
--- /dev/null
+++ b/dep/pipeline/u100_003/table_1.txt
@@ -0,0 +1,6 @@
+
+// match <ipv4_dst_add>
+match 0xc800000a action set_nexthop nexthop 1
+match 0xc800000b action set_nexthop nexthop 2
+match 0xc800000c action set_nexthop nexthop 3
+match 0xc800000d action set_nexthop nexthop 4
diff --git a/dep/pipeline/u100_003/table_2.txt b/dep/pipeline/u100_003/table_2.txt
new file mode 100644
index 00000000..86a3acc7
--- /dev/null
+++ b/dep/pipeline/u100_003/table_2.txt
@@ -0,0 +1,6 @@
+
+// match <ipv4_src_add> <ipv4_dst_add>
+match 0x6400000a 0xd800000a action set_nexthop nexthop 1
+match 0x6400000b 0xd800000a action set_nexthop nexthop 2
+match 0x6400000c 0xd800000a action set_nexthop nexthop 3
+match 0x6400000d 0xd800000a action set_nexthop nexthop 4
diff --git a/dep/pipeline/u100_003/table_3.txt b/dep/pipeline/u100_003/table_3.txt
new file mode 100644
index 00000000..4c760e4c
--- /dev/null
+++ b/dep/pipeline/u100_003/table_3.txt
@@ -0,0 +1,28 @@
+
+// ICMP Protocol
+// match <ipv4_src_add> <ipv4_dst_add> <ipv4_protocol_type> <icmp_type_code> <icmp_checksum>
+match 0x32000001 0xb8000001 0x1 0x0000 0xf6f6 action set_nexthop nexthop 1
+match 0x32000001 0xb8000002 0x1 0x0300 0xf3f6 action set_nexthop nexthop 2
+match 0x32000001 0xb8000003 0x1 0x0301 0xf3f5 action set_nexthop nexthop 3
+match 0x32000001 0xb8000004 0x1 0x0302 0xf3f4 action set_nexthop nexthop 4
+
+// IGMP Protocol
+// match <ipv4_src_add> <ipv4_dst_add> <ipv4_protocol_type> <igmp_type_max_response_time> <igmp_checksum>
+match 0x32000001 0xb8000001 0x2 0x1110 0x8d8e action set_nexthop nexthop 1
+match 0x32000001 0xb8000002 0x2 0x1120 0x8d7e action set_nexthop nexthop 2
+match 0x32000001 0xb8000003 0x2 0x1130 0x8d6e action set_nexthop nexthop 3
+match 0x32000001 0xb8000004 0x2 0x1140 0x8d5e action set_nexthop nexthop 4
+
+// TCP Protocol
+// match <ipv4_src_add> <ipv4_dst_add> <ipv4_protocol_type> <tcp_src_port> <tcp_dst_port>
+match 0x32000001 0xb8000001 0x6 0x0064 0x00c8 action set_nexthop nexthop 1
+match 0x32000001 0xb8000002 0x6 0x0064 0x00c8 action set_nexthop nexthop 2
+match 0x32000001 0xb8000003 0x6 0x0064 0x00c8 action set_nexthop nexthop 3
+match 0x32000001 0xb8000004 0x6 0x0064 0x00c8 action set_nexthop nexthop 4
+
+// UDP Protocol
+// match <ipv4_src_add> <ipv4_dst_add> <ipv4_protocol_type> <udp_src_port> <udp_dst_port>
+match 0x32000001 0xb8000001 0x11 0x0064 0x00c8 action set_nexthop nexthop 1
+match 0x32000001 0xb8000002 0x11 0x0064 0x00c8 action set_nexthop nexthop 2
+match 0x32000001 0xb8000003 0x11 0x0064 0x00c8 action set_nexthop nexthop 3
+match 0x32000001 0xb8000004 0x11 0x0064 0x00c8 action set_nexthop nexthop 4
diff --git a/dep/pipeline/u100_003/table_4.txt b/dep/pipeline/u100_003/table_4.txt
new file mode 100644
index 00000000..54acd6d5
--- /dev/null
+++ b/dep/pipeline/u100_003/table_4.txt
@@ -0,0 +1,5 @@
+match 0 action nexthop_1_set_group_id group_id 0
+match 1 action nexthop_1_set_group_id group_id 1
+match 2 action nexthop_1_set_group_id group_id 2
+match 3 action nexthop_1_set_group_id group_id 3
+match 4 action nexthop_1_set_group_id group_id 4
diff --git a/dep/pipeline/u100_003/table_5.txt b/dep/pipeline/u100_003/table_5.txt
new file mode 100644
index 00000000..340b4571
--- /dev/null
+++ b/dep/pipeline/u100_003/table_5.txt
@@ -0,0 +1,6 @@
+
+// match <dst_addr_hi> <dst_addr_lo>
+match 0x1234123412341234 0x1234123412340001 action set_nexthop nexthop 0x1
+match 0x1234123412341234 0x1234123412340002 action set_nexthop nexthop 0x2
+match 0x1234123412341234 0x1234123412340003 action set_nexthop nexthop 0x3
+match 0x1234123412341234 0x1234123412340004 action set_nexthop nexthop 0x4
diff --git a/dep/pipeline/u100_003/table_6.txt b/dep/pipeline/u100_003/table_6.txt
new file mode 100644
index 00000000..b8717984
--- /dev/null
+++ b/dep/pipeline/u100_003/table_6.txt
@@ -0,0 +1,14 @@
+// Nexthop group #0 (Single member)
+group 0 member 0 weight 1
+
+// Nexthop group #0 (Single member)
+group 1 member 1 weight 1
+
+// Nexthop group #0 (Single member)
+group 2 member 2 weight 1
+
+// Nexthop group #0 (Single member)
+group 3 member 3 weight 1
+
+// Nexthop group #0 (Single member)
+group 4 member 4 weight 1
diff --git a/dep/pipeline/u100_003/table_7.txt b/dep/pipeline/u100_003/table_7.txt
new file mode 100644
index 00000000..73337c22
--- /dev/null
+++ b/dep/pipeline/u100_003/table_7.txt
@@ -0,0 +1,7 @@
+
+// match <Ingress_nexthop_id>
+match 0x0000 action drop
+match 0x0001 action send port 0
+match 0x0002 action l3_switch port 1 new_mac_da 0xa1a2a3a40000 new_mac_sa 0xb1b2b3b40000
+match 0x0003 action send port 2
+match 0x0004 action l3_switch port 3 new_mac_da 0xc1c2c3c40000 new_mac_sa 0xd1d2d3d40000
diff --git a/dep/pipeline/u100_003/u100_003.cli b/dep/pipeline/u100_003/u100_003.cli
new file mode 100644
index 00000000..4dd3466f
--- /dev/null
+++ b/dep/pipeline/u100_003/u100_003.cli
@@ -0,0 +1,42 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/u100_003/u100_003.spec /tmp/pipeline/u100_003/u100_003.c
+pipeline libbuild /tmp/pipeline/u100_003/u100_003.c /tmp/pipeline/u100_003/u100_003.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/u100_003/u100_003.so io /tmp/pipeline/u100_003/ethdev.io numa 0
+
+pipeline PIPELINE0 table ipv4_host_1 add /tmp/pipeline/u100_003/table_1.txt
+
+pipeline PIPELINE0 table ipv4_host_2 add /tmp/pipeline/u100_003/table_2.txt
+
+pipeline PIPELINE0 table ipv4_host_3 add /tmp/pipeline/u100_003/table_3.txt
+
+pipeline PIPELINE0 table ipv6_host add /tmp/pipeline/u100_003/table_5.txt
+
+pipeline PIPELINE0 table nexthop add /tmp/pipeline/u100_003/table_4.txt
+
+pipeline PIPELINE0 selector nexthop_1_group_table group add
+pipeline PIPELINE0 selector nexthop_1_group_table group add
+pipeline PIPELINE0 selector nexthop_1_group_table group add
+pipeline PIPELINE0 selector nexthop_1_group_table group add
+pipeline PIPELINE0 selector nexthop_1_group_table group add
+
+pipeline PIPELINE0 selector nexthop_1_group_table group member add /tmp/pipeline/u100_003/table_6.txt
+
+pipeline PIPELINE0 table nexthop_1_member_table add /tmp/pipeline/u100_003/table_7.txt
+
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/u100_003/u100_003.spec b/dep/pipeline/u100_003/u100_003.spec
new file mode 100644
index 00000000..d3fd4d00
--- /dev/null
+++ b/dep/pipeline/u100_003/u100_003.spec
@@ -0,0 +1,407 @@
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+struct ipv4_h {
+ bit<8> version_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_frag_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+struct ipv6_h {
+ bit<32> version_traffic_class_flow_label
+ bit<16> payload_len
+ bit<8> next_hdr
+ bit<8> hop_limit
+ bit<64> src_addr_hi
+ bit<64> src_addr_lo
+ bit<64> dst_addr_hi
+ bit<64> dst_addr_lo
+}
+
+struct icmp_h {
+ bit<16> type_code
+ bit<16> checksum
+}
+
+struct igmp_h {
+ bit<16> type_code
+ bit<16> checksum
+}
+
+struct tcp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<32> seq_no
+ bit<32> ack_no
+ bit<8> data_offset_res
+ bit<8> flags
+ bit<16> window
+ bit<16> checksum
+ bit<16> urgent_ptr
+}
+
+struct udp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<16> len
+ bit<16> checksum
+}
+
+struct cksum_state_t {
+ bit<16> state_0
+}
+
+struct vlan_tag_h {
+ bit<16> pcp_cfi_vid
+ bit<16> ether_type
+}
+
+struct l3_switch_arg_t {
+ bit<32> port
+ bit<48> new_mac_da
+ bit<48> new_mac_sa
+}
+
+struct nexthop_1_set_group_id_arg_t {
+ bit<32> group_id
+}
+
+struct send_arg_t {
+ bit<32> port
+}
+
+struct set_nexthop_arg_t {
+ bit<16> nexthop
+}
+
+header ethernet instanceof ethernet_h
+header vlan_tag_0 instanceof vlan_tag_h
+header vlan_tag_1 instanceof vlan_tag_h
+
+header ipv4 instanceof ipv4_h
+header ipv6 instanceof ipv6_h
+header icmp instanceof icmp_h
+header igmp instanceof igmp_h
+header tcp instanceof tcp_h
+header udp instanceof udp_h
+header cksum_state instanceof cksum_state_t
+
+struct my_ingress_metadata_t {
+ bit<32> psa_ingress_parser_input_metadata_ingress_port
+ bit<32> psa_ingress_parser_input_metadata_packet_path
+ bit<32> psa_egress_parser_input_metadata_egress_port
+ bit<32> psa_egress_parser_input_metadata_packet_path
+ bit<32> psa_ingress_input_metadata_ingress_port
+ bit<32> psa_ingress_input_metadata_packet_path
+ bit<64> psa_ingress_input_metadata_ingress_timestamp
+ bit<8> psa_ingress_input_metadata_parser_error
+ bit<8> psa_ingress_output_metadata_class_of_service
+ bit<8> psa_ingress_output_metadata_clone
+ bit<16> psa_ingress_output_metadata_clone_session_id
+ bit<8> psa_ingress_output_metadata_drop
+ bit<8> psa_ingress_output_metadata_resubmit
+ bit<32> psa_ingress_output_metadata_multicast_group
+ bit<32> psa_ingress_output_metadata_egress_port
+ bit<8> psa_egress_input_metadata_class_of_service
+ bit<32> psa_egress_input_metadata_egress_port
+ bit<32> psa_egress_input_metadata_packet_path
+ bit<16> psa_egress_input_metadata_instance
+ bit<64> psa_egress_input_metadata_egress_timestamp
+ bit<8> psa_egress_input_metadata_parser_error
+ bit<32> psa_egress_deparser_input_metadata_egress_port
+ bit<8> psa_egress_output_metadata_clone
+ bit<16> psa_egress_output_metadata_clone_session_id
+ bit<8> psa_egress_output_metadata_drop
+ bit<32> local_metadata__l4_lookup_ipv4_src_addr0
+ bit<32> local_metadata__l4_lookup_ipv4_dst_addr1
+ bit<8> local_metadata__l4_lookup_ipv4_protocol2
+ bit<16> local_metadata__l4_lookup_word_13
+ bit<16> local_metadata__l4_lookup_word_24
+ bit<8> local_metadata__first_frag5
+ bit<8> local_metadata__ipv4_checksum_err6
+ bit<16> Ingress_nexthop_id_0
+ bit<8> Ingress_ttl_dec_0
+ bit<32> Ingress_hash_0
+ bit<32> Ingress_nexthop_1_group_id
+ bit<32> Ingress_nexthop_1_member_id
+ bit<16> IngressParser_parser_tmp
+ bit<8> IngressParser_parser_tmp_1
+}
+metadata instanceof my_ingress_metadata_t
+
+struct psa_ingress_output_metadata_t {
+ bit<8> class_of_service
+ bit<8> clone
+ bit<16> clone_session_id
+ bit<8> drop
+ bit<8> resubmit
+ bit<32> multicast_group
+ bit<32> egress_port
+}
+
+struct psa_egress_output_metadata_t {
+ bit<8> clone
+ bit<16> clone_session_id
+ bit<8> drop
+}
+
+struct psa_egress_deparser_input_metadata_t {
+ bit<32> egress_port
+}
+
+action NoAction args none {
+ return
+}
+
+action send args instanceof send_arg_t {
+ mov m.psa_ingress_output_metadata_egress_port t.port
+ mov m.Ingress_ttl_dec_0 0x0
+ return
+}
+
+action drop args none {
+ mov m.psa_ingress_output_metadata_drop 1
+ return
+}
+
+action l3_switch args instanceof l3_switch_arg_t {
+ mov h.ethernet.dst_addr t.new_mac_da
+ mov h.ethernet.src_addr t.new_mac_sa
+ mov m.Ingress_ttl_dec_0 0x1
+ mov m.psa_ingress_output_metadata_egress_port t.port
+ return
+}
+
+action set_nexthop args instanceof set_nexthop_arg_t {
+ mov m.Ingress_nexthop_id_0 t.nexthop
+ return
+}
+
+action nexthop_1_set_group_id args instanceof nexthop_1_set_group_id_arg_t {
+ mov m.Ingress_nexthop_1_group_id t.group_id
+ return
+}
+
+table ipv4_host_1 {
+ key {
+ h.ipv4.dst_addr exact
+ }
+ actions {
+ set_nexthop
+ NoAction
+ }
+ default_action NoAction args none
+ size 0x400
+}
+
+
+table ipv4_host_2 {
+ key {
+ h.ipv4.src_addr exact
+ h.ipv4.dst_addr exact
+ }
+ actions {
+ set_nexthop
+ NoAction
+ }
+ default_action NoAction args none
+ size 0x10000
+}
+
+
+table ipv4_host_3 {
+ key {
+ m.local_metadata__l4_lookup_ipv4_src_addr0 exact
+ m.local_metadata__l4_lookup_ipv4_dst_addr1 exact
+ m.local_metadata__l4_lookup_ipv4_protocol2 exact
+ m.local_metadata__l4_lookup_word_13 exact
+ m.local_metadata__l4_lookup_word_24 exact
+ }
+ actions {
+ set_nexthop
+ NoAction
+ }
+ default_action NoAction args none
+ size 0x10000
+}
+
+
+table ipv6_host {
+ key {
+ h.ipv6.dst_addr_hi exact
+ h.ipv6.dst_addr_lo exact
+ }
+ actions {
+ set_nexthop
+ NoAction
+ }
+ default_action NoAction args none
+ size 0x8000
+}
+
+
+table nexthop {
+ key {
+ m.Ingress_nexthop_id_0 exact
+ }
+ actions {
+ nexthop_1_set_group_id
+ NoAction
+ }
+ default_action NoAction args none
+ size 0x4000
+}
+
+
+table nexthop_1_member_table {
+ key {
+ m.Ingress_nexthop_1_member_id exact
+ }
+ actions {
+ send
+ drop
+ l3_switch
+ NoAction
+ }
+ default_action NoAction args none
+ size 0x4000
+}
+
+
+selector nexthop_1_group_table {
+ group_id m.Ingress_nexthop_1_group_id
+ selector {
+ m.Ingress_hash_0
+ }
+ member_id m.Ingress_nexthop_1_member_id
+ n_groups_max 1024
+ n_members_per_group_max 65536
+}
+
+apply {
+ rx m.psa_ingress_input_metadata_ingress_port
+ mov m.psa_ingress_output_metadata_drop 0x0
+ extract h.ethernet
+ jmpeq MYIP_PARSE_VLAN_TAG h.ethernet.ether_type 0x8100
+ jmpeq MYIP_PARSE_IPV4 h.ethernet.ether_type 0x800
+ jmpeq MYIP_PARSE_IPV6 h.ethernet.ether_type 0x86dd
+ jmp MYIP_ACCEPT
+ MYIP_PARSE_VLAN_TAG : extract h.vlan_tag_0
+ jmpeq MYIP_PARSE_VLAN_TAG1 h.vlan_tag_0.ether_type 0x8100
+ jmpeq MYIP_PARSE_IPV4 h.vlan_tag_0.ether_type 0x800
+ jmp MYIP_ACCEPT
+ MYIP_PARSE_VLAN_TAG1 : extract h.vlan_tag_1
+ jmpeq MYIP_PARSE_VLAN_TAG2 h.vlan_tag_1.ether_type 0x8100
+ jmpeq MYIP_PARSE_IPV4 h.vlan_tag_1.ether_type 0x800
+ jmp MYIP_ACCEPT
+ MYIP_PARSE_VLAN_TAG2 : mov m.psa_ingress_input_metadata_parser_error 0x3
+ jmp MYIP_ACCEPT
+ MYIP_PARSE_IPV4 : extract h.ipv4
+ mov h.cksum_state.state_0 0x0
+ ckadd h.cksum_state.state_0 h.ipv4
+ cksub h.cksum_state.state_0 h.ipv4.hdr_checksum
+ mov m.local_metadata__l4_lookup_ipv4_dst_addr1 h.ipv4.dst_addr
+ mov m.local_metadata__l4_lookup_ipv4_src_addr0 h.ipv4.src_addr
+ mov m.local_metadata__l4_lookup_ipv4_protocol2 h.ipv4.protocol
+ jmpeq MYIP_PARSE_IPV4_NO_OPTIONS h.ipv4.version_ihl 0x45
+ jmp MYIP_ACCEPT
+ MYIP_PARSE_IPV4_NO_OPTIONS : mov m.IngressParser_parser_tmp h.cksum_state.state_0
+ jmpeq LABEL_1TRUE m.IngressParser_parser_tmp h.ipv4.hdr_checksum
+ mov m.IngressParser_parser_tmp_1 0x0
+ jmp LABEL_1END
+ LABEL_1TRUE : mov m.IngressParser_parser_tmp_1 0x1
+ LABEL_1END : jmpneq LABEL_2END m.IngressParser_parser_tmp_1 0
+ mov m.psa_ingress_input_metadata_parser_error 0x7
+ jmp MYIP_ACCEPT
+ LABEL_2END : jmpneq MYIP_PARSE_IPV4_NO_OPTIONS_0 h.ipv4.flags_frag_offset 0x0
+ jmpneq MYIP_PARSE_IPV4_NO_OPTIONS_0 h.ipv4.protocol 0x1
+ jmp MYIP_PARSE_ICMP
+ MYIP_PARSE_IPV4_NO_OPTIONS_0 : jmpneq MYIP_PARSE_IPV4_NO_OPTIONS_1 h.ipv4.flags_frag_offset 0x0
+ jmpneq MYIP_PARSE_IPV4_NO_OPTIONS_1 h.ipv4.protocol 0x2
+ jmp MYIP_PARSE_IGMP
+ MYIP_PARSE_IPV4_NO_OPTIONS_1 : jmpneq MYIP_PARSE_IPV4_NO_OPTIONS_2 h.ipv4.flags_frag_offset 0x0
+ jmpneq MYIP_PARSE_IPV4_NO_OPTIONS_2 h.ipv4.protocol 0x6
+ jmp MYIP_PARSE_TCP
+ MYIP_PARSE_IPV4_NO_OPTIONS_2 : jmpneq MYIP_PARSE_IPV4_NO_OPTIONS_3 h.ipv4.flags_frag_offset 0x0
+ jmpneq MYIP_PARSE_IPV4_NO_OPTIONS_3 h.ipv4.protocol 0x11
+ jmp MYIP_PARSE_UDP
+ MYIP_PARSE_IPV4_NO_OPTIONS_3 : jmpneq MYIP_ACCEPT h.ipv4.flags_frag_offset 0x0
+ jmp MYIP_PARSE_FIRST_FRAGMENT
+ jmp MYIP_ACCEPT
+ MYIP_PARSE_IPV6 : extract h.ipv6
+ jmpeq MYIP_PARSE_ICMP h.ipv6.next_hdr 0x1
+ jmpeq MYIP_PARSE_IGMP h.ipv6.next_hdr 0x2
+ jmpeq MYIP_PARSE_TCP h.ipv6.next_hdr 0x6
+ jmpeq MYIP_PARSE_UDP h.ipv6.next_hdr 0x11
+ jmp MYIP_PARSE_FIRST_FRAGMENT
+ MYIP_PARSE_UDP : extract h.udp
+ mov m.local_metadata__l4_lookup_word_13 h.udp.src_port
+ mov m.local_metadata__l4_lookup_word_24 h.udp.dst_port
+ jmp MYIP_PARSE_FIRST_FRAGMENT
+ MYIP_PARSE_TCP : extract h.tcp
+ mov m.local_metadata__l4_lookup_word_13 h.tcp.src_port
+ mov m.local_metadata__l4_lookup_word_24 h.tcp.dst_port
+ jmp MYIP_PARSE_FIRST_FRAGMENT
+ MYIP_PARSE_IGMP : extract h.igmp
+ mov m.local_metadata__l4_lookup_word_13 h.igmp.type_code
+ mov m.local_metadata__l4_lookup_word_24 h.igmp.checksum
+ jmp MYIP_PARSE_FIRST_FRAGMENT
+ MYIP_PARSE_ICMP : extract h.icmp
+ mov m.local_metadata__l4_lookup_word_13 h.icmp.type_code
+ mov m.local_metadata__l4_lookup_word_24 h.icmp.checksum
+ MYIP_PARSE_FIRST_FRAGMENT : mov m.local_metadata__first_frag5 0x1
+ MYIP_ACCEPT : mov m.Ingress_nexthop_id_0 0x0
+ mov m.Ingress_ttl_dec_0 0x0
+ mov m.Ingress_hash_0 0x0
+ jmpnv LABEL_3END h.ipv4
+ jmpnv LABEL_3END h.ipv6
+ mov m.local_metadata__first_frag5 0x0
+ LABEL_3END : jmpnv LABEL_4FALSE h.ipv4
+ jmplt LABEL_4END h.ipv4.ttl 0x2
+ table ipv4_host_1
+ jmpnh LABEL_6FALSE
+ jmp LABEL_4END
+ LABEL_6FALSE : table ipv4_host_2
+ jmpnh LABEL_7FALSE
+ jmp LABEL_4END
+ LABEL_7FALSE : table ipv4_host_3
+ jmp LABEL_4END
+ LABEL_4FALSE : jmpnv LABEL_4END h.ipv6
+ jmplt LABEL_4END h.ipv6.hop_limit 0x2
+ table ipv6_host
+ LABEL_4END : mov m.Ingress_nexthop_1_member_id 0x0
+ mov m.Ingress_nexthop_1_group_id 0x0
+ table nexthop
+ table nexthop_1_group_table
+ table nexthop_1_member_table
+ jmpnv LABEL_10FALSE h.ipv4
+ cksub h.cksum_state.state_0 h.ipv4.ttl
+ sub h.ipv4.ttl m.Ingress_ttl_dec_0
+ ckadd h.cksum_state.state_0 h.ipv4.ttl
+ mov h.ipv4.hdr_checksum h.cksum_state.state_0
+ jmp LABEL_10END
+ LABEL_10FALSE : jmpnv LABEL_10END h.ipv6
+ sub h.ipv6.hop_limit m.Ingress_ttl_dec_0
+ LABEL_10END : jmpneq LABEL_DROP m.psa_ingress_output_metadata_drop 0x0
+ emit h.ethernet
+ emit h.vlan_tag_0
+ emit h.vlan_tag_1
+ emit h.ipv4
+ emit h.ipv6
+ emit h.icmp
+ emit h.igmp
+ emit h.tcp
+ emit h.udp
+ tx m.psa_ingress_output_metadata_egress_port
+ LABEL_DROP : drop
+}
\ No newline at end of file
diff --git a/dep/pipeline/validate_001/ethdev.io b/dep/pipeline/validate_001/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/validate_001/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/validate_001/pcap_files/in_1.txt b/dep/pipeline/validate_001/pcap_files/in_1.txt
new file mode 100644
index 00000000..e9abf4d3
--- /dev/null
+++ b/dep/pipeline/validate_001/pcap_files/in_1.txt
@@ -0,0 +1,22 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 00 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 aa bb cc de aa bb cc df 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 00 06 4e b5 64 00 00 0a aa bb
+000020 cc dd 00 64 00 c8 aa bb cc de aa bb cc df 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 2
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 aa bb cc de aa bb cc df 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/validate_001/pcap_files/out_1.txt b/dep/pipeline/validate_001/pcap_files/out_1.txt
new file mode 100644
index 00000000..7fbd9ce0
--- /dev/null
+++ b/dep/pipeline/validate_001/pcap_files/out_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 50 06 4e b5 64 00 00 0a aa bb
+000020 cc dd 00 64 00 c8 aa bb cc de aa bb cc df 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
+# Packet 1
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 3f 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 aa bb cc de aa bb cc df 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/validate_001/readme.md b/dep/pipeline/validate_001/readme.md
new file mode 100644
index 00000000..4c16be9a
--- /dev/null
+++ b/dep/pipeline/validate_001/readme.md
@@ -0,0 +1,14 @@
+Test Case: validate_001
+-----------------------
+
+ Instructions being tested:
+ validate h.header
+
+ Description:
+ For the received packet, if its ttl is greater than 0x00, decrement it and transmit it back on the same port. Else if i
+ ttl is zero and its destination ipv4 address is 0xaabbccdd, update the ttl value as 0x50 and transmit the packet back on
+ the same port. Drop all other packets.
+
+ Verification:
+ For packets received with ttl value grater than 0x00, ttl should be decremented by one. For packets received with ttl value
+ equal to 0x00 and destination ipv4 address as 0xaabbccdd, ttl should be updated to 0x50. All other packets should be dropped.
diff --git a/dep/pipeline/validate_001/table.txt b/dep/pipeline/validate_001/table.txt
new file mode 100644
index 00000000..e6a1f0a7
--- /dev/null
+++ b/dep/pipeline/validate_001/table.txt
@@ -0,0 +1 @@
+match 0x00 action drop
diff --git a/dep/pipeline/validate_001/validate_001.cli b/dep/pipeline/validate_001/validate_001.cli
new file mode 100644
index 00000000..ce923e3d
--- /dev/null
+++ b/dep/pipeline/validate_001/validate_001.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/validate_001/validate_001.spec /tmp/pipeline/validate_001/validate_001.c
+pipeline libbuild /tmp/pipeline/validate_001/validate_001.c /tmp/pipeline/validate_001/validate_001.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/validate_001/validate_001.so io /tmp/pipeline/validate_001/ethdev.io numa 0
+pipeline PIPELINE0 table validate_001 add /tmp/pipeline/validate_001/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/validate_001/validate_001.spec b/dep/pipeline/validate_001/validate_001.spec
new file mode 100644
index 00000000..c553c277
--- /dev/null
+++ b/dep/pipeline/validate_001/validate_001.spec
@@ -0,0 +1,86 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ipv4 instanceof ipv4_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+action validate_001_action args none {
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table validate_001 {
+ key {
+ h.ipv4.ttl exact
+ }
+
+ actions {
+ validate_001_action
+ drop
+ }
+
+ default_action validate_001_action args none
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ jmpgt LABEL_1 h.ipv4.ttl 0x00
+ jmpeq LABEL_0 h.ipv4.dst_addr 0xaabbccdd
+ invalidate h.ipv4
+ table validate_001
+ LABEL_0 : validate h.ipv4
+ mov h.ipv4.ttl 0x51
+ LABEL_1 : jmpnv LABEL_2 h.ipv4
+ sub h.ipv4.ttl 0x01
+ LABEL_2 : table validate_001
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/varbit_001/ethdev.io b/dep/pipeline/varbit_001/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/varbit_001/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/varbit_001/pcap_files/in_1.txt b/dep/pipeline/varbit_001/pcap_files/in_1.txt
new file mode 100644
index 00000000..fbf790a7
--- /dev/null
+++ b/dep/pipeline/varbit_001/pcap_files/in_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 46 00
+000010 00 32 00 01 00 00 40 06 55 9b 4b 00 4b 8c c8 00
+000020 00 0a c2 83 03 10 00 64 00 c8 00 00 00 00 00 00
+000030 00 00 50 02 20 00 27 11 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 1c 33 4b 00 4b 8c c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 27 11 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/varbit_001/pcap_files/out_1.txt b/dep/pipeline/varbit_001/pcap_files/out_1.txt
new file mode 100644
index 00000000..f433622c
--- /dev/null
+++ b/dep/pipeline/varbit_001/pcap_files/out_1.txt
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 46 00
+000010 00 32 00 01 00 00 40 06 55 9b 4b 00 4b 8c c8 00
+000020 00 0a c2 83 03 10 aa bb cc dd 00 00 00 00 00 00
+000030 00 00 50 02 20 00 27 11 00 00 58 58 58 58 58 58
+# Packet 1
+000000 aa bb cc dd 00 00 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 1c 33 4b 00 4b 8c c8 00
+000020 00 0a aa bb cc dd 00 00 00 00 00 00 00 00 50 02
+000030 20 00 27 11 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/varbit_001/readme.md b/dep/pipeline/varbit_001/readme.md
new file mode 100644
index 00000000..2a5cb23d
--- /dev/null
+++ b/dep/pipeline/varbit_001/readme.md
@@ -0,0 +1,13 @@
+
+Test Case: test_profile_001
+---------------------------
+
+ Description:
+ This illustrates the way to work with variable size headers. The assumed input packet is
+ Ethernet/IPv4/UDP, with the IPv4 header containing between 0 and 40 bytes of options. To
+ locate the start of the UDP header, the size of the IPv4 header needs to be detected first,
+ which is done by reading the first byte of the IPv4 header that carries the 4-bit Internet
+ Header Length (IHL) field; this read is done with the "lookahead" instruction, which does
+ not advance the extract pointer within the input packet buffer. Once the size of the IPv4
+ header options is known for the current packet, the IPv4 header is extracted by using the
+ two-argument "extract" instruction. Then the UDP header is extracted and modified.
diff --git a/dep/pipeline/varbit_001/varbit_001.cli b/dep/pipeline/varbit_001/varbit_001.cli
new file mode 100644
index 00000000..3c4394d6
--- /dev/null
+++ b/dep/pipeline/varbit_001/varbit_001.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/varbit_001/varbit_001.spec /tmp/pipeline/varbit_001/varbit_001.c
+pipeline libbuild /tmp/pipeline/varbit_001/varbit_001.c /tmp/pipeline/varbit_001/varbit_001.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/varbit_001/varbit_001.so io /tmp/pipeline/varbit_001/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/varbit_001/varbit_001.spec b/dep/pipeline/varbit_001/varbit_001.spec
new file mode 100644
index 00000000..5631f6aa
--- /dev/null
+++ b/dep/pipeline/varbit_001/varbit_001.spec
@@ -0,0 +1,90 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_top_h {
+ bit<8> ver_ihl
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+ varbit<320> options
+}
+
+struct tcp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<32> seq_num
+ bit<32> ack_num
+ bit<16> hdr_len_flags
+ bit<16> window_size
+ bit<16> checksum
+ bit<16> urg_ptr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4_top instanceof ipv4_top_h
+header ipv4 instanceof ipv4_h
+header tcp instanceof tcp_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port
+ bit<32> options_size
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+
+ // Extract the fixed size Ethernet header.
+ extract h.ethernet
+
+ // Extract the variable size IPv4 header with up to 10 options.
+ lookahead h.ipv4_top
+ mov m.options_size h.ipv4_top.ver_ihl
+ and m.options_size 0xF
+ sub m.options_size 5
+ shl m.options_size 2
+ extract h.ipv4 m.options_size
+
+ // Extract the fixed size TCP header.
+ extract h.tcp
+
+ // Modify the TCP header.
+ mov h.tcp.src_port 0xAABB
+ mov h.tcp.dst_port 0xCCDD
+
+ // Decide the output port.
+ xor m.port 1
+
+ // Emit the Ethernet, IPv4 and TCP headers.
+ emit h.ethernet
+ emit h.ipv4
+ emit h.tcp
+
+ tx m.port
+}
diff --git a/dep/pipeline/vxlan_001/ethdev.io b/dep/pipeline/vxlan_001/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/vxlan_001/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/vxlan_001/pcap_files/in_1.txt b/dep/pipeline/vxlan_001/pcap_files/in_1.txt
new file mode 100644
index 00000000..4d830793
--- /dev/null
+++ b/dep/pipeline/vxlan_001/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 00 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/vxlan_001/pcap_files/in_2.txt b/dep/pipeline/vxlan_001/pcap_files/in_2.txt
new file mode 100644
index 00000000..b3f523e7
--- /dev/null
+++ b/dep/pipeline/vxlan_001/pcap_files/in_2.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 01 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/vxlan_001/pcap_files/in_3.txt b/dep/pipeline/vxlan_001/pcap_files/in_3.txt
new file mode 100644
index 00000000..5b14f9eb
--- /dev/null
+++ b/dep/pipeline/vxlan_001/pcap_files/in_3.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 02 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/vxlan_001/pcap_files/in_4.txt b/dep/pipeline/vxlan_001/pcap_files/in_4.txt
new file mode 100644
index 00000000..19ceb4a7
--- /dev/null
+++ b/dep/pipeline/vxlan_001/pcap_files/in_4.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 aa bb cc dd 00 03 10 22 33 44 55 66 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/vxlan_001/pcap_files/out_1.txt b/dep/pipeline/vxlan_001/pcap_files/out_1.txt
new file mode 100644
index 00000000..e9709645
--- /dev/null
+++ b/dep/pipeline/vxlan_001/pcap_files/out_1.txt
@@ -0,0 +1,15 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 a0 a1 a2 a3 00 00 b0 b1 b2 b3 00 00 08 00 45 00
+000010 00 60 00 00 00 00 40 11 e8 fa c0 c1 00 00 d0 d1
+000020 00 00 e0 00 12 b5 00 4c 00 00 00 00 00 00 00 00
+000030 00 00 aa bb cc dd 00 00 10 22 33 44 55 66 08 00
+000040 45 00 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a
+000050 c8 00 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00
+000060 50 02 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/vxlan_001/pcap_files/out_2.txt b/dep/pipeline/vxlan_001/pcap_files/out_2.txt
new file mode 100644
index 00000000..e4464db4
--- /dev/null
+++ b/dep/pipeline/vxlan_001/pcap_files/out_2.txt
@@ -0,0 +1,15 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 a0 a1 a2 a3 00 01 b0 b1 b2 b3 00 01 08 00 45 00
+000010 00 60 00 00 00 00 40 11 e8 f8 c0 c1 00 01 d0 d1
+000020 00 01 e0 01 12 b5 00 4c 00 00 00 00 00 00 00 00
+000030 01 00 aa bb cc dd 00 01 10 22 33 44 55 66 08 00
+000040 45 00 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a
+000050 c8 00 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00
+000060 50 02 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/vxlan_001/pcap_files/out_3.txt b/dep/pipeline/vxlan_001/pcap_files/out_3.txt
new file mode 100644
index 00000000..63e8799b
--- /dev/null
+++ b/dep/pipeline/vxlan_001/pcap_files/out_3.txt
@@ -0,0 +1,15 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 a0 a1 a2 a3 00 02 b0 b1 b2 b3 00 02 08 00 45 00
+000010 00 60 00 00 00 00 40 11 e8 f6 c0 c1 00 02 d0 d1
+000020 00 02 e0 02 12 b5 00 4c 00 00 00 00 00 00 00 00
+000030 02 00 aa bb cc dd 00 02 10 22 33 44 55 66 08 00
+000040 45 00 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a
+000050 c8 00 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00
+000060 50 02 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/vxlan_001/pcap_files/out_4.txt b/dep/pipeline/vxlan_001/pcap_files/out_4.txt
new file mode 100644
index 00000000..96063089
--- /dev/null
+++ b/dep/pipeline/vxlan_001/pcap_files/out_4.txt
@@ -0,0 +1,15 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 a0 a1 a2 a3 00 03 b0 b1 b2 b3 00 03 08 00 45 00
+000010 00 60 00 00 00 00 40 11 e8 f4 c0 c1 00 03 d0 d1
+000020 00 03 e0 03 12 b5 00 4c 00 00 00 00 00 00 00 00
+000030 03 00 aa bb cc dd 00 03 10 22 33 44 55 66 08 00
+000040 45 00 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a
+000050 c8 00 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00
+000060 50 02 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/vxlan_001/readme.md b/dep/pipeline/vxlan_001/readme.md
new file mode 100644
index 00000000..c8af093d
--- /dev/null
+++ b/dep/pipeline/vxlan_001/readme.md
@@ -0,0 +1,12 @@
+Use Case: test_vxlan_001
+-----------------------
+
+ Instructions being used:
+ rx, extract, table, dma h.field t.field (4 level), mov m.field t.field, add h.field h.field, ckadd h.field h.field, mov h.field immediate_data, emit, tx
+
+
+ Description:
+ For a packet with matching destination MAC address, Packet is converted into Vxlan header packet. Input packet is with ethernet and IPv4 header and output packet will have outer ethernet, outer IPv4, outer UDP, outer Vxlan , ethernet and IPv4 headers. Packet details will be updated from the table entry corrosponding to the destination MAC address.
+
+ Verification:
+ Behavious as per description.
diff --git a/dep/pipeline/vxlan_001/table.txt b/dep/pipeline/vxlan_001/table.txt
new file mode 100755
index 00000000..dbadd217
--- /dev/null
+++ b/dep/pipeline/vxlan_001/table.txt
@@ -0,0 +1,4 @@
+match 0xaabbccdd0000 action vxlan_encap ethernet_dst_addr 0xa0a1a2a30000 ethernet_src_addr 0xb0b1b2b30000 ethernet_ethertype 0x0800 ipv4_ver_ihl 0x45 ipv4_diffserv 0 ipv4_total_len 50 ipv4_identification 0 ipv4_flags_offset 0 ipv4_ttl 64 ipv4_protocol 17 ipv4_hdr_checksum 0xe928 ipv4_src_addr 0xc0c10000 ipv4_dst_addr 0xd0d10000 udp_src_port 0xe000 udp_dst_port 4789 udp_length 30 udp_checksum 0 vxlan_flags 0 vxlan_reserved 0 vxlan_vni 0 vxlan_reserved2 0 port_out 0
+match 0xaabbccdd0001 action vxlan_encap ethernet_dst_addr 0xa0a1a2a30001 ethernet_src_addr 0xb0b1b2b30001 ethernet_ethertype 0x0800 ipv4_ver_ihl 0x45 ipv4_diffserv 0 ipv4_total_len 50 ipv4_identification 0 ipv4_flags_offset 0 ipv4_ttl 64 ipv4_protocol 17 ipv4_hdr_checksum 0xe926 ipv4_src_addr 0xc0c10001 ipv4_dst_addr 0xd0d10001 udp_src_port 0xe001 udp_dst_port 4789 udp_length 30 udp_checksum 0 vxlan_flags 0 vxlan_reserved 0 vxlan_vni 1 vxlan_reserved2 0 port_out 1
+match 0xaabbccdd0002 action vxlan_encap ethernet_dst_addr 0xa0a1a2a30002 ethernet_src_addr 0xb0b1b2b30002 ethernet_ethertype 0x0800 ipv4_ver_ihl 0x45 ipv4_diffserv 0 ipv4_total_len 50 ipv4_identification 0 ipv4_flags_offset 0 ipv4_ttl 64 ipv4_protocol 17 ipv4_hdr_checksum 0xe924 ipv4_src_addr 0xc0c10002 ipv4_dst_addr 0xd0d10002 udp_src_port 0xe002 udp_dst_port 4789 udp_length 30 udp_checksum 0 vxlan_flags 0 vxlan_reserved 0 vxlan_vni 2 vxlan_reserved2 0 port_out 2
+match 0xaabbccdd0003 action vxlan_encap ethernet_dst_addr 0xa0a1a2a30003 ethernet_src_addr 0xb0b1b2b30003 ethernet_ethertype 0x0800 ipv4_ver_ihl 0x45 ipv4_diffserv 0 ipv4_total_len 50 ipv4_identification 0 ipv4_flags_offset 0 ipv4_ttl 64 ipv4_protocol 17 ipv4_hdr_checksum 0xe922 ipv4_src_addr 0xc0c10003 ipv4_dst_addr 0xd0d10003 udp_src_port 0xe003 udp_dst_port 4789 udp_length 30 udp_checksum 0 vxlan_flags 0 vxlan_reserved 0 vxlan_vni 3 vxlan_reserved2 0 port_out 3
diff --git a/dep/pipeline/vxlan_001/vxlan_001.cli b/dep/pipeline/vxlan_001/vxlan_001.cli
new file mode 100755
index 00000000..20f0a40f
--- /dev/null
+++ b/dep/pipeline/vxlan_001/vxlan_001.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/vxlan_001/vxlan_001.spec /tmp/pipeline/vxlan_001/vxlan_001.c
+pipeline libbuild /tmp/pipeline/vxlan_001/vxlan_001.c /tmp/pipeline/vxlan_001/vxlan_001.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/vxlan_001/vxlan_001.so io /tmp/pipeline/vxlan_001/ethdev.io numa 0
+pipeline PIPELINE0 table vxlan_table add /tmp/pipeline/vxlan_001/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/vxlan_001/vxlan_001.py b/dep/pipeline/vxlan_001/vxlan_001.py
new file mode 100755
index 00000000..8edee64a
--- /dev/null
+++ b/dep/pipeline/vxlan_001/vxlan_001.py
@@ -0,0 +1,72 @@
+#!/usr/bin/env python2
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+from __future__ import print_function
+
+import argparse
+import os
+import re
+
+DESCRIPTION = 'Table Generator'
+
+KEY = '0xaabbccdd{0:04x}'
+ACTION = 'vxlan_encap'
+ETHERNET_HEADER = 'ethernet_dst_addr N(0xa0a1a2a3{0:04x}) ' \
+ 'ethernet_src_addr N(0xb0b1b2b3{0:04x}) ' \
+ 'ethernet_ether_type N(0x0800)'
+IPV4_HEADER = 'ipv4_ver_ihl N(0x45) ' \
+ 'ipv4_diffserv N(0) ' \
+ 'ipv4_total_len N(50) ' \
+ 'ipv4_identification N(0) ' \
+ 'ipv4_flags_offset N(0) ' \
+ 'ipv4_ttl N(64) ' \
+ 'ipv4_protocol N(17) ' \
+ 'ipv4_hdr_checksum N(0x{1:04x}) ' \
+ 'ipv4_src_addr N(0xc0c1{0:04x}) ' \
+ 'ipv4_dst_addr N(0xd0d1{0:04x})'
+UDP_HEADER = 'udp_src_port N(0xe0{0:02x}) ' \
+ 'udp_dst_port N(4789) ' \
+ 'udp_length N(30) ' \
+ 'udp_checksum N(0)'
+VXLAN_HEADER = 'vxlan_flags N(0) ' \
+ 'vxlan_reserved N(0) ' \
+ 'vxlan_vni N({0:d}) ' \
+ 'vxlan_reserved2 N(0)'
+PORT_OUT = 'port_out H({0:d})'
+
+def ipv4_header_checksum(i):
+ cksum = (0x4500 + 0x0032) + (0x0000 + 0x0000) + (0x4011 + 0x0000) + (0xc0c1 + i) + (0xd0d1 + i)
+ cksum = (cksum & 0xFFFF) + (cksum >> 16)
+ cksum = (cksum & 0xFFFF) + (cksum >> 16)
+ cksum = ~cksum & 0xFFFF
+ return cksum
+
+def table_generate(n, p):
+ for i in range(0, n):
+ print("match %s action %s %s %s %s %s %s" % (KEY.format(i),
+ ACTION,
+ ETHERNET_HEADER.format(i),
+ IPV4_HEADER.format(i, ipv4_header_checksum(i)),
+ UDP_HEADER.format(i % 256),
+ VXLAN_HEADER.format(i),
+ PORT_OUT.format(i % p)))
+
+if __name__ == '__main__':
+ parser = argparse.ArgumentParser(description=DESCRIPTION)
+
+ parser.add_argument(
+ '-n',
+ help='number of table entries (default: 65536)',
+ required=False,
+ default=65536)
+
+ parser.add_argument(
+ '-p',
+ help='number of network ports (default: 4)',
+ required=False,
+ default=4)
+
+ args = parser.parse_args()
+ table_generate(int(args.n), int(args.p))
diff --git a/dep/pipeline/vxlan_001/vxlan_001.spec b/dep/pipeline/vxlan_001/vxlan_001.spec
new file mode 100755
index 00000000..f1ff67b4
--- /dev/null
+++ b/dep/pipeline/vxlan_001/vxlan_001.spec
@@ -0,0 +1,201 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+struct udp_h {
+ bit<16> src_port
+ bit<16> dst_port
+ bit<16> length
+ bit<16> checksum
+}
+
+struct vxlan_h {
+ bit<8> flags
+ bit<24> reserved
+ bit<24> vni
+ bit<8> reserved2
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+header outer_ethernet instanceof ethernet_h
+header outer_ipv4 instanceof ipv4_h
+header outer_udp instanceof udp_h
+header outer_vxlan instanceof vxlan_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port_in
+ bit<32> port_out
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct vxlan_encap_args_t {
+ bit<48> ethernet_dst_addr
+ bit<48> ethernet_src_addr
+ bit<16> ethernet_ethertype
+ bit<8> ipv4_ver_ihl
+ bit<8> ipv4_diffserv
+ bit<16> ipv4_total_len
+ bit<16> ipv4_identification
+ bit<16> ipv4_flags_offset
+ bit<8> ipv4_ttl
+ bit<8> ipv4_protocol
+ bit<16> ipv4_hdr_checksum
+ bit<32> ipv4_src_addr
+ bit<32> ipv4_dst_addr
+ bit<16> udp_src_port
+ bit<16> udp_dst_port
+ bit<16> udp_length
+ bit<16> udp_checksum
+ bit<8> vxlan_flags
+ bit<24> vxlan_reserved
+ bit<24> vxlan_vni
+ bit<8> vxlan_reserved2
+ bit<32> port_out
+}
+
+// Input frame:
+// Ethernet (14) | IPv4 (total_len)
+//
+// Output frame:
+// Ethernet (14) | IPv4 (20) | UDP (8) | VXLAN (8) | Input frame | Ethernet FCS (4)
+//
+// Note: The input frame has its FCS removed before encapsulation in the output
+// frame.
+//
+// Assumption: When read from the table, the outer IPv4 and UDP headers contain
+// the following fields:
+// - t.ipv4_total_len: Set to 50, which covers the length of:
+// - The outer IPv4 header (20 bytes);
+// - The outer UDP header (8 bytes);
+// - The outer VXLAN header (8 bytes);
+// - The inner Ethernet header (14 bytes);
+// - t.ipv4_hdr_checksum: Includes the above total length.
+// - t.udp_length: Set to 30, which covers the length of:
+// - The outer UDP header (8 bytes);
+// - The outer VXLAN header (8 bytes);
+// - The inner Ethernet header (14 bytes);
+// - t.udp_checksum: Set to 0.
+//
+// Once the total length of the inner IPv4 packet (h.ipv4.total_len) is known,
+// the outer IPv4 and UDP headers are updated as follows:
+// - h.outer_ipv4.total_len = t.ipv4_total_len + h.ipv4.total_len
+// - h.outer_ipv4.hdr_checksum = t.ipv4_hdr_checksum + h.ipv4.total_len
+// - h.outer_udp.length = t.udp_length + h.ipv4.total_len
+// - h.outer_udp.checksum: No change.
+//
+
+action vxlan_encap args instanceof vxlan_encap_args_t {
+ //Set the outer Ethernet header.
+ validate h.outer_ethernet
+ mov h.outer_ethernet.dst_addr t.ethernet_dst_addr
+ mov h.outer_ethernet.src_addr t.ethernet_src_addr
+ mov h.outer_ethernet.ethertype t.ethernet_ethertype
+
+ //Set the outer IPv4 header.
+ validate h.outer_ipv4
+ mov h.outer_ipv4.ver_ihl t.ipv4_ver_ihl
+ mov h.outer_ipv4.diffserv t.ipv4_diffserv
+ mov h.outer_ipv4.total_len t.ipv4_total_len
+ mov h.outer_ipv4.identification t.ipv4_identification
+ mov h.outer_ipv4.flags_offset t.ipv4_flags_offset
+ mov h.outer_ipv4.ttl t.ipv4_ttl
+ mov h.outer_ipv4.protocol t.ipv4_protocol
+ mov h.outer_ipv4.hdr_checksum t.ipv4_hdr_checksum
+ mov h.outer_ipv4.src_addr t.ipv4_src_addr
+ mov h.outer_ipv4.dst_addr t.ipv4_dst_addr
+
+ //Set the outer UDP header.
+ validate h.outer_udp
+ mov h.outer_udp.src_port t.udp_src_port
+ mov h.outer_udp.dst_port t.udp_dst_port
+ mov h.outer_udp.length t.udp_length
+ mov h.outer_udp.checksum t.udp_checksum
+
+ //Set the outer VXLAN header.
+ validate h.outer_vxlan
+ mov h.outer_vxlan.flags t.vxlan_flags
+ mov h.outer_vxlan.reserved t.vxlan_reserved
+ mov h.outer_vxlan.vni t.vxlan_vni
+ mov h.outer_vxlan.reserved2 t.vxlan_reserved2
+
+ //Set the output port.
+ mov m.port_out t.port_out
+
+ //Update h.outer_ipv4.total_len field.
+ add h.outer_ipv4.total_len h.ipv4.total_len
+
+ //Update h.outer_ipv4.hdr_checksum field.
+ ckadd h.outer_ipv4.hdr_checksum h.ipv4.total_len
+
+ //Update h.outer_udp.length field.
+ add h.outer_udp.length h.ipv4.total_len
+
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Tables.
+//
+table vxlan_table {
+ key {
+ h.ethernet.dst_addr exact
+ }
+
+ actions {
+ vxlan_encap
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port_in
+ extract h.ethernet
+ extract h.ipv4
+ table vxlan_table
+ emit h.outer_ethernet
+ emit h.outer_ipv4
+ emit h.outer_udp
+ emit h.outer_vxlan
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port_out
+}
diff --git a/dep/pipeline/xor_001/ethdev.io b/dep/pipeline/xor_001/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/xor_001/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/xor_001/pcap_files/in_1.txt b/dep/pipeline/xor_001/pcap_files/in_1.txt
new file mode 100644
index 00000000..75115c15
--- /dev/null
+++ b/dep/pipeline/xor_001/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/xor_001/pcap_files/out_1.txt b/dep/pipeline/xor_001/pcap_files/out_1.txt
new file mode 100644
index 00000000..75115c15
--- /dev/null
+++ b/dep/pipeline/xor_001/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/xor_001/readme.md b/dep/pipeline/xor_001/readme.md
new file mode 100644
index 00000000..64b48286
--- /dev/null
+++ b/dep/pipeline/xor_001/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_xor_001
+-----------------------
+
+ Instruction being tested:
+ xor m.field immediate_value
+
+ Description:
+ Receive a packet on some port_id and transmit it on port_id obtained by bitwise xor of received port_id and one.
+
+ Verification:
+ Check the transmitted packet on port_id obtained by bitwise xor of received port_id and one.
diff --git a/dep/pipeline/xor_001/xor_001.cli b/dep/pipeline/xor_001/xor_001.cli
new file mode 100644
index 00000000..1796fa6b
--- /dev/null
+++ b/dep/pipeline/xor_001/xor_001.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/xor_001/xor_001.spec /tmp/pipeline/xor_001/xor_001.c
+pipeline libbuild /tmp/pipeline/xor_001/xor_001.c /tmp/pipeline/xor_001/xor_001.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/xor_001/xor_001.so io /tmp/pipeline/xor_001/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/xor_001/xor_001.spec b/dep/pipeline/xor_001/xor_001.spec
new file mode 100644
index 00000000..1daf5e2c
--- /dev/null
+++ b/dep/pipeline/xor_001/xor_001.spec
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ xor m.port 1
+ tx m.port
+}
diff --git a/dep/pipeline/xor_002/ethdev.io b/dep/pipeline/xor_002/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/xor_002/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/xor_002/pcap_files/in_1.txt b/dep/pipeline/xor_002/pcap_files/in_1.txt
new file mode 100644
index 00000000..11b4679f
--- /dev/null
+++ b/dep/pipeline/xor_002/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 cc 33 cc 33 aa 55
+000020 aa 55 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/xor_002/pcap_files/out_1.txt b/dep/pipeline/xor_002/pcap_files/out_1.txt
new file mode 100644
index 00000000..870fbcc9
--- /dev/null
+++ b/dep/pipeline/xor_002/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 33 cc 33 cc 55 aa
+000020 55 aa 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/xor_002/readme.md b/dep/pipeline/xor_002/readme.md
new file mode 100644
index 00000000..1081a3d9
--- /dev/null
+++ b/dep/pipeline/xor_002/readme.md
@@ -0,0 +1,12 @@
+Test Case: test_xor_002
+-----------------------
+
+ Instruction being tested:
+ xor h.field immediate_value
+
+ Description:
+ For the received packet, toggle the bits of source and destination IP address and transmit it back on the same port.
+
+ Verification:
+ Bits of source and destination IP addresses of the transmitted packet should be the toggled with respect to the source and destination IP
+ addresses respectively of the received packet.
diff --git a/dep/pipeline/xor_002/xor_002.cli b/dep/pipeline/xor_002/xor_002.cli
new file mode 100644
index 00000000..3f47b4b7
--- /dev/null
+++ b/dep/pipeline/xor_002/xor_002.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/xor_002/xor_002.spec /tmp/pipeline/xor_002/xor_002.c
+pipeline libbuild /tmp/pipeline/xor_002/xor_002.c /tmp/pipeline/xor_002/xor_002.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/xor_002/xor_002.so io /tmp/pipeline/xor_002/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/xor_002/xor_002.spec b/dep/pipeline/xor_002/xor_002.spec
new file mode 100644
index 00000000..edde8e33
--- /dev/null
+++ b/dep/pipeline/xor_002/xor_002.spec
@@ -0,0 +1,51 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ipv4 instanceof ipv4_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ xor h.ipv4.src_addr 0xFFFFFFFF
+ xor h.ipv4.dst_addr 0xFFFFFFFF
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/xor_003/ethdev.io b/dep/pipeline/xor_003/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/xor_003/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/xor_003/pcap_files/in_1.txt b/dep/pipeline/xor_003/pcap_files/in_1.txt
new file mode 100644
index 00000000..75115c15
--- /dev/null
+++ b/dep/pipeline/xor_003/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/xor_003/pcap_files/out_1.txt b/dep/pipeline/xor_003/pcap_files/out_1.txt
new file mode 100644
index 00000000..e694c596
--- /dev/null
+++ b/dep/pipeline/xor_003/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 77 55 bb dd ff 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/xor_003/readme.md b/dep/pipeline/xor_003/readme.md
new file mode 100644
index 00000000..dbb4890c
--- /dev/null
+++ b/dep/pipeline/xor_003/readme.md
@@ -0,0 +1,13 @@
+Test Case: test_xor_003
+-----------------------
+
+ Instruction being tested:
+ xor m.field m.field
+
+ Description:
+ For the received packet, bitwise xor the bits of source and destination MAC addresses and store the result in destination MAC address
+ field and transmit the packet back on the same port.
+
+ Verification:
+ Bits of destination MAC address of the transmitted packet should the result of bitwise xor of source and destination MAC addresses
+ of the received packet.
diff --git a/dep/pipeline/xor_003/xor_003.cli b/dep/pipeline/xor_003/xor_003.cli
new file mode 100644
index 00000000..93bbb827
--- /dev/null
+++ b/dep/pipeline/xor_003/xor_003.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/xor_003/xor_003.spec /tmp/pipeline/xor_003/xor_003.c
+pipeline libbuild /tmp/pipeline/xor_003/xor_003.c /tmp/pipeline/xor_003/xor_003.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/xor_003/xor_003.so io /tmp/pipeline/xor_003/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/xor_003/xor_003.spec b/dep/pipeline/xor_003/xor_003.spec
new file mode 100644
index 00000000..a2d461f5
--- /dev/null
+++ b/dep/pipeline/xor_003/xor_003.spec
@@ -0,0 +1,38 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<48> addr_1
+ bit<48> addr_2
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ mov m.addr_1 h.ethernet.src_addr
+ mov m.addr_2 h.ethernet.dst_addr
+ xor m.addr_2 m.addr_1
+ mov h.ethernet.dst_addr m.addr_2
+ emit h.ethernet
+ tx m.port
+}
diff --git a/dep/pipeline/xor_004/ethdev.io b/dep/pipeline/xor_004/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/xor_004/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/xor_004/pcap_files/in_1.txt b/dep/pipeline/xor_004/pcap_files/in_1.txt
new file mode 100644
index 00000000..75115c15
--- /dev/null
+++ b/dep/pipeline/xor_004/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/xor_004/pcap_files/out_1.txt b/dep/pipeline/xor_004/pcap_files/out_1.txt
new file mode 100644
index 00000000..e694c596
--- /dev/null
+++ b/dep/pipeline/xor_004/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 77 55 bb dd ff 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/xor_004/readme.md b/dep/pipeline/xor_004/readme.md
new file mode 100644
index 00000000..60e07820
--- /dev/null
+++ b/dep/pipeline/xor_004/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_xor_004
+-----------------------
+
+ Instruction being tested:
+ xor m.field h.field
+
+ Description:
+ Update destination MAC address with bitwise xor of source and destination MAC address, then transmit the packet back on the same port.
+
+ Verification:
+ Destination MAC address of the received packet should be bitwise xor of source and destination MAC addresses.
diff --git a/dep/pipeline/xor_004/xor_004.cli b/dep/pipeline/xor_004/xor_004.cli
new file mode 100644
index 00000000..4692f8c0
--- /dev/null
+++ b/dep/pipeline/xor_004/xor_004.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/xor_004/xor_004.spec /tmp/pipeline/xor_004/xor_004.c
+pipeline libbuild /tmp/pipeline/xor_004/xor_004.c /tmp/pipeline/xor_004/xor_004.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/xor_004/xor_004.so io /tmp/pipeline/xor_004/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/xor_004/xor_004.spec b/dep/pipeline/xor_004/xor_004.spec
new file mode 100644
index 00000000..e386324f
--- /dev/null
+++ b/dep/pipeline/xor_004/xor_004.spec
@@ -0,0 +1,36 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<48> addr
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ mov m.addr h.ethernet.dst_addr
+ xor m.addr h.ethernet.src_addr
+ mov h.ethernet.dst_addr m.addr
+ emit h.ethernet
+ tx m.port
+}
diff --git a/dep/pipeline/xor_005/ethdev.io b/dep/pipeline/xor_005/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/xor_005/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/xor_005/pcap_files/in_1.txt b/dep/pipeline/xor_005/pcap_files/in_1.txt
new file mode 100644
index 00000000..75115c15
--- /dev/null
+++ b/dep/pipeline/xor_005/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/xor_005/pcap_files/out_1.txt b/dep/pipeline/xor_005/pcap_files/out_1.txt
new file mode 100644
index 00000000..e694c596
--- /dev/null
+++ b/dep/pipeline/xor_005/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 00 77 55 bb dd ff 00 66 77 88 99 aa 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/xor_005/readme.md b/dep/pipeline/xor_005/readme.md
new file mode 100644
index 00000000..9e881644
--- /dev/null
+++ b/dep/pipeline/xor_005/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_xor_005
+-----------------------
+
+ Instruction being tested:
+ xor h.field h.field
+
+ Description:
+ Update destination MAC address with bitwise xor of source and destination MAC address, then transmit the packet back on the same port.
+
+ Verification:
+ Destination MAC address of the received packet should be bitwise xor of source and destination MAC addresses.
diff --git a/dep/pipeline/xor_005/xor_005.cli b/dep/pipeline/xor_005/xor_005.cli
new file mode 100644
index 00000000..6ceacbd6
--- /dev/null
+++ b/dep/pipeline/xor_005/xor_005.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/xor_005/xor_005.spec /tmp/pipeline/xor_005/xor_005.c
+pipeline libbuild /tmp/pipeline/xor_005/xor_005.c /tmp/pipeline/xor_005/xor_005.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/xor_005/xor_005.so io /tmp/pipeline/xor_005/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/xor_005/xor_005.spec b/dep/pipeline/xor_005/xor_005.spec
new file mode 100644
index 00000000..8e861f08
--- /dev/null
+++ b/dep/pipeline/xor_005/xor_005.spec
@@ -0,0 +1,34 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<48> addr
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ xor h.ethernet.dst_addr h.ethernet.src_addr
+ emit h.ethernet
+ tx m.port
+}
diff --git a/dep/pipeline/xor_006/ethdev.io b/dep/pipeline/xor_006/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/xor_006/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/xor_006/pcap_files/in_1.txt b/dep/pipeline/xor_006/pcap_files/in_1.txt
new file mode 100644
index 00000000..ce0583c0
--- /dev/null
+++ b/dep/pipeline/xor_006/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/xor_006/pcap_files/out_1.txt b/dep/pipeline/xor_006/pcap_files/out_1.txt
new file mode 100644
index 00000000..ce0583c0
--- /dev/null
+++ b/dep/pipeline/xor_006/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 64 00 00 0a c8 00
+000020 00 0a 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/xor_006/readme.md b/dep/pipeline/xor_006/readme.md
new file mode 100644
index 00000000..cd8ab0a4
--- /dev/null
+++ b/dep/pipeline/xor_006/readme.md
@@ -0,0 +1,11 @@
+Test Case: test_xor_006
+-----------------------
+
+ Instructions being tested:
+ xor m.field t.field
+
+ Description:
+ Transmit the packet on the port which is result of bitwise xor of received port and the value present in the table.
+
+ Verification:
+ Packet should be received on the port which is result of bitwise xor of received port and table entry, for example if the packet is received on port 0 and table has entry 1 then packet will be received at port 1.
diff --git a/dep/pipeline/xor_006/table.txt b/dep/pipeline/xor_006/table.txt
new file mode 100755
index 00000000..cf73117d
--- /dev/null
+++ b/dep/pipeline/xor_006/table.txt
@@ -0,0 +1 @@
+match 0x525400124457 action xor_006_action port 0x1
diff --git a/dep/pipeline/xor_006/xor_006.cli b/dep/pipeline/xor_006/xor_006.cli
new file mode 100755
index 00000000..6cabafef
--- /dev/null
+++ b/dep/pipeline/xor_006/xor_006.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/xor_006/xor_006.spec /tmp/pipeline/xor_006/xor_006.c
+pipeline libbuild /tmp/pipeline/xor_006/xor_006.c /tmp/pipeline/xor_006/xor_006.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/xor_006/xor_006.so io /tmp/pipeline/xor_006/ethdev.io numa 0
+pipeline PIPELINE0 table xor_006 add /tmp/pipeline/xor_006/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/xor_006/xor_006.spec b/dep/pipeline/xor_006/xor_006.spec
new file mode 100755
index 00000000..d959b0da
--- /dev/null
+++ b/dep/pipeline/xor_006/xor_006.spec
@@ -0,0 +1,66 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct xor_006_args_t {
+ bit<32> port
+}
+
+action xor_006_action args instanceof xor_006_args_t {
+ xor m.port t.port
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Table
+//
+table xor_006 {
+ key {
+ h.ethernet.dst_addr exact
+ }
+
+ actions {
+ xor_006_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ table xor_006
+ emit h.ethernet
+ tx m.port
+}
diff --git a/dep/pipeline/xor_007/ethdev.io b/dep/pipeline/xor_007/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/xor_007/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/xor_007/pcap_files/in_1.txt b/dep/pipeline/xor_007/pcap_files/in_1.txt
new file mode 100644
index 00000000..e34fa2c4
--- /dev/null
+++ b/dep/pipeline/xor_007/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 aa bb cc dd 12 34
+000020 56 78 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/xor_007/pcap_files/out_1.txt b/dep/pipeline/xor_007/pcap_files/out_1.txt
new file mode 100644
index 00000000..d2e6d6f9
--- /dev/null
+++ b/dep/pipeline/xor_007/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 aa bb cc dd b8 8f
+000020 9a a5 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/xor_007/readme.md b/dep/pipeline/xor_007/readme.md
new file mode 100644
index 00000000..3dcef132
--- /dev/null
+++ b/dep/pipeline/xor_007/readme.md
@@ -0,0 +1,16 @@
+
+Test Case: test_xor_007
+-----------------------
+
+ Instructions being tested:
+ xor h.field t.field
+
+ Description:
+ For a packet with matching destination MAC address, logically XOR the
+ destination IP address with the action data of the matching rule in the
+ table.
+
+ Verification:
+ For a packet with matching destination MAC address, destination IP
+ address should be logically XOR with the action data of the matching
+ rule in the table.
diff --git a/dep/pipeline/xor_007/table.txt b/dep/pipeline/xor_007/table.txt
new file mode 100755
index 00000000..738949c9
--- /dev/null
+++ b/dep/pipeline/xor_007/table.txt
@@ -0,0 +1 @@
+match 0x525400124457 action xor_007_action addr 0xaabbccdd
diff --git a/dep/pipeline/xor_007/xor_007.cli b/dep/pipeline/xor_007/xor_007.cli
new file mode 100755
index 00000000..52043765
--- /dev/null
+++ b/dep/pipeline/xor_007/xor_007.cli
@@ -0,0 +1,22 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/xor_007/xor_007.spec /tmp/pipeline/xor_007/xor_007.c
+pipeline libbuild /tmp/pipeline/xor_007/xor_007.c /tmp/pipeline/xor_007/xor_007.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/xor_007/xor_007.so io /tmp/pipeline/xor_007/ethdev.io numa 0
+pipeline PIPELINE0 table xor_007 add /tmp/pipeline/xor_007/table.txt
+pipeline PIPELINE0 commit
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/xor_007/xor_007.spec b/dep/pipeline/xor_007/xor_007.spec
new file mode 100755
index 00000000..90562418
--- /dev/null
+++ b/dep/pipeline/xor_007/xor_007.spec
@@ -0,0 +1,82 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+//
+// Headers
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ethertype
+}
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ethernet instanceof ethernet_h
+header ipv4 instanceof ipv4_h
+
+//
+// Meta-data
+//
+struct metadata_t {
+ bit<32> port
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions
+//
+struct xor_007_args_t {
+ bit<32> addr
+}
+
+action xor_007_action args instanceof xor_007_args_t {
+ xor h.ipv4.dst_addr t.addr
+ return
+}
+
+action drop args none {
+ drop
+}
+
+//
+// Table
+//
+table xor_007 {
+ key {
+ h.ethernet.dst_addr exact
+ }
+
+ actions {
+ xor_007_action
+ drop
+ }
+
+ default_action drop args none
+ size 1048576
+}
+
+//
+// Pipeline
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ table xor_007
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
diff --git a/dep/pipeline/xor_008/ethdev.io b/dep/pipeline/xor_008/ethdev.io
new file mode 100644
index 00000000..4e31f499
--- /dev/null
+++ b/dep/pipeline/xor_008/ethdev.io
@@ -0,0 +1,27 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2022 Intel Corporation
+
+;
+; Pipeline packet mirroring.
+;
+mirroring slots 4 sessions 64
+
+;
+; Pipeline input ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1
+port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1
+port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1
+port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1
+
+;
+; Pipeline output ports.
+;
+; Note: Customize the parameters below to match your setup.
+;
+port out 0 ethdev 0000:00:04.0 txq 0 bsz 1
+port out 1 ethdev 0000:00:05.0 txq 0 bsz 1
+port out 2 ethdev 0000:00:06.0 txq 0 bsz 1
+port out 3 ethdev 0000:00:07.0 txq 0 bsz 1
diff --git a/dep/pipeline/xor_008/pcap_files/in_1.txt b/dep/pipeline/xor_008/pcap_files/in_1.txt
new file mode 100644
index 00000000..e34fa2c4
--- /dev/null
+++ b/dep/pipeline/xor_008/pcap_files/in_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 aa bb cc dd 12 34
+000020 56 78 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/xor_008/pcap_files/out_1.txt b/dep/pipeline/xor_008/pcap_files/out_1.txt
new file mode 100644
index 00000000..d2e6d6f9
--- /dev/null
+++ b/dep/pipeline/xor_008/pcap_files/out_1.txt
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020 Intel Corporation
+#
+
+# text to pcap: text2pcap packet.txt packet.pcap
+# pcap to text: tcpdump -r packet.pcap -xx
+
+# Packet 0
+000000 52 54 00 12 44 57 52 54 00 12 34 56 08 00 45 00
+000010 00 2e 00 01 00 00 40 06 4e b5 aa bb cc dd b8 8f
+000020 9a a5 00 64 00 c8 00 00 00 00 00 00 00 00 50 02
+000030 20 00 59 93 00 00 58 58 58 58 58 58
diff --git a/dep/pipeline/xor_008/readme.md b/dep/pipeline/xor_008/readme.md
new file mode 100644
index 00000000..a4189445
--- /dev/null
+++ b/dep/pipeline/xor_008/readme.md
@@ -0,0 +1,16 @@
+
+Test Case: test_xor_008
+-----------------------
+
+ Instruction being tested:
+ xor h.field m.field
+
+ Description:
+ For the received packet, bitwise xor the bits of source and destination
+ IP addresses and store the result in destination IP address field and
+ transmit the packet back on the same port.
+
+ Verification:
+ Bits of destination IP address of the transmitted packet should be the
+ result of bitwise xor of source and destination IP addresses of the
+ received packet.
diff --git a/dep/pipeline/xor_008/xor_008.cli b/dep/pipeline/xor_008/xor_008.cli
new file mode 100644
index 00000000..8ff097fb
--- /dev/null
+++ b/dep/pipeline/xor_008/xor_008.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2010-2020 Intel Corporation
+
+;
+; Pipeline code generation & shared object library build
+;
+pipeline codegen /tmp/pipeline/xor_008/xor_008.spec /tmp/pipeline/xor_008/xor_008.c
+pipeline libbuild /tmp/pipeline/xor_008/xor_008.c /tmp/pipeline/xor_008/xor_008.so
+
+mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0
+
+ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+
+pipeline PIPELINE0 build lib /tmp/pipeline/xor_008/xor_008.so io /tmp/pipeline/xor_008/ethdev.io numa 0
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/dep/pipeline/xor_008/xor_008.spec b/dep/pipeline/xor_008/xor_008.spec
new file mode 100644
index 00000000..8c999610
--- /dev/null
+++ b/dep/pipeline/xor_008/xor_008.spec
@@ -0,0 +1,52 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+ bit<48> dst_addr
+ bit<48> src_addr
+ bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+struct ipv4_h {
+ bit<8> ver_ihl
+ bit<8> diffserv
+ bit<16> total_len
+ bit<16> identification
+ bit<16> flags_offset
+ bit<8> ttl
+ bit<8> protocol
+ bit<16> hdr_checksum
+ bit<32> src_addr
+ bit<32> dst_addr
+}
+
+header ipv4 instanceof ipv4_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+ bit<32> port
+ bit<48> addr
+}
+
+metadata instanceof metadata_t
+
+//
+// Pipeline.
+//
+apply {
+ rx m.port
+ extract h.ethernet
+ extract h.ipv4
+ mov m.addr h.ipv4.src_addr
+ xor h.ipv4.dst_addr m.addr
+ emit h.ethernet
+ emit h.ipv4
+ tx m.port
+}
--
2.25.1
^ permalink raw reply [flat|nested] 4+ messages in thread* [PATCH 2/3] tests/pipeline: updated pipeline test suite
2022-11-16 16:59 [PATCH 0/3] pipeline test suite dependency updated Yogesh Jangra
2022-11-16 16:59 ` [PATCH 1/3] dep: removed pipeline test suite tarball dependency Yogesh Jangra
@ 2022-11-16 16:59 ` Yogesh Jangra
2022-11-16 16:59 ` [PATCH 3/3] test_plan/pipeline: updated test suite documentation Yogesh Jangra
2 siblings, 0 replies; 4+ messages in thread
From: Yogesh Jangra @ 2022-11-16 16:59 UTC (permalink / raw)
To: dts
Cc: cristian.dumitrescu, kamalakannan.r, harshad.suresh.narayane,
Suesh, Narayane, R
Updated the pipeline testsuite to use dependency from the pipeline
folder placed inside dep folder. The test suite was earlier using the
tarball file for its dependencies.
New testcases added to verify the features introduced in dpdk 22.11
release.
Signed-off-by: Yogesh Jangra <yogesh.jangra@intel.com>
Signed-off-by: Suesh Narayane, Harshad <harshad.suresh.narayane@intel.com>
Signed-off-by: R, Kamalakannan <kamalakannan.r@intel.com>
---
tests/TestSuite_pipeline.py | 2237 ++++++++++++++++++++++++-----------
1 file changed, 1577 insertions(+), 660 deletions(-)
diff --git a/tests/TestSuite_pipeline.py b/tests/TestSuite_pipeline.py
index 309504cf..4ecea73d 100644
--- a/tests/TestSuite_pipeline.py
+++ b/tests/TestSuite_pipeline.py
@@ -8,6 +8,7 @@ import random
import re
import socket
import time
+import traceback
from time import sleep
import scapy.layers.inet
@@ -18,8 +19,6 @@ from scapy.layers.sctp import SCTP, SCTPChunkData
from scapy.packet import Raw, bind_layers
from scapy.route import *
from scapy.sendrecv import sendp, sniff
-
-# from scapy.all import conf
from scapy.utils import hexstr, rdpcap, wrpcap
import framework.utils as utils
@@ -33,16 +32,6 @@ from framework.settings import DRIVERS, HEADER_SIZE
from framework.test_case import TestCase
from framework.virt_dut import VirtDut
-TIMESTAMP = re.compile(r"\d{2}\:\d{2}\:\d{2}\.\d{6}")
-PAYLOAD = re.compile(r"\t0x([0-9a-fA-F]+): ([0-9a-fA-F ]+)")
-
-FILE_DIR = os.path.dirname(os.path.abspath(__file__)).split(os.path.sep)
-DEP_DIR = os.path.sep.join(FILE_DIR[:-1]) + "/dep/"
-DIR_RTE_INSTALL_DIR = "/root/dpdk"
-
-BUFFER_SIZE = 1024
-CLI_SERVER_CONNECT_DELAY = 1
-
class TestPipeline(TestCase):
def pair_hex_digits(self, iterable, count, fillvalue=None):
@@ -60,32 +49,19 @@ class TestPipeline(TestCase):
i = 0
flag_line_completed = 0
for line in input:
- time = TIMESTAMP.match(line)
+ time = self.pkt_timestamp.match(line)
if time:
- if flag_line_completed == 1:
- flag_line_completed = 0
- output.write("\n# Packet {}\n".format(i))
- else:
- output.write("# Packet {}\n".format(i))
+ output.write("# Packet {}\n".format(i))
i += 1
continue
- payload = PAYLOAD.match(line)
+ payload = self.pkt_payload.match(line)
if payload:
address = payload.group(1)
hex_data = payload.group(2).replace(" ", "")
hex_data = " ".join(
"".join(part) for part in self.pair_hex_digits(hex_data, 2, " ")
)
- if len(hex_data) < 47:
- output.write("{:0>6} {:<47}\n".format(address, hex_data))
- output.write("\n")
- flag_line_completed = 0
- else:
- output.write("{:0>6} {:<47}\n".format(address, hex_data))
- flag_line_completed = 1
-
- if flag_line_completed == 1:
- output.write("\n")
+ output.write("{:0>6} {:<47}\n".format(address, hex_data))
def get_flow_direction_param_of_tcpdump(self):
"""
@@ -114,8 +90,9 @@ class TestPipeline(TestCase):
"""
command = "rm -f /tmp/tcpdump_{0}.pcap".format(interface)
self.tester.send_expect(command, "#")
- command = "tcpdump -nn -e {0} -w /tmp/tcpdump_{1}.pcap -i {1} {2} 2>/tmp/tcpdump_{1}.out &".format(
- self.param_flow_dir, interface, filters
+ command = (
+ "tcpdump -nn -e {0} -w /tmp/tcpdump_{1}.pcap -i {1} {2} "
+ "2>/tmp/tcpdump_{1}.out &".format(self.param_flow_dir, interface, filters)
)
self.tester.send_expect(command, "# ")
@@ -161,7 +138,7 @@ class TestPipeline(TestCase):
# Prepare the pkts to be sent
self.tester.scapy_foreground()
self.tester.send_expect(
- "text2pcap -q {} /tmp/packet_tx.pcap".format("/tmp/" + in_pcap), "# "
+ "text2pcap -q {} /tmp/packet_tx.pcap".format(self.dep_dir + in_pcap), "# "
)
self.tester.scapy_append('pkt = rdpcap("/tmp/packet_tx.pcap")')
self.tester.scapy_append('sendp(pkt, iface="{}", count=1)'.format(tx_interface))
@@ -177,7 +154,7 @@ class TestPipeline(TestCase):
"/tmp/packet_rx.txt", "/tmp/packet_rx_rcv.txt"
)
out = self.tester.send_command(
- "diff -sqw /tmp/packet_rx_rcv.txt {}".format("/tmp/" + out_pcap),
+ "diff -sqwB /tmp/packet_rx_rcv.txt {}".format(self.dep_dir + out_pcap),
timeout=0.5,
)
if "are identical" not in out:
@@ -206,7 +183,7 @@ class TestPipeline(TestCase):
for i in range(tx_count):
self.tester.send_expect(
"text2pcap -q {} /tmp/tx_{}.pcap".format(
- "/tmp/" + in_pcap[i], tx_inf[i]
+ self.dep_dir + in_pcap[i], tx_inf[i]
),
"# ",
)
@@ -237,8 +214,8 @@ class TestPipeline(TestCase):
self.convert_tcpdump_to_text2pcap(
"/tmp/packet_rx.txt", "/tmp/packet_rx_rcv_{}.txt".format(rx_inf[i])
)
- cmd = "diff -sqw /tmp/packet_rx_rcv_{}.txt {}".format(
- rx_inf[i], "/tmp/" + out_pcap[i]
+ cmd = "diff -sqwB /tmp/packet_rx_rcv_{}.txt {}".format(
+ rx_inf[i], self.dep_dir + out_pcap[i]
)
out = self.tester.send_command(cmd, timeout=0.5)
if "are identical" not in out:
@@ -404,21 +381,38 @@ class TestPipeline(TestCase):
self.app_testpmd_path = self.dut.apps_name["test-pmd"]
self.param_flow_dir = self.get_flow_direction_param_of_tcpdump()
+ # Setting the paths
+ FILE_DIR = os.path.dirname(os.path.abspath(__file__)).split(os.path.sep)
+ self.dep_dir = os.path.sep.join(FILE_DIR[:-1]) + "/dep/"
+
+ # Setting the regular express to find packet header and packet content
+ self.pkt_timestamp = re.compile(r"\d{2}\:\d{2}\:\d{2}\.\d{6}")
+ self.pkt_payload = re.compile(r"\t0x([0-9a-fA-F]+): ([0-9a-fA-F ]+)")
+
+ # Setting commonly used variables
+ self.buffer_size = 1024
+ self.cli_connect_delay = 1
+
# update the ./dep/pipeline.tar.gz file
- PIPELINE_TAR_FILE = DEP_DIR + "pipeline.tar.gz"
- self.tester.send_expect("rm -rf /tmp/pipeline", "# ")
+ PIPELINE_TAR_FOLDER = self.dep_dir + "pipeline"
+ self.tester.send_expect("pwd", "# ")
+ self.tester.send_expect("rm -rf /tmp/pipeline.tar.gz", "# ")
self.tester.send_expect(
- "tar -zxf {} --directory /tmp".format(PIPELINE_TAR_FILE), "# ", 20
+ "tar -zcf /tmp/pipeline.tar.gz --absolute-names {}".format(
+ PIPELINE_TAR_FOLDER
+ ),
+ "# ",
+ 20,
)
# copy the ./dep/pipeline.tar.gz file to DUT
self.dut.send_expect("rm -rf /tmp/pipeline.tar.gz /tmp/pipeline", "# ", 20)
- self.session_secondary.copy_file_to("dep/pipeline.tar.gz", "/tmp/")
- self.dut.send_expect("tar -zxf /tmp/pipeline.tar.gz --directory /tmp", "# ", 20)
-
- # update environment variable for the performance improvement
+ self.session_secondary.copy_file_to("/tmp/pipeline.tar.gz", "/tmp/")
self.dut.send_expect(
- "export RTE_INSTALL_DIR={}".format(DIR_RTE_INSTALL_DIR), "#"
+ "tar -zxf /tmp/pipeline.tar.gz --strip-components={} --absolute-names "
+ "--directory /tmp".format(PIPELINE_TAR_FOLDER.count("/") - 1),
+ "# ",
+ 20,
)
def set_up(self):
@@ -437,7 +431,7 @@ class TestPipeline(TestCase):
try:
s.connect((SERVER_IP, SERVER_PORT))
sleep(1)
- msg = s.recv(BUFFER_SIZE)
+ msg = s.recv(self.buffer_size)
response = msg.decode()
if "pipeline>" not in response:
s.close()
@@ -458,7 +452,7 @@ class TestPipeline(TestCase):
socket.send(cmd.encode("utf-8"))
sleep(0.1)
- msg = socket.recv(BUFFER_SIZE)
+ msg = socket.recv(self.buffer_size)
response = msg.decode()
if expected_rsp not in response:
socket.close()
@@ -467,9 +461,10 @@ class TestPipeline(TestCase):
def run_dpdk_app(self, cli_file, exp_out="PIPELINE0 enable"):
- cmd = 'test -f {} && echo "File exists!"'.format(cli_file)
- self.dut.send_expect(cmd, "File exists!", 1)
try:
+ cmd = 'test -f {} && echo "File exists!"'.format(cli_file)
+ self.dut.send_expect(cmd, "File exists!", 1)
+
cmd = "sed -i -e 's/0000:00:04.0/%s/' {}".format(cli_file) % self.dut_p0_pci
self.dut.send_expect(cmd, "# ", 20)
cmd = "sed -i -e 's/0000:00:05.0/%s/' {}".format(cli_file) % self.dut_p1_pci
@@ -483,6 +478,8 @@ class TestPipeline(TestCase):
)
self.dut.send_expect(cmd, exp_out, 60)
except Exception:
+ trace = traceback.format_exc()
+ self.logger.error("Error while running DPDK: " + trace)
self.dut.send_expect("^C", "# ", 20)
self.verify(0, "ERROR in running DPDK application")
@@ -501,7 +498,7 @@ class TestPipeline(TestCase):
# Prepare the pkts to be sent
self.tester.scapy_foreground()
self.tester.send_expect(
- "text2pcap -q {} /tmp/packet_tx.pcap".format("/tmp/" + in_pcap), "# "
+ "text2pcap -q {} /tmp/packet_tx.pcap".format(self.dep_dir + in_pcap), "# "
)
self.tester.scapy_append('pkt = rdpcap("/tmp/packet_tx.pcap")')
self.tester.scapy_append('sendp(pkt, iface="{}", count=1)'.format(tx_interface))
@@ -689,6 +686,19 @@ class TestPipeline(TestCase):
self.send_and_sniff_multiple(tx_port, rx_port, in_pcap, out_pcap, filters)
self.dut.send_expect("^C", "# ", 20)
+ def test_extract_emit_014(self):
+
+ cli_file = "/tmp/pipeline/extract_emit_014/extract_emit_014.cli"
+ self.run_dpdk_app(cli_file)
+
+ in_pcap = ["pipeline/extract_emit_014/pcap_files/in_1.txt"] * 4
+ out_pcap = ["pipeline/extract_emit_014/pcap_files/out_1.txt"] * 4
+ filters = ["tcp"] * 4
+ tx_port = [0, 1, 2, 3]
+ rx_port = [0, 1, 2, 3]
+ self.send_and_sniff_multiple(tx_port, rx_port, in_pcap, out_pcap, filters)
+ self.dut.send_expect("^C", "# ", 20)
+
def test_and_001(self):
cli_file = "/tmp/pipeline/and_001/and_001.cli"
@@ -2444,7 +2454,7 @@ class TestPipeline(TestCase):
cli_file = "/tmp/pipeline/table_002/table_002.cli"
self.run_dpdk_app(cli_file)
- sleep(1)
+ sleep(self.cli_connect_delay)
s = self.connect_cli_server()
# empty table scenario
@@ -2535,7 +2545,8 @@ class TestPipeline(TestCase):
self.send_and_sniff_multiple(tx_port, rx_port, in_pcap, out_pcap, filters)
# deafult action scenario [empty table]
- CMD_FILE = "/tmp/pipeline/table_002/cmd_files/cmd_6_1.txt" # delete the previously added rule
+ # delete the previously added rule
+ CMD_FILE = "/tmp/pipeline/table_002/cmd_files/cmd_6_1.txt"
CLI_CMD = "pipeline PIPELINE0 table table_002_table delete {}\n".format(
CMD_FILE
)
@@ -2551,7 +2562,8 @@ class TestPipeline(TestCase):
# deafult action scenario [table with one rule]
"""
- Add key A => Lookup HIT for the right packet with the specific key associated action executed
+ Add key A => Lookup HIT for the right packet with the specific key
+ associated action executed
Lookup MISS for any other packets with default action executed
"""
CMD_FILE = "/tmp/pipeline/table_002/cmd_files/cmd_6_2.txt" # add a new rule
@@ -2573,7 +2585,7 @@ class TestPipeline(TestCase):
cli_file = "/tmp/pipeline/table_003/table_003.cli"
self.run_dpdk_app(cli_file)
- sleep(1)
+ sleep(self.cli_connect_delay)
s = self.connect_cli_server()
# Empty table scenario
@@ -2640,7 +2652,8 @@ class TestPipeline(TestCase):
rx_port = [0, 1, 2, 3]
self.send_and_sniff_multiple(tx_port, rx_port, in_pcap, out_pcap, filters)
- # action update scenario (restore one of the previously deleted rules and check the update)
+ # action update scenario (restore one of the previously deleted rules
+ # and check the update)
CMD_FILE = "/tmp/pipeline/table_003/cmd_files/cmd_5_1.txt"
CLI_CMD = "pipeline PIPELINE0 table table_003_table add {}\n".format(CMD_FILE)
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
@@ -2650,7 +2663,8 @@ class TestPipeline(TestCase):
out_pcap = "pipeline/table_003/pcap_files/out_5_1.txt"
self.send_and_sniff_pkts(0, 0, in_pcap, out_pcap, "tcp")
- # action update scenario (change the action of restored rule and check the update)
+ # action update scenario (change the action of restored rule and check
+ # the update)
CMD_FILE = "/tmp/pipeline/table_003/cmd_files/cmd_5_2.txt"
CLI_CMD = "pipeline PIPELINE0 table table_003_table add {}\n".format(CMD_FILE)
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
@@ -2664,8 +2678,10 @@ class TestPipeline(TestCase):
self.send_and_sniff_multiple(tx_port, rx_port, in_pcap, out_pcap, filters)
# Default action scenario [Empty table]
- CMD_FILE = "/tmp/pipeline/table_003/cmd_files/cmd_6_1_1.txt" # delete the previously added rule
- CMD_FILE_2 = "/tmp/pipeline/table_003/cmd_files/cmd_6_1_2.txt" # change the default action of table
+ # delete the previously added rule
+ CMD_FILE = "/tmp/pipeline/table_003/cmd_files/cmd_6_1_1.txt"
+ # change the default action of table
+ CMD_FILE_2 = "/tmp/pipeline/table_003/cmd_files/cmd_6_1_2.txt"
CLI_CMD = "pipeline PIPELINE0 table table_003_table delete {}\n".format(
CMD_FILE
)
@@ -2685,8 +2701,10 @@ class TestPipeline(TestCase):
# Default action scenario [Table with one rule]
"""
- Add key A => Lookup HIT for the right packet with the specific key associated action executed
- Lookup MISS for any other packets with default action executed
+ Add key A => Lookup HIT for the right packet with the specific key
+ associated action executed
+ Lookup MISS for any other packets with default action
+ executed
"""
CMD_FILE = "/tmp/pipeline/table_003/cmd_files/cmd_6_2.txt" # add a new rule
CLI_CMD = "pipeline PIPELINE0 table table_003_table add {}\n".format(CMD_FILE)
@@ -2762,7 +2780,7 @@ class TestPipeline(TestCase):
cli_file = "/tmp/pipeline/table_008/table_008.cli"
self.run_dpdk_app(cli_file)
- sleep(1)
+ sleep(self.cli_connect_delay)
s = self.connect_cli_server()
in_pcap = ["pipeline/table_008/pcap_files/in_1.txt"] * 4
@@ -2792,327 +2810,724 @@ class TestPipeline(TestCase):
s.close()
self.dut.send_expect("^C", "# ", 20)
- def test_reg_001(self):
+ def test_table_009(self):
- cli_file = "/tmp/pipeline/reg_001/reg_001.cli"
+ cli_file = "/tmp/pipeline/table_009/table_009.cli"
self.run_dpdk_app(cli_file)
- sleep(CLI_SERVER_CONNECT_DELAY)
+ sleep(self.cli_connect_delay)
s = self.connect_cli_server()
- # Read default initial value
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x0\n"
- self.socket_send_cmd(s, CLI_CMD, "0x12\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x1\n"
- self.socket_send_cmd(s, CLI_CMD, "0x12\npipeline> ")
-
- # Update the register array location
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x0 0xab\n"
+ CMD_FILE = "/tmp/pipeline/table_009/cmd_files/cmd_1.txt"
+ CLI_CMD = "pipeline PIPELINE0 table table_009 add {}\n".format(CMD_FILE)
+ self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
+ CLI_CMD = "pipeline PIPELINE0 commit\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- # Verify updated value
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x0\n"
- self.socket_send_cmd(s, CLI_CMD, "0xab\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x1\n"
- self.socket_send_cmd(s, CLI_CMD, "0x12\npipeline> ")
+ in_pcap = ["pipeline/table_009/pcap_files/in_1.txt"] * 4
+ out_pcap = ["pipeline/table_009/pcap_files/out_1.txt"] * 4
+ filters = ["tcp"] * 4
+ tx_port = [0, 1, 2, 3]
+ rx_port = [0, 1, 2, 3]
+
+ sleep(2)
+ self.send_and_sniff_multiple(tx_port, rx_port, in_pcap, out_pcap, filters)
s.close()
self.dut.send_expect("^C", "# ", 20)
- def test_reg_002(self):
+ def test_table_010(self):
- cli_file = "/tmp/pipeline/reg_002/reg_002.cli"
+ cli_file = "/tmp/pipeline/table_010/table_010.cli"
self.run_dpdk_app(cli_file)
- sleep(CLI_SERVER_CONNECT_DELAY)
+ sleep(self.cli_connect_delay)
s = self.connect_cli_server()
- # Update the register array locations with required values
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0xa1a2 0x123456789012\n"
- self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0xb1b2 0x12345678\n"
- self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0xc1 0x1234\n"
+ CMD_FILE = "/tmp/pipeline/table_010/cmd_files/cmd_1.txt"
+ CLI_CMD = "pipeline PIPELINE0 table table_010 add {}\n".format(CMD_FILE)
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0xd1 0x12\n"
+ CLI_CMD = "pipeline PIPELINE0 commit\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- s.close()
- # Read updated values through packet
- in_pcap = "pipeline/reg_002/pcap_files/in_1.txt"
- out_pcap = "pipeline/reg_002/pcap_files/out_1.txt"
- self.send_and_sniff_pkts(0, 0, in_pcap, out_pcap, "tcp")
+ in_pcap = ["pipeline/table_010/pcap_files/in_1.txt"] * 4
+ out_pcap = ["pipeline/table_010/pcap_files/out_1.txt"] * 4
+ filters = ["tcp"] * 4
+ tx_port = [0, 1, 2, 3]
+ rx_port = [0, 1, 2, 3]
+
+ sleep(2)
+ self.send_and_sniff_multiple(tx_port, rx_port, in_pcap, out_pcap, filters)
+
+ s.close()
self.dut.send_expect("^C", "# ", 20)
- def test_reg_003(self):
+ def test_table_011(self):
- cli_file = "/tmp/pipeline/reg_003/reg_003.cli"
+ cli_file = "/tmp/pipeline/table_011/table_011.cli"
self.run_dpdk_app(cli_file)
- sleep(CLI_SERVER_CONNECT_DELAY)
+ sleep(self.cli_connect_delay)
s = self.connect_cli_server()
- # Update the register array locations with required values
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x1a1a2a3 0x123456789012\n"
- self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x7fb1b2 0x12345678\n"
+ CMD_FILE = "/tmp/pipeline/table_011/cmd_files/cmd_1.txt"
+ CLI_CMD = "pipeline PIPELINE0 table table_011 add {}\n".format(CMD_FILE)
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x7fc1 0x1234\n"
- self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x7f 0x12\n"
+ CLI_CMD = "pipeline PIPELINE0 commit\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- s.close()
- # Read updated values through packet
- in_pcap = "pipeline/reg_003/pcap_files/in_1.txt"
- out_pcap = "pipeline/reg_003/pcap_files/out_1.txt"
- self.send_and_sniff_pkts(0, 0, in_pcap, out_pcap, "tcp")
+ in_pcap = ["pipeline/table_011/pcap_files/in_1.txt"] * 4
+ out_pcap = ["pipeline/table_011/pcap_files/out_1.txt"] * 4
+ filters = ["udp"] * 4
+ tx_port = [0, 1, 2, 3]
+ rx_port = [0, 1, 2, 3]
+
+ sleep(2)
+ self.send_and_sniff_multiple(tx_port, rx_port, in_pcap, out_pcap, filters)
+
+ in_pcap = ["pipeline/table_011/pcap_files/in_2.txt"] * 4
+ out_pcap = ["pipeline/table_011/pcap_files/out_2.txt"] * 4
+ filters = ["tcp"] * 4
+
+ sleep(2)
+ self.send_and_sniff_multiple(tx_port, rx_port, in_pcap, out_pcap, filters)
+
+ s.close()
self.dut.send_expect("^C", "# ", 20)
- def test_reg_004(self):
+ def test_table_012(self):
- cli_file = "/tmp/pipeline/reg_004/reg_004.cli"
+ cli_file = "/tmp/pipeline/table_012/table_012.cli"
self.run_dpdk_app(cli_file)
- sleep(CLI_SERVER_CONNECT_DELAY)
+ sleep(self.cli_connect_delay)
s = self.connect_cli_server()
- # Update the register array locations with required values
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x1a1a2a3 0x123456789012\n"
- self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x7fb1b2 0x12345678\n"
+ CMD_FILE = "/tmp/pipeline/table_012/cmd_files/cmd_1.txt"
+ CLI_CMD = "pipeline PIPELINE0 table table_012 add {}\n".format(CMD_FILE)
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x7fc1 0x1234\n"
- self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x7f 0x12\n"
+ CLI_CMD = "pipeline PIPELINE0 commit\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- s.close()
- # Read updated values through packet
- in_pcap = "pipeline/reg_004/pcap_files/in_1.txt"
- out_pcap = "pipeline/reg_004/pcap_files/out_1.txt"
- self.send_and_sniff_pkts(0, 0, in_pcap, out_pcap, "tcp")
+ in_pcap = ["pipeline/table_012/pcap_files/in_1.txt"] * 4
+ out_pcap = ["pipeline/table_012/pcap_files/out_1.txt"] * 4
+ filters = ["tcp"] * 4
+ tx_port = [0, 1, 2, 3]
+ rx_port = [0, 1, 2, 3]
+
+ sleep(2)
+ self.send_and_sniff_multiple(tx_port, rx_port, in_pcap, out_pcap, filters)
+
+ s.close()
self.dut.send_expect("^C", "# ", 20)
- def test_reg_005(self):
+ def test_table_013(self):
- cli_file = "/tmp/pipeline/reg_005/reg_005.cli"
+ cli_file = "/tmp/pipeline/table_013/table_013.cli"
self.run_dpdk_app(cli_file)
- sleep(CLI_SERVER_CONNECT_DELAY)
+ sleep(self.cli_connect_delay)
s = self.connect_cli_server()
- # Update the register array locations with required values
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x1a1a2a3 0x123456789012\n"
+ CMD_FILE = "/tmp/pipeline/table_013/cmd_files/cmd_1.txt"
+ CLI_CMD = "pipeline PIPELINE0 table table_013 add {}\n".format(CMD_FILE)
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x7fb1b2 0x12345678\n"
- self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x7fc1 0x1234\n"
- self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x7f 0x12\n"
+ CLI_CMD = "pipeline PIPELINE0 commit\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- s.close()
- # Read updated values through packet
- in_pcap = "pipeline/reg_005/pcap_files/in_1.txt"
- out_pcap = "pipeline/reg_005/pcap_files/out_1.txt"
- self.send_and_sniff_pkts(0, 0, in_pcap, out_pcap, "tcp")
+ in_pcap = ["pipeline/table_013/pcap_files/in_1.txt"] * 4
+ out_pcap = ["pipeline/table_013/pcap_files/out_1.txt"] * 4
+ filters = ["tcp"] * 4
+ tx_port = [0, 1, 2, 3]
+ rx_port = [0, 1, 2, 3]
+
+ sleep(2)
+ self.send_and_sniff_multiple(tx_port, rx_port, in_pcap, out_pcap, filters)
+
+ s.close()
self.dut.send_expect("^C", "# ", 20)
- def test_reg_006(self):
+ def test_table_014(self):
- cli_file = "/tmp/pipeline/reg_006/reg_006.cli"
+ cli_file = "/tmp/pipeline/table_014/table_014.cli"
self.run_dpdk_app(cli_file)
- sleep(CLI_SERVER_CONNECT_DELAY)
+ sleep(self.cli_connect_delay)
s = self.connect_cli_server()
- # Update the register array locations with required values
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0xa1a2 0x123456789012\n"
- self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0xb1b2 0x12345678\n"
+ CMD_FILE = "/tmp/pipeline/table_014/cmd_files/cmd_1.txt"
+ CLI_CMD = "pipeline PIPELINE0 table table_014 add {}\n".format(CMD_FILE)
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0xc1 0x1234\n"
- self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0xd1 0x12\n"
+ CLI_CMD = "pipeline PIPELINE0 commit\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- # Send a packet to trigger the execution of apply block
- in_pcap = "pipeline/reg_006/pcap_files/in_1.txt"
- self.send_pkts(0, 0, in_pcap)
+ in_pcap = ["pipeline/table_014/pcap_files/in_1.txt"] * 4
+ out_pcap = ["pipeline/table_014/pcap_files/out_1.txt"] * 4
+ filters = ["udp port 4789"] * 4
+ tx_port = [0, 1, 2, 3]
+ rx_port = [0, 1, 2, 3]
- # Verify written vs read values
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xa3a4\n"
- self.socket_send_cmd(s, CLI_CMD, "0x123456789012\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xb3b4\n"
- self.socket_send_cmd(s, CLI_CMD, "0x12345678\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xc2\n"
- self.socket_send_cmd(s, CLI_CMD, "0x1234\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xd2\n"
- self.socket_send_cmd(s, CLI_CMD, "0x12\npipeline> ")
+ self.send_and_sniff_multiple(tx_port, rx_port, in_pcap, out_pcap, filters)
+
+ in_pcap = ["pipeline/table_014/pcap_files/in_2.txt"] * 4
+ out_pcap = ["pipeline/table_014/pcap_files/out_2.txt"] * 4
+ filters = ["udp port 200"] * 4
+ tx_port = [0, 1, 2, 3]
+ rx_port = [0, 1, 2, 3]
+
+ self.send_and_sniff_multiple(tx_port, rx_port, in_pcap, out_pcap, filters)
s.close()
self.dut.send_expect("^C", "# ", 20)
- def test_reg_007(self):
+ def test_table_015(self):
- cli_file = "/tmp/pipeline/reg_007/reg_007.cli"
+ cli_file = "/tmp/pipeline/table_015/table_015.cli"
self.run_dpdk_app(cli_file)
- sleep(CLI_SERVER_CONNECT_DELAY)
+ sleep(self.cli_connect_delay)
s = self.connect_cli_server()
- # Update the register array locations with required values
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0xa1a2 0x123456789012\n"
- self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0xb1b2 0x12345678\n"
+ CMD_FILE = "/tmp/pipeline/table_015/cmd_files/cmd_1.txt"
+ CLI_CMD = "pipeline PIPELINE0 table table_015 add {}\n".format(CMD_FILE)
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0xc1 0x1234\n"
- self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0xd1 0x12\n"
+ CLI_CMD = "pipeline PIPELINE0 commit\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- # Send a packet to trigger the execution of apply block
- in_pcap = "pipeline/reg_007/pcap_files/in_1.txt"
- self.send_pkts(0, 0, in_pcap)
+ in_pcap = ["pipeline/table_015/pcap_files/in_1.txt"] * 4
+ out_pcap = ["pipeline/table_015/pcap_files/out_1.txt"] * 4
+ filters = ["udp port 4789"] * 4
+ tx_port = [0, 1, 2, 3]
+ rx_port = [0, 1, 2, 3]
- # Verify written vs read values
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xa3a4\n"
- self.socket_send_cmd(s, CLI_CMD, "0x123456789012\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xb3b4\n"
- self.socket_send_cmd(s, CLI_CMD, "0x12345678\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xc2\n"
- self.socket_send_cmd(s, CLI_CMD, "0x1234\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xd2\n"
- self.socket_send_cmd(s, CLI_CMD, "0x12\npipeline> ")
+ self.send_and_sniff_multiple(tx_port, rx_port, in_pcap, out_pcap, filters)
+
+ in_pcap = ["pipeline/table_015/pcap_files/in_2.txt"] * 4
+ out_pcap = ["pipeline/table_015/pcap_files/out_2.txt"] * 4
+ filters = ["udp port 200"] * 4
+ tx_port = [0, 1, 2, 3]
+
+ self.send_and_sniff_multiple(tx_port, rx_port, in_pcap, out_pcap, filters)
s.close()
self.dut.send_expect("^C", "# ", 20)
- def test_reg_008(self):
+ def test_table_016(self):
- cli_file = "/tmp/pipeline/reg_008/reg_008.cli"
+ cli_file = "/tmp/pipeline/table_016/table_016.cli"
self.run_dpdk_app(cli_file)
- sleep(CLI_SERVER_CONNECT_DELAY)
+ sleep(self.cli_connect_delay)
s = self.connect_cli_server()
- # Update the register array locations with required values
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x1a1a2a3 0x123456789012\n"
- self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x7fb1b2 0x12345678\n"
- self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x7fc1 0x1234\n"
+ CMD_FILE = "/tmp/pipeline/table_016/cmd_files/cmd_1.txt"
+ CLI_CMD = "pipeline PIPELINE0 table table_016 add {}\n".format(CMD_FILE)
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x7f 0x12\n"
+ CLI_CMD = "pipeline PIPELINE0 commit\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- # Send a packet to trigger the execution of apply block
- in_pcap = "pipeline/reg_008/pcap_files/in_1.txt"
- self.send_pkts(0, 0, in_pcap)
+ in_pcap = ["pipeline/table_016/pcap_files/in_1.txt"] * 4
+ out_pcap = ["pipeline/table_016/pcap_files/out_1.txt"] * 4
+ filters = ["udp port 4789"] * 4
+ tx_port = [0, 1, 2, 3]
+ rx_port = [0, 1, 2, 3]
- # Verify written vs read values
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xa3a4\n"
- self.socket_send_cmd(s, CLI_CMD, "0x123456789012\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xb3b4\n"
- self.socket_send_cmd(s, CLI_CMD, "0x12345678\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xc2\n"
- self.socket_send_cmd(s, CLI_CMD, "0x1234\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xd2\n"
- self.socket_send_cmd(s, CLI_CMD, "0x12\npipeline> ")
+ self.send_and_sniff_multiple(tx_port, rx_port, in_pcap, out_pcap, filters)
+
+ in_pcap = ["pipeline/table_016/pcap_files/in_2.txt"] * 4
+ out_pcap = ["pipeline/table_016/pcap_files/out_2.txt"] * 4
+ filters = ["udp port 200"] * 4
+ tx_port = [0, 1, 2, 3]
+
+ self.send_and_sniff_multiple(tx_port, rx_port, in_pcap, out_pcap, filters)
s.close()
self.dut.send_expect("^C", "# ", 20)
- def test_reg_009(self):
+ def test_table_017(self):
- cli_file = "/tmp/pipeline/reg_009/reg_009.cli"
+ cli_file = "/tmp/pipeline/table_017/table_017.cli"
self.run_dpdk_app(cli_file)
- sleep(CLI_SERVER_CONNECT_DELAY)
+ sleep(self.cli_connect_delay)
s = self.connect_cli_server()
- # Update the register array locations with required values
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x1a1a2a3 0x123456789012\n"
- self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x7fb1b2 0x12345678\n"
+ CMD_FILE = "/tmp/pipeline/table_017/cmd_files/cmd_1.txt"
+ CLI_CMD = "pipeline PIPELINE0 table table_017 add {}\n".format(CMD_FILE)
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x7fc1 0x1234\n"
- self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x7f 0x12\n"
+ CLI_CMD = "pipeline PIPELINE0 commit\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- # Send a packet to trigger the execution of apply block
- in_pcap = "pipeline/reg_009/pcap_files/in_1.txt"
- self.send_pkts(0, 0, in_pcap)
+ in_pcap = ["pipeline/table_017/pcap_files/in_1.txt"] * 4
+ out_pcap = ["pipeline/table_017/pcap_files/out_1.txt"] * 4
+ filters = ["udp port 4789"] * 4
+ tx_port = [0, 1, 2, 3]
+ rx_port = [0, 1, 2, 3]
- # Verify written vs read values
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xa3a4\n"
- self.socket_send_cmd(s, CLI_CMD, "0x123456789012\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xb3b4\n"
- self.socket_send_cmd(s, CLI_CMD, "0x12345678\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xc2\n"
- self.socket_send_cmd(s, CLI_CMD, "0x1234\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xd2\n"
- self.socket_send_cmd(s, CLI_CMD, "0x12\npipeline> ")
+ self.send_and_sniff_multiple(tx_port, rx_port, in_pcap, out_pcap, filters)
+
+ in_pcap = ["pipeline/table_017/pcap_files/in_2.txt"] * 4
+ out_pcap = ["pipeline/table_017/pcap_files/out_2.txt"] * 4
+ filters = ["udp port 200"] * 4
+ tx_port = [0, 1, 2, 3]
+
+ self.send_and_sniff_multiple(tx_port, rx_port, in_pcap, out_pcap, filters)
s.close()
self.dut.send_expect("^C", "# ", 20)
- def test_reg_010(self):
+ def test_table_018(self):
- cli_file = "/tmp/pipeline/reg_010/reg_010.cli"
+ cli_file = "/tmp/pipeline/table_018/table_018.cli"
self.run_dpdk_app(cli_file)
- sleep(CLI_SERVER_CONNECT_DELAY)
+ sleep(self.cli_connect_delay)
s = self.connect_cli_server()
- # Verify the default initial values of zero
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xa1a2\n"
- self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xb1b2\n"
- self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xc1\n"
- self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xd1\n"
- self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
+ CMD_FILE = "/tmp/pipeline/table_018/cmd_files/cmd_1.txt"
+ CLI_CMD = "pipeline PIPELINE0 table table_018 add {}\n".format(CMD_FILE)
+ self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
+ CLI_CMD = "pipeline PIPELINE0 commit\n"
+ self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- # Send packet to DUT to update the register array
- in_pcap = "pipeline/reg_010/pcap_files/in_1.txt"
- self.send_pkts(0, 0, in_pcap)
+ in_pcap = ["pipeline/table_018/pcap_files/in_1.txt"] * 4
+ out_pcap = ["pipeline/table_018/pcap_files/out_1.txt"] * 4
+ filters = ["udp port 4789"] * 4
+ tx_port = [0, 1, 2, 3]
+ rx_port = [0, 1, 2, 3]
- # Verify whether the register array is updated with required values
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xa1a2\n"
- self.socket_send_cmd(s, CLI_CMD, "0x123456789012\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xb1b2\n"
- self.socket_send_cmd(s, CLI_CMD, "0x12345678\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xc1\n"
- self.socket_send_cmd(s, CLI_CMD, "0x1234\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xd1\n"
- self.socket_send_cmd(s, CLI_CMD, "0x6\npipeline> ")
+ self.send_and_sniff_multiple(tx_port, rx_port, in_pcap, out_pcap, filters)
+
+ in_pcap = ["pipeline/table_018/pcap_files/in_2.txt"] * 4
+ out_pcap = ["pipeline/table_018/pcap_files/out_2.txt"] * 4
+ filters = ["udp port 200"] * 4
+ tx_port = [0, 1, 2, 3]
+
+ self.send_and_sniff_multiple(tx_port, rx_port, in_pcap, out_pcap, filters)
s.close()
self.dut.send_expect("^C", "# ", 20)
- def test_reg_011(self):
+ def test_table_019(self):
- cli_file = "/tmp/pipeline/reg_011/reg_011.cli"
+ cli_file = "/tmp/pipeline/table_019/table_019.cli"
self.run_dpdk_app(cli_file)
- sleep(CLI_SERVER_CONNECT_DELAY)
+ sleep(self.cli_connect_delay)
s = self.connect_cli_server()
- # Verify the default initial values of zero
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xa1a2\n"
- self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xb1b2\n"
- self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xc1\n"
- self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xd1\n"
- self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
-
+ CMD_FILE = "/tmp/pipeline/table_019/cmd_files/cmd_1.txt"
+ CLI_CMD = "pipeline PIPELINE0 table table_019 add {}\n".format(CMD_FILE)
+ self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
+ CLI_CMD = "pipeline PIPELINE0 commit\n"
+ self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
+
+ in_pcap = ["pipeline/table_019/pcap_files/in_1.txt"] * 4
+ out_pcap = ["pipeline/table_019/pcap_files/out_1.txt"] * 4
+ filters = ["udp port 4789"] * 4
+ tx_port = [0, 1, 2, 3]
+ rx_port = [0, 1, 2, 3]
+
+ self.send_and_sniff_multiple(tx_port, rx_port, in_pcap, out_pcap, filters)
+
+ in_pcap = ["pipeline/table_019/pcap_files/in_2.txt"] * 4
+ out_pcap = ["pipeline/table_019/pcap_files/out_2.txt"] * 4
+ filters = ["udp port 200"] * 4
+ tx_port = [0, 1, 2, 3]
+
+ self.send_and_sniff_multiple(tx_port, rx_port, in_pcap, out_pcap, filters)
+
+ s.close()
+ self.dut.send_expect("^C", "# ", 20)
+
+ def test_table_020(self):
+
+ cli_file = "/tmp/pipeline/table_020/table_020.cli"
+ self.run_dpdk_app(cli_file)
+ sleep(self.cli_connect_delay)
+ s = self.connect_cli_server()
+
+ CMD_FILE = "/tmp/pipeline/table_020/cmd_files/cmd_1.txt"
+ CLI_CMD = "pipeline PIPELINE0 table table_020 add {}\n".format(CMD_FILE)
+ self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
+ CLI_CMD = "pipeline PIPELINE0 commit\n"
+ self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
+
+ in_pcap = ["pipeline/table_020/pcap_files/in_1.txt"] * 4
+ out_pcap = ["pipeline/table_020/pcap_files/out_1.txt"] * 4
+ filters = ["udp port 4789"] * 4
+ tx_port = [0, 1, 2, 3]
+ rx_port = [0, 1, 2, 3]
+
+ self.send_and_sniff_multiple(tx_port, rx_port, in_pcap, out_pcap, filters)
+
+ in_pcap = ["pipeline/table_020/pcap_files/in_2.txt"] * 4
+ out_pcap = ["pipeline/table_020/pcap_files/out_2.txt"] * 4
+ filters = ["udp port 200"] * 4
+ tx_port = [0, 1, 2, 3]
+
+ self.send_and_sniff_multiple(tx_port, rx_port, in_pcap, out_pcap, filters)
+
+ s.close()
+ self.dut.send_expect("^C", "# ", 20)
+
+ def test_table_021(self):
+
+ cli_file = "/tmp/pipeline/table_021/table_021.cli"
+ self.run_dpdk_app(cli_file)
+ sleep(self.cli_connect_delay)
+ s = self.connect_cli_server()
+
+ CMD_FILE = "/tmp/pipeline/table_021/cmd_files/cmd_1.txt"
+ CLI_CMD = "pipeline PIPELINE0 table table_021 add {}\n".format(CMD_FILE)
+ self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
+ CLI_CMD = "pipeline PIPELINE0 commit\n"
+ self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
+
+ in_pcap = ["pipeline/table_021/pcap_files/in_1.txt"] * 4
+ out_pcap = ["pipeline/table_021/pcap_files/out_1.txt"] * 4
+ filters = ["udp port 4789"] * 4
+ tx_port = [0, 1, 2, 3]
+ rx_port = [0, 1, 2, 3]
+
+ self.send_and_sniff_multiple(tx_port, rx_port, in_pcap, out_pcap, filters)
+
+ in_pcap = ["pipeline/table_021/pcap_files/in_2.txt"] * 4
+ out_pcap = ["pipeline/table_021/pcap_files/out_2.txt"] * 4
+ filters = ["udp port 200"] * 4
+ tx_port = [0, 1, 2, 3]
+
+ self.send_and_sniff_multiple(tx_port, rx_port, in_pcap, out_pcap, filters)
+
+ s.close()
+ self.dut.send_expect("^C", "# ", 20)
+
+ def test_reg_001(self):
+
+ cli_file = "/tmp/pipeline/reg_001/reg_001.cli"
+ self.run_dpdk_app(cli_file)
+ sleep(self.cli_connect_delay)
+ s = self.connect_cli_server()
+
+ # Read default initial value
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x0\n"
+ self.socket_send_cmd(s, CLI_CMD, "0x12\npipeline> ")
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x1\n"
+ self.socket_send_cmd(s, CLI_CMD, "0x12\npipeline> ")
+
+ # Update the register array location
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xab index 0x0\n"
+ self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
+
+ # Verify updated value
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x0\n"
+ self.socket_send_cmd(s, CLI_CMD, "0xab\npipeline> ")
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x1\n"
+ self.socket_send_cmd(s, CLI_CMD, "0x12\npipeline> ")
+
+ s.close()
+ self.dut.send_expect("^C", "# ", 20)
+
+ def test_reg_002(self):
+
+ cli_file = "/tmp/pipeline/reg_002/reg_002.cli"
+ self.run_dpdk_app(cli_file)
+ sleep(self.cli_connect_delay)
+ s = self.connect_cli_server()
+
+ # Update the register array locations with required values
+ CLI_CMD = (
+ "pipeline PIPELINE0 regwr REG_ARR_1 value 0x123456789012 index 0xa1a2\n"
+ )
+ self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0x12345678 index 0xb1b2\n"
+ self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0x1234 index 0xc1\n"
+ self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0x12 index 0xd1\n"
+ self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
+ s.close()
+
+ # Read updated values through packet
+ in_pcap = "pipeline/reg_002/pcap_files/in_1.txt"
+ out_pcap = "pipeline/reg_002/pcap_files/out_1.txt"
+ self.send_and_sniff_pkts(0, 0, in_pcap, out_pcap, "tcp")
+ self.dut.send_expect("^C", "# ", 20)
+
+ def test_reg_003(self):
+
+ cli_file = "/tmp/pipeline/reg_003/reg_003.cli"
+ self.run_dpdk_app(cli_file)
+ sleep(self.cli_connect_delay)
+ s = self.connect_cli_server()
+
+ # Update the register array locations with required values
+ CLI_CMD = (
+ "pipeline PIPELINE0 regwr REG_ARR_1 value 0x123456789012 index 0x1a1a2a3\n"
+ )
+ self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0x12345678 index 0x7fb1b2\n"
+ self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0x1234 index 0x7fc1\n"
+ self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0x12 index 0x7f\n"
+ self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
+ s.close()
+
+ # Read updated values through packet
+ in_pcap = "pipeline/reg_003/pcap_files/in_1.txt"
+ out_pcap = "pipeline/reg_003/pcap_files/out_1.txt"
+ self.send_and_sniff_pkts(0, 0, in_pcap, out_pcap, "tcp")
+ self.dut.send_expect("^C", "# ", 20)
+
+ def test_reg_004(self):
+
+ cli_file = "/tmp/pipeline/reg_004/reg_004.cli"
+ self.run_dpdk_app(cli_file)
+ sleep(self.cli_connect_delay)
+ s = self.connect_cli_server()
+
+ # Update the register array locations with required values
+ CLI_CMD = (
+ "pipeline PIPELINE0 regwr REG_ARR_1 value 0x123456789012 index 0x1a1a2a3\n"
+ )
+ self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0x12345678 index 0x7fb1b2\n"
+ self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0x1234 index 0x7fc1\n"
+ self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0x12 index 0x7f\n"
+ self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
+ s.close()
+
+ # Read updated values through packet
+ in_pcap = "pipeline/reg_004/pcap_files/in_1.txt"
+ out_pcap = "pipeline/reg_004/pcap_files/out_1.txt"
+ self.send_and_sniff_pkts(0, 0, in_pcap, out_pcap, "tcp")
+ self.dut.send_expect("^C", "# ", 20)
+
+ def test_reg_005(self):
+
+ cli_file = "/tmp/pipeline/reg_005/reg_005.cli"
+ self.run_dpdk_app(cli_file)
+ sleep(self.cli_connect_delay)
+ s = self.connect_cli_server()
+
+ # Update the register array locations with required values
+ CLI_CMD = (
+ "pipeline PIPELINE0 regwr REG_ARR_1 value 0x123456789012 index 0x1a1a2a3\n"
+ )
+ self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0x12345678 index 0x7fb1b2\n"
+ self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0x1234 index 0x7fc1\n"
+ self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0x12 index 0x7f\n"
+ self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
+ s.close()
+
+ # Read updated values through packet
+ in_pcap = "pipeline/reg_005/pcap_files/in_1.txt"
+ out_pcap = "pipeline/reg_005/pcap_files/out_1.txt"
+ self.send_and_sniff_pkts(0, 0, in_pcap, out_pcap, "tcp")
+ self.dut.send_expect("^C", "# ", 20)
+
+ def test_reg_006(self):
+
+ cli_file = "/tmp/pipeline/reg_006/reg_006.cli"
+ self.run_dpdk_app(cli_file)
+ sleep(self.cli_connect_delay)
+ s = self.connect_cli_server()
+
+ # Update the register array locations with required values
+ CLI_CMD = (
+ "pipeline PIPELINE0 regwr REG_ARR_1 value 0x123456789012 index 0xa1a2\n"
+ )
+ self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0x12345678 index 0xb1b2\n"
+ self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0x1234 index 0xc1\n"
+ self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0x12 index 0xd1\n"
+ self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
+
+ # Send a packet to trigger the execution of apply block
+ in_pcap = "pipeline/reg_006/pcap_files/in_1.txt"
+ self.send_pkts(0, 0, in_pcap)
+
+ # Verify written vs read values
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xa3a4\n"
+ self.socket_send_cmd(s, CLI_CMD, "0x123456789012\npipeline> ")
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xb3b4\n"
+ self.socket_send_cmd(s, CLI_CMD, "0x12345678\npipeline> ")
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xc2\n"
+ self.socket_send_cmd(s, CLI_CMD, "0x1234\npipeline> ")
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xd2\n"
+ self.socket_send_cmd(s, CLI_CMD, "0x12\npipeline> ")
+
+ s.close()
+ self.dut.send_expect("^C", "# ", 20)
+
+ def test_reg_007(self):
+
+ cli_file = "/tmp/pipeline/reg_007/reg_007.cli"
+ self.run_dpdk_app(cli_file)
+ sleep(self.cli_connect_delay)
+ s = self.connect_cli_server()
+
+ # Update the register array locations with required values
+ CLI_CMD = (
+ "pipeline PIPELINE0 regwr REG_ARR_1 value 0x123456789012 index 0xa1a2\n"
+ )
+ self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0x12345678 index 0xb1b2\n"
+ self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0x1234 index 0xc1\n"
+ self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0x12 index 0xd1\n"
+ self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
+
+ # Send a packet to trigger the execution of apply block
+ in_pcap = "pipeline/reg_007/pcap_files/in_1.txt"
+ self.send_pkts(0, 0, in_pcap)
+
+ # Verify written vs read values
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xa3a4\n"
+ self.socket_send_cmd(s, CLI_CMD, "0x123456789012\npipeline> ")
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xb3b4\n"
+ self.socket_send_cmd(s, CLI_CMD, "0x12345678\npipeline> ")
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xc2\n"
+ self.socket_send_cmd(s, CLI_CMD, "0x1234\npipeline> ")
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xd2\n"
+ self.socket_send_cmd(s, CLI_CMD, "0x12\npipeline> ")
+
+ s.close()
+ self.dut.send_expect("^C", "# ", 20)
+
+ def test_reg_008(self):
+
+ cli_file = "/tmp/pipeline/reg_008/reg_008.cli"
+ self.run_dpdk_app(cli_file)
+ sleep(self.cli_connect_delay)
+ s = self.connect_cli_server()
+
+ # Update the register array locations with required values
+ CLI_CMD = (
+ "pipeline PIPELINE0 regwr REG_ARR_1 value 0x123456789012 index 0x1a1a2a3\n"
+ )
+ self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0x12345678 index 0x7fb1b2\n"
+ self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0x1234 index 0x7fc1\n"
+ self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0x12 index 0x7f\n"
+ self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
+
+ # Send a packet to trigger the execution of apply block
+ in_pcap = "pipeline/reg_008/pcap_files/in_1.txt"
+ self.send_pkts(0, 0, in_pcap)
+
+ # Verify written vs read values
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xa3a4\n"
+ self.socket_send_cmd(s, CLI_CMD, "0x123456789012\npipeline> ")
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xb3b4\n"
+ self.socket_send_cmd(s, CLI_CMD, "0x12345678\npipeline> ")
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xc2\n"
+ self.socket_send_cmd(s, CLI_CMD, "0x1234\npipeline> ")
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xd2\n"
+ self.socket_send_cmd(s, CLI_CMD, "0x12\npipeline> ")
+
+ s.close()
+ self.dut.send_expect("^C", "# ", 20)
+
+ def test_reg_009(self):
+
+ cli_file = "/tmp/pipeline/reg_009/reg_009.cli"
+ self.run_dpdk_app(cli_file)
+ sleep(self.cli_connect_delay)
+ s = self.connect_cli_server()
+
+ # Update the register array locations with required values
+ CLI_CMD = (
+ "pipeline PIPELINE0 regwr REG_ARR_1 value 0x123456789012 index 0x1a1a2a3\n"
+ )
+ self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0x12345678 index 0x7fb1b2\n"
+ self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0x1234 index 0x7fc1\n"
+ self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0x12 index 0x7f\n"
+ self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
+
+ # Send a packet to trigger the execution of apply block
+ in_pcap = "pipeline/reg_009/pcap_files/in_1.txt"
+ self.send_pkts(0, 0, in_pcap)
+
+ # Verify written vs read values
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xa3a4\n"
+ self.socket_send_cmd(s, CLI_CMD, "0x123456789012\npipeline> ")
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xb3b4\n"
+ self.socket_send_cmd(s, CLI_CMD, "0x12345678\npipeline> ")
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xc2\n"
+ self.socket_send_cmd(s, CLI_CMD, "0x1234\npipeline> ")
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xd2\n"
+ self.socket_send_cmd(s, CLI_CMD, "0x12\npipeline> ")
+
+ s.close()
+ self.dut.send_expect("^C", "# ", 20)
+
+ def test_reg_010(self):
+
+ cli_file = "/tmp/pipeline/reg_010/reg_010.cli"
+ self.run_dpdk_app(cli_file)
+ sleep(self.cli_connect_delay)
+ s = self.connect_cli_server()
+
+ # Verify the default initial values of zero
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xa1a2\n"
+ self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xb1b2\n"
+ self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xc1\n"
+ self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xd1\n"
+ self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
+
+ # Send packet to DUT to update the register array
+ in_pcap = "pipeline/reg_010/pcap_files/in_1.txt"
+ self.send_pkts(0, 0, in_pcap)
+
+ # Verify whether the register array is updated with required values
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xa1a2\n"
+ self.socket_send_cmd(s, CLI_CMD, "0x123456789012\npipeline> ")
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xb1b2\n"
+ self.socket_send_cmd(s, CLI_CMD, "0x12345678\npipeline> ")
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xc1\n"
+ self.socket_send_cmd(s, CLI_CMD, "0x1234\npipeline> ")
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xd1\n"
+ self.socket_send_cmd(s, CLI_CMD, "0x6\npipeline> ")
+
+ s.close()
+ self.dut.send_expect("^C", "# ", 20)
+
+ def test_reg_011(self):
+
+ cli_file = "/tmp/pipeline/reg_011/reg_011.cli"
+ self.run_dpdk_app(cli_file)
+ sleep(self.cli_connect_delay)
+ s = self.connect_cli_server()
+
+ # Verify the default initial values of zero
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xa1a2\n"
+ self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xb1b2\n"
+ self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xc1\n"
+ self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xd1\n"
+ self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
+
# Send packet to DUT to update the register array
in_pcap = "pipeline/reg_011/pcap_files/in_1.txt"
self.send_pkts(0, 0, in_pcap)
# Verify whether the register array is updated with required values
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xa1a2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xa1a2\n"
self.socket_send_cmd(s, CLI_CMD, "0x123456789012\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xb1b2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "0x12345678\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xc1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xc1\n"
self.socket_send_cmd(s, CLI_CMD, "0x1234\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xd1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xd1\n"
self.socket_send_cmd(s, CLI_CMD, "0x6\npipeline> ")
s.close()
@@ -3122,17 +3537,17 @@ class TestPipeline(TestCase):
cli_file = "/tmp/pipeline/reg_012/reg_012.cli"
self.run_dpdk_app(cli_file)
- sleep(CLI_SERVER_CONNECT_DELAY)
+ sleep(self.cli_connect_delay)
s = self.connect_cli_server()
# Verify the default initial values of zero
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xa1a2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xa1a2\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xb1b2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xc1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xc1\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xd1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xd1\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
# Send packet to DUT to update the register array
@@ -3140,13 +3555,13 @@ class TestPipeline(TestCase):
self.send_pkts(0, 0, in_pcap)
# Verify whether the register array is updated with required values
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xa1a2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xa1a2\n"
self.socket_send_cmd(s, CLI_CMD, "0x123456789012\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xb1b2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "0x12345678\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xc1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xc1\n"
self.socket_send_cmd(s, CLI_CMD, "0x1234\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xd1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xd1\n"
self.socket_send_cmd(s, CLI_CMD, "0x12\npipeline> ")
s.close()
@@ -3156,19 +3571,19 @@ class TestPipeline(TestCase):
cli_file = "/tmp/pipeline/reg_013/reg_013.cli"
self.run_dpdk_app(cli_file)
- sleep(CLI_SERVER_CONNECT_DELAY)
+ sleep(self.cli_connect_delay)
s = self.connect_cli_server()
# Verify the default initial values of zero
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xa1a2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xa1a2\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xb1b2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xc1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xc1\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xd1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xd1\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x06\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x06\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
# Send packet to DUT to update the register array
@@ -3176,15 +3591,15 @@ class TestPipeline(TestCase):
self.send_pkts(0, 0, in_pcap)
# Verify whether the register array is updated with required values
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xa1a2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xa1a2\n"
self.socket_send_cmd(s, CLI_CMD, "0x123456789012\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xb1b2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "0x12345678\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xc1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xc1\n"
self.socket_send_cmd(s, CLI_CMD, "0x1234\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xd1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xd1\n"
self.socket_send_cmd(s, CLI_CMD, "0x6\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x06\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x06\n"
self.socket_send_cmd(s, CLI_CMD, "0x9876543210987654\npipeline> ")
s.close()
@@ -3194,17 +3609,17 @@ class TestPipeline(TestCase):
cli_file = "/tmp/pipeline/reg_014/reg_014.cli"
self.run_dpdk_app(cli_file)
- sleep(CLI_SERVER_CONNECT_DELAY)
+ sleep(self.cli_connect_delay)
s = self.connect_cli_server()
# Verify the default initial values of zero
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xa1a2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xa1a2\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xb1b2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xc1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xc1\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xd1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xd1\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
# Send packet to DUT to update the register array
@@ -3212,13 +3627,13 @@ class TestPipeline(TestCase):
self.send_pkts(0, 0, in_pcap)
# Verify whether the register array is updated with required values
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xa1a2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xa1a2\n"
self.socket_send_cmd(s, CLI_CMD, "0x123456789012\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xb1b2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "0x12345678\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xc1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xc1\n"
self.socket_send_cmd(s, CLI_CMD, "0x1234\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xd1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xd1\n"
self.socket_send_cmd(s, CLI_CMD, "0x6\npipeline> ")
s.close()
@@ -3228,17 +3643,17 @@ class TestPipeline(TestCase):
cli_file = "/tmp/pipeline/reg_015/reg_015.cli"
self.run_dpdk_app(cli_file)
- sleep(CLI_SERVER_CONNECT_DELAY)
+ sleep(self.cli_connect_delay)
s = self.connect_cli_server()
# Verify the default initial values of zero
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xa1a2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xa1a2\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xb1b2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xc1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xc1\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xd1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xd1\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
# Send packet to DUT to update the register array
@@ -3246,13 +3661,13 @@ class TestPipeline(TestCase):
self.send_pkts(0, 0, in_pcap)
# Verify whether the register array is updated with required values
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xa1a2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xa1a2\n"
self.socket_send_cmd(s, CLI_CMD, "0x123456789012\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xb1b2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "0x12345678\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xc1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xc1\n"
self.socket_send_cmd(s, CLI_CMD, "0x1234\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xd1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xd1\n"
self.socket_send_cmd(s, CLI_CMD, "0x6\npipeline> ")
s.close()
@@ -3262,19 +3677,19 @@ class TestPipeline(TestCase):
cli_file = "/tmp/pipeline/reg_016/reg_016.cli"
self.run_dpdk_app(cli_file)
- sleep(CLI_SERVER_CONNECT_DELAY)
+ sleep(self.cli_connect_delay)
s = self.connect_cli_server()
# Verify the default initial values of zero
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x1a1a2a3\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x1a1a2a3\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7fb1b2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7fb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7fc1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7fc1\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7f\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7f\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xf7\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xf7\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
# Send packet to DUT to update the register array
@@ -3282,15 +3697,15 @@ class TestPipeline(TestCase):
self.send_pkts(0, 0, in_pcap)
# Verify whether the register array is updated with required values
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x1a1a2a3\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x1a1a2a3\n"
self.socket_send_cmd(s, CLI_CMD, "0x1234567890123456\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7fb1b2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7fb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "0x123456789012\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7fc1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7fc1\n"
self.socket_send_cmd(s, CLI_CMD, "0x12345678\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7f\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7f\n"
self.socket_send_cmd(s, CLI_CMD, "0x1234\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xf7\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xf7\n"
self.socket_send_cmd(s, CLI_CMD, "0x12\npipeline> ")
s.close()
@@ -3300,19 +3715,19 @@ class TestPipeline(TestCase):
cli_file = "/tmp/pipeline/reg_017/reg_017.cli"
self.run_dpdk_app(cli_file)
- sleep(CLI_SERVER_CONNECT_DELAY)
+ sleep(self.cli_connect_delay)
s = self.connect_cli_server()
# Verify the default initial values of zero
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x1a1a2a3\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x1a1a2a3\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7fb1b2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7fb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7fc1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7fc1\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7f\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7f\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xf7\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xf7\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
# Send packet to DUT to update the register array
@@ -3320,15 +3735,15 @@ class TestPipeline(TestCase):
self.send_pkts(0, 0, in_pcap)
# Verify whether the register array is updated with required values
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x1a1a2a3\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x1a1a2a3\n"
self.socket_send_cmd(s, CLI_CMD, "0x1234567890123456\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7fb1b2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7fb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "0x123456789012\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7fc1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7fc1\n"
self.socket_send_cmd(s, CLI_CMD, "0x12345678\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7f\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7f\n"
self.socket_send_cmd(s, CLI_CMD, "0x1234\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xf7\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xf7\n"
self.socket_send_cmd(s, CLI_CMD, "0x12\npipeline> ")
s.close()
@@ -3338,19 +3753,19 @@ class TestPipeline(TestCase):
cli_file = "/tmp/pipeline/reg_018/reg_018.cli"
self.run_dpdk_app(cli_file)
- sleep(CLI_SERVER_CONNECT_DELAY)
+ sleep(self.cli_connect_delay)
s = self.connect_cli_server()
# Verify the default initial values of zero
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x1a1a2a3\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x1a1a2a3\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7fb1b2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7fb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7fc1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7fc1\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7f\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7f\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xf7\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xf7\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
# Send packet to DUT to update the register array
@@ -3358,15 +3773,15 @@ class TestPipeline(TestCase):
self.send_pkts(0, 0, in_pcap)
# Verify whether the register array is updated with required values
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x1a1a2a3\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x1a1a2a3\n"
self.socket_send_cmd(s, CLI_CMD, "0x1234567890123456\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7fb1b2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7fb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "0x123456789012\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7fc1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7fc1\n"
self.socket_send_cmd(s, CLI_CMD, "0x12345678\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7f\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7f\n"
self.socket_send_cmd(s, CLI_CMD, "0x1234\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xf7\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xf7\n"
self.socket_send_cmd(s, CLI_CMD, "0x12\npipeline> ")
s.close()
@@ -3376,19 +3791,19 @@ class TestPipeline(TestCase):
cli_file = "/tmp/pipeline/reg_019/reg_019.cli"
self.run_dpdk_app(cli_file)
- sleep(CLI_SERVER_CONNECT_DELAY)
+ sleep(self.cli_connect_delay)
s = self.connect_cli_server()
# Verify the default initial values of zero
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x1a1a2a3\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x1a1a2a3\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7fb1b2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7fb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7fc1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7fc1\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7f\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7f\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xf7\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xf7\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
# Send packet to DUT to update the register array
@@ -3396,15 +3811,15 @@ class TestPipeline(TestCase):
self.send_pkts(0, 0, in_pcap)
# Verify whether the register array is updated with required values
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x1a1a2a3\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x1a1a2a3\n"
self.socket_send_cmd(s, CLI_CMD, "0x1234567890123456\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7fb1b2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7fb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "0x123456789012\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7fc1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7fc1\n"
self.socket_send_cmd(s, CLI_CMD, "0x12345678\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7f\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7f\n"
self.socket_send_cmd(s, CLI_CMD, "0x1234\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xf7\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xf7\n"
self.socket_send_cmd(s, CLI_CMD, "0x12\npipeline> ")
s.close()
@@ -3414,17 +3829,17 @@ class TestPipeline(TestCase):
cli_file = "/tmp/pipeline/reg_020/reg_020.cli"
self.run_dpdk_app(cli_file)
- sleep(CLI_SERVER_CONNECT_DELAY)
+ sleep(self.cli_connect_delay)
s = self.connect_cli_server()
# Verify the default initial values of zero
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xa1a2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xa1a2\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xb1b2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xc1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xc1\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xd1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xd1\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
# Send packet to DUT to update the register array
@@ -3432,13 +3847,13 @@ class TestPipeline(TestCase):
self.send_pkts(0, 0, in_pcap)
# Verify whether the register array is updated with required values
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xa1a2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xa1a2\n"
self.socket_send_cmd(s, CLI_CMD, "0x1234567890123456\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xb1b2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "0x123456789012\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xc1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xc1\n"
self.socket_send_cmd(s, CLI_CMD, "0x12345678\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xd1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xd1\n"
self.socket_send_cmd(s, CLI_CMD, "0x1234\npipeline> ")
s.close()
@@ -3448,19 +3863,19 @@ class TestPipeline(TestCase):
cli_file = "/tmp/pipeline/reg_021/reg_021.cli"
self.run_dpdk_app(cli_file)
- sleep(CLI_SERVER_CONNECT_DELAY)
+ sleep(self.cli_connect_delay)
s = self.connect_cli_server()
# Verify the default initial values of zero
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x1a1a2a3\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x1a1a2a3\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7fb1b2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7fb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7fc1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7fc1\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7f\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7f\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xf7\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xf7\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
# Send packet to DUT to update the register array
@@ -3468,15 +3883,15 @@ class TestPipeline(TestCase):
self.send_pkts(0, 0, in_pcap)
# Verify whether the register array is updated with required values
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x1a1a2a3\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x1a1a2a3\n"
self.socket_send_cmd(s, CLI_CMD, "0x1234567890123456\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7fb1b2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7fb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "0x123456789012\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7fc1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7fc1\n"
self.socket_send_cmd(s, CLI_CMD, "0x12345678\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7f\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7f\n"
self.socket_send_cmd(s, CLI_CMD, "0x1234\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xf7\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xf7\n"
self.socket_send_cmd(s, CLI_CMD, "0x12\npipeline> ")
s.close()
@@ -3486,17 +3901,17 @@ class TestPipeline(TestCase):
cli_file = "/tmp/pipeline/reg_022/reg_022.cli"
self.run_dpdk_app(cli_file)
- sleep(CLI_SERVER_CONNECT_DELAY)
+ sleep(self.cli_connect_delay)
s = self.connect_cli_server()
# Verify the default initial values of zero
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x1a1a2a3\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x1a1a2a3\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7fb1b2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7fb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7fc1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7fc1\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7f\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7f\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
# Send packet to DUT to update the register array
@@ -3504,13 +3919,13 @@ class TestPipeline(TestCase):
self.send_pkts(0, 0, in_pcap)
# Verify whether the register array is updated with required values
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x1a1a2a3\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x1a1a2a3\n"
self.socket_send_cmd(s, CLI_CMD, "0x123456789012\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7fb1b2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7fb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "0x12345678\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7fc1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7fc1\n"
self.socket_send_cmd(s, CLI_CMD, "0x1234\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7f\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7f\n"
self.socket_send_cmd(s, CLI_CMD, "0x6\npipeline> ")
s.close()
@@ -3520,19 +3935,19 @@ class TestPipeline(TestCase):
cli_file = "/tmp/pipeline/reg_023/reg_023.cli"
self.run_dpdk_app(cli_file)
- sleep(CLI_SERVER_CONNECT_DELAY)
+ sleep(self.cli_connect_delay)
s = self.connect_cli_server()
# Verify the default initial values of zero
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x1a1a2a3\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x1a1a2a3\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7fb1b2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7fb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7fc1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7fc1\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7f\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7f\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xf7\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xf7\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
# Send packet to DUT to update the register array
@@ -3540,15 +3955,15 @@ class TestPipeline(TestCase):
self.send_pkts(0, 0, in_pcap)
# Verify whether the register array is updated with required values
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x1a1a2a3\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x1a1a2a3\n"
self.socket_send_cmd(s, CLI_CMD, "0x1234567890123456\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7fb1b2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7fb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "0x123456789012\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7fc1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7fc1\n"
self.socket_send_cmd(s, CLI_CMD, "0x12345678\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7f\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7f\n"
self.socket_send_cmd(s, CLI_CMD, "0x1234\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xf7\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xf7\n"
self.socket_send_cmd(s, CLI_CMD, "0x12\npipeline> ")
s.close()
@@ -3558,19 +3973,19 @@ class TestPipeline(TestCase):
cli_file = "/tmp/pipeline/reg_024/reg_024.cli"
self.run_dpdk_app(cli_file)
- sleep(CLI_SERVER_CONNECT_DELAY)
+ sleep(self.cli_connect_delay)
s = self.connect_cli_server()
# Verify the default initial values of zero
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x1a1a2a3\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x1a1a2a3\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7fb1b2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7fb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7fc1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7fc1\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7f\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7f\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xf7\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xf7\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
# Send packet to DUT to update the register array
@@ -3578,15 +3993,15 @@ class TestPipeline(TestCase):
self.send_pkts(0, 0, in_pcap)
# Verify whether the register array is updated with required values
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x1a1a2a3\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x1a1a2a3\n"
self.socket_send_cmd(s, CLI_CMD, "0x1234567890123456\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7fb1b2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7fb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "0x123456789012\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7fc1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7fc1\n"
self.socket_send_cmd(s, CLI_CMD, "0x12345678\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7f\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7f\n"
self.socket_send_cmd(s, CLI_CMD, "0x1234\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xf7\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xf7\n"
self.socket_send_cmd(s, CLI_CMD, "0x12\npipeline> ")
s.close()
@@ -3596,17 +4011,17 @@ class TestPipeline(TestCase):
cli_file = "/tmp/pipeline/reg_025/reg_025.cli"
self.run_dpdk_app(cli_file)
- sleep(CLI_SERVER_CONNECT_DELAY)
+ sleep(self.cli_connect_delay)
s = self.connect_cli_server()
# Verify the default initial values of zero
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xa1a2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xa1a2\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xb1b2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xc1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xc1\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xd1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xd1\n"
self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
# Send packet to DUT to update the register array
@@ -3614,13 +4029,13 @@ class TestPipeline(TestCase):
self.send_pkts(0, 0, in_pcap)
# Verify whether the register array is updated with required values
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xa1a2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xa1a2\n"
self.socket_send_cmd(s, CLI_CMD, "0x1234567890123456\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xb1b2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "0x123456789012\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xc1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xc1\n"
self.socket_send_cmd(s, CLI_CMD, "0x12345678\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xd1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xd1\n"
self.socket_send_cmd(s, CLI_CMD, "0x1234\npipeline> ")
s.close()
@@ -3630,17 +4045,19 @@ class TestPipeline(TestCase):
cli_file = "/tmp/pipeline/reg_026/reg_026.cli"
self.run_dpdk_app(cli_file)
- sleep(CLI_SERVER_CONNECT_DELAY)
+ sleep(self.cli_connect_delay)
s = self.connect_cli_server()
# Initialize the register array locations with required values
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0xa1a2 0xff23456789012\n"
+ CLI_CMD = (
+ "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff23456789012 index 0xa1a2\n"
+ )
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0xb1b2 0xff5678\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff5678 index 0xb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0xc1 0xff234\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff234 index 0xc1\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0xd1 0xff2\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff2 index 0xd1\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
# Send packet to DUT to update the register array
@@ -3648,13 +4065,13 @@ class TestPipeline(TestCase):
self.send_pkts(0, 0, in_pcap)
# Verify whether the register array is updated with required values
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xa1a2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xa1a2\n"
self.socket_send_cmd(s, CLI_CMD, "0x100468acf12024\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xb1b2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "0x1333acf0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xc1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xc1\n"
self.socket_send_cmd(s, CLI_CMD, "0x100468\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xd1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xd1\n"
self.socket_send_cmd(s, CLI_CMD, "0xff8\npipeline> ")
s.close()
@@ -3664,17 +4081,19 @@ class TestPipeline(TestCase):
cli_file = "/tmp/pipeline/reg_027/reg_027.cli"
self.run_dpdk_app(cli_file)
- sleep(CLI_SERVER_CONNECT_DELAY)
+ sleep(self.cli_connect_delay)
s = self.connect_cli_server()
# Initialize the register array locations with required values
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0xa1a2 0xff23456789012\n"
+ CLI_CMD = (
+ "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff23456789012 index 0xa1a2\n"
+ )
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0xb1b2 0xff5678\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff5678 index 0xb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0xc1 0xff234\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff234 index 0xc1\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0xd1 0xff2\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff2 index 0xd1\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
# Send packet to DUT to update the register array
@@ -3682,13 +4101,13 @@ class TestPipeline(TestCase):
self.send_pkts(0, 0, in_pcap)
# Verify whether the register array is updated with required values
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xa1a2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xa1a2\n"
self.socket_send_cmd(s, CLI_CMD, "0x100468acf12024\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xb1b2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "0x1333acf0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xc1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xc1\n"
self.socket_send_cmd(s, CLI_CMD, "0x100468\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xd1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xd1\n"
self.socket_send_cmd(s, CLI_CMD, "0xff8\npipeline> ")
s.close()
@@ -3698,17 +4117,19 @@ class TestPipeline(TestCase):
cli_file = "/tmp/pipeline/reg_028/reg_028.cli"
self.run_dpdk_app(cli_file)
- sleep(CLI_SERVER_CONNECT_DELAY)
+ sleep(self.cli_connect_delay)
s = self.connect_cli_server()
# Initialize the register array locations with required values
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0xa1a2 0xff23456789012\n"
+ CLI_CMD = (
+ "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff23456789012 index 0xa1a2\n"
+ )
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0xb1b2 0xff5678\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff5678 index 0xb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0xc1 0xff234\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff234 index 0xc1\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0xd1 0xff2\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff2 index 0xd1\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
# Send packet to DUT to update the register array
@@ -3716,13 +4137,13 @@ class TestPipeline(TestCase):
self.send_pkts(0, 0, in_pcap)
# Verify whether the register array is updated with required values
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xa1a2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xa1a2\n"
self.socket_send_cmd(s, CLI_CMD, "0x100468acf12024\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xb1b2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "0x1333acf0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xc1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xc1\n"
self.socket_send_cmd(s, CLI_CMD, "0x100468\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xd1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xd1\n"
self.socket_send_cmd(s, CLI_CMD, "0xff8\npipeline> ")
s.close()
@@ -3732,17 +4153,19 @@ class TestPipeline(TestCase):
cli_file = "/tmp/pipeline/reg_029/reg_029.cli"
self.run_dpdk_app(cli_file)
- sleep(CLI_SERVER_CONNECT_DELAY)
+ sleep(self.cli_connect_delay)
s = self.connect_cli_server()
# Initialize the register array locations with required values
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0xa1a2 0xff23456789012\n"
+ CLI_CMD = (
+ "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff23456789012 index 0xa1a2\n"
+ )
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0xb1b2 0xff5678\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff5678 index 0xb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0xc1 0xff234\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff234 index 0xc1\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0xd1 0xff2\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff2 index 0xd1\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
# Send packet to DUT to update the register array
@@ -3750,13 +4173,13 @@ class TestPipeline(TestCase):
self.send_pkts(0, 0, in_pcap)
# Verify whether the register array is updated with required values
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xa1a2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xa1a2\n"
self.socket_send_cmd(s, CLI_CMD, "0x100468acf12024\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xb1b2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "0x1333acf0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xc1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xc1\n"
self.socket_send_cmd(s, CLI_CMD, "0x100468\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xd1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xd1\n"
self.socket_send_cmd(s, CLI_CMD, "0xff8\npipeline> ")
s.close()
@@ -3766,17 +4189,19 @@ class TestPipeline(TestCase):
cli_file = "/tmp/pipeline/reg_030/reg_030.cli"
self.run_dpdk_app(cli_file)
- sleep(CLI_SERVER_CONNECT_DELAY)
+ sleep(self.cli_connect_delay)
s = self.connect_cli_server()
# Initialize the register array locations with required values
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0xa1a2 0xff23456789012\n"
+ CLI_CMD = (
+ "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff23456789012 index 0xa1a2\n"
+ )
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0xb1b2 0xff5678\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff5678 index 0xb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0xc1 0xff234\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff234 index 0xc1\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0xd1 0xff2\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff2 index 0xd1\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
# Send packet to DUT to update the register array
@@ -3784,13 +4209,13 @@ class TestPipeline(TestCase):
self.send_pkts(0, 0, in_pcap)
# Verify whether the register array is updated with required values
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xa1a2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xa1a2\n"
self.socket_send_cmd(s, CLI_CMD, "0x100468acf12024\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xb1b2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "0x1333acf0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xc1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xc1\n"
self.socket_send_cmd(s, CLI_CMD, "0x100468\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xd1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xd1\n"
self.socket_send_cmd(s, CLI_CMD, "0xff8\npipeline> ")
s.close()
@@ -3800,17 +4225,19 @@ class TestPipeline(TestCase):
cli_file = "/tmp/pipeline/reg_031/reg_031.cli"
self.run_dpdk_app(cli_file)
- sleep(CLI_SERVER_CONNECT_DELAY)
+ sleep(self.cli_connect_delay)
s = self.connect_cli_server()
# Initialize the register array locations with required values
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x1a1a2a3 0xff23456789012\n"
+ CLI_CMD = (
+ "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff23456789012 index 0x1a1a2a3\n"
+ )
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x7fb1b2 0xff5678\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff5678 index 0x7fb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x7fc1 0xff234\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff234 index 0x7fc1\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x7f 0xff2\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff2 index 0x7f\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
# Send packet to DUT to update the register array
@@ -3818,13 +4245,13 @@ class TestPipeline(TestCase):
self.send_pkts(0, 0, in_pcap)
# Verify whether the register array is updated with required values
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x1a1a2a3\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x1a1a2a3\n"
self.socket_send_cmd(s, CLI_CMD, "0x100468acf12024\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7fb1b2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7fb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "0x1333acf0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7fc1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7fc1\n"
self.socket_send_cmd(s, CLI_CMD, "0x100468\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7f\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7f\n"
self.socket_send_cmd(s, CLI_CMD, "0xff8\npipeline> ")
s.close()
@@ -3834,19 +4261,21 @@ class TestPipeline(TestCase):
cli_file = "/tmp/pipeline/reg_032/reg_032.cli"
self.run_dpdk_app(cli_file)
- sleep(CLI_SERVER_CONNECT_DELAY)
+ sleep(self.cli_connect_delay)
s = self.connect_cli_server()
# Initialize the register array locations with required values
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x1a1a2a3 0xff23456789012\n"
+ CLI_CMD = (
+ "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff23456789012 index 0x1a1a2a3\n"
+ )
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x7fb1b2 0xff5678\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff5678 index 0x7fb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x7fc1 0xff234\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff234 index 0x7fc1\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x7f 0xff2\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff2 index 0x7f\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0xf7 0x1f\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0x1f index 0xf7\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
# Send packet to DUT to update the register array
@@ -3854,15 +4283,15 @@ class TestPipeline(TestCase):
self.send_pkts(0, 0, in_pcap)
# Verify whether the register array is updated with required values
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x1a1a2a3\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x1a1a2a3\n"
self.socket_send_cmd(s, CLI_CMD, "0x124448ace68ac468\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7fb1b2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7fb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "0x12345777e68a\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7fc1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7fc1\n"
self.socket_send_cmd(s, CLI_CMD, "0x124448ac\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7f\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7f\n"
self.socket_send_cmd(s, CLI_CMD, "0x10f1\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xf7\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xf7\n"
self.socket_send_cmd(s, CLI_CMD, "0x25\npipeline> ")
s.close()
@@ -3872,19 +4301,21 @@ class TestPipeline(TestCase):
cli_file = "/tmp/pipeline/reg_033/reg_033.cli"
self.run_dpdk_app(cli_file)
- sleep(CLI_SERVER_CONNECT_DELAY)
+ sleep(self.cli_connect_delay)
s = self.connect_cli_server()
# Initialize the register array locations with required values
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x1a1a2a3 0xff23456789012\n"
+ CLI_CMD = (
+ "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff23456789012 index 0x1a1a2a3\n"
+ )
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x7fb1b2 0xff5678\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff5678 index 0x7fb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x7fc1 0xff234\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff234 index 0x7fc1\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x7f 0xff2\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff2 index 0x7f\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0xf7 0x1f\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0x1f index 0xf7\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
# Send packet to DUT to update the register array
@@ -3892,15 +4323,15 @@ class TestPipeline(TestCase):
self.send_pkts(0, 0, in_pcap)
# Verify whether the register array is updated with required values
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x1a1a2a3\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x1a1a2a3\n"
self.socket_send_cmd(s, CLI_CMD, "0x124448ace68ac468\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7fb1b2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7fb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "0x12345777e68a\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7fc1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7fc1\n"
self.socket_send_cmd(s, CLI_CMD, "0x124448ac\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7f\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7f\n"
self.socket_send_cmd(s, CLI_CMD, "0x10f1\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xf7\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xf7\n"
self.socket_send_cmd(s, CLI_CMD, "0x25\npipeline> ")
s.close()
@@ -3910,19 +4341,21 @@ class TestPipeline(TestCase):
cli_file = "/tmp/pipeline/reg_034/reg_034.cli"
self.run_dpdk_app(cli_file)
- sleep(CLI_SERVER_CONNECT_DELAY)
+ sleep(self.cli_connect_delay)
s = self.connect_cli_server()
# Initialize the register array locations with required values
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x1a1a2a3 0xff23456789012\n"
+ CLI_CMD = (
+ "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff23456789012 index 0x1a1a2a3\n"
+ )
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x7fb1b2 0xff5678\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff5678 index 0x7fb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x7fc1 0xff234\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff234 index 0x7fc1\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x7f 0xff2\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff2 index 0x7f\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0xf7 0x1f\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0x1f index 0xf7\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
# Send packet to DUT to update the register array
@@ -3930,15 +4363,15 @@ class TestPipeline(TestCase):
self.send_pkts(0, 0, in_pcap)
# Verify whether the register array is updated with required values
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x1a1a2a3\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x1a1a2a3\n"
self.socket_send_cmd(s, CLI_CMD, "0x124448ace68ac468\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7fb1b2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7fb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "0x12345777e68a\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7fc1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7fc1\n"
self.socket_send_cmd(s, CLI_CMD, "0x124448ac\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7f\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7f\n"
self.socket_send_cmd(s, CLI_CMD, "0x10f1\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xf7\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xf7\n"
self.socket_send_cmd(s, CLI_CMD, "0x25\npipeline> ")
s.close()
@@ -3948,19 +4381,21 @@ class TestPipeline(TestCase):
cli_file = "/tmp/pipeline/reg_035/reg_035.cli"
self.run_dpdk_app(cli_file)
- sleep(CLI_SERVER_CONNECT_DELAY)
+ sleep(self.cli_connect_delay)
s = self.connect_cli_server()
# Initialize the register array locations with required values
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x1a1a2a3 0xff23456789012\n"
+ CLI_CMD = (
+ "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff23456789012 index 0x1a1a2a3\n"
+ )
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x7fb1b2 0xff5678\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff5678 index 0x7fb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x7fc1 0xff234\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff234 index 0x7fc1\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x7f 0xff2\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff2 index 0x7f\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0xf7 0x1f\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0x1f index 0xf7\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
# Send packet to DUT to update the register array
@@ -3968,15 +4403,15 @@ class TestPipeline(TestCase):
self.send_pkts(0, 0, in_pcap)
# Verify whether the register array is updated with required values
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x1a1a2a3\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x1a1a2a3\n"
self.socket_send_cmd(s, CLI_CMD, "0x124448ace68ac468\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7fb1b2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7fb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "0x12345777e68a\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7fc1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7fc1\n"
self.socket_send_cmd(s, CLI_CMD, "0x124448ac\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7f\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7f\n"
self.socket_send_cmd(s, CLI_CMD, "0x10f1\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xf7\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xf7\n"
self.socket_send_cmd(s, CLI_CMD, "0x25\npipeline> ")
s.close()
@@ -3986,19 +4421,21 @@ class TestPipeline(TestCase):
cli_file = "/tmp/pipeline/reg_036/reg_036.cli"
self.run_dpdk_app(cli_file)
- sleep(CLI_SERVER_CONNECT_DELAY)
+ sleep(self.cli_connect_delay)
s = self.connect_cli_server()
# Initialize the register array locations with required values
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x1a1a2a3 0xff23456789012\n"
+ CLI_CMD = (
+ "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff23456789012 index 0x1a1a2a3\n"
+ )
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x7fb1b2 0xff5678\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff5678 index 0x7fb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x7fc1 0xff234\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff234 index 0x7fc1\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x7f 0xff2\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff2 index 0x7f\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0xf7 0x1f\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0x1f index 0xf7\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
# Send packet to DUT to update the register array
@@ -4006,15 +4443,15 @@ class TestPipeline(TestCase):
self.send_pkts(0, 0, in_pcap)
# Verify whether the register array is updated with required values
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x1a1a2a3\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x1a1a2a3\n"
self.socket_send_cmd(s, CLI_CMD, "0x124448ace68ac468\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7fb1b2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7fb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "0x12345777e68a\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7fc1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7fc1\n"
self.socket_send_cmd(s, CLI_CMD, "0x124448ac\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7f\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7f\n"
self.socket_send_cmd(s, CLI_CMD, "0x10f1\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xf7\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xf7\n"
self.socket_send_cmd(s, CLI_CMD, "0x25\npipeline> ")
s.close()
@@ -4024,19 +4461,21 @@ class TestPipeline(TestCase):
cli_file = "/tmp/pipeline/reg_037/reg_037.cli"
self.run_dpdk_app(cli_file)
- sleep(CLI_SERVER_CONNECT_DELAY)
+ sleep(self.cli_connect_delay)
s = self.connect_cli_server()
# Initialize the register array locations with required values
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x1a1a2a3 0xff23456789012\n"
+ CLI_CMD = (
+ "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff23456789012 index 0x1a1a2a3\n"
+ )
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x7fb1b2 0xff5678\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff5678 index 0x7fb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x7fc1 0xff234\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff234 index 0x7fc1\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x7f 0xff2\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff2 index 0x7f\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0xf7 0x1f\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0x1f index 0xf7\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
# Send packet to DUT to update the register array
@@ -4044,15 +4483,15 @@ class TestPipeline(TestCase):
self.send_pkts(0, 0, in_pcap)
# Verify whether the register array is updated with required values
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x1a1a2a3\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x1a1a2a3\n"
self.socket_send_cmd(s, CLI_CMD, "0x124448ace68ac468\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7fb1b2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7fb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "0x12345777e68a\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7fc1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7fc1\n"
self.socket_send_cmd(s, CLI_CMD, "0x124448ac\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7f\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7f\n"
self.socket_send_cmd(s, CLI_CMD, "0x10f1\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xf7\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xf7\n"
self.socket_send_cmd(s, CLI_CMD, "0x25\npipeline> ")
s.close()
@@ -4062,17 +4501,19 @@ class TestPipeline(TestCase):
cli_file = "/tmp/pipeline/reg_038/reg_038.cli"
self.run_dpdk_app(cli_file)
- sleep(CLI_SERVER_CONNECT_DELAY)
+ sleep(self.cli_connect_delay)
s = self.connect_cli_server()
# Initialize the register array locations with required values
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0xa1a2 0xff23456789012\n"
+ CLI_CMD = (
+ "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff23456789012 index 0xa1a2\n"
+ )
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0xb1b2 0xff5678\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff5678 index 0xb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0xc1 0xff234\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff234 index 0xc1\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0xd1 0xff2\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff2 index 0xd1\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
# Send packet to DUT to update the register array
@@ -4080,13 +4521,13 @@ class TestPipeline(TestCase):
self.send_pkts(0, 0, in_pcap)
# Verify whether the register array is updated with required values
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xa1a2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xa1a2\n"
self.socket_send_cmd(s, CLI_CMD, "0x100468acf12024\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xb1b2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "0x1333acf0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xc1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xc1\n"
self.socket_send_cmd(s, CLI_CMD, "0x100468\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xd1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xd1\n"
self.socket_send_cmd(s, CLI_CMD, "0xff8\npipeline> ")
s.close()
@@ -4096,19 +4537,21 @@ class TestPipeline(TestCase):
cli_file = "/tmp/pipeline/reg_039/reg_039.cli"
self.run_dpdk_app(cli_file)
- sleep(CLI_SERVER_CONNECT_DELAY)
+ sleep(self.cli_connect_delay)
s = self.connect_cli_server()
# Initialize the register array locations with required values
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x1a1a2a3 0xff23456789012\n"
+ CLI_CMD = (
+ "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff23456789012 index 0x1a1a2a3\n"
+ )
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x7fb1b2 0xff5678\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff5678 index 0x7fb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x7fc1 0xff234\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff234 index 0x7fc1\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x7f 0xff2\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff2 index 0x7f\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0xf7 0x1f\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0x1f index 0xf7\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
# Send packet to DUT to update the register array
@@ -4116,15 +4559,15 @@ class TestPipeline(TestCase):
self.send_pkts(0, 0, in_pcap)
# Verify whether the register array is updated with required values
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x1a1a2a3\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x1a1a2a3\n"
self.socket_send_cmd(s, CLI_CMD, "0x124448ace68ac468\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7fb1b2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7fb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "0x12345777e68a\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7fc1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7fc1\n"
self.socket_send_cmd(s, CLI_CMD, "0x124448ac\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7f\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7f\n"
self.socket_send_cmd(s, CLI_CMD, "0x10f1\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xf7\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xf7\n"
self.socket_send_cmd(s, CLI_CMD, "0x25\npipeline> ")
s.close()
@@ -4134,19 +4577,21 @@ class TestPipeline(TestCase):
cli_file = "/tmp/pipeline/reg_040/reg_040.cli"
self.run_dpdk_app(cli_file)
- sleep(CLI_SERVER_CONNECT_DELAY)
+ sleep(self.cli_connect_delay)
s = self.connect_cli_server()
# Initialize the register array locations with required values
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x1a1a2a3 0xff23456789012\n"
+ CLI_CMD = (
+ "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff23456789012 index 0x1a1a2a3\n"
+ )
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x7fb1b2 0xff5678\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff5678 index 0x7fb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x7fc1 0xff234\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff234 index 0x7fc1\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x7f 0xff2\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff2 index 0x7f\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0xf7 0x1f\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0x1f index 0xf7\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
# Send packet to DUT to update the register array
@@ -4154,15 +4599,15 @@ class TestPipeline(TestCase):
self.send_pkts(0, 0, in_pcap)
# Verify whether the register array is updated with required values
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x1a1a2a3\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x1a1a2a3\n"
self.socket_send_cmd(s, CLI_CMD, "0x124448ace68ac468\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7fb1b2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7fb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "0x12345777e68a\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7fc1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7fc1\n"
self.socket_send_cmd(s, CLI_CMD, "0x124448ac\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7f\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7f\n"
self.socket_send_cmd(s, CLI_CMD, "0x10f1\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xf7\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xf7\n"
self.socket_send_cmd(s, CLI_CMD, "0x25\npipeline> ")
s.close()
@@ -4172,19 +4617,21 @@ class TestPipeline(TestCase):
cli_file = "/tmp/pipeline/reg_041/reg_041.cli"
self.run_dpdk_app(cli_file)
- sleep(CLI_SERVER_CONNECT_DELAY)
+ sleep(self.cli_connect_delay)
s = self.connect_cli_server()
# Initialize the register array locations with required values
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x1a1a2a3 0xff23456789012\n"
+ CLI_CMD = (
+ "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff23456789012 index 0x1a1a2a3\n"
+ )
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x7fb1b2 0xff5678\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff5678 index 0x7fb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x7fc1 0xff234\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff234 index 0x7fc1\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x7f 0xff2\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff2 index 0x7f\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0xf7 0x1f\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0x1f index 0xf7\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
# Send packet to DUT to update the register array
@@ -4192,15 +4639,15 @@ class TestPipeline(TestCase):
self.send_pkts(0, 0, in_pcap)
# Update the register array locations with required values
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x1a1a2a3\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x1a1a2a3\n"
self.socket_send_cmd(s, CLI_CMD, "0x124448ace68ac468\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7fb1b2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7fb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "0x12345777e68a\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7fc1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7fc1\n"
self.socket_send_cmd(s, CLI_CMD, "0x124448ac\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7f\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7f\n"
self.socket_send_cmd(s, CLI_CMD, "0x10f1\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xf7\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xf7\n"
self.socket_send_cmd(s, CLI_CMD, "0x25\npipeline> ")
s.close()
@@ -4210,17 +4657,19 @@ class TestPipeline(TestCase):
cli_file = "/tmp/pipeline/reg_042/reg_042.cli"
self.run_dpdk_app(cli_file)
- sleep(CLI_SERVER_CONNECT_DELAY)
+ sleep(self.cli_connect_delay)
s = self.connect_cli_server()
# Initialize the register array locations with required values
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0xa1a2 0xff23456789012\n"
+ CLI_CMD = (
+ "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff23456789012 index 0xa1a2\n"
+ )
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0xb1b2 0xff5678\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff5678 index 0xb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0xc1 0xff234\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff234 index 0xc1\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0xd1 0xff2\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff2 index 0xd1\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
# Send packet to DUT to update the register array
@@ -4228,13 +4677,13 @@ class TestPipeline(TestCase):
self.send_pkts(0, 0, in_pcap)
# Verify whether the register array is updated with required values
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xa1a2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xa1a2\n"
self.socket_send_cmd(s, CLI_CMD, "0x100468acf12024\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xb1b2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "0x1333acf0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xc1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xc1\n"
self.socket_send_cmd(s, CLI_CMD, "0x100468\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xd1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xd1\n"
self.socket_send_cmd(s, CLI_CMD, "0xff8\npipeline> ")
s.close()
@@ -4244,17 +4693,19 @@ class TestPipeline(TestCase):
cli_file = "/tmp/pipeline/reg_043/reg_043.cli"
self.run_dpdk_app(cli_file)
- sleep(CLI_SERVER_CONNECT_DELAY)
+ sleep(self.cli_connect_delay)
s = self.connect_cli_server()
# Initialize the register array locations with required values
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0xa1a2 0xff23456789012\n"
+ CLI_CMD = (
+ "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff23456789012 index 0xa1a2\n"
+ )
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0xb1b2 0xff5678\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff5678 index 0xb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0xc1 0xff234\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff234 index 0xc1\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0xd1 0xff2\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff2 index 0xd1\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
# Send packet to DUT to update the register array
@@ -4262,13 +4713,13 @@ class TestPipeline(TestCase):
self.send_pkts(0, 0, in_pcap)
# Verify whether the register array is updated with required values
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xa1a2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xa1a2\n"
self.socket_send_cmd(s, CLI_CMD, "0x100468acf12024\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xb1b2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "0x1333acf0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xc1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xc1\n"
self.socket_send_cmd(s, CLI_CMD, "0x100468\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xd1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xd1\n"
self.socket_send_cmd(s, CLI_CMD, "0xff8\npipeline> ")
s.close()
@@ -4278,17 +4729,19 @@ class TestPipeline(TestCase):
cli_file = "/tmp/pipeline/reg_044/reg_044.cli"
self.run_dpdk_app(cli_file)
- sleep(CLI_SERVER_CONNECT_DELAY)
+ sleep(self.cli_connect_delay)
s = self.connect_cli_server()
# Initialize the register array locations with required values
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x1a1a2a3 0xff23456789012\n"
+ CLI_CMD = (
+ "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff23456789012 index 0x1a1a2a3\n"
+ )
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x7fb1b2 0xff5678\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff5678 index 0x7fb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x7fc1 0xff234\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff234 index 0x7fc1\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0x7f 0xff2\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff2 index 0x7f\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
# Send packet to DUT to update the register array
@@ -4296,13 +4749,13 @@ class TestPipeline(TestCase):
self.send_pkts(0, 0, in_pcap)
# Verify whether the register array is updated with required values
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x1a1a2a3\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x1a1a2a3\n"
self.socket_send_cmd(s, CLI_CMD, "0x100468acf12024\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7fb1b2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7fb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "0x1333acf0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7fc1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7fc1\n"
self.socket_send_cmd(s, CLI_CMD, "0x100468\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0x7f\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0x7f\n"
self.socket_send_cmd(s, CLI_CMD, "0xff8\npipeline> ")
s.close()
@@ -4312,17 +4765,19 @@ class TestPipeline(TestCase):
cli_file = "/tmp/pipeline/reg_045/reg_045.cli"
self.run_dpdk_app(cli_file)
- sleep(CLI_SERVER_CONNECT_DELAY)
+ sleep(self.cli_connect_delay)
s = self.connect_cli_server()
# Initialize the register array locations with required values
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0xa1a2 0xff23456789012\n"
+ CLI_CMD = (
+ "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff23456789012 index 0xa1a2\n"
+ )
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0xb1b2 0xff5678\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff5678 index 0xb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0xc1 0xff234\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff234 index 0xc1\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 0xd1 0xff2\n"
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_ARR_1 value 0xff2 index 0xd1\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
# Send packet to DUT to update the register array
@@ -4330,13 +4785,13 @@ class TestPipeline(TestCase):
self.send_pkts(0, 0, in_pcap)
# Verify whether the register array is updated with required values
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xa1a2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xa1a2\n"
self.socket_send_cmd(s, CLI_CMD, "0x100468acf12024\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xb1b2\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xb1b2\n"
self.socket_send_cmd(s, CLI_CMD, "0x1333acf0\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xc1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xc1\n"
self.socket_send_cmd(s, CLI_CMD, "0x100468\npipeline> ")
- CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 0xd1\n"
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_ARR_1 index 0xd1\n"
self.socket_send_cmd(s, CLI_CMD, "0xff8\npipeline> ")
s.close()
@@ -4369,7 +4824,9 @@ class TestPipeline(TestCase):
s = self.connect_cli_server()
CLI_CMD = "pipeline PIPELINE0 meter profile gold add cir 460 pir 1380 cbs 100 pbs 150\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
- CLI_CMD = "pipeline PIPELINE0 meter MET_ARRAY_1 from 0 to 0 set profile gold\n"
+ CLI_CMD = (
+ "pipeline PIPELINE0 meter MET_ARRAY_1 set profile gold index from 0 to 0\n"
+ )
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
CLI_CMD = "pipeline PIPELINE0 meter profile platinum delete\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
@@ -4383,7 +4840,7 @@ class TestPipeline(TestCase):
self.send_and_sniff_multiple(tx_port, rx_port, in_pcap, out_pcap, filters, 1000)
# Default Profile with High Packet Transmission Rate
- CLI_CMD = "pipeline PIPELINE0 meter MET_ARRAY_1 from 0 to 0 reset\n"
+ CLI_CMD = "pipeline PIPELINE0 meter MET_ARRAY_1 reset index from 0 to 0\n"
self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
s.close()
@@ -4892,7 +5349,7 @@ class TestPipeline(TestCase):
cli_file = "/tmp/pipeline/lpm_001/lpm_001.cli"
self.run_dpdk_app(cli_file)
- sleep(1)
+ sleep(self.cli_connect_delay)
s = self.connect_cli_server()
# [1]: Empty table: Default action executed for all the packets.
@@ -4957,7 +5414,7 @@ class TestPipeline(TestCase):
cli_file = "/tmp/pipeline/lpm_002/lpm_002.cli"
self.run_dpdk_app(cli_file)
- sleep(1)
+ sleep(self.cli_connect_delay)
s = self.connect_cli_server()
# [1] Input packets on ports 0 .. 3:
@@ -5043,12 +5500,37 @@ class TestPipeline(TestCase):
self.send_and_sniff_multiple(tx_port, rx_port, in_pcap, out_pcap, filters)
self.dut.send_expect("^C", "# ", 20)
+ def test_lpm_005(self):
+
+ cli_file = "/tmp/pipeline/lpm_005/lpm_005.cli"
+ self.run_dpdk_app(cli_file)
+ sleep(self.cli_connect_delay)
+ s = self.connect_cli_server()
+
+ CMD_FILE = "/tmp/pipeline/lpm_005/cmd_files/cmd_1.txt"
+ CLI_CMD = "pipeline PIPELINE0 table lpm_005 add {}\n".format(CMD_FILE)
+ self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
+ CLI_CMD = "pipeline PIPELINE0 commit\n"
+ self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
+
+ in_pcap = ["pipeline/lpm_005/pcap_files/in_1.txt"] * 4
+ out_pcap = ["pipeline/lpm_005/pcap_files/out_1.txt"] * 4
+ filters = ["tcp"] * 4
+ tx_port = [0, 1, 2, 3]
+ rx_port = [0, 1, 2, 3]
+
+ sleep(2)
+ self.send_and_sniff_multiple(tx_port, rx_port, in_pcap, out_pcap, filters)
+
+ s.close()
+ self.dut.send_expect("^C", "# ", 20)
+
def test_selector_001(self):
# ----- Selector table feature validation -----
cli_file = "/tmp/pipeline/selector_001/selector_001.cli"
self.run_dpdk_app(cli_file)
- sleep(1)
+ sleep(self.cli_connect_delay)
s = self.connect_cli_server()
# [1]: Absence of Group
@@ -5347,7 +5829,7 @@ class TestPipeline(TestCase):
cli_file = "/tmp/pipeline/learner_005/learner_005.cli"
self.run_dpdk_app(cli_file)
- sleep(1)
+ sleep(self.cli_connect_delay)
s = self.connect_cli_server()
in_pcap = ["pipeline/learner_005/pcap_files/in_1.txt"]
@@ -5383,17 +5865,10 @@ class TestPipeline(TestCase):
cli_file = "/tmp/pipeline/learner_006/learner_006.cli"
self.run_dpdk_app(
- cli_file, "pipeline PIPELINE0 port out 3 link LINK3 txq 0 bsz 1\n"
+ cli_file, "Error -22 at line 81: Invalid default_action statement.\n"
)
sleep(1)
- s = self.connect_cli_server()
-
- CLI_CMD = (
- "pipeline PIPELINE0 build /tmp/pipeline/learner_006/learner_006.spec\n"
- )
- self.socket_send_cmd(s, CLI_CMD, "Error -22 at line 65: Action config error.")
- s.close()
self.dut.send_expect("^C", "# ", 20)
def test_learner_007(self):
@@ -5501,39 +5976,147 @@ class TestPipeline(TestCase):
rx_port = [0]
self.send_and_sniff_multiple(tx_port, rx_port, in_pcap, out_pcap, filters)
- tx_port = [0]
- rx_port = [1]
+ tx_port = [0]
+ rx_port = [1]
+ self.send_and_sniff_multiple(tx_port, rx_port, in_pcap, out_pcap, filters)
+
+ self.dut.send_expect("^C", "# ", 20)
+
+ def test_learner_011(self):
+
+ cli_file = "/tmp/pipeline/learner_011/learner_011.cli"
+ self.run_dpdk_app(cli_file)
+
+ in_pcap = ["pipeline/learner_011/pcap_files/in_1.txt"]
+ out_pcap = ["pipeline/learner_011/pcap_files/out_1.txt"]
+ filters = ["tcp"] * 4
+
+ tx_port = [0]
+ rx_port = [0]
+ self.send_and_sniff_multiple(tx_port, rx_port, in_pcap, out_pcap, filters)
+
+ tx_port = [0]
+ rx_port = [1]
+ self.send_and_sniff_multiple(tx_port, rx_port, in_pcap, out_pcap, filters)
+
+ sleep(60)
+
+ in_pcap = ["pipeline/learner_011/pcap_files/in_2.txt"]
+ out_pcap_1 = "pipeline/learner_011/pcap_files/out_21.txt"
+ out_pcap_2 = "pipeline/learner_011/pcap_files/out_22.txt"
+ out_pcap = [out_pcap_1, out_pcap_2]
+
+ tx_port = [0]
+ rx_port = [1, 0]
+ self.send_and_sniff_multiple(tx_port, rx_port, in_pcap, out_pcap, filters)
+
+ self.dut.send_expect("^C", "# ", 20)
+
+ def test_learner_012(self):
+
+ cli_file = "/tmp/pipeline/learner_012/learner_012.cli"
+ self.run_dpdk_app(cli_file)
+
+ in_pcap = ["pipeline/learner_012/pcap_files/in_1.txt"]
+ out_pcap = ["pipeline/learner_012/pcap_files/out_1.txt"]
+ filters = ["udp port 200"]
+ tx_port = [0]
+ rx_port = [0]
+ self.send_and_sniff_multiple(tx_port, rx_port, in_pcap, out_pcap, filters)
+
+ out_pcap = ["pipeline/learner_012/pcap_files/out_2.txt"]
+ filters = ["udp port 4789"]
+ self.send_and_sniff_multiple(tx_port, rx_port, in_pcap, out_pcap, filters)
+
+ self.dut.send_expect("^C", "# ", 20)
+
+ def test_learner_013(self):
+
+ cli_file = "/tmp/pipeline/learner_013/learner_013.cli"
+ self.run_dpdk_app(cli_file)
+
+ in_pcap = ["pipeline/learner_013/pcap_files/in_1.txt"]
+ out_pcap = ["pipeline/learner_013/pcap_files/out_1.txt"]
+ filters = ["udp port 200"]
+ tx_port = [0]
+ rx_port = [0]
+ self.send_and_sniff_multiple(tx_port, rx_port, in_pcap, out_pcap, filters)
+
+ out_pcap = ["pipeline/learner_013/pcap_files/out_2.txt"]
+ filters = ["udp port 4789"]
+ self.send_and_sniff_multiple(tx_port, rx_port, in_pcap, out_pcap, filters)
+
+ self.dut.send_expect("^C", "# ", 20)
+
+ def test_learner_014(self):
+
+ cli_file = "/tmp/pipeline/learner_014/learner_014.cli"
+ self.run_dpdk_app(cli_file)
+
+ in_pcap = ["pipeline/learner_014/pcap_files/in_1.txt"]
+ out_pcap = ["pipeline/learner_014/pcap_files/out_1.txt"]
+ filters = ["udp port 200"]
+ tx_port = [0]
+ rx_port = [0]
+ self.send_and_sniff_multiple(tx_port, rx_port, in_pcap, out_pcap, filters)
+
+ out_pcap = ["pipeline/learner_014/pcap_files/out_2.txt"]
+ filters = ["udp port 4789"]
self.send_and_sniff_multiple(tx_port, rx_port, in_pcap, out_pcap, filters)
self.dut.send_expect("^C", "# ", 20)
- def test_learner_011(self):
+ def test_learner_015(self):
- cli_file = "/tmp/pipeline/learner_011/learner_011.cli"
+ cli_file = "/tmp/pipeline/learner_015/learner_015.cli"
self.run_dpdk_app(cli_file)
- in_pcap = ["pipeline/learner_011/pcap_files/in_1.txt"]
- out_pcap = ["pipeline/learner_011/pcap_files/out_1.txt"]
- filters = ["tcp"] * 4
-
+ in_pcap = ["pipeline/learner_015/pcap_files/in_1.txt"]
+ out_pcap = ["pipeline/learner_015/pcap_files/out_1.txt"]
+ filters = ["udp port 200"]
tx_port = [0]
rx_port = [0]
self.send_and_sniff_multiple(tx_port, rx_port, in_pcap, out_pcap, filters)
- tx_port = [0]
- rx_port = [1]
+ out_pcap = ["pipeline/learner_015/pcap_files/out_2.txt"]
+ filters = ["udp port 4789"]
self.send_and_sniff_multiple(tx_port, rx_port, in_pcap, out_pcap, filters)
- sleep(60)
+ self.dut.send_expect("^C", "# ", 20)
- in_pcap = ["pipeline/learner_011/pcap_files/in_2.txt"]
- out_pcap_1 = "pipeline/learner_011/pcap_files/out_21.txt"
- out_pcap_2 = "pipeline/learner_011/pcap_files/out_22.txt"
- out_pcap = [out_pcap_1, out_pcap_2]
+ def test_learner_016(self):
- tx_port = [0]
- rx_port = [1, 0]
- self.send_and_sniff_multiple(tx_port, rx_port, in_pcap, out_pcap, filters)
+ cli_file = "/tmp/pipeline/learner_016/learner_016.cli"
+ self.run_dpdk_app(
+ cli_file, "Error -22 at line 0: Learner table configuration error.\n"
+ )
+
+ self.dut.send_expect("^C", "# ", 20)
+
+ def test_learner_017(self):
+
+ cli_file = "/tmp/pipeline/learner_017/learner_017.cli"
+ self.run_dpdk_app(
+ cli_file, "Error -22 at line 0: Learner table configuration error.\n"
+ )
+
+ self.dut.send_expect("^C", "# ", 20)
+
+ def test_learner_018(self):
+
+ cli_file = "/tmp/pipeline/learner_018/learner_018.cli"
+ self.run_dpdk_app(
+ cli_file, "Error -22 at line 0: Learner table configuration error.\n"
+ )
+
+ self.dut.send_expect("^C", "# ", 20)
+
+ def test_learner_019(self):
+
+ cli_file = "/tmp/pipeline/learner_019/learner_019.cli"
+ self.run_dpdk_app(
+ cli_file, "Error -22 at line 0: Learner table configuration error.\n"
+ )
self.dut.send_expect("^C", "# ", 20)
@@ -5765,17 +6348,9 @@ class TestPipeline(TestCase):
cli_file = "/tmp/pipeline/annotation_003/annotation_003.cli"
self.run_dpdk_app(
- cli_file, "pipeline PIPELINE0 port out 3 link LINK3 txq 0 bsz 1\n"
+ cli_file, "Error -22 at line 54: Invalid action name statement.\n"
)
- sleep(CLI_SERVER_CONNECT_DELAY)
- s = self.connect_cli_server()
- CLI_CMD = "pipeline PIPELINE0 build /tmp/pipeline/annotation_003/annotation_003.spec\n"
- self.socket_send_cmd(
- s, CLI_CMD, "Error -22 at line 54: Invalid action name statement."
- )
- s.close()
-
self.dut.send_expect("^C", "# ", 20)
def test_annotation_004(self):
@@ -5783,11 +6358,11 @@ class TestPipeline(TestCase):
cli_file = "/tmp/pipeline/annotation_004/annotation_004.cli"
self.run_dpdk_app(
cli_file,
- "pipeline PIPELINE0 build /tmp/pipeline/annotation_004/"
- "annotation_004.spec\n",
+ "pipeline PIPELINE0 build lib /tmp/pipeline/annotation_004/annotation_004.so "
+ "io /tmp/pipeline/annotation_004/ethdev.io numa 0\n",
)
- sleep(CLI_SERVER_CONNECT_DELAY)
+ sleep(self.cli_connect_delay)
s = self.connect_cli_server()
CLI_CMD = (
"pipeline PIPELINE0 table annotation_004 add /tmp/pipeline/annotation_004/"
@@ -5806,17 +6381,7 @@ class TestPipeline(TestCase):
def test_annotation_005(self):
cli_file = "/tmp/pipeline/annotation_005/annotation_005.cli"
- self.run_dpdk_app(
- cli_file, "pipeline PIPELINE0 port out 3 link LINK3 txq 0 bsz 1\n"
- )
-
- sleep(CLI_SERVER_CONNECT_DELAY)
- s = self.connect_cli_server()
- CLI_CMD = "pipeline PIPELINE0 build /tmp/pipeline/annotation_005/annotation_005.spec\n"
- self.socket_send_cmd(
- s, CLI_CMD, "Error -22 at line 62: Table configuration error."
- )
- s.close()
+ self.run_dpdk_app(cli_file, "Error -22 at line 0: Table configuration error.\n")
self.dut.send_expect("^C", "# ", 20)
@@ -5849,6 +6414,358 @@ class TestPipeline(TestCase):
self.dut.send_expect("^C", "# ", 20)
+ def test_hash_001(self):
+
+ cli_file = "/tmp/pipeline/hash_001/hash_001.cli"
+ self.run_dpdk_app(cli_file)
+
+ in_pcap = ["pipeline/hash_001/pcap_files/in_1.txt"]
+ out_pcap_1 = "pipeline/hash_001/pcap_files/out_1.txt"
+ out_pcap_2 = "pipeline/hash_001/pcap_files/out_2.txt"
+ out_pcap_3 = "pipeline/hash_001/pcap_files/out_3.txt"
+ out_pcap_4 = "pipeline/hash_001/pcap_files/out_4.txt"
+
+ out_pcap = [out_pcap_1, out_pcap_2, out_pcap_3, out_pcap_4]
+
+ filters = ["udp and less 120"] * 4
+ tx_port = [0]
+ rx_port = [0, 1, 2, 3]
+ self.send_and_sniff_multiple(tx_port, rx_port, in_pcap, out_pcap, filters)
+
+ self.dut.send_expect("^C", "# ", 20)
+
+ def test_hash_002(self):
+
+ cli_file = "/tmp/pipeline/hash_002/hash_002.cli"
+ self.run_dpdk_app(cli_file)
+
+ in_pcap = ["pipeline/hash_002/pcap_files/in_1.txt"]
+ out_pcap_1 = "pipeline/hash_002/pcap_files/out_1.txt"
+ out_pcap_2 = "pipeline/hash_002/pcap_files/out_2.txt"
+ out_pcap_3 = "pipeline/hash_002/pcap_files/out_3.txt"
+ out_pcap_4 = "pipeline/hash_002/pcap_files/out_4.txt"
+
+ out_pcap = [out_pcap_1, out_pcap_2, out_pcap_3, out_pcap_4]
+
+ filters = ["udp and less 120"] * 4
+ tx_port = [0]
+ rx_port = [0, 1, 2, 3]
+ self.send_and_sniff_multiple(tx_port, rx_port, in_pcap, out_pcap, filters)
+
+ self.dut.send_expect("^C", "# ", 20)
+
+ def test_hash_003(self):
+
+ cli_file = "/tmp/pipeline/hash_003/hash_003.cli"
+ self.run_dpdk_app(cli_file)
+
+ in_pcap = ["pipeline/hash_003/pcap_files/in_1.txt"]
+ out_pcap_1 = "pipeline/hash_003/pcap_files/out_1.txt"
+
+ out_pcap = [out_pcap_1]
+
+ filters = ["udp and less 120"] * 4
+ tx_port = [0]
+ rx_port = [2]
+ self.send_and_sniff_multiple(tx_port, rx_port, in_pcap, out_pcap, filters)
+
+ self.dut.send_expect("^C", "# ", 20)
+
+ def test_direct_counter_001(self):
+
+ cli_file = "/tmp/pipeline/direct_counter_001/direct_counter_001.cli"
+ self.run_dpdk_app(cli_file)
+ sleep(self.cli_connect_delay)
+ s = self.connect_cli_server()
+
+ in_pcap = ["pipeline/direct_counter_001/pcap_files/in_1.txt"] * 4
+ out_pcap = ["pipeline/direct_counter_001/pcap_files/out_1.txt"] * 4
+ filters = ["tcp"] * 4
+ tx_port = [0, 1, 2, 3]
+ rx_port = [0, 1, 2, 3]
+ self.send_and_sniff_multiple(tx_port, rx_port, in_pcap, out_pcap, filters)
+
+ CLI_CMD = (
+ "pipeline PIPELINE0 regrd REG_DIRECT_COUNTER_001 table "
+ "direct_counter_001 match 0x0a0a0a01\n"
+ )
+ self.socket_send_cmd(s, CLI_CMD, "0x4\npipeline> ")
+
+ CLI_CMD = (
+ "pipeline PIPELINE0 regrd REG_DIRECT_COUNTER_001 table "
+ "direct_counter_001 match 0x0a0a0a02\n"
+ )
+ self.socket_send_cmd(s, CLI_CMD, "0x4\npipeline> ")
+
+ CLI_CMD = (
+ "pipeline PIPELINE0 regrd REG_DIRECT_COUNTER_001 table "
+ "direct_counter_001 match 0x0a0a0a03\n"
+ )
+ self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
+
+ s.close()
+ self.dut.send_expect("^C", "# ", 20)
+
+ def test_direct_counter_002(self):
+
+ cli_file = "/tmp/pipeline/direct_counter_002/direct_counter_002.cli"
+ self.run_dpdk_app(cli_file)
+ sleep(self.cli_connect_delay)
+ s = self.connect_cli_server()
+
+ in_pcap = ["pipeline/direct_counter_002/pcap_files/in_1.txt"] * 4
+ out_pcap = ["pipeline/direct_counter_002/pcap_files/out_1.txt"] * 4
+ filters = ["tcp"] * 4
+ tx_port = [0, 1, 2, 3]
+ rx_port = [0, 1, 2, 3]
+ self.send_and_sniff_multiple(tx_port, rx_port, in_pcap, out_pcap, filters)
+
+ CLI_CMD = (
+ "pipeline PIPELINE0 regrd REG_DIRECT_COUNTER_002 table "
+ "direct_counter_002 match 0x01010101 0x0a0a0a01\n"
+ )
+ self.socket_send_cmd(s, CLI_CMD, "0x4\npipeline> ")
+
+ CLI_CMD = (
+ "pipeline PIPELINE0 regrd REG_DIRECT_COUNTER_002 table "
+ "direct_counter_002 match 0x02020202 0x0a0a0a02\n"
+ )
+ self.socket_send_cmd(s, CLI_CMD, "0x4\npipeline> ")
+
+ CLI_CMD = (
+ "pipeline PIPELINE0 regrd REG_DIRECT_COUNTER_002 table "
+ "direct_counter_002 match 0x01010101 0x0a0a0a03\n"
+ )
+ self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
+
+ s.close()
+ self.dut.send_expect("^C", "# ", 20)
+
+ def test_direct_counter_003(self):
+
+ cli_file = "/tmp/pipeline/direct_counter_003/direct_counter_003.cli"
+ self.run_dpdk_app(cli_file)
+ sleep(self.cli_connect_delay)
+ s = self.connect_cli_server()
+
+ in_pcap = ["pipeline/direct_counter_003/pcap_files/in_1.txt"] * 4
+ out_pcap = ["pipeline/direct_counter_003/pcap_files/out_1.txt"] * 4
+ filters = ["tcp"] * 4
+ tx_port = [0, 1, 2, 3]
+ rx_port = [0, 1, 2, 3]
+ self.send_and_sniff_multiple(tx_port, rx_port, in_pcap, out_pcap, filters)
+
+ CLI_CMD = (
+ "pipeline PIPELINE0 regrd REG_DIRECT_COUNTER_003 table "
+ "direct_counter_003 match 0x0a0a0a01 0x06 0x01010101\n"
+ )
+ self.socket_send_cmd(s, CLI_CMD, "0x4\npipeline> ")
+
+ CLI_CMD = (
+ "pipeline PIPELINE0 regrd REG_DIRECT_COUNTER_003 table "
+ "direct_counter_003 match 0x0a0a0a02 0x06 0x02020202\n"
+ )
+ self.socket_send_cmd(s, CLI_CMD, "0x4\npipeline> ")
+
+ CLI_CMD = (
+ "pipeline PIPELINE0 regrd REG_DIRECT_COUNTER_003 table "
+ "direct_counter_003 match 0x0a0a0a03 0x06 0xffffffff\n"
+ )
+ self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
+
+ s.close()
+ self.dut.send_expect("^C", "# ", 20)
+
+ def test_direct_counter_004(self):
+
+ cli_file = "/tmp/pipeline/direct_counter_004/direct_counter_004.cli"
+ self.run_dpdk_app(cli_file)
+ sleep(self.cli_connect_delay)
+ s = self.connect_cli_server()
+
+ in_pcap = ["pipeline/direct_counter_004/pcap_files/in_1.txt"] * 4
+ out_pcap = ["pipeline/direct_counter_004/pcap_files/out_1.txt"] * 4
+ filters = ["tcp"] * 4
+ tx_port = [0, 1, 2, 3]
+ rx_port = [0, 1, 2, 3]
+ self.send_and_sniff_multiple(tx_port, rx_port, in_pcap, out_pcap, filters)
+
+ in_pcap = ["pipeline/direct_counter_004/pcap_files/in_2.txt"] * 3
+ out_pcap = ["pipeline/direct_counter_004/pcap_files/out_2.txt"] * 3
+ filters = ["tcp"] * 3
+ tx_port = [0, 1, 2]
+ rx_port = [0, 1, 2]
+ self.send_and_sniff_multiple(tx_port, rx_port, in_pcap, out_pcap, filters)
+
+ in_pcap = ["pipeline/direct_counter_004/pcap_files/in_3.txt"] * 2
+ out_pcap = ["pipeline/direct_counter_004/pcap_files/out_3.txt"] * 2
+ filters = ["tcp"] * 2
+ tx_port = [0, 1]
+ rx_port = [0, 1]
+ self.send_and_sniff_multiple(tx_port, rx_port, in_pcap, out_pcap, filters)
+
+ in_pcap = ["pipeline/direct_counter_004/pcap_files/in_4.txt"]
+ out_pcap = ["pipeline/direct_counter_004/pcap_files/out_4.txt"]
+ filters = ["tcp"]
+ tx_port = [0]
+ rx_port = [0]
+ self.send_and_sniff_multiple(tx_port, rx_port, in_pcap, out_pcap, filters)
+
+ CLI_CMD = (
+ "pipeline PIPELINE0 regrd REG_DIRECT_COUNTER_004 table "
+ "direct_counter_004 match 0x00000000 0x0a0a0a00\n"
+ )
+ self.socket_send_cmd(s, CLI_CMD, "0x4\npipeline> ")
+
+ CLI_CMD = (
+ "pipeline PIPELINE0 regrd REG_DIRECT_COUNTER_004 table "
+ "direct_counter_004 match 0x05050505 0x0a0a0a05\n"
+ )
+ self.socket_send_cmd(s, CLI_CMD, "0x3\npipeline> ")
+
+ CLI_CMD = (
+ "pipeline PIPELINE0 regrd REG_DIRECT_COUNTER_004 table "
+ "direct_counter_004 match 0x0a0a0a0a 0x0a0a0a0a\n"
+ )
+ self.socket_send_cmd(s, CLI_CMD, "0x2\npipeline> ")
+
+ CLI_CMD = (
+ "pipeline PIPELINE0 regrd REG_DIRECT_COUNTER_004 table "
+ "direct_counter_004 match 0x0f0f0f0f 0x0a0a0a0f\n"
+ )
+ self.socket_send_cmd(s, CLI_CMD, "0x1\npipeline> ")
+
+ CLI_CMD = (
+ "pipeline PIPELINE0 regrd REG_DIRECT_COUNTER_004 table "
+ "direct_counter_004 match 0xa0a1a2a3 0xb0b1b2b3\n"
+ )
+ self.socket_send_cmd(s, CLI_CMD, "0x0\npipeline> ")
+
+ s.close()
+ self.dut.send_expect("^C", "# ", 20)
+
+ def test_direct_counter_005(self):
+
+ cli_file = "/tmp/pipeline/direct_counter_005/direct_counter_005.cli"
+ self.run_dpdk_app(cli_file)
+ sleep(self.cli_connect_delay)
+ s = self.connect_cli_server()
+
+ CLI_CMD = "pipeline PIPELINE0 regwr REG_DIRECT_COUNTER_005 value 0x0 index 1\n"
+ self.socket_send_cmd(s, CLI_CMD, "pipeline> ")
+
+ in_pcap = ["pipeline/direct_counter_005/pcap_files/in_1.txt"]
+ out_pcap = ["pipeline/direct_counter_005/pcap_files/out_1.txt"]
+ filters = ["tcp"]
+ tx_port = [0]
+ rx_port = [0]
+ self.send_and_sniff_multiple(tx_port, rx_port, in_pcap, out_pcap, filters)
+
+ in_pcap = ["pipeline/direct_counter_005/pcap_files/in_1.txt"] * 2
+ out_pcap = ["pipeline/direct_counter_005/pcap_files/out_2.txt"] * 2
+ filters = ["tcp"] * 2
+ tx_port = [0, 1]
+ rx_port = [0, 1]
+ self.send_and_sniff_multiple(tx_port, rx_port, in_pcap, out_pcap, filters)
+
+ CLI_CMD = "pipeline PIPELINE0 regrd REG_DIRECT_COUNTER_005 index 1\n"
+ self.socket_send_cmd(s, CLI_CMD, "0x2\npipeline> ")
+
+ s.close()
+ self.dut.send_expect("^C", "# ", 20)
+
+ def test_direct_meter_001(self):
+
+ cli_file = "/tmp/pipeline/direct_meter_001/direct_meter_001.cli"
+ self.run_dpdk_app(cli_file)
+ sleep(self.cli_connect_delay)
+ s = self.connect_cli_server()
+
+ in_pcap = "pipeline/direct_meter_001/pcap_files/in_1.txt"
+ self.send_pkts(0, 0, in_pcap)
+
+ CLI_CMD = (
+ "pipeline PIPELINE0 meter MET_DIRECT_METER_001 stats table "
+ "direct_meter_001 match 0x01010101 0x0a0a0a01\n"
+ )
+
+ expected_response = (
+ "+---------+------------------+------------------+------------------+"
+ "------------------+------------------+------------------+\n"
+ "| METER # | GREEN (packets) | YELLOW (packets) | RED (packets) | "
+ "GREEN (bytes) | YELLOW (bytes) | RED (bytes) |\n"
+ "+---------+------------------+------------------+------------------+"
+ "------------------+------------------+------------------+\n"
+ "| 0 | 8 | 0 | 0 | "
+ " 8 | 0 | 0 |\n"
+ "pipeline> "
+ )
+ self.socket_send_cmd(s, CLI_CMD, expected_response)
+
+ s.close()
+ self.dut.send_expect("^C", "# ", 20)
+
+ def test_direct_meter_002(self):
+
+ cli_file = "/tmp/pipeline/direct_meter_002/direct_meter_002.cli"
+ self.run_dpdk_app(cli_file)
+ sleep(self.cli_connect_delay)
+ s = self.connect_cli_server()
+
+ in_pcap = "pipeline/direct_meter_002/pcap_files/in_1.txt"
+ self.send_pkts(0, 0, in_pcap)
+
+ CLI_CMD = (
+ "pipeline PIPELINE0 meter MET_DIRECT_METER_002 stats table "
+ "direct_meter_002 match 0x0a0a0a01 0x06 0x01010101\n"
+ )
+
+ expected_response = (
+ "+---------+------------------+------------------+------------------+"
+ "------------------+------------------+------------------+\n"
+ "| METER # | GREEN (packets) | YELLOW (packets) | RED (packets) | "
+ "GREEN (bytes) | YELLOW (bytes) | RED (bytes) |\n"
+ "+---------+------------------+------------------+------------------+"
+ "------------------+------------------+------------------+\n"
+ "| 0 | 8 | 0 | 0 | "
+ " 190 | 0 | 0 |\n"
+ "pipeline> "
+ )
+ self.socket_send_cmd(s, CLI_CMD, expected_response)
+
+ s.close()
+ self.dut.send_expect("^C", "# ", 20)
+
+ def test_direct_meter_003(self):
+
+ cli_file = "/tmp/pipeline/direct_meter_003/direct_meter_003.cli"
+ self.run_dpdk_app(cli_file)
+ sleep(self.cli_connect_delay)
+ s = self.connect_cli_server()
+
+ in_pcap = "pipeline/direct_meter_003/pcap_files/in_1.txt"
+ self.send_pkts(0, 0, in_pcap)
+
+ CLI_CMD = (
+ "pipeline PIPELINE0 meter MET_DIRECT_METER_003 stats index from 1 to 1\n"
+ )
+
+ expected_response = (
+ "+---------+------------------+------------------+------------------+"
+ "------------------+------------------+------------------+\n"
+ "| METER # | GREEN (packets) | YELLOW (packets) | RED (packets) | "
+ "GREEN (bytes) | YELLOW (bytes) | RED (bytes) |\n"
+ "+---------+------------------+------------------+------------------+"
+ "------------------+------------------+------------------+\n"
+ "| 1 | 4 | 0 | 0 | "
+ " 4 | 0 | 0 |\n"
+ "pipeline> "
+ )
+ self.socket_send_cmd(s, CLI_CMD, expected_response)
+
+ s.close()
+ self.dut.send_expect("^C", "# ", 20)
+
def tear_down(self):
"""
Run after each test case.
--
2.25.1
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