* [PATCH 0/2] added test case for validate instruction @ 2022-11-29 6:02 Yogesh Jangra 2022-11-29 6:02 ` [PATCH 1/2] dep/pipeline: added dependencies for validate_002 test case Yogesh Jangra ` (2 more replies) 0 siblings, 3 replies; 7+ messages in thread From: Yogesh Jangra @ 2022-11-29 6:02 UTC (permalink / raw) To: dts Cc: cristian.dumitrescu, kamalakannan.r, harshad.suresh.narayane, yogesh.jangra Added the test case for validate instruction. Yogesh Jangra (2): dep/pipeline: added dependencies for validate_002 test case tests/pipeline: added test case for validate instruction dep/pipeline/validate_002/ethdev.io | 27 ++++++ dep/pipeline/validate_002/pcap_files/in_1.txt | 16 ++++ .../validate_002/pcap_files/out_1.txt | 12 +++ dep/pipeline/validate_002/readme.md | 12 +++ dep/pipeline/validate_002/table.txt | 1 + dep/pipeline/validate_002/validate_002.cli | 22 +++++ dep/pipeline/validate_002/validate_002.spec | 82 +++++++++++++++++++ tests/TestSuite_pipeline.py | 13 +++ 8 files changed, 185 insertions(+) create mode 100644 dep/pipeline/validate_002/ethdev.io create mode 100644 dep/pipeline/validate_002/pcap_files/in_1.txt create mode 100644 dep/pipeline/validate_002/pcap_files/out_1.txt create mode 100644 dep/pipeline/validate_002/readme.md create mode 100644 dep/pipeline/validate_002/table.txt create mode 100644 dep/pipeline/validate_002/validate_002.cli create mode 100644 dep/pipeline/validate_002/validate_002.spec -- 2.25.1 ^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH 1/2] dep/pipeline: added dependencies for validate_002 test case 2022-11-29 6:02 [PATCH 0/2] added test case for validate instruction Yogesh Jangra @ 2022-11-29 6:02 ` Yogesh Jangra 2022-11-29 6:02 ` [PATCH 2/2] tests/pipeline: added test case for validate instruction Yogesh Jangra 2022-12-13 7:01 ` [PATCH 0/2] " Tu, Lijuan 2 siblings, 0 replies; 7+ messages in thread From: Yogesh Jangra @ 2022-11-29 6:02 UTC (permalink / raw) To: dts Cc: cristian.dumitrescu, kamalakannan.r, harshad.suresh.narayane, yogesh.jangra Added dependencies for the validate_002 test case. Signed-off-by: Yogesh Jangra <yogesh.jangra@intel.com> --- dep/pipeline/validate_002/ethdev.io | 27 ++++++ dep/pipeline/validate_002/pcap_files/in_1.txt | 16 ++++ .../validate_002/pcap_files/out_1.txt | 12 +++ dep/pipeline/validate_002/readme.md | 12 +++ dep/pipeline/validate_002/table.txt | 1 + dep/pipeline/validate_002/validate_002.cli | 22 +++++ dep/pipeline/validate_002/validate_002.spec | 82 +++++++++++++++++++ 7 files changed, 172 insertions(+) create mode 100644 dep/pipeline/validate_002/ethdev.io create mode 100644 dep/pipeline/validate_002/pcap_files/in_1.txt create mode 100644 dep/pipeline/validate_002/pcap_files/out_1.txt create mode 100644 dep/pipeline/validate_002/readme.md create mode 100644 dep/pipeline/validate_002/table.txt create mode 100644 dep/pipeline/validate_002/validate_002.cli create mode 100644 dep/pipeline/validate_002/validate_002.spec diff --git a/dep/pipeline/validate_002/ethdev.io b/dep/pipeline/validate_002/ethdev.io new file mode 100644 index 00000000..4e31f499 --- /dev/null +++ b/dep/pipeline/validate_002/ethdev.io @@ -0,0 +1,27 @@ +; SPDX-License-Identifier: BSD-3-Clause +; Copyright(c) 2022 Intel Corporation + +; +; Pipeline packet mirroring. +; +mirroring slots 4 sessions 64 + +; +; Pipeline input ports. +; +; Note: Customize the parameters below to match your setup. +; +port in 0 ethdev 0000:00:04.0 rxq 0 bsz 1 +port in 1 ethdev 0000:00:05.0 rxq 0 bsz 1 +port in 2 ethdev 0000:00:06.0 rxq 0 bsz 1 +port in 3 ethdev 0000:00:07.0 rxq 0 bsz 1 + +; +; Pipeline output ports. +; +; Note: Customize the parameters below to match your setup. +; +port out 0 ethdev 0000:00:04.0 txq 0 bsz 1 +port out 1 ethdev 0000:00:05.0 txq 0 bsz 1 +port out 2 ethdev 0000:00:06.0 txq 0 bsz 1 +port out 3 ethdev 0000:00:07.0 txq 0 bsz 1 diff --git a/dep/pipeline/validate_002/pcap_files/in_1.txt b/dep/pipeline/validate_002/pcap_files/in_1.txt new file mode 100644 index 00000000..bab3ce5c --- /dev/null +++ b/dep/pipeline/validate_002/pcap_files/in_1.txt @@ -0,0 +1,16 @@ +# SPDX-License-Identifier: BSD-3-Clause +# Copyright(c) 2020 Intel Corporation +# + +# text to pcap: text2pcap packet.txt packet.pcap +# pcap to text: tcpdump -r packet.pcap -xx + +# Packet 0 +000000 00 11 22 33 44 55 00 66 77 88 99 aa 08 00 45 00 +000010 00 2e 00 01 00 00 00 06 4e b5 64 00 00 0a c8 00 +000020 00 0a 00 64 00 c8 aa bb cc de aa bb cc df 50 02 +000030 20 00 59 93 00 00 58 58 58 58 58 58 +# Packet 1 +000000 52 54 00 12 44 57 52 54 00 12 34 56 81 00 00 02 +000010 08 00 45 00 00 1a 00 01 00 00 40 00 b2 d8 64 00 +000020 00 01 64 00 00 0a 58 58 58 58 58 58 \ No newline at end of file diff --git a/dep/pipeline/validate_002/pcap_files/out_1.txt b/dep/pipeline/validate_002/pcap_files/out_1.txt new file mode 100644 index 00000000..9e448bda --- /dev/null +++ b/dep/pipeline/validate_002/pcap_files/out_1.txt @@ -0,0 +1,12 @@ +# SPDX-License-Identifier: BSD-3-Clause +# Copyright(c) 2020 Intel Corporation +# + +# text to pcap: text2pcap packet.txt packet.pcap +# pcap to text: tcpdump -r packet.pcap -xx + +# Packet 0 +000000 52 54 00 12 44 57 ff ee dd cc bb aa 81 00 00 02 +000010 81 00 52 54 00 12 44 57 52 54 00 12 34 56 81 00 +000020 00 02 08 00 45 00 00 1a 00 01 00 00 40 00 b2 d8 +000030 64 00 00 01 64 00 00 0a 58 58 58 58 58 58 \ No newline at end of file diff --git a/dep/pipeline/validate_002/readme.md b/dep/pipeline/validate_002/readme.md new file mode 100644 index 00000000..2f49d703 --- /dev/null +++ b/dep/pipeline/validate_002/readme.md @@ -0,0 +1,12 @@ +Test Case: validate_002 +----------------------- + + Instructions being tested: + validate h.header + + Description: + For the received packet, if its ether type is 8100 then add a new ethernet header + on the top of the packet. Otherwise drop the packet. + + Verification: + The packet with ether type 0806 should be received with a new header on top. diff --git a/dep/pipeline/validate_002/table.txt b/dep/pipeline/validate_002/table.txt new file mode 100644 index 00000000..955de4d2 --- /dev/null +++ b/dep/pipeline/validate_002/table.txt @@ -0,0 +1 @@ +match 0x8100 action validate_002_action ethernet_src_addr 0xffeeddccbbaa diff --git a/dep/pipeline/validate_002/validate_002.cli b/dep/pipeline/validate_002/validate_002.cli new file mode 100644 index 00000000..fe778cdf --- /dev/null +++ b/dep/pipeline/validate_002/validate_002.cli @@ -0,0 +1,22 @@ +; SPDX-License-Identifier: BSD-3-Clause +; Copyright(c) 2010-2020 Intel Corporation + +; +; Pipeline code generation & shared object library build +; +pipeline codegen /tmp/pipeline/validate_002/validate_002.spec /tmp/pipeline/validate_002/validate_002.c +pipeline libbuild /tmp/pipeline/validate_002/validate_002.c /tmp/pipeline/validate_002/validate_002.so + +mempool MEMPOOL0 buffer 9472 pool 32K cache 256 cpu 0 + +ethdev 0000:00:04.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on +ethdev 0000:00:05.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on +ethdev 0000:00:06.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on +ethdev 0000:00:07.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on + + +pipeline PIPELINE0 build lib /tmp/pipeline/validate_002/validate_002.so io /tmp/pipeline/validate_002/ethdev.io numa 0 +pipeline PIPELINE0 table validate_002 add /tmp/pipeline/validate_002/table.txt +pipeline PIPELINE0 commit + +thread 1 pipeline PIPELINE0 enable diff --git a/dep/pipeline/validate_002/validate_002.spec b/dep/pipeline/validate_002/validate_002.spec new file mode 100644 index 00000000..f29f30e1 --- /dev/null +++ b/dep/pipeline/validate_002/validate_002.spec @@ -0,0 +1,82 @@ +; SPDX-License-Identifier: BSD-3-Clause +; Copyright(c) 2020 Intel Corporation + +// +// Packet headers. +// +struct ethernet_h { + bit<48> dst_addr + bit<48> src_addr + bit<16> ether_type +} + +struct vlan_h { + bit<16> pcp_cfi_vid + bit<16> ether_type +} + +header ethernet instanceof ethernet_h +header outer_ethernet instanceof ethernet_h +header vlan instanceof vlan_h + +// +// Packet meta-data. +// +struct metadata_t { + bit<32> port +} + +metadata instanceof metadata_t + +// +// Actions +// +struct validate_002_args_t { + bit<48> ethernet_src_addr +} + +action validate_002_action args instanceof validate_002_args_t { + validate h.outer_ethernet + mov h.outer_ethernet.dst_addr h.ethernet.dst_addr + mov h.outer_ethernet.src_addr t.ethernet_src_addr + mov h.outer_ethernet.ether_type 0x8100 + validate h.vlan + mov h.vlan.ether_type h.ethernet.ether_type + mov h.vlan.pcp_cfi_vid 2 + + return +} + +action drop args none { + drop +} + +// +// Tables. +// +table validate_002 { + key { + h.ethernet.ether_type exact + } + + actions { + validate_002_action + drop + } + + default_action drop args none + size 1048576 +} + +// +// Pipeline. +// +apply { + rx m.port + extract h.ethernet + table validate_002 + emit h.outer_ethernet + emit h.vlan + emit h.ethernet + tx m.port +} -- 2.25.1 ^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH 2/2] tests/pipeline: added test case for validate instruction 2022-11-29 6:02 [PATCH 0/2] added test case for validate instruction Yogesh Jangra 2022-11-29 6:02 ` [PATCH 1/2] dep/pipeline: added dependencies for validate_002 test case Yogesh Jangra @ 2022-11-29 6:02 ` Yogesh Jangra 2022-12-13 7:01 ` [PATCH 0/2] " Tu, Lijuan 2 siblings, 0 replies; 7+ messages in thread From: Yogesh Jangra @ 2022-11-29 6:02 UTC (permalink / raw) To: dts Cc: cristian.dumitrescu, kamalakannan.r, harshad.suresh.narayane, yogesh.jangra Added a new test case to the pipeline test suite. This test case will verify the validate instruction with mov instruction. Signed-off-by: Yogesh Jangra <yogesh.jangra@intel.com> --- tests/TestSuite_pipeline.py | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/tests/TestSuite_pipeline.py b/tests/TestSuite_pipeline.py index 4ecea73d..de04bc44 100644 --- a/tests/TestSuite_pipeline.py +++ b/tests/TestSuite_pipeline.py @@ -2450,6 +2450,19 @@ class TestPipeline(TestCase): self.send_and_sniff_multiple(tx_port, rx_port, in_pcap, out_pcap, filters) self.dut.send_expect("^C", "# ", 20) + def test_validate_002(self): + + cli_file = "/tmp/pipeline/validate_002/validate_002.cli" + self.run_dpdk_app(cli_file) + + in_pcap = ["pipeline/validate_002/pcap_files/in_1.txt"] * 4 + out_pcap = ["pipeline/validate_002/pcap_files/out_1.txt"] * 4 + filters = ["vlan 2"] * 4 + tx_port = [0, 1, 2, 3] + rx_port = [0, 1, 2, 3] + self.send_and_sniff_multiple(tx_port, rx_port, in_pcap, out_pcap, filters) + self.dut.send_expect("^C", "# ", 20) + def test_table_002(self): cli_file = "/tmp/pipeline/table_002/table_002.cli" -- 2.25.1 ^ permalink raw reply [flat|nested] 7+ messages in thread
* RE: [PATCH 0/2] added test case for validate instruction 2022-11-29 6:02 [PATCH 0/2] added test case for validate instruction Yogesh Jangra 2022-11-29 6:02 ` [PATCH 1/2] dep/pipeline: added dependencies for validate_002 test case Yogesh Jangra 2022-11-29 6:02 ` [PATCH 2/2] tests/pipeline: added test case for validate instruction Yogesh Jangra @ 2022-12-13 7:01 ` Tu, Lijuan 2022-12-13 7:16 ` Jangra, Yogesh 2 siblings, 1 reply; 7+ messages in thread From: Tu, Lijuan @ 2022-12-13 7:01 UTC (permalink / raw) To: Jangra, Yogesh, dts Cc: Dumitrescu, Cristian, R, Kamalakannan, Suresh Narayane, Harshad, Jangra, Yogesh > -----Original Message----- > From: Yogesh Jangra <yogesh.jangra@intel.com> > Sent: Tuesday, November 29, 2022 2:03 PM > To: dts@dpdk.org > Cc: Dumitrescu, Cristian <cristian.dumitrescu@intel.com>; R, Kamalakannan > <kamalakannan.r@intel.com>; Suresh Narayane, Harshad > <harshad.suresh.narayane@intel.com>; Jangra, Yogesh > <yogesh.jangra@intel.com> > Subject: [PATCH 0/2] added test case for validate instruction > > Added the test case for validate instruction. > > Yogesh Jangra (2): > dep/pipeline: added dependencies for validate_002 test case > tests/pipeline: added test case for validate instruction Applied the series, thanks ^ permalink raw reply [flat|nested] 7+ messages in thread
* RE: [PATCH 0/2] added test case for validate instruction 2022-12-13 7:01 ` [PATCH 0/2] " Tu, Lijuan @ 2022-12-13 7:16 ` Jangra, Yogesh 2022-12-13 7:56 ` Tu, Lijuan 0 siblings, 1 reply; 7+ messages in thread From: Jangra, Yogesh @ 2022-12-13 7:16 UTC (permalink / raw) To: Tu, Lijuan, dts Cc: Dumitrescu, Cristian, R, Kamalakannan, Suresh Narayane, Harshad Hi Lijuan, I am unable to see the changes in the main branch. Can you please check? Thanks & Regards, Yogesh Jangra -----Original Message----- From: Tu, Lijuan <lijuan.tu@intel.com> Sent: Tuesday, December 13, 2022 12:31 PM To: Jangra, Yogesh <yogesh.jangra@intel.com>; dts@dpdk.org Cc: Dumitrescu, Cristian <cristian.dumitrescu@intel.com>; R, Kamalakannan <kamalakannan.r@intel.com>; Suresh Narayane, Harshad <harshad.suresh.narayane@intel.com>; Jangra, Yogesh <yogesh.jangra@intel.com> Subject: RE: [PATCH 0/2] added test case for validate instruction > -----Original Message----- > From: Yogesh Jangra <yogesh.jangra@intel.com> > Sent: Tuesday, November 29, 2022 2:03 PM > To: dts@dpdk.org > Cc: Dumitrescu, Cristian <cristian.dumitrescu@intel.com>; R, > Kamalakannan <kamalakannan.r@intel.com>; Suresh Narayane, Harshad > <harshad.suresh.narayane@intel.com>; Jangra, Yogesh > <yogesh.jangra@intel.com> > Subject: [PATCH 0/2] added test case for validate instruction > > Added the test case for validate instruction. > > Yogesh Jangra (2): > dep/pipeline: added dependencies for validate_002 test case > tests/pipeline: added test case for validate instruction Applied the series, thanks ^ permalink raw reply [flat|nested] 7+ messages in thread
* RE: [PATCH 0/2] added test case for validate instruction 2022-12-13 7:16 ` Jangra, Yogesh @ 2022-12-13 7:56 ` Tu, Lijuan 2022-12-13 12:09 ` Jangra, Yogesh 0 siblings, 1 reply; 7+ messages in thread From: Tu, Lijuan @ 2022-12-13 7:56 UTC (permalink / raw) To: Jangra, Yogesh, dts Cc: Dumitrescu, Cristian, R, Kamalakannan, Suresh Narayane, Harshad Please check again. I always apply series and reply mails one by one, but push code to main by batch. > -----Original Message----- > From: Jangra, Yogesh <yogesh.jangra@intel.com> > Sent: Tuesday, December 13, 2022 3:17 PM > To: Tu, Lijuan <lijuan.tu@intel.com>; dts@dpdk.org > Cc: Dumitrescu, Cristian <cristian.dumitrescu@intel.com>; R, Kamalakannan > <kamalakannan.r@intel.com>; Suresh Narayane, Harshad > <harshad.suresh.narayane@intel.com> > Subject: RE: [PATCH 0/2] added test case for validate instruction > > Hi Lijuan, > > I am unable to see the changes in the main branch. > Can you please check? > > > Thanks & Regards, > Yogesh Jangra > > -----Original Message----- > From: Tu, Lijuan <lijuan.tu@intel.com> > Sent: Tuesday, December 13, 2022 12:31 PM > To: Jangra, Yogesh <yogesh.jangra@intel.com>; dts@dpdk.org > Cc: Dumitrescu, Cristian <cristian.dumitrescu@intel.com>; R, Kamalakannan > <kamalakannan.r@intel.com>; Suresh Narayane, Harshad > <harshad.suresh.narayane@intel.com>; Jangra, Yogesh > <yogesh.jangra@intel.com> > Subject: RE: [PATCH 0/2] added test case for validate instruction > > > -----Original Message----- > > From: Yogesh Jangra <yogesh.jangra@intel.com> > > Sent: Tuesday, November 29, 2022 2:03 PM > > To: dts@dpdk.org > > Cc: Dumitrescu, Cristian <cristian.dumitrescu@intel.com>; R, > > Kamalakannan <kamalakannan.r@intel.com>; Suresh Narayane, Harshad > > <harshad.suresh.narayane@intel.com>; Jangra, Yogesh > > <yogesh.jangra@intel.com> > > Subject: [PATCH 0/2] added test case for validate instruction > > > > Added the test case for validate instruction. > > > > Yogesh Jangra (2): > > dep/pipeline: added dependencies for validate_002 test case > > tests/pipeline: added test case for validate instruction > > Applied the series, thanks ^ permalink raw reply [flat|nested] 7+ messages in thread
* RE: [PATCH 0/2] added test case for validate instruction 2022-12-13 7:56 ` Tu, Lijuan @ 2022-12-13 12:09 ` Jangra, Yogesh 0 siblings, 0 replies; 7+ messages in thread From: Jangra, Yogesh @ 2022-12-13 12:09 UTC (permalink / raw) To: Tu, Lijuan, dts Cc: Dumitrescu, Cristian, R, Kamalakannan, Suresh Narayane, Harshad Hi Lijuan, The changes are present in the main branch. Thank you for the update. Thanks & Regards, Yogesh Jangra -----Original Message----- From: Tu, Lijuan <lijuan.tu@intel.com> Sent: Tuesday, December 13, 2022 1:27 PM To: Jangra, Yogesh <yogesh.jangra@intel.com>; dts@dpdk.org Cc: Dumitrescu, Cristian <cristian.dumitrescu@intel.com>; R, Kamalakannan <kamalakannan.r@intel.com>; Suresh Narayane, Harshad <harshad.suresh.narayane@intel.com> Subject: RE: [PATCH 0/2] added test case for validate instruction Please check again. I always apply series and reply mails one by one, but push code to main by batch. > -----Original Message----- > From: Jangra, Yogesh <yogesh.jangra@intel.com> > Sent: Tuesday, December 13, 2022 3:17 PM > To: Tu, Lijuan <lijuan.tu@intel.com>; dts@dpdk.org > Cc: Dumitrescu, Cristian <cristian.dumitrescu@intel.com>; R, > Kamalakannan <kamalakannan.r@intel.com>; Suresh Narayane, Harshad > <harshad.suresh.narayane@intel.com> > Subject: RE: [PATCH 0/2] added test case for validate instruction > > Hi Lijuan, > > I am unable to see the changes in the main branch. > Can you please check? > > > Thanks & Regards, > Yogesh Jangra > > -----Original Message----- > From: Tu, Lijuan <lijuan.tu@intel.com> > Sent: Tuesday, December 13, 2022 12:31 PM > To: Jangra, Yogesh <yogesh.jangra@intel.com>; dts@dpdk.org > Cc: Dumitrescu, Cristian <cristian.dumitrescu@intel.com>; R, > Kamalakannan <kamalakannan.r@intel.com>; Suresh Narayane, Harshad > <harshad.suresh.narayane@intel.com>; Jangra, Yogesh > <yogesh.jangra@intel.com> > Subject: RE: [PATCH 0/2] added test case for validate instruction > > > -----Original Message----- > > From: Yogesh Jangra <yogesh.jangra@intel.com> > > Sent: Tuesday, November 29, 2022 2:03 PM > > To: dts@dpdk.org > > Cc: Dumitrescu, Cristian <cristian.dumitrescu@intel.com>; R, > > Kamalakannan <kamalakannan.r@intel.com>; Suresh Narayane, Harshad > > <harshad.suresh.narayane@intel.com>; Jangra, Yogesh > > <yogesh.jangra@intel.com> > > Subject: [PATCH 0/2] added test case for validate instruction > > > > Added the test case for validate instruction. > > > > Yogesh Jangra (2): > > dep/pipeline: added dependencies for validate_002 test case > > tests/pipeline: added test case for validate instruction > > Applied the series, thanks ^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2022-12-13 12:09 UTC | newest] Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2022-11-29 6:02 [PATCH 0/2] added test case for validate instruction Yogesh Jangra 2022-11-29 6:02 ` [PATCH 1/2] dep/pipeline: added dependencies for validate_002 test case Yogesh Jangra 2022-11-29 6:02 ` [PATCH 2/2] tests/pipeline: added test case for validate instruction Yogesh Jangra 2022-12-13 7:01 ` [PATCH 0/2] " Tu, Lijuan 2022-12-13 7:16 ` Jangra, Yogesh 2022-12-13 7:56 ` Tu, Lijuan 2022-12-13 12:09 ` Jangra, Yogesh
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