From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 97FEB42B8A; Wed, 24 May 2023 11:00:51 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 94B704114B; Wed, 24 May 2023 11:00:51 +0200 (CEST) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by mails.dpdk.org (Postfix) with ESMTP id A4FDD410F9 for ; Wed, 24 May 2023 11:00:49 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1684918849; x=1716454849; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=wGmkEDYNTQf1YjLSkcow1Gf4PVhNLER7YNdnMdWShAE=; b=hCSG8Vc61y5tBOyaXmqc9dEJxCe3WuuMQUor/W1fVdQiJ2Iw+t7FhR6r coRwtn42xZvmrhm7bio7LCcC6leod25rO+ZTCIw3YBM9KnNn49VyqG+Q8 chkVDmVI+Kn46IG1CpLDdBnQwSdp2yNWqW9wmjwtf88e1ThB0Anc4zxN3 oK0+ztK+164deqmpdvPAitgfN3ILfElAyyNCTawGeGdLo05lkUHt1NNuv ESddfaEIjP052af88uPX9LrJ/Rs9MJGUQ0bE7oSnMQPTRlwaWxXdOUWPf 9t3aVXNFfJPu5sG+JWIILHJGy4ISLpkjKpqNmVCRTo047T4oAIaq6dVAy w==; X-IronPort-AV: E=McAfee;i="6600,9927,10719"; a="439858723" X-IronPort-AV: E=Sophos;i="6.00,188,1681196400"; d="scan'208";a="439858723" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 May 2023 01:57:37 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10719"; a="878570994" X-IronPort-AV: E=Sophos;i="6.00,188,1681196400"; d="scan'208";a="878570994" Received: from silpixa00401183.ir.intel.com ([10.55.129.127]) by orsmga005.jf.intel.com with ESMTP; 24 May 2023 01:57:36 -0700 From: Tadhg Kearney To: dts@dpdk.org Cc: reshma.pattan@intel.com, karen.kelly@intel.com, Tadhg Kearney Subject: [PATCH v2 2/2] test_plans/power_intel_uncore: add test_plan for newly added test suite Date: Wed, 24 May 2023 08:57:27 +0000 Message-Id: <20230524085727.123156-3-tadhg.kearney@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230524085727.123156-1-tadhg.kearney@intel.com> References: <20230524085727.123156-1-tadhg.kearney@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dts@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: test suite reviews and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dts-bounces@dpdk.org Add new test_plan for newly added testsuite power_intel_uncore. Signed-off-by: Tadhg Kearney --- test_plans/index.rst | 1 + test_plans/power_intel_uncore_test_plan.rst | 126 ++++++++++++++++++++ 2 files changed, 127 insertions(+) create mode 100644 test_plans/power_intel_uncore_test_plan.rst diff --git a/test_plans/index.rst b/test_plans/index.rst index 2008f50b..c43ee002 100644 --- a/test_plans/index.rst +++ b/test_plans/index.rst @@ -212,6 +212,7 @@ The following are the test plans for the DPDK DTS automated test system. power_bidirection_channel_test_plan power_branch_ratio_test_plan power_empty_poll_test_plan + power_intel_uncore_test_plan power_pbf_test_plan power_pmd_test_plan power_pstate_test_plan diff --git a/test_plans/power_intel_uncore_test_plan.rst b/test_plans/power_intel_uncore_test_plan.rst new file mode 100644 index 00000000..06ee019c --- /dev/null +++ b/test_plans/power_intel_uncore_test_plan.rst @@ -0,0 +1,126 @@ +.. SPDX-License-Identifier: BSD-3-Clause + Copyright(c) 2023 Intel Corporation + +============================ +Power Intel Uncore Test Plan +============================ +Uncore is a term used by Intel to describe the functions of a microprocessor that are +not in the core, but which must be closely connected to the core to achieve high performance; +L3 cache, on-die memory controller, etc. +L3fwd-power facilitates setting uncores frequency using DPDK Intel Uncore API. + +There is a test for each of the three options that are available for setting the uncore frequency, +along with one final test to check successful exiting of Uncore API. + +Uncore is changed per socket level, this test suite is designed to change the uncore value +for each socket, however only socket 0 is verified to see if a change has been made. +To view changed frequency, using MSR can be done on any core of the socket. +See "Useful MSR 0x620 Information" section for more information. + +Preperation work +================ +1. Check kernel version to make sure that it's greater than 5.6 + uname -r +2. Check if uncore is enabled. + cd /sys/devices/system/cpu/intel_uncore_frequency + if not: + check if kernel flag is enabled: + cat /boot/config-$(uname -r) | grep -i CONFIG_INTEL_UNCORE_FREQ_CONTROL + Otherwise add uncore sysfs driver + modprobe intel-uncore-frequency +3. Check if MSR driver is built-in or is loaded + modprobe msr + +Useful MSR 0x620 Information +============================ +* MSR 0x620 is a seperate register interface to configure uncore P-state ratio + limits and read back the current set uncore ratio limits. +* Bits 0:6 are for max ratio and bits 8:14 for min ratio. +* MSR 0x620 value is a ratio value, which means it must be multiplied by the base clock + to get the uncore frequency in KHz. In this example 100000. +* When reading MSR 0x620 during this test suite core 0 on socket 0 is only checked + for the uncore max and min ratio limits. When no core is specified for rdmsr, + then it defaults to core 0. + +Test Case 1: Validate_power_uncore_freq_max +=========================================== +Step 1. Check current max set uncore frequency versus max possible frequency + + "rdmsr 0x620 -f 6:0 -d" * 100000 + cat /sys/devices/system/cpu/intel_uncore_frequency/package_00_die_00/initial_max_freq_khz + + If these are equal, then change the value of each sysfs file by bringing them down 1 bin (100MHz). + + echo {lower_uncore_max} > /sys/devices/system/cpu/intel_uncore_frequency/package_XX_die_XX/max_freq_khz + +Step 2. Run basic l3fwd-power configuration to set min/max uncore frequency to max limit + + .//examples/dpdk-l3fwd-power -c 0x6 -n 1 -- -p 0x1 -P --config="(0,0,2)" -U + +Step 3. Confirm uncore min/max frequencies are set to max limit + + "rdmsr 0x620 -f 6:0 -d" * 100000 + "rdmsr 0x620 -f 14:8" * 100000 + + +Test Case 2: Validate_power_uncore_freq_min +=========================================== + +Step 1. Check current min set uncore frequency versus min possible frequency + + "rdmsr 0x620 -f 14:8" * 100000 + cat /sys/devices/system/cpu/intel_uncore_frequency/package_00_die_00/initial_min_freq_khz + + If these are equal, then change the value of each sysfs file by bringing them up 1 bin (100MHz) . + + echo {higher_uncore_min} > /sys/devices/system/cpu/intel_uncore_frequency/package_XX_die_XX/min_freq_khz + +Step 2. Run basic l3fwd-power configuration to set min/max uncore frequency to min limit + + .//examples/dpdk-l3fwd-power -c 0x6 -n 1 -- -p 0x1 -P --config="(0,0,2)" -u + +Step 3. Confirm uncore min/max frequencies are set to min limit + + "rdmsr 0x620 -f 14:8" * 100000 + "rdmsr 0x620 -f 6:0 -d" * 100000 + + +Test Case 3: Validate_power_uncore_freq_idx +=========================================== + +Step 1. Check current max uncore frequency versus index 2. + Index 2 is equal to the frequency at index 2. + This is equal to => max possible freq - 200000(2 bin (200MHz)). + For example index range is [2400000, 2300000, 2200000,......,900000,800000], index 2 is 2200000. + + "rdmsr 0x620 -f 6:0 -d" * 100000 + (cat /sys/devices/system/cpu/intel_uncore_frequency/package_00_die_00/initial_max_freq_khz) - 200000 + + If these are equal, then change the value of each sysfs file by bringing them up 1 bin (100MHz). + + echo {higher_uncore_idx} > /sys/devices/system/cpu/intel_uncore_frequency/package_XX_die_XX/max_freq_khz + +Step 2. Run basic l3fwd-power configuration to set min/max uncore frequency to index value + + .//examples/dpdk-l3fwd-power -c 0x6 -n 1 -- -p 0x1 -P --config="(0,0,2)" -i 2 + +Step 3. Confirm uncore min/max frequencies are set to index value + + "rdmsr 0x620 -f 6:0 -d" * 100000 + "rdmsr 0x620 -f 14:8" * 100000 + + +Test Case 4: Validate_power_uncore_exit +======================================= + +Step 1. Run basic l3fwd-power configuration. Doesn't matter just want to get l3fwd-power running + + .//examples/dpdk-l3fwd-power -c 0x6 -n 1 -- -p 0x1 -P --config="(0,0,2)" -U + +Step 2. Exit program and ensure there are no errors/ right output is recieved + + Ctrl-C + Check for line "mode and been set back to the original" + Which should be the last line the program outputs when exiting correctly. + The start of the line is omitted as it won't be known which mode/which lcore will be set + back to the original. -- 2.34.1