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* Re: [dts] [PATCH v1] tests/cvl_qinq: modify packet content
  2021-04-13 13:33 [dts] [PATCH v1] tests/cvl_qinq: modify packet content Hailin Xu
@ 2021-04-13  6:00 ` Xu, HailinX
  2021-04-19  5:26   ` Zhao, HaiyangX
  0 siblings, 1 reply; 3+ messages in thread
From: Xu, HailinX @ 2021-04-13  6:00 UTC (permalink / raw)
  To: dts

> -----Original Message-----
> From: Xu, HailinX <hailinx.xu@intel.com> 
> Sent: Tuesday, April 13, 2021 9:34 PM
> To: dts@dpdk.org
> Cc: Xu, HailinX <hailinx.xu@intel.com>
> Subject: [dts][PATCH v1] tests/cvl_qinq: modify packet content

Tested-by: Xu Hailin <hailinx.xu@intel.com>

^ permalink raw reply	[flat|nested] 3+ messages in thread

* [dts] [PATCH v1] tests/cvl_qinq: modify packet content
@ 2021-04-13 13:33 Hailin Xu
  2021-04-13  6:00 ` Xu, HailinX
  0 siblings, 1 reply; 3+ messages in thread
From: Hailin Xu @ 2021-04-13 13:33 UTC (permalink / raw)
  To: dts; +Cc: Hailin Xu

modify the contents ipv4/ipv6 subcases mismatch packets.

Signed-off-by: Hailin Xu <hailinx.xu@intel.com>
---
 tests/TestSuite_cvl_qinq.py | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/tests/TestSuite_cvl_qinq.py b/tests/TestSuite_cvl_qinq.py
index 1160b0cd..7364360d 100644
--- a/tests/TestSuite_cvl_qinq.py
+++ b/tests/TestSuite_cvl_qinq.py
@@ -68,7 +68,7 @@ mac_qinq_ipv4_pay_dest_mac = {
                'mismatched': ['Ether(dst="00:11:22:33:44:33",type=0x8100)/Dot1Q(vlan=2,type=0x8100)/Dot1Q(vlan=0x1,type=0x0800)/IP()/("X"*480)',
                               'Ether(dst="00:11:22:33:44:55",type=0x8100)/Dot1Q(vlan=1,type=0x8100)/Dot1Q(vlan=0x1,type=0x0800)/IP()/("X"*480)',
                               'Ether(dst="00:11:22:33:44:55",type=0x8100)/Dot1Q(vlan=2,type=0x8100)/Dot1Q(vlan=0x2,type=0x0800)/IP()/("X"*480)',
-                              'Ether(dst="00:11:22:33:44:55",type=0x8100)/Dot1Q(vlan=2,type=0x8100)/Dot1Q(vlan=0x1,type=0x0800)/IPv6()/("X"*480)']},
+                              'Ether(dst="00:11:22:33:44:55",type=0x8100)/Dot1Q(vlan=2,type=0x8100)/Dot1Q(vlan=0x1,type=0x08DD)/IPv6()/("X"*480)']},
     'check_param': {'port_id':1}
 }
 
@@ -103,7 +103,7 @@ mac_qinq_ipv6_pay_dest_mac = {
                'mismatched': ['Ether(dst="00:11:22:33:44:33",type=0x8100)/Dot1Q(vlan=2,type=0x8100)/Dot1Q(vlan=0x1,type=0x86DD)/IPv6()/("X"*480)',
                               'Ether(dst="00:11:22:33:44:55",type=0x8100)/Dot1Q(vlan=1,type=0x8100)/Dot1Q(vlan=0x1,type=0x86DD)/IPv6()/("X"*480)',
                               'Ether(dst="00:11:22:33:44:55",type=0x8100)/Dot1Q(vlan=2,type=0x8100)/Dot1Q(vlan=0x2,type=0x86DD)/IPv6()/("X"*480)',
-                              'Ether(dst="00:11:22:33:44:55",type=0x8100)/Dot1Q(vlan=2,type=0x8100)/Dot1Q(vlan=0x1,type=0x86DD)/IP()/("X"*480)']},
+                              'Ether(dst="00:11:22:33:44:55",type=0x8100)/Dot1Q(vlan=2,type=0x8100)/Dot1Q(vlan=0x1,type=0x8600)/IP()/("X"*480)']},
     'check_param': {'port_id': 1}
 }
 
-- 
2.17.1


^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [dts] [PATCH v1] tests/cvl_qinq: modify packet content
  2021-04-13  6:00 ` Xu, HailinX
@ 2021-04-19  5:26   ` Zhao, HaiyangX
  0 siblings, 0 replies; 3+ messages in thread
From: Zhao, HaiyangX @ 2021-04-19  5:26 UTC (permalink / raw)
  To: Xu, HailinX, dts



> -----Original Message-----
> From: dts <dts-bounces@dpdk.org> On Behalf Of Xu, HailinX
> Sent: Tuesday, April 13, 2021 14:01
> To: dts@dpdk.org
> Subject: Re: [dts] [PATCH v1] tests/cvl_qinq: modify packet content
> 
> > -----Original Message-----
> > From: Xu, HailinX <hailinx.xu@intel.com>
> > Sent: Tuesday, April 13, 2021 9:34 PM
> > To: dts@dpdk.org
> > Cc: Xu, HailinX <hailinx.xu@intel.com>
> > Subject: [dts][PATCH v1] tests/cvl_qinq: modify packet content
> 
> Tested-by: Xu Hailin <hailinx.xu@intel.com>

Acked-by: Haiyang Zhao <haiyangx.zhao@intel.com>

^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2021-04-19  5:26 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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2021-04-13 13:33 [dts] [PATCH v1] tests/cvl_qinq: modify packet content Hailin Xu
2021-04-13  6:00 ` Xu, HailinX
2021-04-19  5:26   ` Zhao, HaiyangX

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