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* [dts] [PATCH V1] framework/crb: optimize code
@ 2021-03-26  3:20 Haiyang Zhao
  2021-03-26  3:31 ` Zhao, HaiyangX
  0 siblings, 1 reply; 3+ messages in thread
From: Haiyang Zhao @ 2021-03-26  3:20 UTC (permalink / raw)
  To: dts; +Cc: lijuan.tu, Haiyang Zhao

when the param dut_arch in conf/crbs.cfg not exist, dts will generate
a keyerror exception and terminate the test, but this param could not
be set actually.

Signed-off-by: Haiyang Zhao <haiyangx.zhao@intel.com>
---
 framework/crb.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/framework/crb.py b/framework/crb.py
index cd29b8e3..e7c1cc1c 100644
--- a/framework/crb.py
+++ b/framework/crb.py
@@ -666,7 +666,7 @@ class Crb(object):
             if self.crb['bypass core0'] and core == '0' and socket == '0':
                 self.logger.info("Core0 bypassed")
                 continue
-            if self.crb['dut arch'] == "arm64":
+            if self.crb.get('dut arch') == "arm64":
                 self.cores.append(
                         {'thread': thread, 'socket': node, 'core': coremap[core]})
             else:
-- 
2.17.1


^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [dts] [PATCH V1] framework/crb: optimize code
  2021-03-26  3:20 [dts] [PATCH V1] framework/crb: optimize code Haiyang Zhao
@ 2021-03-26  3:31 ` Zhao, HaiyangX
  2021-03-30  2:28   ` Tu, Lijuan
  0 siblings, 1 reply; 3+ messages in thread
From: Zhao, HaiyangX @ 2021-03-26  3:31 UTC (permalink / raw)
  To: Zhao, HaiyangX, dts; +Cc: Tu, Lijuan

[-- Attachment #1: Type: text/plain, Size: 335 bytes --]



> -----Original Message-----
> From: Haiyang Zhao <haiyangx.zhao@intel.com>
> Sent: Friday, March 26, 2021 11:20
> To: dts@dpdk.org
> Cc: Tu, Lijuan <lijuan.tu@intel.com>; Zhao, HaiyangX
> <haiyangx.zhao@intel.com>
> Subject: [dts][PATCH V1] framework/crb: optimize code

Tested-by: Haiyang Zhao <haiyangx.zhao@intel.com>

[-- Attachment #2: TestUnitTestsCmdline.log --]
[-- Type: application/octet-stream, Size: 2200 bytes --]

^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [dts] [PATCH V1] framework/crb: optimize code
  2021-03-26  3:31 ` Zhao, HaiyangX
@ 2021-03-30  2:28   ` Tu, Lijuan
  0 siblings, 0 replies; 3+ messages in thread
From: Tu, Lijuan @ 2021-03-30  2:28 UTC (permalink / raw)
  To: Zhao, HaiyangX, dts



> -----Original Message-----
> From: Zhao, HaiyangX <haiyangx.zhao@intel.com>
> Sent: 2021年3月26日 11:31
> To: Zhao, HaiyangX <haiyangx.zhao@intel.com>; dts@dpdk.org
> Cc: Tu, Lijuan <lijuan.tu@intel.com>
> Subject: RE: [dts][PATCH V1] framework/crb: optimize code
> 
> 
> 
> > -----Original Message-----
> > From: Haiyang Zhao <haiyangx.zhao@intel.com>
> > Sent: Friday, March 26, 2021 11:20
> > To: dts@dpdk.org
> > Cc: Tu, Lijuan <lijuan.tu@intel.com>; Zhao, HaiyangX
> > <haiyangx.zhao@intel.com>
> > Subject: [dts][PATCH V1] framework/crb: optimize code
> 
> Tested-by: Haiyang Zhao <haiyangx.zhao@intel.com>

Applied


^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2021-03-30  2:29 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-03-26  3:20 [dts] [PATCH V1] framework/crb: optimize code Haiyang Zhao
2021-03-26  3:31 ` Zhao, HaiyangX
2021-03-30  2:28   ` Tu, Lijuan

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