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Thu, 27 Jun 2019 03:43:38 -0700 Received: from shsmsx103.ccr.corp.intel.com (10.239.4.69) by FMSMSX157.amr.corp.intel.com (10.18.116.73) with Microsoft SMTP Server (TLS) id 14.3.439.0; Thu, 27 Jun 2019 03:43:37 -0700 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.185]) by SHSMSX103.ccr.corp.intel.com ([169.254.4.83]) with mapi id 14.03.0439.000; Thu, 27 Jun 2019 18:43:35 +0800 From: "Xu, Rosen" To: "Wei, Dan" , "dev@dpdk.org" CC: "Yigit, Ferruh" , "Chen, Santos" , "stable@dpdk.org" Thread-Topic: [DPDK v3] net/ipn3ke: modifications on AFU configurations Thread-Index: AQHVKKIqmT2zGxpd40qf+jvuH4bNN6avWQYA Date: Thu, 27 Jun 2019 10:43:34 +0000 Message-ID: <0E78D399C70DA940A335608C6ED296D73A841528@SHSMSX104.ccr.corp.intel.com> References: <1561213521-253504-1-git-send-email-dan.wei@intel.com> In-Reply-To: <1561213521-253504-1-git-send-email-dan.wei@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiZjVjNzMzZDYtMDVmOS00YmM5LTljN2UtNWJiYzdmMWZhZTI3IiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiaVc4eUFLTDliRFNkMms0RHFOM0xLQUxDTU1HSG82Umhsb3pTTFdkQjRnNGYzQnVWUXZyUnI3WFhKV3hCb1dnVSJ9 x-ctpclassification: CTP_NT dlp-product: dlpe-windows dlp-version: 11.0.400.15 dlp-reaction: no-action x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-stable] [DPDK v3] net/ipn3ke: modifications on AFU configurations X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Sender: "stable" > -----Original Message----- > From: Wei, Dan > Sent: Saturday, June 22, 2019 22:25 > To: dev@dpdk.org > Cc: Yigit, Ferruh ; Chen, Santos > ; Wei, Dan ; Xu, Rosen > ; stable@dpdk.org > Subject: [DPDK v3] net/ipn3ke: modifications on AFU configurations >=20 > Modify AFU configurations for new BBS(Blue Bitstream) of A10 on N3000 > card: > - AFU register access: RTL changes the UPL(User Programable Logic which i= s > the container of vBNG IP) base address and the read/write commands of > register indirect access. > - Poll the INIT_STS register to wait for the vBNG IP and DDR reset comple= tion. > - Refine log for debug: print UPL_version not only for vBNG bit stream, b= ut > also for other bit streams. >=20 > Fixes: c01c748e4ae6 ("net/ipn3ke: add new driver") > Cc: rosen.xu@intel.com > Cc: stable@dpdk.org >=20 > Signed-off-by: Dan Wei > --- > drivers/net/ipn3ke/ipn3ke_ethdev.c | 35 > ++++++++++++++++++++++++++++++++--- > drivers/net/ipn3ke/ipn3ke_ethdev.h | 12 ++++++++---- > drivers/net/ipn3ke/ipn3ke_flow.c | 1 + > 3 files changed, 41 insertions(+), 7 deletions(-) >=20 > diff --git a/drivers/net/ipn3ke/ipn3ke_ethdev.c > b/drivers/net/ipn3ke/ipn3ke_ethdev.c > index 9079b57..ac8ecc2 100644 > --- a/drivers/net/ipn3ke/ipn3ke_ethdev.c > +++ b/drivers/net/ipn3ke/ipn3ke_ethdev.c > @@ -192,6 +192,26 @@ > } >=20 > static int > +ipn3ke_vbng_init_done(struct ipn3ke_hw *hw) { > + uint32_t timeout =3D 10000; > + while (timeout > 0) { > + if (IPN3KE_READ_REG(hw, IPN3KE_VBNG_INIT_STS) > + =3D=3D IPN3KE_VBNG_INIT_DONE) > + break; > + rte_delay_us(1000); > + timeout--; > + } > + > + if (!timeout) { > + IPN3KE_AFU_PMD_ERR("IPN3KE vBNG INIT timeout.\n"); > + return -1; > + } > + > + return 0; > +} > + > +static int > ipn3ke_hw_init(struct rte_afu_device *afu_dev, > struct ipn3ke_hw *hw) > { > @@ -223,15 +243,24 @@ > "LineSideMACType", &mac_type); > hw->retimer.mac_type =3D (int)mac_type; >=20 > + IPN3KE_AFU_PMD_DEBUG("UPL_version is 0x%x\n", > IPN3KE_READ_REG(hw, 0)); > + > if (afu_dev->id.uuid.uuid_low =3D=3D IPN3KE_UUID_VBNG_LOW && > afu_dev->id.uuid.uuid_high =3D=3D IPN3KE_UUID_VBNG_HIGH) { > + /* After power on, wait until init done */ > + if (ipn3ke_vbng_init_done(hw)) > + return -1; > + > ipn3ke_hw_cap_init(hw); > - IPN3KE_AFU_PMD_DEBUG("UPL_version is 0x%x\n", > - IPN3KE_READ_REG(hw, 0)); >=20 > - /* Reset FPGA IP */ > + /* Reset vBNG IP */ > IPN3KE_WRITE_REG(hw, IPN3KE_CTRL_RESET, 1); > + rte_delay_us(10); > IPN3KE_WRITE_REG(hw, IPN3KE_CTRL_RESET, 0); > + > + /* After reset, wait until init done */ > + if (ipn3ke_vbng_init_done(hw)) > + return -1; > } >=20 > if (hw->retimer.mac_type =3D=3D > IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) { diff --git > a/drivers/net/ipn3ke/ipn3ke_ethdev.h > b/drivers/net/ipn3ke/ipn3ke_ethdev.h > index bfda9d5..29ab41c 100644 > --- a/drivers/net/ipn3ke/ipn3ke_ethdev.h > +++ b/drivers/net/ipn3ke/ipn3ke_ethdev.h > @@ -344,7 +344,8 @@ static inline uint32_t ipn3ke_read_addr(volatile void > *addr) >=20 > #define WCMD 0x8000000000000000 > #define RCMD 0x4000000000000000 > -#define UPL_BASE 0x10000 > +#define INDRCT_CTRL 0x30 > +#define INDRCT_STS 0x38 > static inline uint32_t _ipn3ke_indrct_read(struct ipn3ke_hw *hw, > uint32_t addr) > { > @@ -355,13 +356,13 @@ static inline uint32_t _ipn3ke_indrct_read(struct > ipn3ke_hw *hw, >=20 > word_offset =3D (addr & 0x1FFFFFF) >> 2; > indirect_value =3D RCMD | word_offset << 32; > - indirect_addrs =3D hw->hw_addr + (uint32_t)(UPL_BASE | 0x10); > + indirect_addrs =3D hw->hw_addr + (uint32_t)(INDRCT_CTRL); >=20 > rte_delay_us(10); >=20 > rte_write64((rte_cpu_to_le_64(indirect_value)), indirect_addrs); >=20 > - indirect_addrs =3D hw->hw_addr + (uint32_t)(UPL_BASE | 0x18); > + indirect_addrs =3D hw->hw_addr + (uint32_t)(INDRCT_STS); > while ((read_data >> 32) !=3D 1) > read_data =3D rte_read64(indirect_addrs); >=20 > @@ -377,7 +378,7 @@ static inline void _ipn3ke_indrct_write(struct > ipn3ke_hw *hw, >=20 > word_offset =3D (addr & 0x1FFFFFF) >> 2; > indirect_value =3D WCMD | word_offset << 32 | value; > - indirect_addrs =3D hw->hw_addr + (uint32_t)(UPL_BASE | 0x10); > + indirect_addrs =3D hw->hw_addr + (uint32_t)(INDRCT_CTRL); >=20 > rte_write64((rte_cpu_to_le_64(indirect_value)), indirect_addrs); > rte_delay_us(10); > @@ -410,6 +411,9 @@ static inline void _ipn3ke_indrct_write(struct > ipn3ke_hw *hw, #define IPN3KE_DEV_PRIVATE_TO_TM(dev) \ > (&(((struct ipn3ke_rpst *)(dev)->data->dev_private)->tm)) >=20 > +#define IPN3KE_VBNG_INIT_DONE (0x3) > +#define IPN3KE_VBNG_INIT_STS (0x204) > + > /* Byte address of IPN3KE internal module */ > #define IPN3KE_TM_VERSION (IPN3KE_QM_OFFSET + 0x0000= ) > #define IPN3KE_TM_SCRATCH (IPN3KE_QM_OFFSET + 0x0004= ) > diff --git a/drivers/net/ipn3ke/ipn3ke_flow.c > b/drivers/net/ipn3ke/ipn3ke_flow.c > index e5937df..ff9f064 100644 > --- a/drivers/net/ipn3ke/ipn3ke_flow.c > +++ b/drivers/net/ipn3ke/ipn3ke_flow.c > @@ -1360,6 +1360,7 @@ int ipn3ke_flow_init(void *dev) > IPN3KE_CLF_EM_NUM, > 0, > 0xFFFFFFFF); > + IPN3KE_AFU_PMD_DEBUG("IPN3KE_CLF_EN_NUM: %x\n", hw- > >flow_max_entries); > hw->flow_num_entries =3D 0; >=20 > return 0; > -- > 1.8.3.1 Acked-by: Rosen Xu