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* [dpdk-stable] [dpdk-dev] [PATCH 07/28] eal/arm64: fix memory barrier definition for arm64
       [not found] <1481680558-4003-1-git-send-email-jerin.jacob@caviumnetworks.com>
@ 2016-12-14  1:55 ` Jerin Jacob
       [not found] ` <1482832175-27199-1-git-send-email-jerin.jacob@caviumnetworks.com>
  1 sibling, 0 replies; 6+ messages in thread
From: Jerin Jacob @ 2016-12-14  1:55 UTC (permalink / raw)
  To: dev
  Cc: konstantin.ananyev, thomas.monjalon, bruce.richardson,
	jianbo.liu, viktorin, Jerin Jacob, stable

dsb instruction based barrier is used for non smp
version of memory barrier.

Fixes: d708f01b7102 ("eal/arm: add atomic operations for ARMv8")

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
CC: Jianbo Liu <jianbo.liu@linaro.org>
CC: stable@dpdk.org
---
 lib/librte_eal/common/include/arch/arm/rte_atomic_64.h | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
index d854aac..bc7de64 100644
--- a/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
+++ b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
@@ -43,7 +43,8 @@ extern "C" {
 
 #include "generic/rte_atomic.h"
 
-#define dmb(opt)  do { asm volatile("dmb " #opt : : : "memory"); } while (0)
+#define dsb(opt)  { asm volatile("dsb " #opt : : : "memory"); }
+#define dmb(opt)  { asm volatile("dmb " #opt : : : "memory"); }
 
 /**
  * General memory barrier.
@@ -54,7 +55,7 @@ extern "C" {
  */
 static inline void rte_mb(void)
 {
-	dmb(ish);
+	dsb(sy);
 }
 
 /**
@@ -66,7 +67,7 @@ static inline void rte_mb(void)
  */
 static inline void rte_wmb(void)
 {
-	dmb(ishst);
+	dsb(st);
 }
 
 /**
@@ -78,7 +79,7 @@ static inline void rte_wmb(void)
  */
 static inline void rte_rmb(void)
 {
-	dmb(ishld);
+	dsb(ld);
 }
 
 #define rte_smp_mb() rte_mb()
-- 
2.5.5

^ permalink raw reply	[flat|nested] 6+ messages in thread

* [dpdk-stable] [dpdk-dev] [PATCH v2 07/29] eal/arm64: fix memory barrier definition for arm64
       [not found] ` <1482832175-27199-1-git-send-email-jerin.jacob@caviumnetworks.com>
@ 2016-12-27  9:49   ` Jerin Jacob
  2017-01-03  7:40     ` Jianbo Liu
       [not found]   ` <1484212646-10338-1-git-send-email-jerin.jacob@caviumnetworks.com>
  1 sibling, 1 reply; 6+ messages in thread
From: Jerin Jacob @ 2016-12-27  9:49 UTC (permalink / raw)
  To: dev
  Cc: konstantin.ananyev, thomas.monjalon, bruce.richardson,
	jianbo.liu, viktorin, santosh.shukla, Jerin Jacob, stable

dsb instruction based barrier is used for non smp
version of memory barrier.

Fixes: d708f01b7102 ("eal/arm: add atomic operations for ARMv8")

CC: Jianbo Liu <jianbo.liu@linaro.org>
CC: stable@dpdk.org
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
---
 lib/librte_eal/common/include/arch/arm/rte_atomic_64.h | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
index d854aac..bc7de64 100644
--- a/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
+++ b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
@@ -43,7 +43,8 @@ extern "C" {
 
 #include "generic/rte_atomic.h"
 
-#define dmb(opt)  do { asm volatile("dmb " #opt : : : "memory"); } while (0)
+#define dsb(opt)  { asm volatile("dsb " #opt : : : "memory"); }
+#define dmb(opt)  { asm volatile("dmb " #opt : : : "memory"); }
 
 /**
  * General memory barrier.
@@ -54,7 +55,7 @@ extern "C" {
  */
 static inline void rte_mb(void)
 {
-	dmb(ish);
+	dsb(sy);
 }
 
 /**
@@ -66,7 +67,7 @@ static inline void rte_mb(void)
  */
 static inline void rte_wmb(void)
 {
-	dmb(ishst);
+	dsb(st);
 }
 
 /**
@@ -78,7 +79,7 @@ static inline void rte_wmb(void)
  */
 static inline void rte_rmb(void)
 {
-	dmb(ishld);
+	dsb(ld);
 }
 
 #define rte_smp_mb() rte_mb()
-- 
2.5.5

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [dpdk-stable] [dpdk-dev] [PATCH v2 07/29] eal/arm64: fix memory barrier definition for arm64
  2016-12-27  9:49   ` [dpdk-stable] [dpdk-dev] [PATCH v2 07/29] " Jerin Jacob
@ 2017-01-03  7:40     ` Jianbo Liu
  0 siblings, 0 replies; 6+ messages in thread
From: Jianbo Liu @ 2017-01-03  7:40 UTC (permalink / raw)
  To: Jerin Jacob
  Cc: dev, Ananyev, Konstantin, Thomas Monjalon, Bruce Richardson,
	Jan Viktorin, Santosh Shukla, stable

On 27 December 2016 at 17:49, Jerin Jacob
<jerin.jacob@caviumnetworks.com> wrote:
> dsb instruction based barrier is used for non smp
> version of memory barrier.
>
> Fixes: d708f01b7102 ("eal/arm: add atomic operations for ARMv8")
>
> CC: Jianbo Liu <jianbo.liu@linaro.org>
> CC: stable@dpdk.org
> Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
> ---
>  lib/librte_eal/common/include/arch/arm/rte_atomic_64.h | 9 +++++----
>  1 file changed, 5 insertions(+), 4 deletions(-)
>
> diff --git a/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
> index d854aac..bc7de64 100644
> --- a/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
> +++ b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
> @@ -43,7 +43,8 @@ extern "C" {
>
>  #include "generic/rte_atomic.h"
>
> -#define dmb(opt)  do { asm volatile("dmb " #opt : : : "memory"); } while (0)
> +#define dsb(opt)  { asm volatile("dsb " #opt : : : "memory"); }
> +#define dmb(opt)  { asm volatile("dmb " #opt : : : "memory"); }
>
>  /**
>   * General memory barrier.
> @@ -54,7 +55,7 @@ extern "C" {
>   */
>  static inline void rte_mb(void)
>  {
> -       dmb(ish);
> +       dsb(sy);
>  }
>
>  /**
> @@ -66,7 +67,7 @@ static inline void rte_mb(void)
>   */
>  static inline void rte_wmb(void)
>  {
> -       dmb(ishst);
> +       dsb(st);
>  }
>
>  /**
> @@ -78,7 +79,7 @@ static inline void rte_wmb(void)
>   */
>  static inline void rte_rmb(void)
>  {
> -       dmb(ishld);
> +       dsb(ld);
>  }
>
>  #define rte_smp_mb() rte_mb()
> --
> 2.5.5
>

Acked-by: Jianbo Liu <jianbo.liu@linaro.org>

^ permalink raw reply	[flat|nested] 6+ messages in thread

* [dpdk-stable] [dpdk-dev] [PATCH v3 07/29] eal/arm64: fix memory barrier definition for arm64
       [not found]   ` <1484212646-10338-1-git-send-email-jerin.jacob@caviumnetworks.com>
@ 2017-01-12  9:17     ` Jerin Jacob
       [not found]     ` <1484637244-7548-1-git-send-email-jerin.jacob@caviumnetworks.com>
  1 sibling, 0 replies; 6+ messages in thread
From: Jerin Jacob @ 2017-01-12  9:17 UTC (permalink / raw)
  To: dev
  Cc: konstantin.ananyev, thomas.monjalon, bruce.richardson,
	jianbo.liu, viktorin, santosh.shukla, Jerin Jacob, stable

dsb instruction based barrier is used for non smp
version of memory barrier.

Fixes: d708f01b7102 ("eal/arm: add atomic operations for ARMv8")

CC: Jianbo Liu <jianbo.liu@linaro.org>
CC: stable@dpdk.org
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: Jianbo Liu <jianbo.liu@linaro.org>
---
 lib/librte_eal/common/include/arch/arm/rte_atomic_64.h | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
index d854aac..bc7de64 100644
--- a/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
+++ b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
@@ -43,7 +43,8 @@ extern "C" {
 
 #include "generic/rte_atomic.h"
 
-#define dmb(opt)  do { asm volatile("dmb " #opt : : : "memory"); } while (0)
+#define dsb(opt)  { asm volatile("dsb " #opt : : : "memory"); }
+#define dmb(opt)  { asm volatile("dmb " #opt : : : "memory"); }
 
 /**
  * General memory barrier.
@@ -54,7 +55,7 @@ extern "C" {
  */
 static inline void rte_mb(void)
 {
-	dmb(ish);
+	dsb(sy);
 }
 
 /**
@@ -66,7 +67,7 @@ static inline void rte_mb(void)
  */
 static inline void rte_wmb(void)
 {
-	dmb(ishst);
+	dsb(st);
 }
 
 /**
@@ -78,7 +79,7 @@ static inline void rte_wmb(void)
  */
 static inline void rte_rmb(void)
 {
-	dmb(ishld);
+	dsb(ld);
 }
 
 #define rte_smp_mb() rte_mb()
-- 
2.5.5

^ permalink raw reply	[flat|nested] 6+ messages in thread

* [dpdk-stable] [dpdk-dev] [PATCH v4 07/29] eal/arm64: fix memory barrier definition for arm64
       [not found]     ` <1484637244-7548-1-git-send-email-jerin.jacob@caviumnetworks.com>
@ 2017-01-17  7:13       ` Jerin Jacob
       [not found]       ` <1484702502-25451-1-git-send-email-jerin.jacob@caviumnetworks.com>
  1 sibling, 0 replies; 6+ messages in thread
From: Jerin Jacob @ 2017-01-17  7:13 UTC (permalink / raw)
  To: dev
  Cc: konstantin.ananyev, thomas.monjalon, bruce.richardson,
	jianbo.liu, viktorin, santosh.shukla, Jerin Jacob, stable

dsb instruction based barrier is used for non smp
version of memory barrier.

Fixes: d708f01b7102 ("eal/arm: add atomic operations for ARMv8")

CC: Jianbo Liu <jianbo.liu@linaro.org>
CC: stable@dpdk.org
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: Jianbo Liu <jianbo.liu@linaro.org>
---
 lib/librte_eal/common/include/arch/arm/rte_atomic_64.h | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
index d854aac..bc7de64 100644
--- a/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
+++ b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
@@ -43,7 +43,8 @@ extern "C" {
 
 #include "generic/rte_atomic.h"
 
-#define dmb(opt)  do { asm volatile("dmb " #opt : : : "memory"); } while (0)
+#define dsb(opt)  { asm volatile("dsb " #opt : : : "memory"); }
+#define dmb(opt)  { asm volatile("dmb " #opt : : : "memory"); }
 
 /**
  * General memory barrier.
@@ -54,7 +55,7 @@ extern "C" {
  */
 static inline void rte_mb(void)
 {
-	dmb(ish);
+	dsb(sy);
 }
 
 /**
@@ -66,7 +67,7 @@ static inline void rte_mb(void)
  */
 static inline void rte_wmb(void)
 {
-	dmb(ishst);
+	dsb(st);
 }
 
 /**
@@ -78,7 +79,7 @@ static inline void rte_wmb(void)
  */
 static inline void rte_rmb(void)
 {
-	dmb(ishld);
+	dsb(ld);
 }
 
 #define rte_smp_mb() rte_mb()
-- 
2.5.5

^ permalink raw reply	[flat|nested] 6+ messages in thread

* [dpdk-stable] [dpdk-dev] [PATCH v5 07/29] eal/arm64: fix memory barrier definition for arm64
       [not found]       ` <1484702502-25451-1-git-send-email-jerin.jacob@caviumnetworks.com>
@ 2017-01-18  1:21         ` Jerin Jacob
  0 siblings, 0 replies; 6+ messages in thread
From: Jerin Jacob @ 2017-01-18  1:21 UTC (permalink / raw)
  To: dev
  Cc: konstantin.ananyev, thomas.monjalon, bruce.richardson,
	jianbo.liu, viktorin, santosh.shukla, Jerin Jacob, stable

dsb instruction based barrier is used for non smp
version of memory barrier.

Fixes: d708f01b7102 ("eal/arm: add atomic operations for ARMv8")

CC: Jianbo Liu <jianbo.liu@linaro.org>
CC: stable@dpdk.org
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: Jianbo Liu <jianbo.liu@linaro.org>
---
 lib/librte_eal/common/include/arch/arm/rte_atomic_64.h | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
index d854aac..bc7de64 100644
--- a/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
+++ b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
@@ -43,7 +43,8 @@ extern "C" {
 
 #include "generic/rte_atomic.h"
 
-#define dmb(opt)  do { asm volatile("dmb " #opt : : : "memory"); } while (0)
+#define dsb(opt)  { asm volatile("dsb " #opt : : : "memory"); }
+#define dmb(opt)  { asm volatile("dmb " #opt : : : "memory"); }
 
 /**
  * General memory barrier.
@@ -54,7 +55,7 @@ extern "C" {
  */
 static inline void rte_mb(void)
 {
-	dmb(ish);
+	dsb(sy);
 }
 
 /**
@@ -66,7 +67,7 @@ static inline void rte_mb(void)
  */
 static inline void rte_wmb(void)
 {
-	dmb(ishst);
+	dsb(st);
 }
 
 /**
@@ -78,7 +79,7 @@ static inline void rte_wmb(void)
  */
 static inline void rte_rmb(void)
 {
-	dmb(ishld);
+	dsb(ld);
 }
 
 #define rte_smp_mb() rte_mb()
-- 
2.5.5

^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2017-01-18  1:22 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
     [not found] <1481680558-4003-1-git-send-email-jerin.jacob@caviumnetworks.com>
2016-12-14  1:55 ` [dpdk-stable] [dpdk-dev] [PATCH 07/28] eal/arm64: fix memory barrier definition for arm64 Jerin Jacob
     [not found] ` <1482832175-27199-1-git-send-email-jerin.jacob@caviumnetworks.com>
2016-12-27  9:49   ` [dpdk-stable] [dpdk-dev] [PATCH v2 07/29] " Jerin Jacob
2017-01-03  7:40     ` Jianbo Liu
     [not found]   ` <1484212646-10338-1-git-send-email-jerin.jacob@caviumnetworks.com>
2017-01-12  9:17     ` [dpdk-stable] [dpdk-dev] [PATCH v3 " Jerin Jacob
     [not found]     ` <1484637244-7548-1-git-send-email-jerin.jacob@caviumnetworks.com>
2017-01-17  7:13       ` [dpdk-stable] [dpdk-dev] [PATCH v4 " Jerin Jacob
     [not found]       ` <1484702502-25451-1-git-send-email-jerin.jacob@caviumnetworks.com>
2017-01-18  1:21         ` [dpdk-stable] [dpdk-dev] [PATCH v5 " Jerin Jacob

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