From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by dpdk.org (Postfix) with ESMTP id 8DAFC374C for ; Fri, 7 Apr 2017 10:15:18 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=intel.com; i=@intel.com; q=dns/txt; s=intel; t=1491552918; x=1523088918; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=S920NwjKkVFn9/0xRqTkbd64nb3YHj0LaGxAIlRw8Y8=; b=TiAvU2x8LVcFSakAL8SizGXhS3+oAqCdn9AFaiwFvf+DfLG45bDGczHl nKKfoJnLxEgNPihYZThZu+N8N+xt5A==; Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 07 Apr 2017 01:15:17 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.37,164,1488873600"; d="scan'208";a="953273528" Received: from yliu-dev.sh.intel.com ([10.239.67.162]) by orsmga003.jf.intel.com with ESMTP; 07 Apr 2017 01:15:16 -0700 From: Yuanhan Liu To: Wenzhuo Lu Cc: Yuanhan Liu , dpdk stable Date: Fri, 7 Apr 2017 16:11:47 +0800 Message-Id: <1491552724-3034-30-git-send-email-yuanhan.liu@linux.intel.com> X-Mailer: git-send-email 1.9.0 In-Reply-To: <1491552724-3034-1-git-send-email-yuanhan.liu@linux.intel.com> References: <1491552724-3034-1-git-send-email-yuanhan.liu@linux.intel.com> Subject: [dpdk-stable] patch 'net/ixgbe: fix TC bandwidth setting' has been queued to LTS release 16.11.2 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 07 Apr 2017 08:15:19 -0000 Hi, FYI, your patch has been queued to LTS release 16.11.2 Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet. It will be pushed if I get no objections before 04/11/17. So please shout if anyone has objections. Thanks. --yliu --- >>From 5dab54f9b05753d274e5a6f6cfa3e34d7fe3ad6d Mon Sep 17 00:00:00 2001 From: Wenzhuo Lu Date: Fri, 24 Mar 2017 10:51:03 +0800 Subject: [PATCH] net/ixgbe: fix TC bandwidth setting [ upstream commit 1c4da4ef963a971701cd319ab78a431ca53bcb93 ] 4 and 8 TCs are supported on ixgbe. By default there're 8 TCs. So when initializing the device, the bandwidth for 8 TCs is set. When changing the TC number, it's only considered setting the bandwidth for 4 TCs. If the user change the number from 4 to 8, the TCs' bandwidth is not right. Fixes: 0807f80d35d0 ("ixgbe: DCB / flow control") Signed-off-by: Wenzhuo Lu --- drivers/net/ixgbe/ixgbe_rxtx.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/net/ixgbe/ixgbe_rxtx.c b/drivers/net/ixgbe/ixgbe_rxtx.c index e541704..d1e300a 100644 --- a/drivers/net/ixgbe/ixgbe_rxtx.c +++ b/drivers/net/ixgbe/ixgbe_rxtx.c @@ -3710,6 +3710,15 @@ ixgbe_dcb_hw_configure(struct rte_eth_dev *dev, tc->path[IXGBE_DCB_TX_CONFIG].bwg_percent = 0; tc->path[IXGBE_DCB_RX_CONFIG].bwg_percent = 0; } + } else { + /* Re-configure 8 TCs BW */ + for (i = 0; i < nb_tcs; i++) { + tc = &dcb_config->tc_config[i]; + tc->path[IXGBE_DCB_TX_CONFIG].bwg_percent = + (uint8_t)(100 / nb_tcs + (i & 1)); + tc->path[IXGBE_DCB_RX_CONFIG].bwg_percent = + (uint8_t)(100 / nb_tcs + (i & 1)); + } } switch (hw->mac.type) { -- 1.9.0