patches for DPDK stable branches
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From: Qi Zhang <qi.z.zhang@intel.com>
To: ferruh.yigit@intel.com, jingjing.wu@intel.com,
	helin.zhang@intel.com, wenzhuo.lu@intel.com,
	bruce.richardson@intel.com, jing.d.chen@intel.com
Cc: dev@dpdk.org, Qi Zhang <qi.z.zhang@intel.com>, stable@dpdk.org
Subject: [dpdk-stable] [PATCH 1/3] net/i40e: fix memory overflow for 32 bit vPMD
Date: Sun, 30 Apr 2017 01:26:49 -0400	[thread overview]
Message-ID: <1493530011-33557-2-git-send-email-qi.z.zhang@intel.com> (raw)
In-Reply-To: <1493530011-33557-1-git-send-email-qi.z.zhang@intel.com>

Return mbuf points of _recv_raw_pkts_vec are modified out of bound.

Fixes: 8e109464c022 ("i40e: allow vector Rx and Tx usage")
Cc: stable@dpdk.org

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/i40e/i40e_rxtx_vec_sse.c | 16 ++++++++++++----
 1 file changed, 12 insertions(+), 4 deletions(-)

diff --git a/drivers/net/i40e/i40e_rxtx_vec_sse.c b/drivers/net/i40e/i40e_rxtx_vec_sse.c
index 8bc3399..3b4a352 100644
--- a/drivers/net/i40e/i40e_rxtx_vec_sse.c
+++ b/drivers/net/i40e/i40e_rxtx_vec_sse.c
@@ -316,20 +316,26 @@ _recv_raw_pkts_vec(struct i40e_rx_queue *rxq, struct rte_mbuf **rx_pkts,
 		__m128i descs[RTE_I40E_DESCS_PER_LOOP];
 		__m128i pkt_mb1, pkt_mb2, pkt_mb3, pkt_mb4;
 		__m128i zero, staterr, sterr_tmp1, sterr_tmp2;
-		__m128i mbp1, mbp2; /* two mbuf pointer in one XMM reg. */
+		/* 2 64 bit or 4 32 bit mbuf pointers in one XMM reg. */
+		__m128i mbp1;
+#if defined(RTE_ARCH_X86_64)
+		__m128i mbp2;
+#endif
 
-		/* B.1 load 1 mbuf point */
+		/* B.1 load 2 (64 bit) or 4 (32 bit) mbuf points */
 		mbp1 = _mm_loadu_si128((__m128i *)&sw_ring[pos]);
 		/* Read desc statuses backwards to avoid race condition */
 		/* A.1 load 4 pkts desc */
 		descs[3] = _mm_loadu_si128((__m128i *)(rxdp + 3));
 		rte_compiler_barrier();
 
-		/* B.2 copy 2 mbuf point into rx_pkts  */
+		/* B.2 copy 2 64 bit or 4 32 bit mbuf point into rx_pkts */
 		_mm_storeu_si128((__m128i *)&rx_pkts[pos], mbp1);
 
-		/* B.1 load 1 mbuf point */
+#if defined(RTE_ARCH_X86_64)
+		/* B.1 load 2 64 bit mbuf points */
 		mbp2 = _mm_loadu_si128((__m128i *)&sw_ring[pos+2]);
+#endif
 
 		descs[2] = _mm_loadu_si128((__m128i *)(rxdp + 2));
 		rte_compiler_barrier();
@@ -338,8 +344,10 @@ _recv_raw_pkts_vec(struct i40e_rx_queue *rxq, struct rte_mbuf **rx_pkts,
 		rte_compiler_barrier();
 		descs[0] = _mm_loadu_si128((__m128i *)(rxdp));
 
+#if defined(RTE_ARCH_X86_64)
 		/* B.2 copy 2 mbuf point into rx_pkts  */
 		_mm_storeu_si128((__m128i *)&rx_pkts[pos+2], mbp2);
+#endif
 
 		if (split_packet) {
 			rte_mbuf_prefetch_part2(rx_pkts[pos]);
-- 
2.7.4

       reply	other threads:[~2017-04-30 12:33 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <1493530011-33557-1-git-send-email-qi.z.zhang@intel.com>
2017-04-30  5:26 ` Qi Zhang [this message]
2017-04-30  5:26 ` [dpdk-stable] [PATCH 2/3] net/ixgbe: " Qi Zhang
2017-04-30  5:26 ` [dpdk-stable] [PATCH 3/3] net/fm10k: " Qi Zhang
     [not found] <1493417284-32355-1-git-send-email-qi.z.zhang@intel.com>
2017-04-28 22:08 ` [dpdk-stable] [PATCH 1/3] net/i40e: " Qi Zhang

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