From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pg0-f44.google.com (mail-pg0-f44.google.com [74.125.83.44]) by dpdk.org (Postfix) with ESMTP id 295248CF2 for ; Mon, 21 Aug 2017 11:36:34 +0200 (CEST) Received: by mail-pg0-f44.google.com with SMTP id t3so68843135pgt.0 for ; Mon, 21 Aug 2017 02:36:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=fridaylinux-org.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=PjZVQHnnGZnTVBbO1rkv58te/JF6BWkUs59TzxT/Cpo=; b=imuCH2QOCMkNwWgGY4N0JkifsdK8v4ozaJg2VqLLepCjfxRRNvLhxC0vtc7tnlp5He TmyvEZYJppJSn1hVA/FSB/v75rAwS9PUCgYXfZBdZ/mIl88XGKzVFXcNFqFCWrZ7Pp4c xkBI5aq5WbIyNpGUIgc1PqVA/SXeGYuxprFMi4UPsm/Krr0dLK56Z3/90SXmPOu75EoT CEK8zQYW7NB6yLrnHbBe6pZ8w/bRAo4tONB9RrId6VQqrcGiJ8OdflJyH9Up7KcgMHHV AANJofInu5nMn96q/Zs1cSMzOWtQhGjoaZ5JHfBoJAanAIHyXLheCUoF8f7zZ/zDyLK4 wT8w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=PjZVQHnnGZnTVBbO1rkv58te/JF6BWkUs59TzxT/Cpo=; b=taBYHJEWLknuHiyO1KqQtQjKXu8+r2zJZPB2jTavPhR77crq0r04C0KSrZih7QK1QX i4GjM5Ug9Ipb7Hc3TaY0HzToCs5WcsWiXuzOEd2QOLHwiqL7Huig5fJ7hbdqxSP64gBH rJP55URBgvoRAFborYcLcq4dS62zgL10RulQ+vScQVbKAIShZPn3alMfO3nVkYLNpMZG BN0oDNSEvukM21Xus7SnJ2sAtpIYPPi93I8y2n41hEtvcj3abisinbwDrnGypMxNfZqB Ygsvgj5wILqDxqHwWZN5qAt4uXBdImznHBDmd7cDZS5NWJIGLKt4AM58EYNlAPknam6w i80A== X-Gm-Message-State: AHYfb5jRe9f6TrTyZGfistS5WKASpb3fvmVeCabvHfpjydhFcmYMhguD PnmmCf73V2DtDVnP X-Received: by 10.98.61.21 with SMTP id k21mr458045pfa.154.1503308193471; Mon, 21 Aug 2017 02:36:33 -0700 (PDT) Received: from localhost.localdomain ([45.63.61.64]) by smtp.gmail.com with ESMTPSA id 69sm23355087pfh.186.2017.08.21.02.36.28 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 21 Aug 2017 02:36:32 -0700 (PDT) From: Yuanhan Liu To: Jianfeng Tan Cc: Vipin Varghese , Yuanhan Liu , dpdk stable Date: Mon, 21 Aug 2017 17:30:54 +0800 Message-Id: <1503307878-16728-40-git-send-email-yliu@fridaylinux.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1503307878-16728-1-git-send-email-yliu@fridaylinux.org> References: <1503307878-16728-1-git-send-email-yliu@fridaylinux.org> Subject: [dpdk-stable] patch 'net/virtio: fix MAC address read' has been queued to stable release 17.05.2 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 21 Aug 2017 09:36:34 -0000 Hi, FYI, your patch has been queued to stable release 17.05.2 Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet. It will be pushed if I get no objections before 08/24/17. So please shout if anyone has objections. Thanks. --yliu --- >>From 6107ef3772656e42b831ee68f07ebfdda792c84c Mon Sep 17 00:00:00 2001 From: Jianfeng Tan Date: Fri, 28 Jul 2017 23:01:14 +0000 Subject: [PATCH] net/virtio: fix MAC address read [ upstream commit cb482cb3a305f96d8155bbeb052344dde66ad8f2 ] When virtio-net devices are bound to uio_pci_generic, we get the wrong mac addr by virtio PMD. The wrong mac addr is a addr that is 4-byte left shift of the correct addr. It's a regression bug introduced by the cleanup patch below. The condition of if we set use_msix should be if msix is actually enabled. Only to check if there is a capability list is not enough. For example, binding a transitional device to uio_pci_device would trigger the wrong assignment of use_msix. To correct that, we also check the flags of msix capability to make sure it's enabled. Fixes: ee1843bd8907 ("net/virtio: remove redundant MSI-X detection") Reported-by: Vipin Varghese Signed-off-by: Jianfeng Tan Acked-by: Yuanhan Liu --- drivers/net/virtio/virtio_pci.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/drivers/net/virtio/virtio_pci.c b/drivers/net/virtio/virtio_pci.c index b7b3d61..f91ecb4 100644 --- a/drivers/net/virtio/virtio_pci.c +++ b/drivers/net/virtio/virtio_pci.c @@ -579,6 +579,8 @@ get_cfg_addr(struct rte_pci_device *dev, struct virtio_pci_cap *cap) return base + offset; } +#define PCI_MSIX_ENABLE 0x8000 + static int virtio_read_caps(struct rte_pci_device *dev, struct virtio_hw *hw) { @@ -605,8 +607,17 @@ virtio_read_caps(struct rte_pci_device *dev, struct virtio_hw *hw) break; } - if (cap.cap_vndr == PCI_CAP_ID_MSIX) - hw->use_msix = 1; + if (cap.cap_vndr == PCI_CAP_ID_MSIX) { + /* Transitional devices would also have this capability, + * that's why we also check if msix is enabled. + * 1st byte is cap ID; 2nd byte is the position of next + * cap; next two bytes are the flags. + */ + uint16_t flags = ((uint16_t *)&cap)[1]; + + if (flags & PCI_MSIX_ENABLE) + hw->use_msix = 1; + } if (cap.cap_vndr != PCI_CAP_ID_VNDR) { PMD_INIT_LOG(DEBUG, -- 2.7.4