From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from out4-smtp.messagingengine.com (out4-smtp.messagingengine.com [66.111.4.28]) by dpdk.org (Postfix) with ESMTP id E27B8235 for ; Tue, 21 Nov 2017 14:26:00 +0100 (CET) Received: from compute1.internal (compute1.nyi.internal [10.202.2.41]) by mailout.nyi.internal (Postfix) with ESMTP id 78DB820B77; Tue, 21 Nov 2017 08:26:00 -0500 (EST) Received: from frontend2 ([10.202.2.161]) by compute1.internal (MEProxy); Tue, 21 Nov 2017 08:26:00 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=fridaylinux.org; h=cc:date:from:in-reply-to:message-id:references:subject:to :x-me-sender:x-me-sender:x-sasl-enc; s=fm1; bh=/8LN1AiAPLeVsDbs7 XfxuO/Xk/Z4xHA5RuZ5vIhgCNw=; b=G2U5AytOyjkijB0NoYEgN+Kgf2wzA0HPQ Y0ptJAal7INH3P7zWeqslvVUDCurzkgdBEKP9prUpUznkHLDlwfUooKpO3nFC03n Nbn0dKDCG2gJtcHNsWQIOBGiC+UiGy4qOpHQmf/K+rEVnWtxQrovEr8TKdLBd+2b h32gxgoKbX0rzKCFF2x+BYRZ9mlE6Nr1RD1WA6ZCA3fvo9saj3nVkJYWzj+Gs8mN JiHW7PAPZK6ZfPlwHt+5gTEidY8isT1MBhzLkGZ470pYYC9gM6sKjejZ3klNDCfu xk582Zv0SiOWd+QwoOEzMwEEx8mkbgb5Nva8r6SWldpgAcXh/+nsA== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:date:from:in-reply-to:message-id :references:subject:to:x-me-sender:x-me-sender:x-sasl-enc; s= fm1; bh=/8LN1AiAPLeVsDbs7XfxuO/Xk/Z4xHA5RuZ5vIhgCNw=; b=W/HKzwko NbJ6OIfPd7wA+yuIVigX1HoQgizpDizieEa2XI1W3fgOCQkGuYN3ton483f8t7vK vTt2aY0V4fK8AVJK/EMZmaPvTyWRyRHiFmL6L48g/qehKsnE/Pufwb3mfnNrnRDL g5TwG4jac2gdpN1Z81/Cbo4WZ0J3iotXyGFS5Hq9Cbm7Rm2gLSuAxL4/A80kkbj4 TK1kBNIA2ECm6zZCDlKMQaxHVzbDAXNa4w7VwB3eiQFHDSpn+k9XEF3t6BV70B5n x6QkBCPfyL4rlYVdS3EoLdFvRxKfTH6QmiHhFXA4nzoHa4jyRIShoI0d1yPzL279 6ay5P/lM2bEawQ== X-ME-Sender: Received: from localhost.localdomain (unknown [180.158.62.0]) by mail.messagingengine.com (Postfix) with ESMTPA id DF26B24810; Tue, 21 Nov 2017 08:25:55 -0500 (EST) From: Yuanhan Liu To: Wei Dai Cc: Wenzhuo Lu , Jianwei Ma , dpdk stable Date: Tue, 21 Nov 2017 21:17:27 +0800 Message-Id: <1511270333-31002-105-git-send-email-yliu@fridaylinux.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1511270333-31002-1-git-send-email-yliu@fridaylinux.org> References: <1511270333-31002-1-git-send-email-yliu@fridaylinux.org> Subject: [dpdk-stable] patch 'net/ixgbe: fix Rx queue interrupt mapping in VF' has been queued to stable release 17.08.1 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 21 Nov 2017 13:26:01 -0000 Hi, FYI, your patch has been queued to stable release 17.08.1 Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet. It will be pushed if I get no objections before 11/24/17. So please shout if anyone has objections. Thanks. --yliu --- >>From 2c9f53e59b49dbfde424de012d7a8d719f293f3b Mon Sep 17 00:00:00 2001 From: Wei Dai Date: Wed, 20 Sep 2017 18:18:13 +0800 Subject: [PATCH] net/ixgbe: fix Rx queue interrupt mapping in VF [ upstream commit ca9d6597184bddb8d3ee925cb462fcbd51628299 ] When a VF port is bound to VFIO-PCI, miscellaneous interrupt is mapped to MSI-X vector 0 and Rx queues interrupt are mapped to other vectors in vfio_enable_msix( ). To simplify implementation, all VFIO-PCI bound ixgbe VF Rx queue interrupts can be mapped in vector 1. And as current igb_uio only support only one vector, ixgbe VF PMD should use vector 0 for igb_uio and vector 1 for VFIO-PCI. Without this patch, VF Rx queue interrupt is mapped to vector 0 in register settings and mapped to VFIO vector 1 in vfio_enable_msix( ), and then all Rx queue interrupts will be missed. Fixes: b13bfab4cdbe ("eal: reserve VFIO vector zero for misc interrupt") Signed-off-by: Wei Dai Acked-by: Wenzhuo Lu Tested-by: Jianwei Ma --- drivers/net/ixgbe/ixgbe_ethdev.c | 25 ++++++++++++++++++++++--- 1 file changed, 22 insertions(+), 3 deletions(-) diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c index 858230d..0c431fa 100644 --- a/drivers/net/ixgbe/ixgbe_ethdev.c +++ b/drivers/net/ixgbe/ixgbe_ethdev.c @@ -4999,7 +4999,10 @@ ixgbevf_dev_start(struct rte_eth_dev *dev) /* check and configure queue intr-vector mapping */ if (dev->data->dev_conf.intr_conf.rxq != 0) { - intr_vector = dev->data->nb_rx_queues; + /* According to datasheet, only vector 0/1/2 can be used, + * now only one vector is used for Rx queue + */ + intr_vector = 1; if (rte_intr_efd_enable(intr_handle, intr_vector)) return -1; } @@ -5509,9 +5512,12 @@ ixgbevf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id) uint32_t mask; struct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private); + uint32_t vec = IXGBE_MISC_VEC_ID; mask = IXGBE_READ_REG(hw, IXGBE_VTEIMS); - mask |= (1 << IXGBE_MISC_VEC_ID); + if (rte_intr_allow_others(intr_handle)) + vec = IXGBE_RX_VEC_START; + mask |= (1 << vec); RTE_SET_USED(queue_id); IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, mask); @@ -5526,9 +5532,14 @@ ixgbevf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id) uint32_t mask; struct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private); + struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); + struct rte_intr_handle *intr_handle = &pci_dev->intr_handle; + uint32_t vec = IXGBE_MISC_VEC_ID; mask = IXGBE_READ_REG(hw, IXGBE_VTEIMS); - mask &= ~(1 << IXGBE_MISC_VEC_ID); + if (rte_intr_allow_others(intr_handle)) + vec = IXGBE_RX_VEC_START; + mask &= ~(1 << vec); RTE_SET_USED(queue_id); IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, mask); @@ -5670,6 +5681,7 @@ ixgbevf_configure_msix(struct rte_eth_dev *dev) IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private); uint32_t q_idx; uint32_t vector_idx = IXGBE_MISC_VEC_ID; + uint32_t base = IXGBE_MISC_VEC_ID; /* Configure VF other cause ivar */ ixgbevf_set_ivar_map(hw, -1, 1, vector_idx); @@ -5680,6 +5692,11 @@ ixgbevf_configure_msix(struct rte_eth_dev *dev) if (!rte_intr_dp_is_en(intr_handle)) return; + if (rte_intr_allow_others(intr_handle)) { + base = IXGBE_RX_VEC_START; + vector_idx = IXGBE_RX_VEC_START; + } + /* Configure all RX queues of VF */ for (q_idx = 0; q_idx < dev->data->nb_rx_queues; q_idx++) { /* Force all queue use vector 0, @@ -5687,6 +5704,8 @@ ixgbevf_configure_msix(struct rte_eth_dev *dev) */ ixgbevf_set_ivar_map(hw, 0, q_idx, vector_idx); intr_handle->intr_vec[q_idx] = vector_idx; + if (vector_idx < base + intr_handle->nb_efd - 1) + vector_idx++; } } -- 2.7.4