From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from out4-smtp.messagingengine.com (out4-smtp.messagingengine.com [66.111.4.28]) by dpdk.org (Postfix) with ESMTP id A8DD823B for ; Tue, 21 Nov 2017 14:26:52 +0100 (CET) Received: from compute1.internal (compute1.nyi.internal [10.202.2.41]) by mailout.nyi.internal (Postfix) with ESMTP id 5CFDD20A11; Tue, 21 Nov 2017 08:26:52 -0500 (EST) Received: from frontend2 ([10.202.2.161]) by compute1.internal (MEProxy); Tue, 21 Nov 2017 08:26:52 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=fridaylinux.org; h=cc:date:from:in-reply-to:message-id:references:subject:to :x-me-sender:x-me-sender:x-sasl-enc; s=fm1; bh=35mN7gY5VD2EdTiSM +KnDPYYEv5NuJohpl045qoGq/8=; b=MbU0NtVj+S+BCzE/gKbUIPp7yEBl3/Q/M 28r9ubylIcD+tz4t/Pyovk8wstn+tMSMOXGIBwI2Eu5r2liFoyjrwAeirkT1LACd WqwRYNVJwIgMJkRS4trLC9PzHb9/cbxvdjpARGOnX6UwPzPjjFn90x4vJSPnv1WW aJxVsbXUWbKNcd5SAHAEpo6njHDEYzUAacokAXRa6fGi4KdzjqRbXT+yOKDEQHlK T4rRNE876Q88aPtUru+WTZF6b/gVMih8NxH5HmYShTpIuA0f+F+fdr1SvgTgvFav FrUTE8mVXALX1xWiTZe0Ge+Y/k0IKGu1nMiK2Gr/4qYEWqqDFFAsw== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:date:from:in-reply-to:message-id :references:subject:to:x-me-sender:x-me-sender:x-sasl-enc; s= fm1; bh=35mN7gY5VD2EdTiSM+KnDPYYEv5NuJohpl045qoGq/8=; b=Pv+e7ZTe dact76S5u4Ykddhl0wGYxSUSBa5if9WsAn2XiPhqlp4CyVdXBDUMJXL2D2NF0sUr YVLdWxVyeyMLzB3/bOo31mgpuRwKiRBbc1zY/qWJUIeORXa87dlzOddE6bC3FK4k ruc7ISjOq+d/2MBoozRso04QxvicbK9SFOsrcSHl2K5av8OHsOCy4I2GiYL27Kt+ RIvggPVB3x7/JWqGQ84rlxALo71Vf3qsBFw73oNg+IMZcIaJRnTPFJB5xbrVTyWx P64IRA6qQ5uvpUdanqporAo2KZ5rYMaJ4EU4KGbpD+/T9eVZwUOfcEhlUJelaOiH dqYMp0QTwEhh4A== X-ME-Sender: Received: from localhost.localdomain (unknown [180.158.62.0]) by mail.messagingengine.com (Postfix) with ESMTPA id E6F782486C; Tue, 21 Nov 2017 08:26:49 -0500 (EST) From: Yuanhan Liu To: Andrey Chilikin Cc: Beilei Xing , dpdk stable Date: Tue, 21 Nov 2017 21:17:40 +0800 Message-Id: <1511270333-31002-118-git-send-email-yliu@fridaylinux.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1511270333-31002-1-git-send-email-yliu@fridaylinux.org> References: <1511270333-31002-1-git-send-email-yliu@fridaylinux.org> Subject: [dpdk-stable] patch 'net/i40e: fix flexible payload configuration' has been queued to stable release 17.08.1 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 21 Nov 2017 13:26:52 -0000 Hi, FYI, your patch has been queued to stable release 17.08.1 Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet. It will be pushed if I get no objections before 11/24/17. So please shout if anyone has objections. Thanks. --yliu --- >>From 31bd08ad1c82f121c79d023829e73cf593ebdeca Mon Sep 17 00:00:00 2001 From: Andrey Chilikin Date: Fri, 6 Oct 2017 19:11:26 +0100 Subject: [PATCH] net/i40e: fix flexible payload configuration [ upstream commit 1edc13a83b0d41f7ab982996f5a1ef9c5ee13b7b ] Removed legacy writes to ORT/PIT registers from i40e_GLQF_reg_init(struct i40e_hw *hw) function. Latest NVM versions contain all relevant values and these values should not be overwritten by SW to maintain driver/firmware compatibility and to avoid conflicts with dynamic device personalization profiles. Fixes: f05ec7d77e41 ("i40e: initialize flow director flexible payload setting") Signed-off-by: Andrey Chilikin Acked-by: Beilei Xing --- drivers/net/i40e/i40e_ethdev.c | 23 +++++++++++------------ 1 file changed, 11 insertions(+), 12 deletions(-) diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c index 1adc8c8..9f978f7 100644 --- a/drivers/net/i40e/i40e_ethdev.c +++ b/drivers/net/i40e/i40e_ethdev.c @@ -701,23 +701,22 @@ RTE_PMD_REGISTER_KMOD_DEP(net_i40e, "* igb_uio | uio_pci_generic | vfio-pci"); static inline void i40e_GLQF_reg_init(struct i40e_hw *hw) { /* - * Initialize registers for flexible payload, which should be set by NVM. - * This should be removed from code once it is fixed in NVM. + * Force global configuration for flexible payload + * to the first 16 bytes of the corresponding L2/L3/L4 paylod. + * This should be removed from code once proper + * configuration API is added to avoid configuration conflicts + * between ports of the same device. */ - I40E_WRITE_REG(hw, I40E_GLQF_ORT(18), 0x00000030); - I40E_WRITE_REG(hw, I40E_GLQF_ORT(19), 0x00000030); - I40E_WRITE_REG(hw, I40E_GLQF_ORT(26), 0x0000002B); - I40E_WRITE_REG(hw, I40E_GLQF_ORT(30), 0x0000002B); I40E_WRITE_REG(hw, I40E_GLQF_ORT(33), 0x000000E0); I40E_WRITE_REG(hw, I40E_GLQF_ORT(34), 0x000000E3); I40E_WRITE_REG(hw, I40E_GLQF_ORT(35), 0x000000E6); - I40E_WRITE_REG(hw, I40E_GLQF_ORT(20), 0x00000031); - I40E_WRITE_REG(hw, I40E_GLQF_ORT(23), 0x00000031); - I40E_WRITE_REG(hw, I40E_GLQF_ORT(63), 0x0000002D); - I40E_WRITE_REG(hw, I40E_GLQF_PIT(16), 0x00007480); - I40E_WRITE_REG(hw, I40E_GLQF_PIT(17), 0x00007440); - /* Initialize registers for parsing packet type of QinQ */ + /* + * Initialize registers for parsing packet type of QinQ + * This should be removed from code once proper + * configuration API is added to avoid configuration conflicts + * between ports of the same device. + */ I40E_WRITE_REG(hw, I40E_GLQF_ORT(40), 0x00000029); I40E_WRITE_REG(hw, I40E_GLQF_PIT(9), 0x00009420); } -- 2.7.4