From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from out4-smtp.messagingengine.com (out4-smtp.messagingengine.com [66.111.4.28]) by dpdk.org (Postfix) with ESMTP id 85BC3F94 for ; Tue, 21 Nov 2017 14:31:11 +0100 (CET) Received: from compute1.internal (compute1.nyi.internal [10.202.2.41]) by mailout.nyi.internal (Postfix) with ESMTP id 1267820BB5; Tue, 21 Nov 2017 08:31:11 -0500 (EST) Received: from frontend2 ([10.202.2.161]) by compute1.internal (MEProxy); Tue, 21 Nov 2017 08:31:11 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=fridaylinux.org; h=cc:date:from:in-reply-to:message-id:references:subject:to :x-me-sender:x-me-sender:x-sasl-enc; s=fm1; bh=CW4dYLwkhfLs/Glbn stvyb6DznfU4lYqabXMjfV/NCE=; b=aky6HDWhnLaOflTpnLEhcv3cb/Rl8aeHr MBOi3kUfirKiFIM+yM7CGDO+5DQEeEuRtb6sWFfgwjkU8EbjGcvp7fv7Z+QkYn/h 2g7QfY+l67NBeiUgV+Eovf2OCDYU1UFAftemR9TfyoIAJsEREhJOB+5V18HPge6W rl9BUiPF4ntEGPdd2+UOcHsamMok1voyCuV1VUjGINYjN380fFCzbb+CzyFwvouU MdqovgqvK3u4PL+5bqW9z7H4CquMKjizAJfr5sNyuxg2dRQM6UJfwD7a7JlKFsQe IjBm9K/lGrxjwjxdb8bxVWqHdz2CVoCRhi1xKO0HAXzyu5p8GdtUQ== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:date:from:in-reply-to:message-id :references:subject:to:x-me-sender:x-me-sender:x-sasl-enc; s= fm1; bh=CW4dYLwkhfLs/Glbnstvyb6DznfU4lYqabXMjfV/NCE=; b=NDldFqaA IoERg2EjIOIaCZ6bqB9v7keuhDWJRhUqaFh6YxI71TTsdWNozjnG7hTY/XvoM2yX 2n9Q1+/dkgieMMrR4ZdyDg95PuKOk6mKKmUgKDaA3Y2k4zGeepIfIGRwivCSYCV6 VLHHTDWtLz3kUq6YPMljO0V5eAtd6XevqdbaTWegtcwUBKJBxhl2rTtBdudoqFM/ 31ZcDB9Qb5XISPdpebqflY6xYDaOgF44Nw9u9bHF9iikqybGxitN7av+op7+Bwlb jOPMewHMzfZGJakinC8yJ4AsCaY7ugazmg5RSuDBRWCCrkH2HKgPzQOSn4TwHEZp 274cHK7w2R+V2w== X-ME-Sender: Received: from localhost.localdomain (unknown [180.158.62.0]) by mail.messagingengine.com (Postfix) with ESMTPA id A10B024810; Tue, 21 Nov 2017 08:31:08 -0500 (EST) From: Yuanhan Liu To: Xiaoyun Li Cc: Wenzhuo Lu , dpdk stable Date: Tue, 21 Nov 2017 21:18:45 +0800 Message-Id: <1511270333-31002-183-git-send-email-yliu@fridaylinux.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1511270333-31002-1-git-send-email-yliu@fridaylinux.org> References: <1511270333-31002-1-git-send-email-yliu@fridaylinux.org> Subject: [dpdk-stable] patch 'net/igb: fix Rx interrupt with VFIO and MSI-X' has been queued to stable release 17.08.1 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 21 Nov 2017 13:31:11 -0000 Hi, FYI, your patch has been queued to stable release 17.08.1 Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet. It will be pushed if I get no objections before 11/24/17. So please shout if anyone has objections. Thanks. --yliu --- >>From 0d14a24150ce07af0ba35d2caac8f6e307994050 Mon Sep 17 00:00:00 2001 From: Xiaoyun Li Date: Mon, 6 Nov 2017 10:41:40 +0800 Subject: [PATCH] net/igb: fix Rx interrupt with VFIO and MSI-X [ upstream commit 88e04712f40fca9dd3ab98dd549e27791c320b75 ] When using VFIO and MSIX interrupt mode, cannot get Rx interrupts. Because when enabling the interrupt vectors, the offset is computed in a way which only supports IGB_UIO. But the offset should be different when using VFIO. This patch fixes this issue. Fixes: c3cd3de0ab50 ("igb: enable Rx queue interrupts for PF") Signed-off-by: Xiaoyun Li Acked-by: Wenzhuo Lu --- drivers/net/e1000/igb_ethdev.c | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-) diff --git a/drivers/net/e1000/igb_ethdev.c b/drivers/net/e1000/igb_ethdev.c index 8078a1e..5f5dc18 100644 --- a/drivers/net/e1000/igb_ethdev.c +++ b/drivers/net/e1000/igb_ethdev.c @@ -5382,7 +5382,14 @@ eth_igb_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id) { struct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private); - uint32_t mask = 1 << queue_id; + struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); + struct rte_intr_handle *intr_handle = &pci_dev->intr_handle; + uint32_t vec = E1000_MISC_VEC_ID; + + if (rte_intr_allow_others(intr_handle)) + vec = E1000_RX_VEC_START; + + uint32_t mask = 1 << (queue_id + vec); E1000_WRITE_REG(hw, E1000_EIMC, mask); E1000_WRITE_FLUSH(hw); @@ -5397,7 +5404,12 @@ eth_igb_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id) E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private); struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); struct rte_intr_handle *intr_handle = &pci_dev->intr_handle; - uint32_t mask = 1 << queue_id; + uint32_t vec = E1000_MISC_VEC_ID; + + if (rte_intr_allow_others(intr_handle)) + vec = E1000_RX_VEC_START; + + uint32_t mask = 1 << (queue_id + vec); uint32_t regval; regval = E1000_READ_REG(hw, E1000_EIMS); -- 2.7.4