From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from out4-smtp.messagingengine.com (out4-smtp.messagingengine.com [66.111.4.28]) by dpdk.org (Postfix) with ESMTP id 216EC237 for ; Tue, 21 Nov 2017 14:19:54 +0100 (CET) Received: from compute1.internal (compute1.nyi.internal [10.202.2.41]) by mailout.nyi.internal (Postfix) with ESMTP id CAFDC20B0E; Tue, 21 Nov 2017 08:19:53 -0500 (EST) Received: from frontend2 ([10.202.2.161]) by compute1.internal (MEProxy); Tue, 21 Nov 2017 08:19:53 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=fridaylinux.org; h=cc:date:from:in-reply-to:message-id:references:subject:to :x-me-sender:x-me-sender:x-sasl-enc; s=fm1; bh=/O2B47+Xasubdo0gI ROKlF5kuCFf7Ga1xFJESVG4SLY=; b=MdlAFVWfaajykpIxKSPCI235Za0sNoJPT 3S7Yuu0vEVHO1SKki8OA85iHraj8sjKv9ALbcDWubMEvQkuMY5el3DwpWYiJa5gW 4ELwDM0Zo1Y0aH1izoAuob7B1dLCG/xCtpy48DMY310C7zrhORY0fW+7pFlsVMAt rrGleq3GCwJvzYYieE/TUM/FLnqUmQuBMqSq/eIcCS9Rt4yYLW12zjn7yj+APRw/ hs+tBhz044FrICWnIqOZpDs0Hlfh+eBLaCv+TjChHUXE0Cho9M6ZJT4X46JV4OC8 3EO7/75VljJrMZv+FhzNkA5dKKX7HpI10lGQBHHG66yw1SkxP7wOQ== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:date:from:in-reply-to:message-id :references:subject:to:x-me-sender:x-me-sender:x-sasl-enc; s= fm1; bh=/O2B47+Xasubdo0gIROKlF5kuCFf7Ga1xFJESVG4SLY=; b=o4gbCIJj pF3ImAn25t1oDMewLb++NSdarr7u2V3tJrmh7C32BH8mstpJcR/dP780OnouCcbF o8zTK8wpdzdzBs0L/o4qnmHSt3+DJKRSppMCHC1k4vEJ16kYbWoCghkyKf8SZ71E C/BM4YRvQACduPxsWSvRfGXodq0KwkeJQgyxMehnsXhgrp6BZCI+FbUdOv1hbzIV BmxxrfOC5YFjK4okFwKrLFFU/F/JtQ7HPwg5BCOkXi1UsPwmvttd2hgNBWbwmQh6 N/ThMb/3BgrARDDkORrIW0ny1y+7/FsSw6GMxz5LrvZdc9UtAFvck0WobvZYs1nN rxxaYofCG68GcQ== X-ME-Sender: Received: from localhost.localdomain (unknown [180.158.62.0]) by mail.messagingengine.com (Postfix) with ESMTPA id B1A04248B4; Tue, 21 Nov 2017 08:19:50 -0500 (EST) From: Yuanhan Liu To: Qi Zhang Cc: Kevin Traynor , dpdk stable Date: Tue, 21 Nov 2017 21:15:51 +0800 Message-Id: <1511270333-31002-9-git-send-email-yliu@fridaylinux.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1511270333-31002-1-git-send-email-yliu@fridaylinux.org> References: <1511270333-31002-1-git-send-email-yliu@fridaylinux.org> Subject: [dpdk-stable] patch 'net/i40e: fix flow control watermark mismatch' has been queued to stable release 17.08.1 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 21 Nov 2017 13:19:54 -0000 Hi, FYI, your patch has been queued to stable release 17.08.1 Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet. It will be pushed if I get no objections before 11/24/17. So please shout if anyone has objections. Thanks. --yliu --- >>From 04ffc0055d1b1ea424d3f61cfae765a700ad2280 Mon Sep 17 00:00:00 2001 From: Qi Zhang Date: Thu, 10 Aug 2017 18:48:07 +0800 Subject: [PATCH] net/i40e: fix flow control watermark mismatch [ upstream commit 273dcde1c3e3582d39f4a0916febca7dfd518de9 ] Flow control watermark is not read out correctly, that may cause an application who not intend to change watermark but does change it with a rte_eth_dev_flow_ctrl_set call right after rte_eth_dev_flow_ctrl_get. The idea fix is, during init, the watermark is set with default value, so it is not necessary to read out from hw register during flow_ctl_get, But due to I40E_GLRPB_GHW limitation, it is shared by different ports on the same device, it is possible the value is changed on another port, but local variable not sync, so we have to read out register every flow_ctl_get. Fixes: f53577f06925 ("i40e: support flow control") Signed-off-by: Qi Zhang Acked-by: Kevin Traynor --- drivers/net/i40e/i40e_ethdev.c | 19 +++++++++++++------ 1 file changed, 13 insertions(+), 6 deletions(-) diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c index 5f26e24..4a2e3f2 100644 --- a/drivers/net/i40e/i40e_ethdev.c +++ b/drivers/net/i40e/i40e_ethdev.c @@ -86,12 +86,6 @@ /* Flow control default timer */ #define I40E_DEFAULT_PAUSE_TIME 0xFFFFU -/* Flow control default high water */ -#define I40E_DEFAULT_HIGH_WATER (0x1C40/1024) - -/* Flow control default low water */ -#define I40E_DEFAULT_LOW_WATER (0x1A40/1024) - /* Flow control enable fwd bit */ #define I40E_PRTMAC_FWD_CTRL 0x00000001 @@ -101,6 +95,12 @@ /* Kilobytes shift */ #define I40E_KILOSHIFT 10 +/* Flow control default high water */ +#define I40E_DEFAULT_HIGH_WATER (0xF2000 >> I40E_KILOSHIFT) + +/* Flow control default low water */ +#define I40E_DEFAULT_LOW_WATER (0xF2000 >> I40E_KILOSHIFT) + /* Receive Average Packet Size in Byte*/ #define I40E_PACKET_AVERAGE_SIZE 128 @@ -3225,6 +3225,13 @@ i40e_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private); fc_conf->pause_time = pf->fc_conf.pause_time; + + /* read out from register, in case they are modified by other port */ + pf->fc_conf.high_water[I40E_MAX_TRAFFIC_CLASS] = + I40E_READ_REG(hw, I40E_GLRPB_GHW) >> I40E_KILOSHIFT; + pf->fc_conf.low_water[I40E_MAX_TRAFFIC_CLASS] = + I40E_READ_REG(hw, I40E_GLRPB_GLW) >> I40E_KILOSHIFT; + fc_conf->high_water = pf->fc_conf.high_water[I40E_MAX_TRAFFIC_CLASS]; fc_conf->low_water = pf->fc_conf.low_water[I40E_MAX_TRAFFIC_CLASS]; -- 2.7.4