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Message-ID: <1519751579.22753.53.camel@debian.org>
From: Luca Boccassi <bluca@debian.org>
To: Gowrishankar <gowrishankar.m@linux.vnet.ibm.com>, dev@dpdk.org
Cc: Chao Zhu <chaozhu@linux.vnet.ibm.com>, stable@dpdk.org, thomas@monjalon.net
Date: Tue, 27 Feb 2018 17:12:59 +0000
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Subject: Re: [dpdk-stable] [PATCH] eal/ppc: fix rte_smp_mb for a compilation
error with else clause
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On Tue, 2018-02-27 at 20:43 +0530, Gowrishankar wrote:
> From: Gowrishankar Muthukrishnan <gowrishankar.m@linux.vnet.ibm.com>
>=20
> This patch fixes the compilation problem with rte_smp_mb,
> when there is else clause following it, as in test_barrier.c.
>=20
> Fixes: 05c3fd7110 ("eal/ppc: atomic operations for IBM Power")
> Cc: stable@dpdk.org
>=20
> Signed-off-by: Gowrishankar Muthukrishnan <gowrishankar.m@linux.vnet.
> ibm.com>
> ---
> =C2=A0lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h | 2 +-
> =C2=A01 file changed, 1 insertion(+), 1 deletion(-)
>=20
> diff --git a/lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h
> b/lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h
> index 39fce7b..1821774 100644
> --- a/lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h
> +++ b/lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h
> @@ -55,7 +55,7 @@
> =C2=A0 * Guarantees that the LOAD and STORE operations generated before
> the
> =C2=A0 * barrier occur before the LOAD and STORE operations generated
> after.
> =C2=A0 */
> -#define rte_mb()=C2=A0=C2=A0{asm volatile("sync" : : : "memory"); }
> +#define rte_mb()=C2=A0=C2=A0asm volatile("sync" : : : "memory")
> =C2=A0
> =C2=A0/**
> =C2=A0 * Write memory barrier.
Acked-by: Luca Boccassi <bluca@debian.org>
Maintainers and reviewers, 18.02 build on ppc64 is currently broken and
I'd like to backport this patch to Debian ASAP and then backport to
16.11, so a quick review would be much much appreciated. Thank you!
--=20
Kind regards,
Luca Boccassi