From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by dpdk.space (Postfix) with ESMTP id C0A7CA00E6 for ; Wed, 17 Apr 2019 09:41:10 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 81BB51B5A3; Wed, 17 Apr 2019 09:41:10 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by dpdk.org (Postfix) with ESMTP id 9489A1B540; Wed, 17 Apr 2019 09:41:06 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x3H7e1iV032035; Wed, 17 Apr 2019 00:41:06 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0818; bh=leptYrMZZFFB79aWNh8PwVt2Io+f0/oJs1Iijk999m8=; b=NY4RpQgtYe2QFlxVazUe6V8IE6VXeOHit7VQ5fEuCVbAAnwDcfMrg2ZDZ4ilzxJa/1Kh J0YmZA4JO0rND5I3OVoSN3mBlIlHTjOYrWcZ42NFkFiFykCC8HzPa7EVi76Q0TugLa0s Ml/Qa4DxEId2WTaz4nfov+COFA8aXppgh+cff6wz4jjJWKbyFdgVUA4WS00uLzpHYbYl yJ2K3mKSJKfC/mL1/0P65VbD0Fy6vV06UupmMZxLvbMzZF0L0cQ8wIT8m/qWVONcasoF PjohbgQ87QouLd5puArlM0UW4BR0s6s2OEeCDq3GBqO6+OhhH5/uHXz3MugaZsrb297u 0A== Received: from sc-exch02.marvell.com ([199.233.58.182]) by mx0b-0016f401.pphosted.com with ESMTP id 2rwyuf00nw-4 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Wed, 17 Apr 2019 00:41:05 -0700 Received: from SC-EXCH03.marvell.com (10.93.176.83) by SC-EXCH02.marvell.com (10.93.176.82) with Microsoft SMTP Server (TLS) id 15.0.1367.3; Wed, 17 Apr 2019 00:41:04 -0700 Received: from maili.marvell.com (10.93.176.43) by SC-EXCH03.marvell.com (10.93.176.83) with Microsoft SMTP Server id 15.0.1367.3 via Frontend Transport; Wed, 17 Apr 2019 00:41:04 -0700 Received: from maili.marvell.com (unknown [10.29.16.81]) by maili.marvell.com (Postfix) with ESMTP id 824DA3F7040; Wed, 17 Apr 2019 00:41:01 -0700 (PDT) From: To: CC: , , , Vivek Sharma , Date: Wed, 17 Apr 2019 13:10:46 +0530 Message-ID: <1555486846-20764-1-git-send-email-viveksharma@marvell.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1555240302-9771-1-git-send-email-viveksharma@marvell.com> References: <1555240302-9771-1-git-send-email-viveksharma@marvell.com> MIME-Version: 1.0 Content-Type: text/plain X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-04-17_04:, , signatures=0 Subject: [dpdk-stable] [PATCH v2] ethdev: fix QinQ strip offload support X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Sender: "stable" From: Vivek Sharma Enable missing support for QinQ strip rx offload in vlan offload set/get methods. Fixes: cc9d0456b870 ("i40e: support double vlan stripping and insertion") Cc: stable@dpdk.org Signed-off-by: Vivek Sharma --- v2: * Use pointer to dereference dev->data->dev_conf.rxmode.offloads lib/librte_ethdev/rte_ethdev.c | 55 +++++++++++++++++++++++------------------- lib/librte_ethdev/rte_ethdev.h | 5 +++- 2 files changed, 34 insertions(+), 26 deletions(-) diff --git a/lib/librte_ethdev/rte_ethdev.c b/lib/librte_ethdev/rte_ethdev.c index 243beb4..3e770bc 100644 --- a/lib/librte_ethdev/rte_ethdev.c +++ b/lib/librte_ethdev/rte_ethdev.c @@ -2723,53 +2723,56 @@ rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask) int mask = 0; int cur, org = 0; uint64_t orig_offloads; + uint64_t *dev_offloads; RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); dev = &rte_eth_devices[port_id]; /* save original values in case of failure */ orig_offloads = dev->data->dev_conf.rxmode.offloads; + dev_offloads = &dev->data->dev_conf.rxmode.offloads; /*check which option changed by application*/ cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD); - org = !!(dev->data->dev_conf.rxmode.offloads & - DEV_RX_OFFLOAD_VLAN_STRIP); + org = !!(*dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP); if (cur != org) { if (cur) - dev->data->dev_conf.rxmode.offloads |= - DEV_RX_OFFLOAD_VLAN_STRIP; + *dev_offloads |= DEV_RX_OFFLOAD_VLAN_STRIP; else - dev->data->dev_conf.rxmode.offloads &= - ~DEV_RX_OFFLOAD_VLAN_STRIP; + *dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_STRIP; mask |= ETH_VLAN_STRIP_MASK; } cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD); - org = !!(dev->data->dev_conf.rxmode.offloads & - DEV_RX_OFFLOAD_VLAN_FILTER); + org = !!(*dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER); if (cur != org) { if (cur) - dev->data->dev_conf.rxmode.offloads |= - DEV_RX_OFFLOAD_VLAN_FILTER; + *dev_offloads |= DEV_RX_OFFLOAD_VLAN_FILTER; else - dev->data->dev_conf.rxmode.offloads &= - ~DEV_RX_OFFLOAD_VLAN_FILTER; + *dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_FILTER; mask |= ETH_VLAN_FILTER_MASK; } cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD); - org = !!(dev->data->dev_conf.rxmode.offloads & - DEV_RX_OFFLOAD_VLAN_EXTEND); + org = !!(*dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND); if (cur != org) { if (cur) - dev->data->dev_conf.rxmode.offloads |= - DEV_RX_OFFLOAD_VLAN_EXTEND; + *dev_offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND; else - dev->data->dev_conf.rxmode.offloads &= - ~DEV_RX_OFFLOAD_VLAN_EXTEND; + *dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_EXTEND; mask |= ETH_VLAN_EXTEND_MASK; } + cur = !!(offload_mask & ETH_QINQ_STRIP_OFFLOAD); + org = !!(*dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP); + if (cur != org) { + if (cur) + *dev_offloads |= DEV_RX_OFFLOAD_QINQ_STRIP; + else + *dev_offloads &= ~DEV_RX_OFFLOAD_QINQ_STRIP; + mask |= ETH_QINQ_STRIP_MASK; + } + /*no change*/ if (mask == 0) return ret; @@ -2778,7 +2781,7 @@ rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask) ret = (*dev->dev_ops->vlan_offload_set)(dev, mask); if (ret) { /* hit an error restore original values */ - dev->data->dev_conf.rxmode.offloads = orig_offloads; + *dev_offloads = orig_offloads; } return eth_err(port_id, ret); @@ -2788,23 +2791,25 @@ int rte_eth_dev_get_vlan_offload(uint16_t port_id) { struct rte_eth_dev *dev; + uint64_t *dev_offloads; int ret = 0; RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); dev = &rte_eth_devices[port_id]; + dev_offloads = &dev->data->dev_conf.rxmode.offloads; - if (dev->data->dev_conf.rxmode.offloads & - DEV_RX_OFFLOAD_VLAN_STRIP) + if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP) ret |= ETH_VLAN_STRIP_OFFLOAD; - if (dev->data->dev_conf.rxmode.offloads & - DEV_RX_OFFLOAD_VLAN_FILTER) + if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER) ret |= ETH_VLAN_FILTER_OFFLOAD; - if (dev->data->dev_conf.rxmode.offloads & - DEV_RX_OFFLOAD_VLAN_EXTEND) + if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND) ret |= ETH_VLAN_EXTEND_OFFLOAD; + if (*dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP) + ret |= DEV_RX_OFFLOAD_QINQ_STRIP; + return ret; } diff --git a/lib/librte_ethdev/rte_ethdev.h b/lib/librte_ethdev/rte_ethdev.h index 40a068f..c1792f4 100644 --- a/lib/librte_ethdev/rte_ethdev.h +++ b/lib/librte_ethdev/rte_ethdev.h @@ -550,11 +550,13 @@ struct rte_eth_rss_conf { #define ETH_VLAN_STRIP_OFFLOAD 0x0001 /**< VLAN Strip On/Off */ #define ETH_VLAN_FILTER_OFFLOAD 0x0002 /**< VLAN Filter On/Off */ #define ETH_VLAN_EXTEND_OFFLOAD 0x0004 /**< VLAN Extend On/Off */ +#define ETH_QINQ_STRIP_OFFLOAD 0x0008 /**< QINQ Strip On/Off */ /* Definitions used for mask VLAN setting */ #define ETH_VLAN_STRIP_MASK 0x0001 /**< VLAN Strip setting mask */ #define ETH_VLAN_FILTER_MASK 0x0002 /**< VLAN Filter setting mask*/ #define ETH_VLAN_EXTEND_MASK 0x0004 /**< VLAN Extend setting mask*/ +#define ETH_QINQ_STRIP_MASK 0x0008 /**< QINQ Strip setting mask */ #define ETH_VLAN_ID_MAX 0x0FFF /**< VLAN ID is in lower 12 bits*/ /* Definitions used for receive MAC address */ @@ -965,7 +967,8 @@ struct rte_eth_conf { DEV_RX_OFFLOAD_TCP_CKSUM) #define DEV_RX_OFFLOAD_VLAN (DEV_RX_OFFLOAD_VLAN_STRIP | \ DEV_RX_OFFLOAD_VLAN_FILTER | \ - DEV_RX_OFFLOAD_VLAN_EXTEND) + DEV_RX_OFFLOAD_VLAN_EXTEND | \ + DEV_RX_OFFLOAD_QINQ_STRIP) /* * If new Rx offload capabilities are defined, they also must be -- 2.7.4