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* [dpdk-stable] [PATCH] net/mlx5: fix 32b compilation
@ 2019-06-12  5:32 Shahaf Shuler
  2019-06-12 21:25 ` Yongseok Koh
  2020-01-13 14:22 ` [dpdk-stable] [PATCH] net/mlx5: fix doorbell register offset type Viacheslav Ovsiienko
  0 siblings, 2 replies; 7+ messages in thread
From: Shahaf Shuler @ 2019-06-12  5:32 UTC (permalink / raw)
  To: Yongseok Koh; +Cc: dev, stable

32b Compilation output the below error:

drivers/net/mlx5/mlx5_txq.c: In function 'mlx5_txq_ibv_new':
error: format '%lx' expects argument of type 'long unsigned int', but
argument 8 has type 'off_t' [-Werror=format=]
  DRV_LOG(DEBUG, "port %u: uar_mmap_offset 0x%lx",
  ^

Fixes: 6bf10ab69be0 ("net/mlx5: support 32-bit systems")
Cc: stable@dpdk.org

Signed-off-by: Shahaf Shuler <shahafs@mellanox.com>
---
 drivers/net/mlx5/mlx5_txq.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/mlx5/mlx5_txq.c b/drivers/net/mlx5/mlx5_txq.c
index ebb42cbffb..a421139e3c 100644
--- a/drivers/net/mlx5/mlx5_txq.c
+++ b/drivers/net/mlx5/mlx5_txq.c
@@ -566,8 +566,8 @@ mlx5_txq_ibv_new(struct rte_eth_dev *dev, uint16_t idx)
 	txq_uar_init(txq_ctrl);
 	if (qp.comp_mask & MLX5DV_QP_MASK_UAR_MMAP_OFFSET) {
 		txq_ctrl->uar_mmap_offset = qp.uar_mmap_offset;
-		DRV_LOG(DEBUG, "port %u: uar_mmap_offset 0x%lx",
-			dev->data->port_id, txq_ctrl->uar_mmap_offset);
+		DRV_LOG(DEBUG, "port %u: uar_mmap_offset 0x%x",
+			dev->data->port_id, (int)(txq_ctrl->uar_mmap_offset));
 	} else {
 		DRV_LOG(ERR,
 			"port %u failed to retrieve UAR info, invalid"
-- 
2.12.0


^ permalink raw reply	[flat|nested] 7+ messages in thread

end of thread, other threads:[~2020-01-15 10:09 UTC | newest]

Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-06-12  5:32 [dpdk-stable] [PATCH] net/mlx5: fix 32b compilation Shahaf Shuler
2019-06-12 21:25 ` Yongseok Koh
2019-06-13 13:29   ` Ferruh Yigit
2019-06-13 13:35     ` Ferruh Yigit
2020-01-13 14:22 ` [dpdk-stable] [PATCH] net/mlx5: fix doorbell register offset type Viacheslav Ovsiienko
2020-01-13 14:29   ` Matan Azrad
2020-01-15 10:09   ` Raslan Darawsheh

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