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* [PATCH v1] raw/ifpga: free file handle before function return
@ 2022-06-09  8:50 Wei Huang
  2022-06-13  6:40 ` Zhang, Tianfei
  2022-06-15  7:18 ` Xu, Rosen
  0 siblings, 2 replies; 4+ messages in thread
From: Wei Huang @ 2022-06-09  8:50 UTC (permalink / raw)
  To: dev, thomas, nipun.gupta, hemant.agrawal
  Cc: stable, rosen.xu, tianfei.zhang, qi.z.zhang, Wei Huang

Coverity issue: 379064
Fixes: 673c897f4d73 ("raw/ifpga: support OFS card probing")

Signed-off-by: Wei Huang <wei.huang@intel.com>
---
 drivers/raw/ifpga/base/ifpga_enumerate.c | 28 +++++++++++++++++++---------
 1 file changed, 19 insertions(+), 9 deletions(-)

diff --git a/drivers/raw/ifpga/base/ifpga_enumerate.c b/drivers/raw/ifpga/base/ifpga_enumerate.c
index 7a5d264..61eb660 100644
--- a/drivers/raw/ifpga/base/ifpga_enumerate.c
+++ b/drivers/raw/ifpga/base/ifpga_enumerate.c
@@ -837,8 +837,10 @@ static int find_dfls_by_vsec(struct dfl_fpga_enum_info *info)
 		vndr_hdr = 0;
 		ret = pread(fd, &vndr_hdr, sizeof(vndr_hdr),
 			voff + PCI_VNDR_HEADER);
-		if (ret < 0)
-			return -EIO;
+		if (ret < 0) {
+			ret = -EIO;
+			goto free_handle;
+		}
 		if (PCI_VNDR_HEADER_ID(vndr_hdr) == PCI_VSEC_ID_INTEL_DFLS &&
 			pci_data->vendor_id == PCI_VENDOR_ID_INTEL)
 			break;
@@ -846,19 +848,23 @@ static int find_dfls_by_vsec(struct dfl_fpga_enum_info *info)
 
 	if (!voff) {
 		dev_debug(hw, "%s no DFL VSEC found\n", __func__);
-		return -ENODEV;
+		ret = -ENODEV;
+		goto free_handle;
 	}
 
 	dfl_cnt = 0;
 	ret = pread(fd, &dfl_cnt, sizeof(dfl_cnt), voff + PCI_VNDR_DFLS_CNT);
-	if (ret < 0)
-		return -EIO;
+	if (ret < 0) {
+		ret = -EIO;
+		goto free_handle;
+	}
 
 	dfl_res_off = voff + PCI_VNDR_DFLS_RES;
 	if (dfl_res_off + (dfl_cnt * sizeof(u32)) > PCI_CFG_SPACE_EXP_SIZE) {
 		dev_err(hw, "%s DFL VSEC too big for PCIe config space\n",
 			__func__);
-		return -EINVAL;
+		ret = -EINVAL;
+		goto free_handle;
 	}
 
 	for (i = 0; i < dfl_cnt; i++, dfl_res_off += sizeof(u32)) {
@@ -868,7 +874,8 @@ static int find_dfls_by_vsec(struct dfl_fpga_enum_info *info)
 		if (bir >= PCI_MAX_RESOURCE) {
 			dev_err(hw, "%s bad bir number %d\n",
 				__func__, bir);
-			return -EINVAL;
+			ret = -EINVAL;
+			goto free_handle;
 		}
 
 		len = pci_data->region[bir].len;
@@ -876,7 +883,8 @@ static int find_dfls_by_vsec(struct dfl_fpga_enum_info *info)
 		if (offset >= len) {
 			dev_err(hw, "%s bad offset %u >= %"PRIu64"\n",
 				__func__, offset, len);
-			return -EINVAL;
+			ret = -EINVAL;
+			goto free_handle;
 		}
 
 		dev_debug(hw, "%s BAR %d offset 0x%x\n", __func__, bir, offset);
@@ -886,7 +894,9 @@ static int find_dfls_by_vsec(struct dfl_fpga_enum_info *info)
 		dfl_fpga_enum_info_add_dfl(info, start, len, addr);
 	}
 
-	return 0;
+free_handle:
+	close(fd);
+	return ret;
 }
 
 /* default method of finding dfls starting at offset 0 of bar 0 */
-- 
1.8.3.1


^ permalink raw reply	[flat|nested] 4+ messages in thread

* RE: [PATCH v1] raw/ifpga: free file handle before function return
  2022-06-09  8:50 [PATCH v1] raw/ifpga: free file handle before function return Wei Huang
@ 2022-06-13  6:40 ` Zhang, Tianfei
  2022-06-20 15:10   ` Thomas Monjalon
  2022-06-15  7:18 ` Xu, Rosen
  1 sibling, 1 reply; 4+ messages in thread
From: Zhang, Tianfei @ 2022-06-13  6:40 UTC (permalink / raw)
  To: Huang, Wei, dev, thomas, nipun.gupta, hemant.agrawal
  Cc: stable, Xu, Rosen, Zhang, Qi Z



> -----Original Message-----
> From: Huang, Wei <wei.huang@intel.com>
> Sent: Thursday, June 9, 2022 4:50 PM
> To: dev@dpdk.org; thomas@monjalon.net; nipun.gupta@nxp.com;
> hemant.agrawal@nxp.com
> Cc: stable@dpdk.org; Xu, Rosen <rosen.xu@intel.com>; Zhang, Tianfei
> <tianfei.zhang@intel.com>; Zhang, Qi Z <qi.z.zhang@intel.com>; Huang, Wei
> <wei.huang@intel.com>
> Subject: [PATCH v1] raw/ifpga: free file handle before function return
> 
> Coverity issue: 379064
> Fixes: 673c897f4d73 ("raw/ifpga: support OFS card probing")
> 
> Signed-off-by: Wei Huang <wei.huang@intel.com>
> ---
>  drivers/raw/ifpga/base/ifpga_enumerate.c | 28 +++++++++++++++++++---------
>  1 file changed, 19 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/raw/ifpga/base/ifpga_enumerate.c
> b/drivers/raw/ifpga/base/ifpga_enumerate.c
> index 7a5d264..61eb660 100644
> --- a/drivers/raw/ifpga/base/ifpga_enumerate.c
> +++ b/drivers/raw/ifpga/base/ifpga_enumerate.c
> @@ -837,8 +837,10 @@ static int find_dfls_by_vsec(struct dfl_fpga_enum_info
> *info)
>  		vndr_hdr = 0;
>  		ret = pread(fd, &vndr_hdr, sizeof(vndr_hdr),
>  			voff + PCI_VNDR_HEADER);
> -		if (ret < 0)
> -			return -EIO;
> +		if (ret < 0) {
> +			ret = -EIO;
> +			goto free_handle;
> +		}
>  		if (PCI_VNDR_HEADER_ID(vndr_hdr) ==
> PCI_VSEC_ID_INTEL_DFLS &&
>  			pci_data->vendor_id == PCI_VENDOR_ID_INTEL)
>  			break;
> @@ -846,19 +848,23 @@ static int find_dfls_by_vsec(struct
> dfl_fpga_enum_info *info)
> 
>  	if (!voff) {
>  		dev_debug(hw, "%s no DFL VSEC found\n", __func__);
> -		return -ENODEV;
> +		ret = -ENODEV;
> +		goto free_handle;
>  	}
> 
>  	dfl_cnt = 0;
>  	ret = pread(fd, &dfl_cnt, sizeof(dfl_cnt), voff + PCI_VNDR_DFLS_CNT);
> -	if (ret < 0)
> -		return -EIO;
> +	if (ret < 0) {
> +		ret = -EIO;
> +		goto free_handle;
> +	}
> 
>  	dfl_res_off = voff + PCI_VNDR_DFLS_RES;
>  	if (dfl_res_off + (dfl_cnt * sizeof(u32)) > PCI_CFG_SPACE_EXP_SIZE) {
>  		dev_err(hw, "%s DFL VSEC too big for PCIe config space\n",
>  			__func__);
> -		return -EINVAL;
> +		ret = -EINVAL;
> +		goto free_handle;
>  	}
> 
>  	for (i = 0; i < dfl_cnt; i++, dfl_res_off += sizeof(u32)) { @@ -868,7 +874,8
> @@ static int find_dfls_by_vsec(struct dfl_fpga_enum_info *info)
>  		if (bir >= PCI_MAX_RESOURCE) {
>  			dev_err(hw, "%s bad bir number %d\n",
>  				__func__, bir);
> -			return -EINVAL;
> +			ret = -EINVAL;
> +			goto free_handle;
>  		}
> 
>  		len = pci_data->region[bir].len;
> @@ -876,7 +883,8 @@ static int find_dfls_by_vsec(struct dfl_fpga_enum_info
> *info)
>  		if (offset >= len) {
>  			dev_err(hw, "%s bad offset %u >= %"PRIu64"\n",
>  				__func__, offset, len);
> -			return -EINVAL;
> +			ret = -EINVAL;
> +			goto free_handle;
>  		}
> 
>  		dev_debug(hw, "%s BAR %d offset 0x%x\n", __func__, bir,
> offset); @@ -886,7 +894,9 @@ static int find_dfls_by_vsec(struct
> dfl_fpga_enum_info *info)
>  		dfl_fpga_enum_info_add_dfl(info, start, len, addr);
>  	}
> 
> -	return 0;
> +free_handle:
> +	close(fd);
> +	return ret;
>  }
> 
>  /* default method of finding dfls starting at offset 0 of bar 0 */

It looks good for me.

Acked-by: Tianfei Zhang <tianfei.zhang@intel.com>

^ permalink raw reply	[flat|nested] 4+ messages in thread

* RE: [PATCH v1] raw/ifpga: free file handle before function return
  2022-06-09  8:50 [PATCH v1] raw/ifpga: free file handle before function return Wei Huang
  2022-06-13  6:40 ` Zhang, Tianfei
@ 2022-06-15  7:18 ` Xu, Rosen
  1 sibling, 0 replies; 4+ messages in thread
From: Xu, Rosen @ 2022-06-15  7:18 UTC (permalink / raw)
  To: Huang, Wei, dev, thomas, nipun.gupta, hemant.agrawal
  Cc: stable, Zhang, Tianfei, Zhang, Qi Z

Hi Wei,

> -----Original Message-----
> From: Huang, Wei <wei.huang@intel.com>
> Sent: Thursday, June 09, 2022 16:50
> To: dev@dpdk.org; thomas@monjalon.net; nipun.gupta@nxp.com;
> hemant.agrawal@nxp.com
> Cc: stable@dpdk.org; Xu, Rosen <rosen.xu@intel.com>; Zhang, Tianfei
> <tianfei.zhang@intel.com>; Zhang, Qi Z <qi.z.zhang@intel.com>; Huang, Wei
> <wei.huang@intel.com>
> Subject: [PATCH v1] raw/ifpga: free file handle before function return
> 
> Coverity issue: 379064
> Fixes: 673c897f4d73 ("raw/ifpga: support OFS card probing")
> 
> Signed-off-by: Wei Huang <wei.huang@intel.com>
> ---
>  drivers/raw/ifpga/base/ifpga_enumerate.c | 28 +++++++++++++++++++----
> -----
>  1 file changed, 19 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/raw/ifpga/base/ifpga_enumerate.c
> b/drivers/raw/ifpga/base/ifpga_enumerate.c
> index 7a5d264..61eb660 100644
> --- a/drivers/raw/ifpga/base/ifpga_enumerate.c
> +++ b/drivers/raw/ifpga/base/ifpga_enumerate.c
> @@ -837,8 +837,10 @@ static int find_dfls_by_vsec(struct
> dfl_fpga_enum_info *info)
>  		vndr_hdr = 0;
>  		ret = pread(fd, &vndr_hdr, sizeof(vndr_hdr),
>  			voff + PCI_VNDR_HEADER);
> -		if (ret < 0)
> -			return -EIO;
> +		if (ret < 0) {
> +			ret = -EIO;
> +			goto free_handle;
> +		}
>  		if (PCI_VNDR_HEADER_ID(vndr_hdr) ==
> PCI_VSEC_ID_INTEL_DFLS &&
>  			pci_data->vendor_id == PCI_VENDOR_ID_INTEL)
>  			break;
> @@ -846,19 +848,23 @@ static int find_dfls_by_vsec(struct
> dfl_fpga_enum_info *info)
> 
>  	if (!voff) {
>  		dev_debug(hw, "%s no DFL VSEC found\n", __func__);
> -		return -ENODEV;
> +		ret = -ENODEV;
> +		goto free_handle;
>  	}
> 
>  	dfl_cnt = 0;
>  	ret = pread(fd, &dfl_cnt, sizeof(dfl_cnt), voff +
> PCI_VNDR_DFLS_CNT);
> -	if (ret < 0)
> -		return -EIO;
> +	if (ret < 0) {
> +		ret = -EIO;
> +		goto free_handle;
> +	}
> 
>  	dfl_res_off = voff + PCI_VNDR_DFLS_RES;
>  	if (dfl_res_off + (dfl_cnt * sizeof(u32)) > PCI_CFG_SPACE_EXP_SIZE)
> {
>  		dev_err(hw, "%s DFL VSEC too big for PCIe config space\n",
>  			__func__);
> -		return -EINVAL;
> +		ret = -EINVAL;
> +		goto free_handle;
>  	}
> 
>  	for (i = 0; i < dfl_cnt; i++, dfl_res_off += sizeof(u32)) { @@ -868,7
> +874,8 @@ static int find_dfls_by_vsec(struct dfl_fpga_enum_info *info)
>  		if (bir >= PCI_MAX_RESOURCE) {
>  			dev_err(hw, "%s bad bir number %d\n",
>  				__func__, bir);
> -			return -EINVAL;
> +			ret = -EINVAL;
> +			goto free_handle;
>  		}
> 
>  		len = pci_data->region[bir].len;
> @@ -876,7 +883,8 @@ static int find_dfls_by_vsec(struct
> dfl_fpga_enum_info *info)
>  		if (offset >= len) {
>  			dev_err(hw, "%s bad offset %u >= %"PRIu64"\n",
>  				__func__, offset, len);
> -			return -EINVAL;
> +			ret = -EINVAL;
> +			goto free_handle;
>  		}
> 
>  		dev_debug(hw, "%s BAR %d offset 0x%x\n", __func__, bir,
> offset); @@ -886,7 +894,9 @@ static int find_dfls_by_vsec(struct
> dfl_fpga_enum_info *info)
>  		dfl_fpga_enum_info_add_dfl(info, start, len, addr);
>  	}
> 
> -	return 0;
> +free_handle:
> +	close(fd);
> +	return ret;
>  }
> 
>  /* default method of finding dfls starting at offset 0 of bar 0 */
> --
> 1.8.3.1

It looks good for me.
Reviewed-by: Rosen Xu <rosen.xu@intel.com>

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [PATCH v1] raw/ifpga: free file handle before function return
  2022-06-13  6:40 ` Zhang, Tianfei
@ 2022-06-20 15:10   ` Thomas Monjalon
  0 siblings, 0 replies; 4+ messages in thread
From: Thomas Monjalon @ 2022-06-20 15:10 UTC (permalink / raw)
  To: Huang, Wei
  Cc: dev, nipun.gupta, hemant.agrawal, stable, Xu, Rosen, Zhang, Qi Z,
	Zhang, Tianfei

13/06/2022 08:40, Zhang, Tianfei:
> > Coverity issue: 379064
> > Fixes: 673c897f4d73 ("raw/ifpga: support OFS card probing")
> > 
> > Signed-off-by: Wei Huang <wei.huang@intel.com>
> 
> Acked-by: Tianfei Zhang <tianfei.zhang@intel.com>

Reviewed-by: Rosen Xu <rosen.xu@intel.com>

Applied, thanks.



^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2022-06-20 15:11 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
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2022-06-09  8:50 [PATCH v1] raw/ifpga: free file handle before function return Wei Huang
2022-06-13  6:40 ` Zhang, Tianfei
2022-06-20 15:10   ` Thomas Monjalon
2022-06-15  7:18 ` Xu, Rosen

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