From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by dpdk.org (Postfix) with ESMTP id 44BE32C66 for ; Mon, 20 Feb 2017 09:18:27 +0100 (CET) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 20 Feb 2017 00:18:26 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.35,185,1484035200"; d="scan'208";a="935928709" Received: from yliu-dev.sh.intel.com (HELO yliu-dev) ([10.239.67.162]) by orsmga003.jf.intel.com with ESMTP; 20 Feb 2017 00:18:25 -0800 Date: Mon, 20 Feb 2017 16:20:40 +0800 From: Yuanhan Liu To: Qi Zhang Cc: stable@dpdk.org Message-ID: <20170220082040.GR9046@yliu-dev.sh.intel.com> References: <1487541170-7859-1-git-send-email-qi.z.zhang@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1487541170-7859-1-git-send-email-qi.z.zhang@intel.com> User-Agent: Mutt/1.5.23 (2014-03-12) Subject: Re: [dpdk-stable] [PATCH] net/ixgbe: fix blocked interrupts X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 20 Feb 2017 08:18:27 -0000 On Sun, Feb 19, 2017 at 04:52:50PM -0500, Qi Zhang wrote: > [ backported from upstream commit 9b667210700e6b52a123cc5b36d0a3b0b3aa7c94 ] Thanks for the packport, and applied to dpdk-stable/16.11. --yliu > While handling link status change (LSC) interrupt, all interrupts are > blocked until delayed interrupt handler finishes. > The wait duration is at least one second and this may cause timeouts in > VF to PF mailbox. > Make sure only LSC interrupt is blocked while waiting for delayed > interrupt handler to finish. > > Fixes: 0a45657a6794 ("pci: rework interrupt handling") > > Signed-off-by: Qi Zhang > --- > drivers/net/ixgbe/ixgbe_ethdev.c | 18 ++++++++---------- > drivers/net/ixgbe/ixgbe_ethdev.h | 2 ++ > 2 files changed, 10 insertions(+), 10 deletions(-) > > diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c > index dbfb0c0..bac36e0 100644 > --- a/drivers/net/ixgbe/ixgbe_ethdev.c > +++ b/drivers/net/ixgbe/ixgbe_ethdev.c > @@ -3474,7 +3474,6 @@ ixgbe_dev_interrupt_action(struct rte_eth_dev *dev) > IXGBE_DEV_PRIVATE_TO_INTR(dev->data->dev_private); > int64_t timeout; > struct rte_eth_link link; > - int intr_enable_delay = false; > struct ixgbe_hw *hw = > IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private); > > @@ -3507,20 +3506,19 @@ ixgbe_dev_interrupt_action(struct rte_eth_dev *dev) > timeout = IXGBE_LINK_DOWN_CHECK_TIMEOUT; > > ixgbe_dev_link_status_print(dev); > - > - intr_enable_delay = true; > - } > - > - if (intr_enable_delay) { > + intr->mask_original = intr->mask; > + /* only disable lsc interrupt */ > + intr->mask &= ~IXGBE_EIMS_LSC; > if (rte_eal_alarm_set(timeout * 1000, > ixgbe_dev_interrupt_delayed_handler, (void *)dev) < 0) > PMD_DRV_LOG(ERR, "Error setting alarm"); > - } else { > - PMD_DRV_LOG(DEBUG, "enable intr immediately"); > - ixgbe_enable_intr(dev); > - rte_intr_enable(&(dev->pci_dev->intr_handle)); > + else > + intr->mask = intr->mask_original; > } > > + PMD_DRV_LOG(DEBUG, "enable intr immediately"); > + ixgbe_enable_intr(dev); > + rte_intr_enable(&dev->pci_dev->intr_handle); > > return 0; > } > diff --git a/drivers/net/ixgbe/ixgbe_ethdev.h b/drivers/net/ixgbe/ixgbe_ethdev.h > index 4ff6338..a4e2996 100644 > --- a/drivers/net/ixgbe/ixgbe_ethdev.h > +++ b/drivers/net/ixgbe/ixgbe_ethdev.h > @@ -165,6 +165,8 @@ struct ixgbe_hw_fdir_info { > struct ixgbe_interrupt { > uint32_t flags; > uint32_t mask; > + /*to save original mask during delayed handler */ > + uint32_t mask_original; > }; > > struct ixgbe_stat_mapping_registers { > -- > 2.7.4