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Date: Fri, 18 Aug 2017 18:04:48 +0800
From: Yuanhan Liu <yliu@fridaylinux.org>
To: Jeff Guo <jia.guo@intel.com>
Cc: beilei.xing@intel.com, jingjing.wu@intel.com, stable@dpdk.org
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Subject: Re: [dpdk-stable] [PATCH] net/i40e: fix link down and negotiation
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On Fri, Aug 18, 2017 at 10:03:48AM +0800, Jeff Guo wrote:
> [ backported from upstream commit 1bb8f661168d942927cb65e355ec64d4ab195281 ]
Thanks for the backport, but it still does't apply to 16.11 branch cleanly.
FYI, you should do the backport on top of branch 16.11 of stable tree:
http://dpdk.org/browse/dpdk-stable/
--yliu
---
diff --cc drivers/net/i40e/i40e_ethdev.c
index f65ddc7,fa0518e..0000000
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@@ -1627,10 -1850,18 +1635,24 @@@ i40e_phy_conf_link(struct i40e_hw *hw
phy_conf.abilities = abilities;
+
+
+ /* To enable link, phy_type mask needs to include each type */
+ for (cnt = I40E_PHY_TYPE_SGMII; cnt < I40E_PHY_TYPE_MAX; cnt++)
+ phy_type_mask |= 1 << cnt;
+
/* use get_phy_abilities_resp value for the rest */
++<<<<<<< 09ae3d0c48885d20ab255922c1ca4769a32c2a12
+ phy_conf.phy_type = phy_ab.phy_type;
+ phy_conf.phy_type_ext = phy_ab.phy_type_ext;
+ phy_conf.fec_config = phy_ab.mod_type_ext;
++=======
+ phy_conf.phy_type = is_up ? cpu_to_le32(phy_type_mask) : 0;
+ phy_conf.phy_type_ext = is_up ? (I40E_AQ_PHY_TYPE_EXT_25G_KR |
+ I40E_AQ_PHY_TYPE_EXT_25G_CR | I40E_AQ_PHY_TYPE_EXT_25G_SR |
+ I40E_AQ_PHY_TYPE_EXT_25G_LR) : 0;
+ phy_conf.fec_config = phy_ab.fec_cfg_curr_mod_ext_info;
++>>>>>>> net/i40e: fix link down and negotiation
phy_conf.eee_capability = phy_ab.eee_capability;
phy_conf.eeer = phy_ab.eeer_val;
phy_conf.low_power_ctrl = phy_ab.d3_lpan;
>
> Enable the functions set link down and set link up in i40e by check
> phy_type, and fix the issue of auto negotiation failed in XXV710 when
> bind kernel driver after unbind from DPDK driver by modify the speed
> setting distinguish from set link up and down. With this fix, if unbind
> DPDK to bind kernel driver, no need to set auto negotiation and ifconfig
> up anymore, remove the part from doc.
>
> Fixes: ca7e599d4506 ("net/i40e: fix link management")
> Fixes: 2f1e22817420 ("i40e: skip link control as firmware workaround")
> Fixes: 6e145fcc754b ("i40e: support autoneg or force link speed")
>
> Signed-off-by: Jeff Guo <jia.guo@intel.com>
> Acked-by: Jingjing Wu <jingjing.wu@intel.com>
> ---
> drivers/net/i40e/i40e_ethdev.c | 34 ++++++++++++++++++++++------------
> 1 file changed, 22 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
> index 4c49673..fa0518e 100644
> --- a/drivers/net/i40e/i40e_ethdev.c
> +++ b/drivers/net/i40e/i40e_ethdev.c
> @@ -1806,11 +1806,15 @@ i40e_parse_link_speeds(uint16_t link_speeds)
> static int
> i40e_phy_conf_link(struct i40e_hw *hw,
> uint8_t abilities,
> - uint8_t force_speed)
> + uint8_t force_speed,
> + bool is_up)
> {
> enum i40e_status_code status;
> struct i40e_aq_get_phy_abilities_resp phy_ab;
> struct i40e_aq_set_phy_config phy_conf;
> + enum i40e_aq_phy_type cnt;
> + uint32_t phy_type_mask = 0;
> +
> const uint8_t mask = I40E_AQ_PHY_FLAG_PAUSE_TX |
> I40E_AQ_PHY_FLAG_PAUSE_RX |
> I40E_AQ_PHY_FLAG_PAUSE_RX |
> @@ -1828,6 +1832,10 @@ i40e_phy_conf_link(struct i40e_hw *hw,
> if (status)
> return ret;
>
> + /* If link already up, no need to set up again */
> + if (is_up && phy_ab.phy_type != 0)
> + return I40E_SUCCESS;
> +
> memset(&phy_conf, 0, sizeof(phy_conf));
>
> /* bits 0-2 use the values from get_phy_abilities_resp */
> @@ -1838,13 +1846,21 @@ i40e_phy_conf_link(struct i40e_hw *hw,
> if (abilities & I40E_AQ_PHY_AN_ENABLED)
> phy_conf.link_speed = advt;
> else
> - phy_conf.link_speed = force_speed;
> + phy_conf.link_speed = is_up ? force_speed : phy_ab.link_speed;
>
> phy_conf.abilities = abilities;
>
> +
> +
> + /* To enable link, phy_type mask needs to include each type */
> + for (cnt = I40E_PHY_TYPE_SGMII; cnt < I40E_PHY_TYPE_MAX; cnt++)
> + phy_type_mask |= 1 << cnt;
> +
> /* use get_phy_abilities_resp value for the rest */
> - phy_conf.phy_type = phy_ab.phy_type;
> - phy_conf.phy_type_ext = phy_ab.phy_type_ext;
> + phy_conf.phy_type = is_up ? cpu_to_le32(phy_type_mask) : 0;
> + phy_conf.phy_type_ext = is_up ? (I40E_AQ_PHY_TYPE_EXT_25G_KR |
> + I40E_AQ_PHY_TYPE_EXT_25G_CR | I40E_AQ_PHY_TYPE_EXT_25G_SR |
> + I40E_AQ_PHY_TYPE_EXT_25G_LR) : 0;
> phy_conf.fec_config = phy_ab.fec_cfg_curr_mod_ext_info;
> phy_conf.eee_capability = phy_ab.eee_capability;
> phy_conf.eeer = phy_ab.eeer_val;
> @@ -1876,13 +1892,7 @@ i40e_apply_link_speed(struct rte_eth_dev *dev)
> abilities |= I40E_AQ_PHY_AN_ENABLED;
> abilities |= I40E_AQ_PHY_LINK_ENABLED;
>
> - /* Skip changing speed on 40G interfaces, FW does not support */
> - if (I40E_PHY_TYPE_SUPPORT_40G(hw->phy.phy_types)) {
> - speed = I40E_LINK_SPEED_UNKNOWN;
> - abilities |= I40E_AQ_PHY_AN_ENABLED;
> - }
> -
> - return i40e_phy_conf_link(hw, abilities, speed);
> + return i40e_phy_conf_link(hw, abilities, speed, true);
> }
>
> static int
> @@ -2225,7 +2235,7 @@ i40e_dev_set_link_down(struct rte_eth_dev *dev)
> struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
>
> abilities = I40E_AQ_PHY_ENABLE_ATOMIC_LINK;
> - return i40e_phy_conf_link(hw, abilities, speed);
> + return i40e_phy_conf_link(hw, abilities, speed, false);
> }
>
> int
> --
> 2.7.4