From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wr0-f193.google.com (mail-wr0-f193.google.com [209.85.128.193]) by dpdk.org (Postfix) with ESMTP id A1BA41B287 for ; Mon, 30 Oct 2017 16:36:16 +0100 (CET) Received: by mail-wr0-f193.google.com with SMTP id k62so13026203wrc.9 for ; Mon, 30 Oct 2017 08:36:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=348MSVIFbP3R/QgWoSYOjVZjPyshMqlAhFQdB/ALaEc=; b=l9nAg2fYl20T2hwDXkqJwmB2KL74GHU0X/OykqLF/oa8F76sfQhQF608noyoapW/mq F+sYUNyznY8lJaE8W05Kd4VYJqbmCW0IS6wg3QuQZZnWOE/XZXvbnLkUsECi6+s6qa1a k03tGNyREsBjZkhJfeysq8xCMiHwmrVcsYN8AdxfF1tx9gNChZtsSBt57w89r8H2lNU8 dgCpheT81MOFJlMN/DmN25Tmd6WFrmNhXJ7VLcn/TcbmkCp/13MQ2gNnNMK0dbWhV0ge mYbdd28Wl76+Ccxwhgcpv5x1Zjvz++rA2qJps/fXMg5TSTXvjCR4viIjSkpW5ZRbSX68 AOEw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=348MSVIFbP3R/QgWoSYOjVZjPyshMqlAhFQdB/ALaEc=; b=nq7KNig9rNq4Qxd2eT6CFJQeNAstdfhhQEqbSCo9wx0CfN/3Jts6MVhr30i7zQqyV5 s8bOUvjCmxGN4XypcgCEAeb+6Q6b8phx4bXhEe11OMay8xIqaP9i9g506cYERoDmjYVe rAUQHBPXB6u6xSp9DytOoULv8I5JIjaGPmRwl7cfowlBT0e9nyYuqp02qf29xNWpqpTJ PAheOLCsDsmpUvtqQUNsLE8KaKHBVV+LBos+dJvGXiZxlUmuP9/8Gx5fDopV5AKpH38Z mcUPzNyaRsxcAuNyBaTyVxUR94dfok93cPvT3rvx5UWvzbbciVZQz4cPRl24P9VslLj3 WANg== X-Gm-Message-State: AMCzsaW1wNYoOeF7K7gmgU0K+M4sn6LsmjxLrvy+4HMJLJpFFYxHLZD+ zZeW2GOFRfDGduNMitC0BjZVLB7Py9Y= X-Google-Smtp-Source: ABhQp+QWxTsRlgKP0bnuC3msULcRjsRHTnoyrfJypQljGJDIFfrFisPAvlhdXqGRmJRC+7Z+mKvxzA== X-Received: by 10.223.156.138 with SMTP id d10mr8139255wre.214.1509377776247; Mon, 30 Oct 2017 08:36:16 -0700 (PDT) Received: from localhost ([2a00:23c5:bef3:400:4a51:b7ff:fe0b:4749]) by smtp.gmail.com with ESMTPSA id o11sm14624573wrg.5.2017.10.30.08.36.15 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 30 Oct 2017 08:36:15 -0700 (PDT) From: luca.boccassi@gmail.com To: Shahaf Shuler Cc: Yongseok Koh , Nelio Laranjeiro , dpdk stable Date: Mon, 30 Oct 2017 15:34:22 +0000 Message-Id: <20171030153511.13322-19-luca.boccassi@gmail.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20171030153511.13322-1-luca.boccassi@gmail.com> References: <20171030153511.13322-1-luca.boccassi@gmail.com> Subject: [dpdk-stable] patch 'net/mlx5: fix Tx stats error counter logic' has been queued to LTS release 16.11.4 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 30 Oct 2017 15:36:16 -0000 Hi, FYI, your patch has been queued to LTS release 16.11.4 Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet. It will be pushed if I get no objections before 11/01/17. So please shout if anyone has objections. Thanks. Kind regards, Luca Boccassi --- >>From 0a3e50ffc2ffcf91360813c58fc3b3b42531125d Mon Sep 17 00:00:00 2001 From: Shahaf Shuler Date: Thu, 14 Sep 2017 13:50:38 +0300 Subject: [PATCH] net/mlx5: fix Tx stats error counter logic [ upstream commit 24c14430cdc4556a30a1e608f67230e881718f7f ] Tx error counter lacks the logic of incrementation, making it useless for applications. Fixes: 87011737b715 ("mlx5: add software counters") Signed-off-by: Shahaf Shuler Acked-by: Yongseok Koh Acked-by: Nelio Laranjeiro --- drivers/net/mlx5/mlx5_rxtx.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/drivers/net/mlx5/mlx5_rxtx.c b/drivers/net/mlx5/mlx5_rxtx.c index 58926e39f..92e4fd53e 100644 --- a/drivers/net/mlx5/mlx5_rxtx.c +++ b/drivers/net/mlx5/mlx5_rxtx.c @@ -431,8 +431,10 @@ mlx5_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n) #ifdef MLX5_PMD_SOFT_COUNTERS total_length = length; #endif - if (length < (MLX5_WQE_DWORD_SIZE + 2)) + if (length < (MLX5_WQE_DWORD_SIZE + 2)) { + txq->stats.oerrors++; break; + } /* Update element. */ (*txq->elts)[elts_head] = buf; elts_head = (elts_head + 1) & (elts_n - 1); @@ -735,8 +737,10 @@ mlx5_tx_burst_mpw(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n) if (max < segs_n + 1) break; /* Do not bother with large packets MPW cannot handle. */ - if (segs_n > MLX5_MPW_DSEG_MAX) + if (segs_n > MLX5_MPW_DSEG_MAX) { + txq->stats.oerrors++; break; + } max -= segs_n; --pkts_n; /* Should we enable HW CKSUM offload */ @@ -941,8 +945,10 @@ mlx5_tx_burst_mpw_inline(void *dpdk_txq, struct rte_mbuf **pkts, if (max < segs_n + 1) break; /* Do not bother with large packets MPW cannot handle. */ - if (segs_n > MLX5_MPW_DSEG_MAX) + if (segs_n > MLX5_MPW_DSEG_MAX) { + txq->stats.oerrors++; break; + } max -= segs_n; --pkts_n; /* Should we enable HW CKSUM offload */ -- 2.11.0