From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wr0-f193.google.com (mail-wr0-f193.google.com [209.85.128.193]) by dpdk.org (Postfix) with ESMTP id 818241B280 for ; Mon, 30 Oct 2017 16:35:56 +0100 (CET) Received: by mail-wr0-f193.google.com with SMTP id z55so13075485wrz.1 for ; Mon, 30 Oct 2017 08:35:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=t8TrfuZgXazJwSzFjK8gEuSj6bu8FHpAXJku/6S7n54=; b=QMlx77VrvGMg/GQk0XZmjTarPzyAjEKV13pVsGP5x7Bkbb7VDmyhmhgAP7Kawuqabh e/qk4K5JZ33aptOpD+g8r50StEjxrSCiJXRSGjQLFQMBwYWrKBMVe7APvk64jRdV5yND yyQtNyGN6bpwG4sFgEbpZosltvg4ChQyGDAg0iWs9bhBTs0X9uA/poGHMOXc3fzIOhDX gbEGQUlhSTm2n3lR3YavvF5pK5aRJYUiCP6khjGKCDWzWqdh7hT/CREOO5+F7sq9sYME Z1cgpbVVwOrAFVF/mLSLP5i7ohB6d81FksGj5XpJigS5r5Qjrslv+nGd/79FWyeEU334 OuWg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=t8TrfuZgXazJwSzFjK8gEuSj6bu8FHpAXJku/6S7n54=; b=SX3B60aA+6BL0qke6nmX8m4HsuZI/GO+R0vltZX66ElwRiXHPOEAThKKrNyXiBDdtB qGreTLafpQaZ9DvRi1nfrNf5juBbIUdVDjcUTqsC32+f8gMBZt63RRDoMyN67k6qv8xw GuyjKnlIlBJn/5nZHAtbgWWpO/iNEIfe1cSZcsEnEAn/P4NvtclgNNll7rnhS4ZAIiWX M+35ZSNHf8XhVDEG9bDWAV437JQGMC9axAxDvFuRiZ652tflnXdcXIVMIhOs+3maxW82 dmP9QNVFw9kY8htcsm/82MUJTD89eLKnyELfw6zVjt1kO8/4OgiZfGwiSjn2Zf6L3AuS XmRA== X-Gm-Message-State: AMCzsaWWE4PjL755gsbRYl9GBSZTSIasMio2BIDMEiUR6+2Vu9ftuXSm ChGLQX8qSjourx1/jwbX2Nc= X-Google-Smtp-Source: ABhQp+Rzbn3E34i7oVpgC6m+AGbC+DcUSisxWaM5VtzeWQ1nWs62Bb5CTkHLxwusMXFNQ3okBJs/eA== X-Received: by 10.223.188.133 with SMTP id g5mr7261517wrh.204.1509377756109; Mon, 30 Oct 2017 08:35:56 -0700 (PDT) Received: from localhost ([2a00:23c5:bef3:400:4a51:b7ff:fe0b:4749]) by smtp.gmail.com with ESMTPSA id 65sm8821292wrn.27.2017.10.30.08.35.55 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 30 Oct 2017 08:35:55 -0700 (PDT) From: luca.boccassi@gmail.com To: Qi Zhang Cc: Kevin Traynor , dpdk stable Date: Mon, 30 Oct 2017 15:34:08 +0000 Message-Id: <20171030153511.13322-5-luca.boccassi@gmail.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20171030153511.13322-1-luca.boccassi@gmail.com> References: <20171030153511.13322-1-luca.boccassi@gmail.com> Subject: [dpdk-stable] patch 'net/i40e: fix flow control watermark mismatch' has been queued to LTS release 16.11.4 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 30 Oct 2017 15:35:56 -0000 Hi, FYI, your patch has been queued to LTS release 16.11.4 Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet. It will be pushed if I get no objections before 11/01/17. So please shout if anyone has objections. Thanks. Kind regards, Luca Boccassi --- >>From 3fc6ec827c536ab4bc174e2f6e279672021a9ef4 Mon Sep 17 00:00:00 2001 From: Qi Zhang Date: Thu, 10 Aug 2017 18:48:07 +0800 Subject: [PATCH] net/i40e: fix flow control watermark mismatch [ upstream commit 273dcde1c3e3582d39f4a0916febca7dfd518de9 ] Flow control watermark is not read out correctly, that may cause an application who not intend to change watermark but does change it with a rte_eth_dev_flow_ctrl_set call right after rte_eth_dev_flow_ctrl_get. The idea fix is, during init, the watermark is set with default value, so it is not necessary to read out from hw register during flow_ctl_get, But due to I40E_GLRPB_GHW limitation, it is shared by different ports on the same device, it is possible the value is changed on another port, but local variable not sync, so we have to read out register every flow_ctl_get. Fixes: f53577f06925 ("i40e: support flow control") Signed-off-by: Qi Zhang Acked-by: Kevin Traynor --- drivers/net/i40e/i40e_ethdev.c | 19 +++++++++++++------ 1 file changed, 13 insertions(+), 6 deletions(-) diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c index 65e10f3b4..267a39e42 100644 --- a/drivers/net/i40e/i40e_ethdev.c +++ b/drivers/net/i40e/i40e_ethdev.c @@ -83,12 +83,6 @@ /* Flow control default timer */ #define I40E_DEFAULT_PAUSE_TIME 0xFFFFU -/* Flow control default high water */ -#define I40E_DEFAULT_HIGH_WATER (0x1C40/1024) - -/* Flow control default low water */ -#define I40E_DEFAULT_LOW_WATER (0x1A40/1024) - /* Flow control enable fwd bit */ #define I40E_PRTMAC_FWD_CTRL 0x00000001 @@ -98,6 +92,12 @@ /* Kilobytes shift */ #define I40E_KILOSHIFT 10 +/* Flow control default high water */ +#define I40E_DEFAULT_HIGH_WATER (0xF2000 >> I40E_KILOSHIFT) + +/* Flow control default low water */ +#define I40E_DEFAULT_LOW_WATER (0xF2000 >> I40E_KILOSHIFT) + /* Receive Average Packet Size in Byte*/ #define I40E_PACKET_AVERAGE_SIZE 128 @@ -2879,6 +2879,13 @@ i40e_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf) struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private); fc_conf->pause_time = pf->fc_conf.pause_time; + + /* read out from register, in case they are modified by other port */ + pf->fc_conf.high_water[I40E_MAX_TRAFFIC_CLASS] = + I40E_READ_REG(hw, I40E_GLRPB_GHW) >> I40E_KILOSHIFT; + pf->fc_conf.low_water[I40E_MAX_TRAFFIC_CLASS] = + I40E_READ_REG(hw, I40E_GLRPB_GLW) >> I40E_KILOSHIFT; + fc_conf->high_water = pf->fc_conf.high_water[I40E_MAX_TRAFFIC_CLASS]; fc_conf->low_water = pf->fc_conf.low_water[I40E_MAX_TRAFFIC_CLASS]; -- 2.11.0