From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wm0-f68.google.com (mail-wm0-f68.google.com [74.125.82.68]) by dpdk.org (Postfix) with ESMTP id A053D1B6EF for ; Fri, 10 Nov 2017 17:10:14 +0100 (CET) Received: by mail-wm0-f68.google.com with SMTP id n74so6363945wmi.1 for ; Fri, 10 Nov 2017 08:10:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=DUxFlX0gjMHSks207UaXLwZG0FiZ9zK1B6SDYXkCDmU=; b=luY/a0/jPez5d0KfCQBMQuUQoILaw1FwVbD8ZACC5h+weWrHLSgsoqe4O+wUWV/BCu el2TJWoN2ttOOpYCmpD2zX40ajq9TtVNtu4jWjA8fWFSZXG/mdawmbYbsqo+gr3y8Lte 2wlmjuaEZqViu3cS5XddJrBbma7Jw7+PGABRUMU5KD9YzyUS9Gr+19n5zMT7LOKtEInC XG9iwab7kThCRNWwjzzRCy9Ustq/3GyCtEk8MhXgzve53CfO/UkCC4ZlfgQwBBF111gb GrPJNXazU27/z+WBFTUobFBGSnCt3iICufE4JPgTqrCWcOU2Yg/qrh2c5O283FIT4DgC VvLQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=DUxFlX0gjMHSks207UaXLwZG0FiZ9zK1B6SDYXkCDmU=; b=cIdEYwFeRGGAMr3II/1rwS/j+daevaaAqus2REFeJFQxwwNZCnV55L2fkjkzPcF0dP Ri3gcHqL47RHEb6Pi6xUMZix0F0iwr2NjWUdAFuhS9Xd5pM50c5r3hO6gk6hwnCOLLeI vvSWtZmQtEEI2moAD6sR4UmM8zVcuCG2JNK5h+WBp1IrARh9A3FMiCEKs5k5BcUTUgWR GMPudD5Cwmm9jdR3vHP4+qcv4Vuhg7i2k8lhCAv0PsJNMrj+HnvyzjdyRiYuUVc3zKlr EW9kdAMYvjaTbAjUZSgLhSZyD7YKhBUFIZLyrFmKTa3XSIvVSCeCesXgvwkhJ2cBQNrZ bs7A== X-Gm-Message-State: AJaThX4wlIk8Egt5gvb/dekx81IgolqEnEm8dncHVDZqPwgd8h0dE1Sm CcYMieU73982PPGr3jb15yrHvR/C X-Google-Smtp-Source: AGs4zMZravzhUd3TpdgIliQkZPfpxbI4DcFEJ7f6WyutCL2giPxtv8oMcpm4G14cssYA45bcc3DRWg== X-Received: by 10.28.9.197 with SMTP id 188mr585566wmj.20.1510330214289; Fri, 10 Nov 2017 08:10:14 -0800 (PST) Received: from localhost ([2a00:23c5:bef3:400:4a51:b7ff:fe0b:4749]) by smtp.gmail.com with ESMTPSA id b76sm967418wmg.9.2017.11.10.08.10.13 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 10 Nov 2017 08:10:13 -0800 (PST) From: luca.boccassi@gmail.com To: Jianbo Liu Cc: dpdk stable Date: Fri, 10 Nov 2017 16:09:48 +0000 Message-Id: <20171110161000.15369-4-luca.boccassi@gmail.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20171110161000.15369-1-luca.boccassi@gmail.com> References: <20171102120247.10565-18-luca.boccassi@gmail.com> <20171110161000.15369-1-luca.boccassi@gmail.com> Subject: [dpdk-stable] patch 'net/i40e: fix Rx packets number for NEON' has been queued to LTS release 16.11.4 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 10 Nov 2017 16:10:14 -0000 Hi, FYI, your patch has been queued to LTS release 16.11.4 Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet. It will be pushed if I get no objections before 11/12/17. So please shout if anyone has objections. Thanks. Kind regards, Luca Boccassi --- >>From 888f7936aa0bf9915ebe893877e2fc9ec97ed7b5 Mon Sep 17 00:00:00 2001 From: Jianbo Liu Date: Tue, 31 Oct 2017 13:52:44 +0800 Subject: [PATCH] net/i40e: fix Rx packets number for NEON [ upstream commit 987990bbf8d95c72dfb952dd6060062d31247d9d ] Fix i40e stop receiving on ARM, as the statuses of RX descriptors are not consistent, which is caused by cacheable hugepages. Fixes: ae0eb310f253 ("net/i40e: implement vector PMD for ARM") Signed-off-by: Jianbo Liu --- drivers/net/i40e/i40e_rxtx_vec_neon.c | 19 ++++++++++++------- 1 file changed, 12 insertions(+), 7 deletions(-) diff --git a/drivers/net/i40e/i40e_rxtx_vec_neon.c b/drivers/net/i40e/i40e_rxtx_vec_neon.c index d235daa79..557593a4e 100644 --- a/drivers/net/i40e/i40e_rxtx_vec_neon.c +++ b/drivers/net/i40e/i40e_rxtx_vec_neon.c @@ -192,8 +192,7 @@ desc_to_olflags_v(uint64x2_t descs[4], struct rte_mbuf **rx_pkts) #endif #define PKTLEN_SHIFT 10 - -#define I40E_VPMD_DESC_DD_MASK 0x0001000100010001ULL +#define I40E_UINT16_BIT (CHAR_BIT * sizeof(uint16_t)) static inline void desc_to_ptype_v(uint64x2_t descs[4], struct rte_mbuf **rx_pkts) @@ -224,7 +223,6 @@ _recv_raw_pkts_vec(struct i40e_rx_queue *rxq, struct rte_mbuf **rx_pkts, struct i40e_rx_entry *sw_ring; uint16_t nb_pkts_recd; int pos; - uint64_t var; /* mask to shuffle from desc. to mbuf */ uint8x16_t shuf_msk = { @@ -357,7 +355,6 @@ _recv_raw_pkts_vec(struct i40e_rx_queue *rxq, struct rte_mbuf **rx_pkts, /* C.2 get 4 pkts staterr value */ staterr = vzipq_u16(sterr_tmp1.val[1], sterr_tmp2.val[1]).val[0]; - stat = vgetq_lane_u64(vreinterpretq_u64_u16(staterr), 0); desc_to_olflags_v(descs, &rx_pkts[pos]); @@ -422,6 +419,12 @@ _recv_raw_pkts_vec(struct i40e_rx_queue *rxq, struct rte_mbuf **rx_pkts, rx_pkts[pos + 3]->next = NULL; } + staterr = vshlq_n_u16(staterr, I40E_UINT16_BIT - 1); + staterr = vreinterpretq_u16_s16( + vshrq_n_s16(vreinterpretq_s16_u16(staterr), + I40E_UINT16_BIT - 1)); + stat = ~vgetq_lane_u64(vreinterpretq_u64_u16(staterr), 0); + rte_prefetch_non_temporal(rxdp + RTE_I40E_DESCS_PER_LOOP); /* D.3 copy final 1,2 data to rx_pkts */ @@ -431,10 +434,12 @@ _recv_raw_pkts_vec(struct i40e_rx_queue *rxq, struct rte_mbuf **rx_pkts, pkt_mb1); desc_to_ptype_v(descs, &rx_pkts[pos]); /* C.4 calc avaialbe number of desc */ - var = __builtin_popcountll(stat & I40E_VPMD_DESC_DD_MASK); - nb_pkts_recd += var; - if (likely(var != RTE_I40E_DESCS_PER_LOOP)) + if (unlikely(stat == 0)) { + nb_pkts_recd += RTE_I40E_DESCS_PER_LOOP; + } else { + nb_pkts_recd += __builtin_ctzl(stat) / I40E_UINT16_BIT; break; + } } /* Update our internal tail pointer */ -- 2.11.0