From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wr0-f196.google.com (mail-wr0-f196.google.com [209.85.128.196]) by dpdk.org (Postfix) with ESMTP id CAD9B10BD for ; Mon, 30 Apr 2018 16:44:00 +0200 (CEST) Received: by mail-wr0-f196.google.com with SMTP id o15-v6so8280513wro.11 for ; Mon, 30 Apr 2018 07:44:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=NxuuuJDrn/Zolfb8iENzo7IK4otEbHNfHsA2frdOxJ0=; b=f4a0vXxV1LIQYQM9T5r4ArWZv2vUipx+/gPylHTcxAhnjBNtysXNiDlnCW02RE4YiY usFhsytvBB8S7jlff6TTuGOpsiwqx+vdzPz6xLBCXwZ9SiPhAfta/DkVkZhEDoi1PITn le4BayE+Vhv4//eARhm7fXO9zcRannIpnYRcK5lARpC/e+4Sd/8ugr+TBtw4x4Bgz5tz JEBDLMWI+B1ydG5HxGk9rTphrkBI9rKHSWTMD1vEI4pUCNF1l+zPfEf6vB/Zw1HrCq5b FPHucmkKWI6nutEE9XkcEFQpVPnGi5d8eWl7tzd0WwPtX5Nlf1h78PSxm+EhLJsZBipx AaYQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=NxuuuJDrn/Zolfb8iENzo7IK4otEbHNfHsA2frdOxJ0=; b=k2SIVTjWujpRXNxWNuePiklRr0PcpwtfdFalioyRQmrvvzWOnHRljmSWbC+uA2mzzq 1/Pl4xSPuROA4zAtqyQNtuxCG+hbMYXg5smGVs/4bEfi4kT/vLt5mMudZefSshTS0ZaZ g2xlHo4jZfUTOwGVguuaZcuRxA85vup1NhNV9HQtYu21MDm4aFBagY9K3aUiDfJ9LI30 PGr0Styx15cMWT62pq22xn+z/ZjT9blNnOSg1oqCtaacVMuY2m7EObOfagtOLdIKj0Ry 8XpHCDeB8D6RbdiMJFG1NuHdShzAr2YXqAW0H7QxKVGLax9NVkNz2gCwl51zOT0Xbj3A NFdg== X-Gm-Message-State: ALQs6tDn5RRNRg8YVR1riUHTQn3JQ+isohKk82mjP8CGuj4M1vGN61q7 xwXEwljDYnxy7zjdfmhLr9+/w2nXIm0= X-Google-Smtp-Source: AB8JxZqy9SBmwGKQDEyapIK/5geloh30P+AdCbeUrjMVmomMMRBOhet0AETWq5XaKTNa+R8n4yFfcQ== X-Received: by 2002:adf:a108:: with SMTP id o8-v6mr9162965wro.106.1525099440507; Mon, 30 Apr 2018 07:44:00 -0700 (PDT) Received: from localhost ([2a00:23c5:be9a:5200:ce4c:82c0:d567:ecbb]) by smtp.gmail.com with ESMTPSA id d54-v6sm7978217wrd.94.2018.04.30.07.43.59 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 30 Apr 2018 07:43:59 -0700 (PDT) From: luca.boccassi@gmail.com To: Hemant Agrawal Cc: Maxime Coquelin , dpdk stable Date: Mon, 30 Apr 2018 15:41:14 +0100 Message-Id: <20180430144223.18657-59-luca.boccassi@gmail.com> X-Mailer: git-send-email 2.14.2 In-Reply-To: <20180430144223.18657-1-luca.boccassi@gmail.com> References: <20180430140606.4615-80-luca.boccassi@gmail.com> <20180430144223.18657-1-luca.boccassi@gmail.com> Subject: [dpdk-stable] patch 'bus/fslmc: fix build with clang 3.4' has been queued to stable release 18.02.2 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 30 Apr 2018 14:44:00 -0000 Hi, FYI, your patch has been queued to stable release 18.02.2 Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet. It will be pushed if I get no objections before 05/02/18. So please shout if anyone has objections. Thanks. Luca Boccassi --- >>From 1859b6389d18c1c27bcc93ceacaa96378c7b4eae Mon Sep 17 00:00:00 2001 From: Hemant Agrawal Date: Thu, 19 Apr 2018 18:02:39 +0530 Subject: [PATCH] bus/fslmc: fix build with clang 3.4 [ upstream commit 3ef648aa4854f53b5ad3f148dc021852157a0246 ] error: redefinition of typedef 'dma_addr_t' is a C11 feature [-Werror,-Wtypedef-redefinition] Fixes: 4bc5ab88dbd6 ("net/dpaa2: fix Tx only mode") Signed-off-by: Hemant Agrawal Tested-by: Maxime Coquelin --- drivers/bus/fslmc/qbman/include/fsl_qbman_base.h | 2 -- drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 3 +++ drivers/net/dpaa2/dpaa2_rxtx.c | 4 ++-- 3 files changed, 5 insertions(+), 4 deletions(-) diff --git a/drivers/bus/fslmc/qbman/include/fsl_qbman_base.h b/drivers/bus/fslmc/qbman/include/fsl_qbman_base.h index 96269ed4a..bb60a98f9 100644 --- a/drivers/bus/fslmc/qbman/include/fsl_qbman_base.h +++ b/drivers/bus/fslmc/qbman/include/fsl_qbman_base.h @@ -6,8 +6,6 @@ #ifndef _FSL_QBMAN_BASE_H #define _FSL_QBMAN_BASE_H -typedef uint64_t dma_addr_t; - /** * DOC: QBMan basic structures * diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c index 3954afe94..a1fe8e596 100644 --- a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c +++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c @@ -30,6 +30,9 @@ #include "dpaa2_sec_priv.h" #include "dpaa2_sec_logs.h" +/* Required types */ +typedef uint64_t dma_addr_t; + /* RTA header files */ #include #include diff --git a/drivers/net/dpaa2/dpaa2_rxtx.c b/drivers/net/dpaa2/dpaa2_rxtx.c index 183293c1d..e37b08cb5 100644 --- a/drivers/net/dpaa2/dpaa2_rxtx.c +++ b/drivers/net/dpaa2/dpaa2_rxtx.c @@ -501,7 +501,7 @@ dpaa2_dev_prefetch_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts) q_storage->last_num_pkts); qbman_pull_desc_set_fq(&pulldesc, fqid); qbman_pull_desc_set_storage(&pulldesc, dq_storage, - (dma_addr_t)(DPAA2_VADDR_TO_IOVA(dq_storage)), 1); + (uint64_t)(DPAA2_VADDR_TO_IOVA(dq_storage)), 1); if (check_swp_active_dqs(DPAA2_PER_LCORE_DPIO->index)) { while (!qbman_check_command_complete( get_swp_active_dqs(DPAA2_PER_LCORE_DPIO->index))) @@ -535,7 +535,7 @@ dpaa2_dev_prefetch_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts) qbman_pull_desc_set_numframes(&pulldesc, DPAA2_DQRR_RING_SIZE); qbman_pull_desc_set_fq(&pulldesc, fqid); qbman_pull_desc_set_storage(&pulldesc, dq_storage1, - (dma_addr_t)(DPAA2_VADDR_TO_IOVA(dq_storage1)), 1); + (uint64_t)(DPAA2_VADDR_TO_IOVA(dq_storage1)), 1); /* Check if the previous issued command is completed. * Also seems like the SWP is shared between the Ethernet Driver -- 2.14.2