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From: luca.boccassi@gmail.com
To: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Cc: Ferruh Yigit <ferruh.yigit@intel.com>,
dpdk stable <stable@dpdk.org>
Date: Mon, 30 Apr 2018 15:53:38 +0100
Message-Id: <20180430145402.23057-19-luca.boccassi@gmail.com>
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<20180430145402.23057-1-luca.boccassi@gmail.com>
Subject: [dpdk-stable] patch 'net/bnxt: fix matching of flow API item masks'
has been queued to stable release 18.02.2
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Hi,
FYI, your patch has been queued to stable release 18.02.2
Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 05/02/18. So please
shout if anyone has objections.
Thanks.
Luca Boccassi
---
>>From 774362c7c44c54d155815a241a6cd842028c1cd6 Mon Sep 17 00:00:00 2001
From: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Date: Thu, 19 Apr 2018 12:07:31 +0200
Subject: [PATCH] net/bnxt: fix matching of flow API item masks
[ upstream commit e65f082adbf62a17dc1759c8af532811672095c3 ]
Some values are interpreted without endian conversion and/or without
taking the proper mask into account.
Fixes: 5ef3b79fdfe6 ("net/bnxt: support flow filter ops")
Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
---
drivers/net/bnxt/bnxt_filter.c | 14 +++++++++-----
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/drivers/net/bnxt/bnxt_filter.c b/drivers/net/bnxt/bnxt_filter.c
index 5ede63436..3b9820813 100644
--- a/drivers/net/bnxt/bnxt_filter.c
+++ b/drivers/net/bnxt/bnxt_filter.c
@@ -33,6 +33,7 @@
#include <sys/queue.h>
+#include <rte_byteorder.h>
#include <rte_log.h>
#include <rte_malloc.h>
#include <rte_flow.h>
@@ -382,7 +383,8 @@ bnxt_validate_and_parse_flow_type(struct bnxt *bp,
}
/* Mask is not allowed. Only exact matches are */
- if ((eth_mask->type & UINT16_MAX) != UINT16_MAX) {
+ if (eth_mask->type &&
+ eth_mask->type != RTE_BE16(0xffff)) {
rte_flow_error_set(error, EINVAL,
RTE_FLOW_ERROR_TYPE_ITEM,
item,
@@ -408,7 +410,7 @@ bnxt_validate_and_parse_flow_type(struct bnxt *bp,
* RTE_LOG(ERR, PMD, "Handle this condition\n");
* }
*/
- if (eth_spec->type) {
+ if (eth_mask->type) {
filter->ethertype =
rte_be_to_cpu_16(eth_spec->type);
en |= use_ntuple ?
@@ -422,13 +424,15 @@ bnxt_validate_and_parse_flow_type(struct bnxt *bp,
(const struct rte_flow_item_vlan *)item->spec;
vlan_mask =
(const struct rte_flow_item_vlan *)item->mask;
- if (vlan_mask->tci & 0xFFFF && !vlan_mask->tpid) {
+ if (vlan_mask->tci &&
+ vlan_mask->tci == RTE_BE16(0x0fff) &&
+ !vlan_mask->tpid) {
/* Only the VLAN ID can be matched. */
filter->l2_ovlan =
rte_be_to_cpu_16(vlan_spec->tci &
- 0xFFF);
+ RTE_BE16(0x0fff));
en |= EM_FLOW_ALLOC_INPUT_EN_OVLAN_VID;
- } else {
+ } else if (vlan_mask->tci || vlan_mask->tpid) {
rte_flow_error_set(error, EINVAL,
RTE_FLOW_ERROR_TYPE_ITEM,
item,
--
2.14.2