From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from youngberry.canonical.com (youngberry.canonical.com [91.189.89.112]) by dpdk.org (Postfix) with ESMTP id 1585E5B12 for ; Mon, 30 Jul 2018 18:15:34 +0200 (CEST) Received: from 1.general.paelzer.uk.vpn ([10.172.196.172] helo=lap.fritz.box) by youngberry.canonical.com with esmtpsa (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.76) (envelope-from ) id 1fkApO-00009D-Bj; Mon, 30 Jul 2018 16:15:22 +0000 From: Christian Ehrhardt To: Haiyue Wang Cc: Qi Zhang , dpdk stable Date: Mon, 30 Jul 2018 18:11:30 +0200 Message-Id: <20180730161342.16566-45-christian.ehrhardt@canonical.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180730161342.16566-1-christian.ehrhardt@canonical.com> References: <20180730161342.16566-1-christian.ehrhardt@canonical.com> Subject: [dpdk-stable] patch 'net/i40e: workaround performance degradation' has been queued to stable release 18.05.1 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 30 Jul 2018 16:15:34 -0000 Hi, FYI, your patch has been queued to stable release 18.05.1 Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet. It will be pushed if I get no objections before 08/01/18. So please shout if anyone has objections. Thanks. Christian Ehrhardt --- >>From 663163c5643d368cc90ec1f8a036d90c6035082c Mon Sep 17 00:00:00 2001 From: Haiyue Wang Date: Wed, 13 Jun 2018 13:52:41 +0800 Subject: [PATCH] net/i40e: workaround performance degradation [ upstream commit 3320d4a240daab15559d3e671bd44573a89cf017 ] The GL_SWR_PM_UP_THR value is not impacted from the link speed, its value is set according to the total number of ports for a better pipe-monitor configuration. All bellowing relevant device IDs are considered (NICs, LOMs, Mezz and Backplane): Device-ID Value Comments 0x1572 0x03030303 10G SFI 0x1581 0x03030303 10G Backplane 0x1586 0x03030303 10G BaseT 0x1589 0x03030303 10G BaseT (FortPond) 0x1580 0x06060606 40G Backplane 0x1583 0x06060606 2x40G QSFP 0x1584 0x06060606 1x40G QSFP 0x1587 0x06060606 20G Backplane (HP) 0x1588 0x06060606 20G KR2 (HP) 0x158A 0x06060606 25G Backplane 0x158B 0x06060606 25G SFP28 Fixes: c9223a2bf53c ("i40e: workaround for XL710 performance") Fixes: 75d133dd3296 ("net/i40e: enable 25G device") Signed-off-by: Haiyue Wang Acked-by: Qi Zhang --- drivers/net/i40e/i40e_ethdev.c | 71 ++++++++++++++++++++++++++++++---- 1 file changed, 64 insertions(+), 7 deletions(-) diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c index 9f80e70ce..50bbc77ae 100644 --- a/drivers/net/i40e/i40e_ethdev.c +++ b/drivers/net/i40e/i40e_ethdev.c @@ -10003,6 +10003,60 @@ i40e_pctype_to_flowtype(const struct i40e_adapter *adapter, #define I40E_GL_SWR_PM_UP_THR_SF_VALUE 0x06060606 #define I40E_GL_SWR_PM_UP_THR 0x269FBC +/* + * GL_SWR_PM_UP_THR: + * The value is not impacted from the link speed, its value is set according + * to the total number of ports for a better pipe-monitor configuration. + */ +static bool +i40e_get_swr_pm_cfg(struct i40e_hw *hw, uint32_t *value) +{ +#define I40E_GL_SWR_PM_EF_DEVICE(dev) \ + .device_id = (dev), \ + .val = I40E_GL_SWR_PM_UP_THR_EF_VALUE + +#define I40E_GL_SWR_PM_SF_DEVICE(dev) \ + .device_id = (dev), \ + .val = I40E_GL_SWR_PM_UP_THR_SF_VALUE + + static const struct { + uint16_t device_id; + uint32_t val; + } swr_pm_table[] = { + { I40E_GL_SWR_PM_EF_DEVICE(I40E_DEV_ID_SFP_XL710) }, + { I40E_GL_SWR_PM_EF_DEVICE(I40E_DEV_ID_KX_C) }, + { I40E_GL_SWR_PM_EF_DEVICE(I40E_DEV_ID_10G_BASE_T) }, + { I40E_GL_SWR_PM_EF_DEVICE(I40E_DEV_ID_10G_BASE_T4) }, + + { I40E_GL_SWR_PM_SF_DEVICE(I40E_DEV_ID_KX_B) }, + { I40E_GL_SWR_PM_SF_DEVICE(I40E_DEV_ID_QSFP_A) }, + { I40E_GL_SWR_PM_SF_DEVICE(I40E_DEV_ID_QSFP_B) }, + { I40E_GL_SWR_PM_SF_DEVICE(I40E_DEV_ID_20G_KR2) }, + { I40E_GL_SWR_PM_SF_DEVICE(I40E_DEV_ID_20G_KR2_A) }, + { I40E_GL_SWR_PM_SF_DEVICE(I40E_DEV_ID_25G_B) }, + { I40E_GL_SWR_PM_SF_DEVICE(I40E_DEV_ID_25G_SFP28) }, + }; + uint32_t i; + + if (value == NULL) { + PMD_DRV_LOG(ERR, "value is NULL"); + return false; + } + + for (i = 0; i < RTE_DIM(swr_pm_table); i++) { + if (hw->device_id == swr_pm_table[i].device_id) { + *value = swr_pm_table[i].val; + + PMD_DRV_LOG(DEBUG, "Device 0x%x with GL_SWR_PM_UP_THR " + "value - 0x%08x", + hw->device_id, *value); + return true; + } + } + + return false; +} + static int i40e_dev_sync_phy_type(struct i40e_hw *hw) { @@ -10067,13 +10121,16 @@ i40e_configure_registers(struct i40e_hw *hw) } if (reg_table[i].addr == I40E_GL_SWR_PM_UP_THR) { - if (I40E_PHY_TYPE_SUPPORT_40G(hw->phy.phy_types) || /* For XL710 */ - I40E_PHY_TYPE_SUPPORT_25G(hw->phy.phy_types)) /* For XXV710 */ - reg_table[i].val = - I40E_GL_SWR_PM_UP_THR_SF_VALUE; - else /* For X710 */ - reg_table[i].val = - I40E_GL_SWR_PM_UP_THR_EF_VALUE; + uint32_t cfg_val; + + if (!i40e_get_swr_pm_cfg(hw, &cfg_val)) { + PMD_DRV_LOG(DEBUG, "Device 0x%x skips " + "GL_SWR_PM_UP_THR value fixup", + hw->device_id); + continue; + } + + reg_table[i].val = cfg_val; } ret = i40e_aq_debug_read_register(hw, reg_table[i].addr, -- 2.17.1