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Thu, 20 Sep 2018 06:41:26 +0000 From: Jerin Jacob To: Gavin Hu CC: "dev@dpdk.org" , "Honnappa.Nagarahalli@arm.com" , "steve.capper@arm.com" , "Ola.Liljedahl@arm.com" , "nd@arm.com" , "stable@dpdk.org" , "jia.he@hxt-semitech.com" Thread-Topic: [PATCH v4 2/4] ring: read tail using atomic load Thread-Index: AQHUTl4M0eEBoA1JzECgJ/n/BsSaBqT4vSGA Date: Thu, 20 Sep 2018 06:41:26 +0000 Message-ID: <20180920064117.GC2283@jerin> References: <20180917074735.28161-1-gavin.hu@arm.com> <1537171879-64390-1-git-send-email-gavin.hu@arm.com> <1537171879-64390-2-git-send-email-gavin.hu@arm.com> In-Reply-To: <1537171879-64390-2-git-send-email-gavin.hu@arm.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [111.93.218.67] x-clientproxiedby: DM5PR07CA0046.namprd07.prod.outlook.com (2603:10b6:3:16::32) To BYAPR07MB4997.namprd07.prod.outlook.com (2603:10b6:a03:5b::22) authentication-results: spf=none (sender IP is ) smtp.mailfrom=Jerin.JacobKollanukkaran@cavium.com; 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DIR:OUT; SFP:1101; SCL:1; SRVR:BYAPR07MB4663; H:BYAPR07MB4997.namprd07.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; MX:1; A:1; received-spf: None (protection.outlook.com: cavium.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: LwpW7fZchoYnOxFlFcnjs4RhlXTqpGE0u6X7h5WLVVOAHZbDo53RyM3ONBDNH9ino/rWNV9eweP9vReDRErtYT0uqSGQGJaMMTmWEgcx/vkCQtMiatlntfp5rq67U1BuNAoDXQ9e6leXO2Bb1VsV6/7/YhkWUJiD6wVezdZbrAk41SGghSYtimErUJD+PS9PX1mENogQAJGVC8KkMNNnDekgMvO5EqmANfQhaky/mt/6IsgnKElmWFwtjgRnqIEqcGTKFmAo/sLZImVHF6UaaZTbsLAQ12XkKQtGQCLMEKJ99+N6wGYx6OYoh2t70MKpsBwqqd8FuoROk5j7DX2CwnY8g+QpsRnITgyuLv7Dhyg= spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM Content-Type: text/plain; charset="us-ascii" Content-ID: <3438533554E3414CA6CE7B017B522717@namprd07.prod.outlook.com> Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: caviumnetworks.com X-MS-Exchange-CrossTenant-Network-Message-Id: b15ff1d7-70fc-46b9-26c7-08d61ec41692 X-MS-Exchange-CrossTenant-originalarrivaltime: 20 Sep 2018 06:41:26.4446 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 711e4ccf-2e9b-4bcf-a551-4094005b6194 X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR07MB4663 Subject: Re: [dpdk-stable] [PATCH v4 2/4] ring: read tail using atomic load X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 20 Sep 2018 06:41:29 -0000 -----Original Message----- > Date: Mon, 17 Sep 2018 16:11:17 +0800 > From: Gavin Hu > To: dev@dpdk.org > CC: gavin.hu@arm.com, Honnappa.Nagarahalli@arm.com, steve.capper@arm.com, > Ola.Liljedahl@arm.com, jerin.jacob@caviumnetworks.com, nd@arm.com, > stable@dpdk.org > Subject: [PATCH v4 2/4] ring: read tail using atomic load > X-Mailer: git-send-email 2.7.4 >=20 >=20 > In update_tail, read ht->tail using __atomic_load.Although the > compiler currently seems to be doing the right thing even without > _atomic_load, we don't want to give the compiler freedom to optimise > what should be an atomic load, it should not be arbitarily moved > around. >=20 > Fixes: 39368ebfc6 ("ring: introduce C11 memory model barrier option") > Cc: stable@dpdk.org + Jia He >=20 > Signed-off-by: Gavin Hu > Reviewed-by: Honnappa Nagarahalli > Reviewed-by: Steve Capper > Reviewed-by: Ola Liljedahl > --- > lib/librte_ring/rte_ring_c11_mem.h | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) >=20 > diff --git a/lib/librte_ring/rte_ring_c11_mem.h b/lib/librte_ring/rte_rin= g_c11_mem.h > index 94df3c4..234fea0 100644 > --- a/lib/librte_ring/rte_ring_c11_mem.h > +++ b/lib/librte_ring/rte_ring_c11_mem.h > @@ -21,7 +21,8 @@ update_tail(struct rte_ring_headtail *ht, uint32_t old_= val, uint32_t new_val, > * we need to wait for them to complete > */ > if (!single) > - while (unlikely(ht->tail !=3D old_val)) > + while (unlikely(old_val !=3D __atomic_load_n(&ht->tail, > + __ATOMIC_RELAXED))) > rte_pause(); >=20 > __atomic_store_n(&ht->tail, new_val, __ATOMIC_RELEASE); > -- > 2.7.4 >=20