From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wm1-f68.google.com (mail-wm1-f68.google.com [209.85.128.68]) by dpdk.org (Postfix) with ESMTP id 2BA432BC8 for ; Mon, 15 Oct 2018 13:51:53 +0200 (CEST) Received: by mail-wm1-f68.google.com with SMTP id r63-v6so18586732wma.4 for ; Mon, 15 Oct 2018 04:51:53 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=etvfxXiDCA/1Co4KokfMn+wlX6/U9hOQA83Km7L79KE=; b=Lx8gsUX/kpCSH9mC/RKGTQTAZ5Oghi11Eh5dtSyjX2IXTCc1PUVFBWJZufSbQYqMOF G4cU78ZeXiUJgJFMN4TyEGs6lanBE5ixHvtr9YXOsFeo/V6hAEIdEVf6+L5lhe3tgAQB 7HMAlVAsXKsqDc8m9sIyYbadQ/iaoGNj6tmUp1sAgRrJmtuxGfBOUh5y+8l9B57QqaF2 Uc2X2v5AQ4Y019gPbYE4mdvfdf9GnqivW4Fds1sfrYaWGHes4TUjnK63xuOaOz/Uwsh0 Gc/Z0KUYK7zvHNavNc0ASHIk7C4AKPq2s0EcKYQ6Ng55dLrdXwQqVyr01SEE8bCylm7w BsfA== X-Gm-Message-State: ABuFfogBPvsWTN56j36pqKy4RXAsF5H6JjFK5BbS7F12jVi91ACBMGMc mT1XGZ8yLR6PmzwHVorQtjU= X-Google-Smtp-Source: ACcGV605i5sz7Bokld4Moo1MWOiGCDtyqyIT/z7Ne87vdRHa5W/rcKgxRXS79dHogr7qYeOeOmkDHg== X-Received: by 2002:a1c:1812:: with SMTP id 18-v6mr13275325wmy.34.1539604312697; Mon, 15 Oct 2018 04:51:52 -0700 (PDT) Received: from localhost ([2a01:4b00:f419:6f00:8361:8946:ba2b:d556]) by smtp.gmail.com with ESMTPSA id m143-v6sm9998573wmd.29.2018.10.15.04.51.51 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 15 Oct 2018 04:51:51 -0700 (PDT) From: Luca Boccassi To: Qi Zhang Cc: Beilei Xing , dpdk stable Date: Mon, 15 Oct 2018 12:51:22 +0100 Message-Id: <20181015115144.27626-2-bluca@debian.org> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181015115144.27626-1-bluca@debian.org> References: <20181003162121.16364-1-bluca@debian.org> <20181015115144.27626-1-bluca@debian.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [dpdk-stable] patch 'net/i40e/base: fix partition id calculation for X722' has been queued to LTS release 16.11.9 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 15 Oct 2018 11:51:53 -0000 Hi, FYI, your patch has been queued to LTS release 16.11.9 Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet. It will be pushed if I get no objections before 10/17/18. So please shout if anyone has objections. Also note that after the patch there's a diff of the upstream commit vs the patch applied to the branch. If the code is different (ie: not only metadata diffs), due for example to a change in context or macro names, please double check it. Thanks. Luca Boccassi --- >>From cfc7648c166b57d01e7f151f95a6bfced35fba58 Mon Sep 17 00:00:00 2001 From: Qi Zhang Date: Tue, 25 Sep 2018 10:34:24 +0800 Subject: [PATCH] net/i40e/base: fix partition id calculation for X722 [ upstream commit 188d0bda2bac473a1c49987265ebd33c95c63456 ] This patch overwrites number of ports for X722 devices with support for OCP PHY mezzanine. The old method with checking if port is disabled in the PRTGEN_CNF register cannot be used in this case. When the OCP is removed, ports were seen as disabled, which resulted in wrong calculation of partition id, that caused WoL to be disabled on certain ports. Fixes: 3c89193a36fd ("i40e/base: support WOL config for X722") Signed-off-by: Qi Zhang Acked-by: Beilei Xing --- drivers/net/i40e/base/i40e_common.c | 23 ++++++++++++++++++++++- drivers/net/i40e/base/i40e_type.h | 2 ++ 2 files changed, 24 insertions(+), 1 deletion(-) diff --git a/drivers/net/i40e/base/i40e_common.c b/drivers/net/i40e/base/i40e_common.c index de60e2a126..1bfda0866d 100644 --- a/drivers/net/i40e/base/i40e_common.c +++ b/drivers/net/i40e/base/i40e_common.c @@ -3574,9 +3574,10 @@ STATIC void i40e_parse_discover_capabilities(struct i40e_hw *hw, void *buff, u32 valid_functions, num_functions; u32 number, logical_id, phys_id; struct i40e_hw_capabilities *p; + enum i40e_status_code status; + u16 id, ocp_cfg_word0; u8 major_rev; u32 i = 0; - u16 id; cap = (struct i40e_aqc_list_capabilities_element_resp *) buff; @@ -3863,6 +3864,26 @@ STATIC void i40e_parse_discover_capabilities(struct i40e_hw *hw, void *buff, hw->num_ports++; } + /* OCP cards case: if a mezz is removed the ethernet port is at + * disabled state in PRTGEN_CNF register. Additional NVM read is + * needed in order to check if we are dealing with OCP card. + * Those cards have 4 PFs at minimum, so using PRTGEN_CNF for counting + * physical ports results in wrong partition id calculation and thus + * not supporting WoL. + */ + if (hw->mac.type == I40E_MAC_X722) { + if (i40e_acquire_nvm(hw, I40E_RESOURCE_READ) == I40E_SUCCESS) { + status = i40e_aq_read_nvm(hw, I40E_SR_EMP_MODULE_PTR, + 2 * I40E_SR_OCP_CFG_WORD0, + sizeof(ocp_cfg_word0), + &ocp_cfg_word0, true, NULL); + if (status == I40E_SUCCESS && + (ocp_cfg_word0 & I40E_SR_OCP_ENABLED)) + hw->num_ports = 4; + i40e_release_nvm(hw); + } + } + valid_functions = p->valid_functions; num_functions = 0; while (valid_functions) { diff --git a/drivers/net/i40e/base/i40e_type.h b/drivers/net/i40e/base/i40e_type.h index d514abe346..aa45d10c79 100644 --- a/drivers/net/i40e/base/i40e_type.h +++ b/drivers/net/i40e/base/i40e_type.h @@ -1519,6 +1519,8 @@ struct i40e_hw_port_stats { #define I40E_SR_PCIE_ALT_MODULE_MAX_SIZE 1024 #define I40E_SR_CONTROL_WORD_1_SHIFT 0x06 #define I40E_SR_CONTROL_WORD_1_MASK (0x03 << I40E_SR_CONTROL_WORD_1_SHIFT) +#define I40E_SR_OCP_CFG_WORD0 0x2B +#define I40E_SR_OCP_ENABLED BIT(15) /* Shadow RAM related */ #define I40E_SR_SECTOR_SIZE_IN_WORDS 0x800 -- 2.19.1 --- Diff of the applied patch vs upstream commit (please double-check if non-empty: --- --- - 2018-10-15 12:48:34.678631648 +0100 +++ 0002-net-i40e-base-fix-partition-id-calculation-for-X722.patch 2018-10-15 12:48:34.501096017 +0100 @@ -1,8 +1,10 @@ -From 188d0bda2bac473a1c49987265ebd33c95c63456 Mon Sep 17 00:00:00 2001 +From cfc7648c166b57d01e7f151f95a6bfced35fba58 Mon Sep 17 00:00:00 2001 From: Qi Zhang Date: Tue, 25 Sep 2018 10:34:24 +0800 Subject: [PATCH] net/i40e/base: fix partition id calculation for X722 +[ upstream commit 188d0bda2bac473a1c49987265ebd33c95c63456 ] + This patch overwrites number of ports for X722 devices with support for OCP PHY mezzanine. The old method with checking if port is disabled in the PRTGEN_CNF register cannot be used in this case. When the OCP is @@ -10,20 +12,19 @@ of partition id, that caused WoL to be disabled on certain ports. Fixes: 3c89193a36fd ("i40e/base: support WOL config for X722") -Cc: stable@dpdk.org Signed-off-by: Qi Zhang Acked-by: Beilei Xing --- drivers/net/i40e/base/i40e_common.c | 23 ++++++++++++++++++++++- - drivers/net/i40e/base/i40e_type.h | 4 +++- - 2 files changed, 25 insertions(+), 2 deletions(-) + drivers/net/i40e/base/i40e_type.h | 2 ++ + 2 files changed, 24 insertions(+), 1 deletion(-) diff --git a/drivers/net/i40e/base/i40e_common.c b/drivers/net/i40e/base/i40e_common.c -index dce5c39653..ee117bd5e4 100644 +index de60e2a126..1bfda0866d 100644 --- a/drivers/net/i40e/base/i40e_common.c +++ b/drivers/net/i40e/base/i40e_common.c -@@ -3678,9 +3678,10 @@ STATIC void i40e_parse_discover_capabilities(struct i40e_hw *hw, void *buff, +@@ -3574,9 +3574,10 @@ STATIC void i40e_parse_discover_capabilities(struct i40e_hw *hw, void *buff, u32 valid_functions, num_functions; u32 number, logical_id, phys_id; struct i40e_hw_capabilities *p; @@ -35,7 +36,7 @@ cap = (struct i40e_aqc_list_capabilities_element_resp *) buff; -@@ -3972,6 +3973,26 @@ STATIC void i40e_parse_discover_capabilities(struct i40e_hw *hw, void *buff, +@@ -3863,6 +3864,26 @@ STATIC void i40e_parse_discover_capabilities(struct i40e_hw *hw, void *buff, hw->num_ports++; } @@ -63,15 +64,13 @@ num_functions = 0; while (valid_functions) { diff --git a/drivers/net/i40e/base/i40e_type.h b/drivers/net/i40e/base/i40e_type.h -index 55acc147ea..7dde3bfd24 100644 +index d514abe346..aa45d10c79 100644 --- a/drivers/net/i40e/base/i40e_type.h +++ b/drivers/net/i40e/base/i40e_type.h -@@ -1512,7 +1512,9 @@ struct i40e_hw_port_stats { +@@ -1519,6 +1519,8 @@ struct i40e_hw_port_stats { + #define I40E_SR_PCIE_ALT_MODULE_MAX_SIZE 1024 + #define I40E_SR_CONTROL_WORD_1_SHIFT 0x06 #define I40E_SR_CONTROL_WORD_1_MASK (0x03 << I40E_SR_CONTROL_WORD_1_SHIFT) - #define I40E_SR_CONTROL_WORD_1_NVM_BANK_VALID BIT(5) - #define I40E_SR_NVM_MAP_STRUCTURE_TYPE BIT(12) --#define I40E_PTR_TYPE BIT(15) -+#define I40E_PTR_TYPE BIT(15) +#define I40E_SR_OCP_CFG_WORD0 0x2B +#define I40E_SR_OCP_ENABLED BIT(15)