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Fri, 2 Nov 2018 20:59:38 +0000 From: Yongseok Koh To: Ferruh Yigit CC: Thomas Monjalon , "bruce.richardson@intel.com" , "dev@dpdk.org" , Shahaf Shuler , "stable@dpdk.org" , Konstantin Ananyev , Anatoly Burakov Thread-Topic: [dpdk-stable] [PATCH] build: disable compiler AVX512F support Thread-Index: AQHUaxajIqJF1GRaIEuSbF5cO+4UK6U8fNqAgAASW4CAAHh/gA== Date: Fri, 2 Nov 2018 20:59:37 +0000 Message-ID: <20181102205926.GA15737@mtidpdk.mti.labs.mlnx> References: <20181023212318.43082-1-yskoh@mellanox.com> <3a34ea82-fbdf-2ebd-c6d9-9713bfadefb8@intel.com> In-Reply-To: <3a34ea82-fbdf-2ebd-c6d9-9713bfadefb8@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: BYAPR05CA0096.namprd05.prod.outlook.com (2603:10b6:a03:e0::37) To DB3PR0502MB3980.eurprd05.prod.outlook.com (2603:10a6:8:10::27) authentication-results: spf=none (sender IP is ) smtp.mailfrom=yskoh@mellanox.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [209.116.155.178] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1; 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DIR:OUT; SFP:1101; SCL:1; SRVR:DB3PR0502MB3946; H:DB3PR0502MB3980.eurprd05.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: mellanox.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: we5JwYFrFP0pqytwJsWra+Si20I+F9NP5/h7JnetWUSq/lmxWijkizOBcX24idPNnn1Poavp8G3EOkWQZpfWP6uyQwb7Gs/t1cQBQ5JsCndg/GxVOFpAflo2LJlmbqLzYF9KjVoG1ySJjvOtidwK+C3+dBOZhKuUYLCksTYtDTvDzDJz3Jg82LsrNLt7HuYnnNvaGsDY0q1chsN+4g/w2qsonUk2PIVye/58GJN7x2TPPZ2GVcoxs0agQt8yzqJiWlLhUX80Or4QW9Gj7VL+bHcetw2YLVnzXdyiuEQqh6x4f+pe3PnGeD75g5S+6pgrh8tA303qA8DX0+2Ooyy0eDrOlGAwZuqBKBoTlAN3nTA= spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM Content-Type: text/plain; charset="us-ascii" Content-ID: Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: Mellanox.com X-MS-Exchange-CrossTenant-Network-Message-Id: 7c73bf17-f4d9-4cc7-2118-08d64106199e X-MS-Exchange-CrossTenant-originalarrivaltime: 02 Nov 2018 20:59:37.9499 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: a652971c-7d2e-4d9b-a6a4-d149256f461b X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB3PR0502MB3946 Subject: Re: [dpdk-stable] [PATCH] build: disable compiler AVX512F support X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 02 Nov 2018 20:59:41 -0000 On Fri, Nov 02, 2018 at 01:48:11PM +0000, Ferruh Yigit wrote: > On 11/2/2018 12:42 PM, Ferruh Yigit wrote: > > On 10/23/2018 10:23 PM, Yongseok Koh wrote: > >> This is a workaround to prevent a crash, which might be caused by > >> optimization of newer gcc (7.3.0) on Intel Skylake. > >> > >> Bugzilla ID: 97 > >=20 > > After checking the defect description again, this is the issue observed= in > > rte_memcpy() implementation for AVX2, compiler uses AVX512F instruction= s while > > compiling it which causes the failure, so this may be a compiler defect= but we > > don't know the root cause yet. >=20 > Is the issue only with gcc, and only with specific version of gcc? > If so can we reduce the disabling avx512 only to that gcc version? >=20 > >=20 > > I think best solution is to find the root cause and fix either avx2 > > implementation or compiler, but this seems won't be soon, at least for = rc2. > >=20 > > What this patch does is to prevent compiler to use avx512f instruction = when > > "CONFIG_RTE_ENABLE_AVX512=3Dn". > >=20 > > Concern is this will affect all DPDK generated code for x86, but since > > rte_memcpy() in header file there is no way to disable using avx512f > > instructions locally for rte_memcpy(). > > I can't think of any other solution for now, so OK to go with this patc= h for > > now. Please find below comment. > >=20 > >> > >> Cc: stable@dpdk.org > >> > >> Signed-off-by: Yongseok Koh > >> --- > >> config/x86/meson.build | 5 +++++ > >> mk/rte.cpuflags.mk | 5 +++++ > >> 2 files changed, 10 insertions(+) > >> > >> diff --git a/config/x86/meson.build b/config/x86/meson.build > >> index 33efb5e547..e10ba872ac 100644 > >> --- a/config/x86/meson.build > >> +++ b/config/x86/meson.build > >> @@ -47,6 +47,11 @@ endif > >> if cc.get_define('__AVX512F__', args: march_opt) !=3D '' > >> dpdk_conf.set('RTE_MACHINE_CPUFLAG_AVX512F', 1) > >> compile_time_cpuflags +=3D ['RTE_CPUFLAG_AVX512F'] > >> +else > >> +# disable compiler's AVX512F support as a workaround for Bug 97 > >> + if cc.has_argument('-mavx512f') > >> + machine_args +=3D '-mno-avx512f' > >> + endif > >> endif > >> =20 > >> dpdk_conf.set('RTE_CACHE_LINE_SIZE', 64) > >> diff --git a/mk/rte.cpuflags.mk b/mk/rte.cpuflags.mk > >> index 43ed84155b..8fdb0cc2c3 100644 > >> --- a/mk/rte.cpuflags.mk > >> +++ b/mk/rte.cpuflags.mk > >> @@ -68,6 +68,11 @@ endif > >> ifneq ($(filter $(AUTO_CPUFLAGS),__AVX512F__),) > >> ifeq ($(CONFIG_RTE_ENABLE_AVX512),y) > >> CPUFLAGS +=3D AVX512F > >> +else > >> +# disable compiler's AVX512F support as a workaround for Bug 97 > >> +ifeq ($(shell $(CC) --target-help | grep -q mavx512f && echo 1), 1) > >=20 > > This will not work for ICC, and do we need this? AUTO_CPUFLAGS already = should > > have what you are looking for, so I think this check can be removed. This is different from AUTO_CPUFLAGS as it tries to check compiler flag sup= port. And per your question, I have only tested it with gcc, so I agree on applyi= ng it only for gcc. Will submit v2. But, I don't think we need to check gcc versi= on as there's no fix reported yet in a newer gcc version and this patch would hav= e very limited impact. avx512f support is quite new and kinda experimental so far. Dropping a bit of performance would be better than crash. :-) Thanks for your review, Yongseok > >> +MACHINE_CFLAGS +=3D -mno-avx512f > >> +endif > >> endif > >> endif > >> =20 > >> > >=20 >=20