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Mon, 5 Nov 2018 13:41:33 +0000 From: Jerin Jacob To: Thomas Monjalon CC: Honnappa Nagarahalli , "stable@dpdk.org" , "Gavin Hu (Arm Technology China)" , Bruce Richardson , "dev@dpdk.org" , "stephen@networkplumber.org" , "olivier.matz@6wind.com" , "chaozhu@linux.vnet.ibm.com" , "konstantin.ananyev@intel.com" , nd , "hemant.agrawal@nxp.com" , "shreyansh.jain@nxp.com" Thread-Topic: [dpdk-stable] [PATCH v5 2/2] ring: move the atomic load of head above the loop Thread-Index: AQHUcp49h/bTcwT3A0WOdl7oFN9AOqU8XWEAgADj64CAAIpVAIADYu2AgAAGp4A= Date: Mon, 5 Nov 2018 13:41:33 +0000 Message-ID: <20181105134114.GA4270@jerin> References: <1541066031-29125-1-git-send-email-gavin.hu@arm.com> <1825633.NNxUzH26Cz@xps> In-Reply-To: <1825633.NNxUzH26Cz@xps> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [115.113.156.3] x-clientproxiedby: BM1PR0101CA0009.INDPRD01.PROD.OUTLOOK.COM (2603:1096:b00:18::19) To BYAPR07MB4997.namprd07.prod.outlook.com (2603:10b6:a03:5b::22) authentication-results: spf=none (sender IP is ) smtp.mailfrom=Jerin.JacobKollanukkaran@cavium.com; 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DIR:OUT; SFP:1101; SCL:1; SRVR:BYAPR07MB5160; H:BYAPR07MB4997.namprd07.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: cavium.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: c0Wl7zS5Hi09VkiGlTAZt/WgPgu6QhtN8VisYlXTVedaGJF9tiB3flFNBkh/NMQCWIDt0yQ56bzgGcmPe8Z3rQKPOcsPbUdeDuGCd7t9V3VK4oiQa46dRAZ8lVuHUdoFV6JjLfJ09BgzJ0h0blV0ooN6d0/Jw6Q+X7Yy4Mor9dNCCvbfcOrIUTJck+ubhPSke5q6EezhdhEGa/rqYciLlBH9tryy59P0fbQUpPJ+0l9wr4Od6Bx/MZQCXQ+Dm6+s9vkwM3qHYgF/eseylpMLR4YxrIHFMlrE6Lam1iIBpxfrq0AxfYHu5ymiGF7XMoxBJEi6G6flKFUJ2LyAiL4YB8YPWoYbagZMPCQ+UZJ99VM= spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM Content-Type: text/plain; charset="us-ascii" Content-ID: <291E6DAB55DB6C4FB6257F97EAE85910@namprd07.prod.outlook.com> Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: caviumnetworks.com X-MS-Exchange-CrossTenant-Network-Message-Id: 61e67b57-0965-4f1e-7853-08d6432465a8 X-MS-Exchange-CrossTenant-originalarrivaltime: 05 Nov 2018 13:41:33.0432 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 711e4ccf-2e9b-4bcf-a551-4094005b6194 X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR07MB5160 Subject: Re: [dpdk-stable] [PATCH v5 2/2] ring: move the atomic load of head above the loop X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 05 Nov 2018 13:41:35 -0000 -----Original Message----- > Date: Mon, 05 Nov 2018 14:17:27 +0100 > From: Thomas Monjalon > To: Honnappa Nagarahalli > Cc: stable@dpdk.org, "Gavin Hu (Arm Technology China)" = , > Bruce Richardson , "dev@dpdk.org" > , "stephen@networkplumber.org" , > "olivier.matz@6wind.com" , > "chaozhu@linux.vnet.ibm.com" , > "konstantin.ananyev@intel.com" , > "jerin.jacob@caviumnetworks.com" , nd > , hemant.agrawal@nxp.com, shreyansh.jain@nxp.com > Subject: Re: [dpdk-stable] [PATCH v5 2/2] ring: move the atomic load of > head above the loop >=20 > External Email >=20 > 03/11/2018 10:34, Honnappa Nagarahalli: > > > > > --- > > > > > doc/guides/rel_notes/release_18_11.rst | 7 +++++++ > > > > > lib/librte_ring/rte_ring_c11_mem.h | 10 ++++------ > > > > > 2 files changed, 11 insertions(+), 6 deletions(-) > > > > > > > > > > diff --git a/doc/guides/rel_notes/release_18_11.rst > > > > > b/doc/guides/rel_notes/release_18_11.rst > > > > > index 376128f..b68afab 100644 > > > > > --- a/doc/guides/rel_notes/release_18_11.rst > > > > > +++ b/doc/guides/rel_notes/release_18_11.rst > > > > > @@ -69,6 +69,13 @@ New Features > > > > > checked out against that dma mask and rejected if out of range= . > > > > > If more > > > > than > > > > > one device has addressing limitations, the dma mask is the mor= e > > > > restricted one. > > > > > > > > > > +* **Updated the ring library with C11 memory model.** > > > > > + > > > > > + Updated the ring library with C11 memory model, in our tests t= he > > > > > + changes decreased latency by 27~29% and 3~15% for MPMC and SPS= C > > > > cases respectively. > > > > > + The real improvements may vary with the number of contending > > > > > + lcores and the size of ring. > > > > > + > > > > Is this a little misleading, and will users expect massive performa= nce > > > > improvements generally? The C11 model seems to be used only on some= , > > > > but not all, arm platforms, and then only with "make" builds. > > > > > > > > config/arm/meson.build: ['RTE_USE_C11_MEM_MODEL', false]] > > This is an error. There is already an agreement that on Arm based platf= orms, C11 memory model would be used by default. Specific platforms can ove= rride it if required. > > Would this be ab acceptable change for RC2 or RC3? >=20 > If NXP and Cavium agrees, I think it can go in RC2. Yes. meson and make config should be same. i.e on Arm based platforms, C11 memory model would be used by default. Specific platforms can override it if required. I think, meson config needs to be updated to be inline with make config. > For RC3, not sure. >=20 >=20 >=20