[dpdk-stable] patch 'net/qede/base: fix MFW FLR flow' has been queued to stable release 18.08.1

[Kevin Traynor <ktraynor@redhat.com>]

Hi,

FYI, your patch has been queued to stable release 18.08.1

Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 11/23/18. So please
shout if anyone has objections.

Also note that after the patch there's a diff of the upstream commit vs the patch applied
to the branch. If the code is different (ie: not only metadata diffs), due for example to
a change in context or macro names, please double check it.

Thanks.

Kevin Traynor

---
>From 0e58b87629c613cb43d32c7395ca1b0d5ef352b3 Mon Sep 17 00:00:00 2001
From: Shahed Shaikh <shahed.shaikh@cavium.com>
Date: Sat, 8 Sep 2018 13:31:05 -0700
Subject: [PATCH] net/qede/base: fix MFW FLR flow

[ upstream commit 797ce8eec7c1b9e37dd9398403e9bc888cca0013 ]

Management firmware does not properly clean IGU block in PF FLR flow
which may result in undelivered attentions for link events from
default status block.
Add a workaround in PMD to execute extra IGU cleanup right after PF FLR
is done.

Fixes: 9e2f08a4ad5f ("net/qede/base: add request for PF FLR before load request")

Signed-off-by: Shahed Shaikh <shahed.shaikh@cavium.com>
---
 drivers/net/qede/base/ecore_dev.c  |  7 +++++++
 drivers/net/qede/base/ecore_int.c  | 32 ++++++++++++++++++++++++++++++
 drivers/net/qede/base/ecore_int.h  |  1 +
 drivers/net/qede/base/mcp_public.h |  2 ++
 drivers/net/qede/base/reg_addr.h   | 15 ++++++++++++++
 5 files changed, 57 insertions(+)

diff --git a/drivers/net/qede/base/ecore_dev.c b/drivers/net/qede/base/ecore_dev.c
index d43c12b86..82454dd49 100644
--- a/drivers/net/qede/base/ecore_dev.c
+++ b/drivers/net/qede/base/ecore_dev.c
@@ -4238,4 +4238,11 @@ ecore_hw_prepare_single(struct ecore_hwfn *p_hwfn,
 		if (rc != ECORE_SUCCESS)
 			DP_NOTICE(p_hwfn, false, "Failed to initiate PF FLR\n");
+
+		/* Workaround for MFW issue where PF FLR does not cleanup
+		 * IGU block
+		 */
+		if (!(p_hwfn->mcp_info->capabilities &
+		      FW_MB_PARAM_FEATURE_SUPPORT_IGU_CLEANUP))
+			ecore_pf_flr_igu_cleanup(p_hwfn);
 	}
 
diff --git a/drivers/net/qede/base/ecore_int.c b/drivers/net/qede/base/ecore_int.c
index 4c271d358..d41107d49 100644
--- a/drivers/net/qede/base/ecore_int.c
+++ b/drivers/net/qede/base/ecore_int.c
@@ -2682,2 +2682,34 @@ enum _ecore_status_t ecore_int_get_sb_dbg(struct ecore_hwfn *p_hwfn,
 	return ECORE_SUCCESS;
 }
+
+void ecore_pf_flr_igu_cleanup(struct ecore_hwfn *p_hwfn)
+{
+	struct ecore_ptt *p_ptt = p_hwfn->p_main_ptt;
+	struct ecore_ptt *p_dpc_ptt = ecore_get_reserved_ptt(p_hwfn,
+							     RESERVED_PTT_DPC);
+	int i;
+
+	/* Do not reorder the following cleanup sequence */
+	/* Ack all attentions */
+	ecore_wr(p_hwfn, p_ptt, IGU_REG_ATTENTION_ACK_BITS, 0xfff);
+
+	/* Clear driver attention */
+	ecore_wr(p_hwfn,  p_dpc_ptt,
+		((p_hwfn->rel_pf_id << 3) + MISC_REG_AEU_GENERAL_ATTN_0), 0);
+
+	/* Clear per-PF IGU registers to restore them as if the IGU
+	 * was reset for this PF
+	 */
+	ecore_wr(p_hwfn, p_ptt, IGU_REG_LEADING_EDGE_LATCH, 0);
+	ecore_wr(p_hwfn, p_ptt, IGU_REG_TRAILING_EDGE_LATCH, 0);
+	ecore_wr(p_hwfn, p_ptt, IGU_REG_PF_CONFIGURATION, 0);
+
+	/* Execute IGU clean up*/
+	ecore_wr(p_hwfn, p_ptt, IGU_REG_PF_FUNCTIONAL_CLEANUP, 1);
+
+	/* Clear Stats */
+	ecore_wr(p_hwfn, p_ptt, IGU_REG_STATISTIC_NUM_OF_INTA_ASSERTED, 0);
+
+	for (i = 0; i < IGU_REG_PBA_STS_PF_SIZE; i++)
+		ecore_wr(p_hwfn, p_ptt, IGU_REG_PBA_STS_PF + i * 4, 0);
+}
diff --git a/drivers/net/qede/base/ecore_int.h b/drivers/net/qede/base/ecore_int.h
index 041240d7b..ff2310cff 100644
--- a/drivers/net/qede/base/ecore_int.h
+++ b/drivers/net/qede/base/ecore_int.h
@@ -257,4 +257,5 @@ enum _ecore_status_t ecore_pglueb_rbc_attn_handler(struct ecore_hwfn *p_hwfn,
 						   struct ecore_ptt *p_ptt,
 						   bool is_hw_init);
+void ecore_pf_flr_igu_cleanup(struct ecore_hwfn *p_hwfn);
 
 #endif /* __ECORE_INT_H__ */
diff --git a/drivers/net/qede/base/mcp_public.h b/drivers/net/qede/base/mcp_public.h
index 79d9aaef3..7c72a963c 100644
--- a/drivers/net/qede/base/mcp_public.h
+++ b/drivers/net/qede/base/mcp_public.h
@@ -1780,4 +1780,6 @@ struct public_drv_mb {
 /* MFW supports DRV_LOAD Timeout */
 #define FW_MB_PARAM_FEATURE_SUPPORT_DRV_LOAD_TO  0x00000004
+/* MFW support complete IGU cleanup upon FLR */
+#define FW_MB_PARAM_FEATURE_SUPPORT_IGU_CLEANUP	0x00000080
 /* MFW supports virtual link */
 #define FW_MB_PARAM_FEATURE_SUPPORT_VLINK       0x00010000
diff --git a/drivers/net/qede/base/reg_addr.h b/drivers/net/qede/base/reg_addr.h
index 7ed26fcce..b82ccc1cd 100644
--- a/drivers/net/qede/base/reg_addr.h
+++ b/drivers/net/qede/base/reg_addr.h
@@ -323,4 +323,19 @@
 #define  IGU_REG_ATTN_MSG_ADDR_H	\
 	0x180824UL
+#define IGU_REG_LEADING_EDGE_LATCH \
+	0x18082cUL
+#define IGU_REG_TRAILING_EDGE_LATCH \
+	0x180830UL
+#define IGU_REG_ATTENTION_ACK_BITS \
+	0x180838UL
+#define IGU_REG_PBA_STS_PF \
+	0x180d20UL
+#define IGU_REG_PF_FUNCTIONAL_CLEANUP \
+	0x181210UL
+#define IGU_REG_STATISTIC_NUM_OF_INTA_ASSERTED \
+	0x18042cUL
+#define IGU_REG_PBA_STS_PF_SIZE 5
+#define IGU_REG_PBA_STS_PF \
+	0x180d20UL
 #define  MISC_REG_AEU_GENERAL_ATTN_0 \
 	0x008400UL
-- 
2.19.0

---
  Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- -	2018-11-20 17:53:08.799914168 +0000
+++ 0056-net-qede-base-fix-MFW-FLR-flow.patch	2018-11-20 17:53:07.000000000 +0000
@@ -1,8 +1,10 @@
-From 797ce8eec7c1b9e37dd9398403e9bc888cca0013 Mon Sep 17 00:00:00 2001
+From 0e58b87629c613cb43d32c7395ca1b0d5ef352b3 Mon Sep 17 00:00:00 2001
 From: Shahed Shaikh <shahed.shaikh@cavium.com>
 Date: Sat, 8 Sep 2018 13:31:05 -0700
 Subject: [PATCH] net/qede/base: fix MFW FLR flow
 
+[ upstream commit 797ce8eec7c1b9e37dd9398403e9bc888cca0013 ]
+
 Management firmware does not properly clean IGU block in PF FLR flow
 which may result in undelivered attentions for link events from
 default status block.
@@ -10,7 +12,6 @@
 is done.
 
 Fixes: 9e2f08a4ad5f ("net/qede/base: add request for PF FLR before load request")
-Cc: stable@dpdk.org
 
 Signed-off-by: Shahed Shaikh <shahed.shaikh@cavium.com>
 ---
@@ -22,10 +23,10 @@
  5 files changed, 57 insertions(+)
 
 diff --git a/drivers/net/qede/base/ecore_dev.c b/drivers/net/qede/base/ecore_dev.c
-index fdb62f232..d91fe2747 100644
+index d43c12b86..82454dd49 100644
 --- a/drivers/net/qede/base/ecore_dev.c
 +++ b/drivers/net/qede/base/ecore_dev.c
-@@ -4273,4 +4273,11 @@ ecore_hw_prepare_single(struct ecore_hwfn *p_hwfn,
+@@ -4238,4 +4238,11 @@ ecore_hw_prepare_single(struct ecore_hwfn *p_hwfn,
  		if (rc != ECORE_SUCCESS)
  			DP_NOTICE(p_hwfn, false, "Failed to initiate PF FLR\n");
 +
@@ -87,10 +88,10 @@
  
  #endif /* __ECORE_INT_H__ */
 diff --git a/drivers/net/qede/base/mcp_public.h b/drivers/net/qede/base/mcp_public.h
-index e9f335096..2ee8ab538 100644
+index 79d9aaef3..7c72a963c 100644
 --- a/drivers/net/qede/base/mcp_public.h
 +++ b/drivers/net/qede/base/mcp_public.h
-@@ -1798,4 +1798,6 @@ struct public_drv_mb {
+@@ -1780,4 +1780,6 @@ struct public_drv_mb {
  /* MFW supports DRV_LOAD Timeout */
  #define FW_MB_PARAM_FEATURE_SUPPORT_DRV_LOAD_TO  0x00000004
 +/* MFW support complete IGU cleanup upon FLR */