From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id BD99AA04FE for ; Tue, 14 Jan 2020 01:39:41 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 9ECCD1C1F1; Tue, 14 Jan 2020 01:39:41 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by dpdk.org (Postfix) with ESMTP id 0FC5D1C1CB; Tue, 14 Jan 2020 01:39:38 +0100 (CET) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 00E0Qg7l020730; Mon, 13 Jan 2020 16:39:38 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : mime-version : content-type; s=pfpt0818; bh=A1DkO320kLCFA+ZW59RmSQXxO0ih0ORnNbuJdSW+uvM=; b=ljcTaoDSbufTPQ415uTnl7maSK3pmDwkDYaST5RgGtyMl8vXllhk8NdMBX9ZJw/d1hC9 JRFrikjVIsi1FCJmRCYrHZVWv3ZwLSEy15Gbwy/pY8cE3trp19gN3pS3rWuDuVYCMSYj Hpk1hXdZdZ0l22Lj8mySP2Qu4nQB+mG4p/RVgPNJS+mZfVDsOLV9S6bGPuQUKNnaapye rYMho+dwODTygq2VH4noDgnzd8zclh0wqVUNLplptCk3ZqTE8iqN+6ko7NxwX+Y7SrAy W6mxz4pD4L7+qz+D7zvegZPj0JAEACys0kGkHXQy1j3T0z4qCDQXMlNz0kktMg0/akjx yA== Received: from sc-exch04.marvell.com ([199.233.58.184]) by mx0a-0016f401.pphosted.com with ESMTP id 2xfckur0e1-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Mon, 13 Jan 2020 16:39:38 -0800 Received: from SC-EXCH01.marvell.com (10.93.176.81) by SC-EXCH04.marvell.com (10.93.176.84) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 13 Jan 2020 16:39:36 -0800 Received: from maili.marvell.com (10.93.176.43) by SC-EXCH01.marvell.com (10.93.176.81) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 13 Jan 2020 16:39:36 -0800 Received: from irv1user08.caveonetworks.com (unknown [10.104.116.105]) by maili.marvell.com (Postfix) with ESMTP id 9A1943F703F; Mon, 13 Jan 2020 16:39:36 -0800 (PST) Received: (from rmody@localhost) by irv1user08.caveonetworks.com (8.14.4/8.14.4/Submit) id 00E0daPa017774; Mon, 13 Jan 2020 16:39:36 -0800 X-Authentication-Warning: irv1user08.caveonetworks.com: rmody set sender to rmody@marvell.com using -f From: Rasesh Mody To: , , CC: Rasesh Mody , , Date: Mon, 13 Jan 2020 16:39:18 -0800 Message-ID: <20200114003920.17705-1-rmody@marvell.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 Content-Type: text/plain X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138, 18.0.572 definitions=2020-01-13_08:2020-01-13, 2020-01-13 signatures=0 Subject: [dpdk-stable] [PATCH 1/3] net/bnx2x: fix to use required mem barriers in Rx path X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Sender: "stable" When handling RX completion queue PMD is not using required read/write barriers before reading completion queue element (CQE) indices, updating/writing hardware consumer and producer. This patch adds appropriate read/write memory barriers in places which are required by driver and adapter to read or update indices. Fixes: 540a211084a7 ("bnx2x: driver core") Cc: stable@dpdk.org Signed-off-by: Rasesh Mody --- drivers/net/bnx2x/bnx2x.c | 5 +++++ drivers/net/bnx2x/bnx2x_rxtx.c | 22 ++++++++++++++++++++++ 2 files changed, 27 insertions(+) diff --git a/drivers/net/bnx2x/bnx2x.c b/drivers/net/bnx2x/bnx2x.c index ed31335ac..9c5e7995d 100644 --- a/drivers/net/bnx2x/bnx2x.c +++ b/drivers/net/bnx2x/bnx2x.c @@ -1255,6 +1255,11 @@ static uint8_t bnx2x_rxeof(struct bnx2x_softc *sc, struct bnx2x_fastpath *fp) return 0; } + /* Add memory barrier as status block fields can change. This memory + * barrier will flush out all the read/write operations to status block + * generated before the barrier. It will ensure stale data is not read + */ + mb(); /* CQ "next element" is of the size of the regular element */ hw_cq_cons = le16toh(*fp->rx_cq_cons_sb); if (unlikely((hw_cq_cons & USABLE_RCQ_ENTRIES_PER_PAGE) == diff --git a/drivers/net/bnx2x/bnx2x_rxtx.c b/drivers/net/bnx2x/bnx2x_rxtx.c index ae97dfee3..b52f023ea 100644 --- a/drivers/net/bnx2x/bnx2x_rxtx.c +++ b/drivers/net/bnx2x/bnx2x_rxtx.c @@ -324,11 +324,22 @@ bnx2x_upd_rx_prod_fast(struct bnx2x_softc *sc, struct bnx2x_fastpath *fp, struct ustorm_eth_rx_producers rx_prods = { 0 }; uint32_t *val = NULL; + /* Update producers */ rx_prods.bd_prod = rx_bd_prod; rx_prods.cqe_prod = rx_cq_prod; + /* + * Make sure that the BD and SGE data is updated before updating the + * producers since FW might read the BD/SGE right after the producer + * is updated. + * The following barrier is also mandatory since FW will assumes BDs + * must have buffers. + */ + wmb(); val = (uint32_t *)&rx_prods; REG_WR(sc, fp->ustorm_rx_prods_offset, val[0]); + + wmb(); /* keep prod updates ordered */ } static uint16_t @@ -346,6 +357,11 @@ bnx2x_recv_pkts(void *p_rxq, struct rte_mbuf **rx_pkts, uint16_t nb_pkts) uint16_t len, pad; struct rte_mbuf *rx_mb = NULL; + /* Add memory barrier as status block fields can change. This memory + * barrier will flush out all the read/write operations to status block + * generated before the barrier. It will ensure stale data is not read + */ + mb(); hw_cq_cons = le16toh(*fp->rx_cq_cons_sb); if ((hw_cq_cons & USABLE_RCQ_ENTRIES_PER_PAGE) == USABLE_RCQ_ENTRIES_PER_PAGE) { @@ -357,6 +373,12 @@ bnx2x_recv_pkts(void *p_rxq, struct rte_mbuf **rx_pkts, uint16_t nb_pkts) sw_cq_cons = rxq->rx_cq_head; sw_cq_prod = rxq->rx_cq_tail; + /* + * Memory barrier necessary as speculative reads of the Rx + * buffer can be ahead of the index in the status block + */ + rmb(); + if (sw_cq_cons == hw_cq_cons) return 0; -- 2.18.0