From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 30E40A055A for ; Thu, 27 Feb 2020 10:35:29 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 1F4C21BFF7; Thu, 27 Feb 2020 10:35:29 +0100 (CET) Received: from mail-wm1-f68.google.com (mail-wm1-f68.google.com [209.85.128.68]) by dpdk.org (Postfix) with ESMTP id 9CE681BFF3 for ; Thu, 27 Feb 2020 10:35:27 +0100 (CET) Received: by mail-wm1-f68.google.com with SMTP id a141so2554210wme.2 for ; Thu, 27 Feb 2020 01:35:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=RhqDR0+1ViE/k2SUr9KVbjDeSfbrILLbbTdbhCt56Rw=; b=iizPG2tDzy28z5I2OtxTEUejQE0ztrAmKEeNgeTLoK5kLEUtY5LZeoFOpja5ZGOvQ3 wdxHNUgUwoi08QkV5L0I/hv7Fc353LiTKmnKG8RwSdPnw05dGx3+o6k3w05YelYKjfkY r594EkfwWWsSWrWkUsLe5zBgUfqfGtL0572K1tflY0+t8MOlPS5AZNiJgjDwovlv2gVx tgprT1HUXUW/7ocD57M9fyLAICac1cOib+dfxQaOmEbqEaYeeIytYR8X+9So2GgySssv bsaeUAUEKbAfCDmnuuQ1KxdXfF6LnHMR+R+18TZmhSIvsekzOo3fpIuT1j5TumqC52CJ g4IQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=RhqDR0+1ViE/k2SUr9KVbjDeSfbrILLbbTdbhCt56Rw=; b=LgRFzpq5t5YM2vb1cC4OZCBowpmHTGocDQSd3ycYCSB5xmifltwfyVciuR7Ios1tVI nwBH6UWcRW8f81EUD5VCUq5G7L01kFLzJnP3jWgdUPgzetViqC1/dAIMw05tdMgUQeR3 NTWe04jSdBVdjeCFHzsSMP2VzNciEin8VPfN51VAVYpf3kIpN6y6agdg7BkRPZVVE3o+ 3XEP5d8R990fGlA5VpPtn/YJnBY0BonkSjhM6JRgvUeqFr86iOPxZXhzh5ND+n+2PLYZ 2vl7FOjIwDLNruOex3lYakZ8WDAtrI+a/VMTXUPzMh3jWhxZjgms7iKnsLk+/6yGurFS m1/A== X-Gm-Message-State: APjAAAW2rh+JuHcdBMTabi2qf4BpWwXm1ydToXAhwIsWEq/gc4J87X6W ztCB+7CRW9oEz1K2tyCc95w= X-Google-Smtp-Source: APXvYqy+8N9YW/Kmw3GZCHOmP4qcxhk8LbOnlLBw7Jx6TJCUi0VIxe7O9iHeUKZSdSp9WHpYgfGGJQ== X-Received: by 2002:a7b:ce16:: with SMTP id m22mr2932855wmc.139.1582796127337; Thu, 27 Feb 2020 01:35:27 -0800 (PST) Received: from localhost ([88.98.246.218]) by smtp.gmail.com with ESMTPSA id r3sm7218903wrn.34.2020.02.27.01.35.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Feb 2020 01:35:26 -0800 (PST) From: luca.boccassi@gmail.com To: Dekel Peled Cc: Matan Azrad , Raslan Darawsheh , dpdk stable Date: Thu, 27 Feb 2020 09:33:51 +0000 Message-Id: <20200227093402.17690-31-luca.boccassi@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200227093402.17690-1-luca.boccassi@gmail.com> References: <20200217174546.25334-54-luca.boccassi@gmail.com> <20200227093402.17690-1-luca.boccassi@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [dpdk-stable] patch 'net/mlx5: fix match on ethertype and CVLAN tag' has been queued to stable release 19.11.1 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Sender: "stable" Hi, FYI, your patch has been queued to stable release 19.11.1 Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet. It will be pushed if I get no objections before 02/29/20. So please shout if anyone has objections. Also note that after the patch there's a diff of the upstream commit vs the patch applied to the branch. This will indicate if there was any rebasing needed to apply to the stable branch. If there were code changes for rebasing (ie: not only metadata diffs), please double check that the rebase was correctly done. Thanks. Luca Boccassi --- >From ee0179dbc7c20d6367a3dbafb193665c2ffe8eb4 Mon Sep 17 00:00:00 2001 From: Dekel Peled Date: Thu, 20 Feb 2020 13:33:25 +0200 Subject: [PATCH] net/mlx5: fix match on ethertype and CVLAN tag [ upstream commit 797329d6c4a1d054a6fce38c960811cb7878283d ] HW supports match on one Ethertype, the Ethertype following the last VLAN tag of the packet (see PRM). Previous patch added specific handling for packets with VLAN tag, after setting match on Ethertype. This patch moves the handling of packets with VLAN tag, to be done before and instead of setting match on Ethertype. Previous patch also added, as part of specific handling for packets with VLAN tag, the setting of cvlan_tag mask bit in translation of L3 items. In case of L3 tunnel there is no inner L2 header, so setting this mask bit is wrong and causes match failures. This patch adds check to make sure L2 header exists before setting cvlan_tag mask bit for L3 items. Fixes: 00f75a40576b ("net/mlx5: fix VLAN match for DV mode") Signed-off-by: Dekel Peled Acked-by: Matan Azrad Tested-by: Raslan Darawsheh --- drivers/net/mlx5/mlx5_flow_dv.c | 42 ++++++++++++++++++++++++++------- 1 file changed, 33 insertions(+), 9 deletions(-) diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c index e06892b530..6d2e1318ba 100644 --- a/drivers/net/mlx5/mlx5_flow_dv.c +++ b/drivers/net/mlx5/mlx5_flow_dv.c @@ -5057,19 +5057,27 @@ flow_dv_translate_item_eth(void *matcher, void *key, /* The value must be in the range of the mask. */ for (i = 0; i < sizeof(eth_m->dst); ++i) l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i]; - MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype, - rte_be_to_cpu_16(eth_m->type)); - l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, ethertype); - *(uint16_t *)(l24_v) = eth_m->type & eth_v->type; if (eth_v->type) { /* When ethertype is present set mask for tagged VLAN. */ MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1); /* Set value for tagged VLAN if ethertype is 802.1Q. */ if (eth_v->type == RTE_BE16(RTE_ETHER_TYPE_VLAN) || - eth_v->type == RTE_BE16(RTE_ETHER_TYPE_QINQ)) + eth_v->type == RTE_BE16(RTE_ETHER_TYPE_QINQ)) { MLX5_SET(fte_match_set_lyr_2_4, headers_v, cvlan_tag, 1); + /* Return here to avoid setting match on ethertype. */ + return; + } } + /* + * HW supports match on one Ethertype, the Ethertype following the last + * VLAN tag of the packet (see PRM). + * Set match on ethertype only if ETH header is not followed by VLAN. + */ + MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype, + rte_be_to_cpu_16(eth_m->type)); + l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, ethertype); + *(uint16_t *)(l24_v) = eth_m->type & eth_v->type; } /** @@ -5143,6 +5151,8 @@ flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow, * Flow matcher value. * @param[in] item * Flow pattern to translate. + * @param[in] item_flags + * Bit-fields that holds the items detected until now. * @param[in] inner * Item is inner pattern. * @param[in] group @@ -5151,6 +5161,7 @@ flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow, static void flow_dv_translate_item_ipv4(void *matcher, void *key, const struct rte_flow_item *item, + const uint64_t item_flags, int inner, uint32_t group) { const struct rte_flow_item_ipv4 *ipv4_m = item->mask; @@ -5210,7 +5221,12 @@ flow_dv_translate_item_ipv4(void *matcher, void *key, ipv4_m->hdr.next_proto_id); MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id); - MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1); + /* + * On outer header (which must contains L2), or inner header with L2, + * set cvlan_tag mask bit to mark this packet as untagged. + */ + if (!inner || item_flags & MLX5_FLOW_LAYER_INNER_L2) + MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1); } /** @@ -5222,6 +5238,8 @@ flow_dv_translate_item_ipv4(void *matcher, void *key, * Flow matcher value. * @param[in] item * Flow pattern to translate. + * @param[in] item_flags + * Bit-fields that holds the items detected until now. * @param[in] inner * Item is inner pattern. * @param[in] group @@ -5230,6 +5248,7 @@ flow_dv_translate_item_ipv4(void *matcher, void *key, static void flow_dv_translate_item_ipv6(void *matcher, void *key, const struct rte_flow_item *item, + const uint64_t item_flags, int inner, uint32_t group) { const struct rte_flow_item_ipv6 *ipv6_m = item->mask; @@ -5315,7 +5334,12 @@ flow_dv_translate_item_ipv6(void *matcher, void *key, ipv6_m->hdr.proto); MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, ipv6_v->hdr.proto & ipv6_m->hdr.proto); - MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1); + /* + * On outer header (which must contains L2), or inner header with L2, + * set cvlan_tag mask bit to mark this packet as untagged. + */ + if (!inner || item_flags & MLX5_FLOW_LAYER_INNER_L2) + MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1); } /** @@ -7299,7 +7323,7 @@ cnt_err: mlx5_flow_tunnel_ip_check(items, next_protocol, &item_flags, &tunnel); flow_dv_translate_item_ipv4(match_mask, match_value, - items, tunnel, + items, item_flags, tunnel, dev_flow->group); matcher.priority = MLX5_PRIORITY_MAP_L3; dev_flow->hash_fields |= @@ -7327,7 +7351,7 @@ cnt_err: mlx5_flow_tunnel_ip_check(items, next_protocol, &item_flags, &tunnel); flow_dv_translate_item_ipv6(match_mask, match_value, - items, tunnel, + items, item_flags, tunnel, dev_flow->group); matcher.priority = MLX5_PRIORITY_MAP_L3; dev_flow->hash_fields |= -- 2.20.1 --- Diff of the applied patch vs upstream commit (please double-check if non-empty: --- --- - 2020-02-27 09:31:56.834344429 +0000 +++ 0031-net-mlx5-fix-match-on-ethertype-and-CVLAN-tag.patch 2020-02-27 09:31:55.803946372 +0000 @@ -1,8 +1,10 @@ -From 797329d6c4a1d054a6fce38c960811cb7878283d Mon Sep 17 00:00:00 2001 +From ee0179dbc7c20d6367a3dbafb193665c2ffe8eb4 Mon Sep 17 00:00:00 2001 From: Dekel Peled Date: Thu, 20 Feb 2020 13:33:25 +0200 Subject: [PATCH] net/mlx5: fix match on ethertype and CVLAN tag +[ upstream commit 797329d6c4a1d054a6fce38c960811cb7878283d ] + HW supports match on one Ethertype, the Ethertype following the last VLAN tag of the packet (see PRM). Previous patch added specific handling for packets with VLAN tag, @@ -21,7 +23,6 @@ cvlan_tag mask bit for L3 items. Fixes: 00f75a40576b ("net/mlx5: fix VLAN match for DV mode") -Cc: stable@dpdk.org Signed-off-by: Dekel Peled Acked-by: Matan Azrad @@ -31,10 +32,10 @@ 1 file changed, 33 insertions(+), 9 deletions(-) diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c -index 3c6d90e349..06592b5340 100644 +index e06892b530..6d2e1318ba 100644 --- a/drivers/net/mlx5/mlx5_flow_dv.c +++ b/drivers/net/mlx5/mlx5_flow_dv.c -@@ -5306,19 +5306,27 @@ flow_dv_translate_item_eth(void *matcher, void *key, +@@ -5057,19 +5057,27 @@ flow_dv_translate_item_eth(void *matcher, void *key, /* The value must be in the range of the mask. */ for (i = 0; i < sizeof(eth_m->dst); ++i) l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i]; @@ -67,7 +68,7 @@ } /** -@@ -5392,6 +5400,8 @@ flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow, +@@ -5143,6 +5151,8 @@ flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow, * Flow matcher value. * @param[in] item * Flow pattern to translate. @@ -76,7 +77,7 @@ * @param[in] inner * Item is inner pattern. * @param[in] group -@@ -5400,6 +5410,7 @@ flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow, +@@ -5151,6 +5161,7 @@ flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow, static void flow_dv_translate_item_ipv4(void *matcher, void *key, const struct rte_flow_item *item, @@ -84,7 +85,7 @@ int inner, uint32_t group) { const struct rte_flow_item_ipv4 *ipv4_m = item->mask; -@@ -5459,7 +5470,12 @@ flow_dv_translate_item_ipv4(void *matcher, void *key, +@@ -5210,7 +5221,12 @@ flow_dv_translate_item_ipv4(void *matcher, void *key, ipv4_m->hdr.next_proto_id); MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id); @@ -98,7 +99,7 @@ } /** -@@ -5471,6 +5487,8 @@ flow_dv_translate_item_ipv4(void *matcher, void *key, +@@ -5222,6 +5238,8 @@ flow_dv_translate_item_ipv4(void *matcher, void *key, * Flow matcher value. * @param[in] item * Flow pattern to translate. @@ -107,7 +108,7 @@ * @param[in] inner * Item is inner pattern. * @param[in] group -@@ -5479,6 +5497,7 @@ flow_dv_translate_item_ipv4(void *matcher, void *key, +@@ -5230,6 +5248,7 @@ flow_dv_translate_item_ipv4(void *matcher, void *key, static void flow_dv_translate_item_ipv6(void *matcher, void *key, const struct rte_flow_item *item, @@ -115,7 +116,7 @@ int inner, uint32_t group) { const struct rte_flow_item_ipv6 *ipv6_m = item->mask; -@@ -5564,7 +5583,12 @@ flow_dv_translate_item_ipv6(void *matcher, void *key, +@@ -5315,7 +5334,12 @@ flow_dv_translate_item_ipv6(void *matcher, void *key, ipv6_m->hdr.proto); MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, ipv6_v->hdr.proto & ipv6_m->hdr.proto); @@ -129,7 +130,7 @@ } /** -@@ -7671,7 +7695,7 @@ cnt_err: +@@ -7299,7 +7323,7 @@ cnt_err: mlx5_flow_tunnel_ip_check(items, next_protocol, &item_flags, &tunnel); flow_dv_translate_item_ipv4(match_mask, match_value, @@ -137,8 +138,8 @@ + items, item_flags, tunnel, dev_flow->group); matcher.priority = MLX5_PRIORITY_MAP_L3; - last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 : -@@ -7694,7 +7718,7 @@ cnt_err: + dev_flow->hash_fields |= +@@ -7327,7 +7351,7 @@ cnt_err: mlx5_flow_tunnel_ip_check(items, next_protocol, &item_flags, &tunnel); flow_dv_translate_item_ipv6(match_mask, match_value, @@ -146,7 +147,7 @@ + items, item_flags, tunnel, dev_flow->group); matcher.priority = MLX5_PRIORITY_MAP_L3; - last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 : + dev_flow->hash_fields |= -- 2.20.1