From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 0182EA0562 for ; Tue, 31 Mar 2020 04:33:46 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id E48C42B8B; Tue, 31 Mar 2020 04:33:45 +0200 (CEST) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by dpdk.org (Postfix) with ESMTP id F30052B8B for ; Tue, 31 Mar 2020 04:33:43 +0200 (CEST) IronPort-SDR: xP/mofo5bkjBdzV4UyQHaDLDnhu6yWbhjFM1EbXotgss9fsgGIBCRiLVon9MnluRVMIy6uc4M/ 53Bo51AHMF1w== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Mar 2020 19:33:42 -0700 IronPort-SDR: 2X1/lAWWM7EXkYn03Dy0boy0Q2OwJbZtB5+Wd+UrnId90FrucL/GDvPHPVorfd5EDBKWloqCz0 HuXtj1FZzcRg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.72,326,1580803200"; d="scan'208";a="395338773" Received: from dpdk-xiaoyunl.sh.intel.com ([10.67.110.162]) by orsmga004.jf.intel.com with ESMTP; 30 Mar 2020 19:33:41 -0700 From: Xiaoyun Li To: xiaolong.ye@intel.com, stable@dpdk.org Cc: Xiaoyun Li Date: Tue, 31 Mar 2020 10:31:34 +0800 Message-Id: <20200331023134.19483-1-xiaoyun.li@intel.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Subject: [dpdk-stable] [PATCH] net/i40e/base: backport 19.11 base code to 18.11.5 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Sender: "stable" Backport 19.11 base code to 18.11.5 stable release. Signed-off-by: Xiaoyun Li --- Note: This breaks the backward compatibility for the stable trees but intendent for customers willing to get the fix to support all X722 devices with NVMe 4.10. --- drivers/net/i40e/base/README | 34 +------ drivers/net/i40e/base/i40e_adminq.c | 119 ++++++++++++++++-------- drivers/net/i40e/base/i40e_adminq_cmd.h | 55 +---------- drivers/net/i40e/base/i40e_common.c | 8 +- drivers/net/i40e/base/i40e_devids.h | 4 +- drivers/net/i40e/base/i40e_type.h | 8 +- drivers/net/i40e/base/meson.build | 6 +- drivers/net/i40e/i40e_ethdev.c | 3 + 8 files changed, 103 insertions(+), 134 deletions(-) diff --git a/drivers/net/i40e/base/README b/drivers/net/i40e/base/README index 84f191fad..8a5339cff 100644 --- a/drivers/net/i40e/base/README +++ b/drivers/net/i40e/base/README @@ -1,34 +1,6 @@ -.. - BSD LICENSE - - Copyright(c) 2017 Intel Corporation. All rights reserved. - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions - are met: - - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in - the documentation and/or other materials provided with the - distribution. - * Neither the name of Intel Corporation nor the names of its - contributors may be used to endorse or promote products derived - from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2017 Intel Corporation + */ Intel® I40E driver ================== diff --git a/drivers/net/i40e/base/i40e_adminq.c b/drivers/net/i40e/base/i40e_adminq.c index 38214a373..a0911c18e 100644 --- a/drivers/net/i40e/base/i40e_adminq.c +++ b/drivers/net/i40e/base/i40e_adminq.c @@ -569,6 +569,64 @@ STATIC void i40e_resume_aq(struct i40e_hw *hw) } #endif /* PF_DRIVER */ +/** + * i40e_set_hw_flags - set HW flags + * @hw: pointer to the hardware structure + **/ +STATIC void i40e_set_hw_flags(struct i40e_hw *hw) +{ + struct i40e_adminq_info *aq = &hw->aq; + + hw->flags = 0; + + switch (hw->mac.type) { + case I40E_MAC_XL710: + if (aq->api_maj_ver > 1 || + (aq->api_maj_ver == 1 && + aq->api_min_ver >= I40E_MINOR_VER_GET_LINK_INFO_XL710)) { + hw->flags |= I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE; + hw->flags |= I40E_HW_FLAG_FW_LLDP_STOPPABLE; + /* The ability to RX (not drop) 802.1ad frames */ + hw->flags |= I40E_HW_FLAG_802_1AD_CAPABLE; + } + break; + case I40E_MAC_X722: + hw->flags |= I40E_HW_FLAG_AQ_SRCTL_ACCESS_ENABLE | + I40E_HW_FLAG_NVM_READ_REQUIRES_LOCK; + + if (aq->api_maj_ver > 1 || + (aq->api_maj_ver == 1 && + aq->api_min_ver >= I40E_MINOR_VER_FW_LLDP_STOPPABLE_X722)) + hw->flags |= I40E_HW_FLAG_FW_LLDP_STOPPABLE; + + if (aq->api_maj_ver > 1 || + (aq->api_maj_ver == 1 && + aq->api_min_ver >= I40E_MINOR_VER_GET_LINK_INFO_X722)) + hw->flags |= I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE; + /* fall through */ + default: + break; + } + + /* Newer versions of firmware require lock when reading the NVM */ + if (aq->api_maj_ver > 1 || + (aq->api_maj_ver == 1 && + aq->api_min_ver >= 5)) + hw->flags |= I40E_HW_FLAG_NVM_READ_REQUIRES_LOCK; + + if (aq->api_maj_ver > 1 || + (aq->api_maj_ver == 1 && + aq->api_min_ver >= 8)) { + hw->flags |= I40E_HW_FLAG_FW_LLDP_PERSISTENT; + hw->flags |= I40E_HW_FLAG_DROP_MODE; + } + + if (aq->api_maj_ver > 1 || + (aq->api_maj_ver == 1 && + aq->api_min_ver >= 9)) + hw->flags |= I40E_HW_FLAG_AQ_PHY_ACCESS_EXTENDED; +} + /** * i40e_init_adminq - main initialization routine for Admin Queue * @hw: pointer to the hardware structure @@ -582,25 +640,24 @@ STATIC void i40e_resume_aq(struct i40e_hw *hw) **/ enum i40e_status_code i40e_init_adminq(struct i40e_hw *hw) { + struct i40e_adminq_info *aq = &hw->aq; + enum i40e_status_code ret_code; #ifdef PF_DRIVER u16 cfg_ptr, oem_hi, oem_lo; u16 eetrack_lo, eetrack_hi; -#endif - enum i40e_status_code ret_code; -#ifdef PF_DRIVER int retry = 0; #endif /* verify input for valid configuration */ - if ((hw->aq.num_arq_entries == 0) || - (hw->aq.num_asq_entries == 0) || - (hw->aq.arq_buf_size == 0) || - (hw->aq.asq_buf_size == 0)) { + if (aq->num_arq_entries == 0 || + aq->num_asq_entries == 0 || + aq->arq_buf_size == 0 || + aq->asq_buf_size == 0) { ret_code = I40E_ERR_CONFIG; goto init_adminq_exit; } - i40e_init_spinlock(&hw->aq.asq_spinlock); - i40e_init_spinlock(&hw->aq.arq_spinlock); + i40e_init_spinlock(&aq->asq_spinlock); + i40e_init_spinlock(&aq->arq_spinlock); /* Set up register offsets */ i40e_adminq_init_regs(hw); @@ -630,11 +687,11 @@ enum i40e_status_code i40e_init_adminq(struct i40e_hw *hw) */ do { ret_code = i40e_aq_get_firmware_version(hw, - &hw->aq.fw_maj_ver, - &hw->aq.fw_min_ver, - &hw->aq.fw_build, - &hw->aq.api_maj_ver, - &hw->aq.api_min_ver, + &aq->fw_maj_ver, + &aq->fw_min_ver, + &aq->fw_build, + &aq->api_maj_ver, + &aq->api_min_ver, NULL); if (ret_code != I40E_ERR_ADMIN_QUEUE_TIMEOUT) break; @@ -645,6 +702,12 @@ enum i40e_status_code i40e_init_adminq(struct i40e_hw *hw) if (ret_code != I40E_SUCCESS) goto init_adminq_free_arq; + /* + * Some features were introduced in different FW API version + * for different MAC type. + */ + i40e_set_hw_flags(hw); + /* get the NVM version info */ i40e_read_nvm_word(hw, I40E_SR_NVM_DEV_STARTER_VERSION, &hw->nvm.version); @@ -658,30 +721,6 @@ enum i40e_status_code i40e_init_adminq(struct i40e_hw *hw) &oem_lo); hw->nvm.oem_ver = ((u32)oem_hi << 16) | oem_lo; - /* The ability to RX (not drop) 802.1ad frames was added in API 1.7 */ - if ((hw->aq.api_maj_ver > 1) || - ((hw->aq.api_maj_ver == 1) && - (hw->aq.api_min_ver >= 7))) - hw->flags |= I40E_HW_FLAG_802_1AD_CAPABLE; - - if (hw->mac.type == I40E_MAC_XL710 && - hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR && - hw->aq.api_min_ver >= I40E_MINOR_VER_GET_LINK_INFO_XL710) { - hw->flags |= I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE; - hw->flags |= I40E_HW_FLAG_FW_LLDP_STOPPABLE; - } - if (hw->mac.type == I40E_MAC_X722 && - hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR && - hw->aq.api_min_ver >= I40E_MINOR_VER_FW_LLDP_STOPPABLE_X722) { - hw->flags |= I40E_HW_FLAG_FW_LLDP_STOPPABLE; - } - - /* Newer versions of firmware require lock when reading the NVM */ - if ((hw->aq.api_maj_ver > 1) || - ((hw->aq.api_maj_ver == 1) && - (hw->aq.api_min_ver >= 5))) - hw->flags |= I40E_HW_FLAG_NVM_READ_REQUIRES_LOCK; - if (hw->aq.api_maj_ver > I40E_FW_API_VERSION_MAJOR) { ret_code = I40E_ERR_FIRMWARE_API_VERSION; goto init_adminq_free_arq; @@ -705,8 +744,8 @@ enum i40e_status_code i40e_init_adminq(struct i40e_hw *hw) init_adminq_free_asq: i40e_shutdown_asq(hw); init_adminq_destroy_spinlocks: - i40e_destroy_spinlock(&hw->aq.asq_spinlock); - i40e_destroy_spinlock(&hw->aq.arq_spinlock); + i40e_destroy_spinlock(&aq->asq_spinlock); + i40e_destroy_spinlock(&aq->arq_spinlock); init_adminq_exit: return ret_code; diff --git a/drivers/net/i40e/base/i40e_adminq_cmd.h b/drivers/net/i40e/base/i40e_adminq_cmd.h index cf6ef63e3..562cedbdc 100644 --- a/drivers/net/i40e/base/i40e_adminq_cmd.h +++ b/drivers/net/i40e/base/i40e_adminq_cmd.h @@ -12,8 +12,8 @@ */ #define I40E_FW_API_VERSION_MAJOR 0x0001 -#define I40E_FW_API_VERSION_MINOR_X722 0x0006 -#define I40E_FW_API_VERSION_MINOR_X710 0x0007 +#define I40E_FW_API_VERSION_MINOR_X722 0x0009 +#define I40E_FW_API_VERSION_MINOR_X710 0x0009 #define I40E_FW_MINOR_VERSION(_h) ((_h)->mac.type == I40E_MAC_XL710 ? \ I40E_FW_API_VERSION_MINOR_X710 : \ @@ -21,6 +21,8 @@ /* API version 1.7 implements additional link and PHY-specific APIs */ #define I40E_MINOR_VER_GET_LINK_INFO_XL710 0x0007 +/* API version 1.9 for X722 implements additional link and PHY-specific APIs */ +#define I40E_MINOR_VER_GET_LINK_INFO_X722 0x0009 /* API version 1.6 for X722 devices adds ability to stop FW LLDP agent */ #define I40E_MINOR_VER_FW_LLDP_STOPPABLE_X722 0x0006 @@ -1935,17 +1937,14 @@ enum i40e_aq_phy_type { I40E_PHY_TYPE_25GBASE_LR = 0x22, I40E_PHY_TYPE_25GBASE_AOC = 0x23, I40E_PHY_TYPE_25GBASE_ACC = 0x24, -#ifdef CARLSVILLE_HW I40E_PHY_TYPE_2_5GBASE_T = 0x30, I40E_PHY_TYPE_5GBASE_T = 0x31, -#endif I40E_PHY_TYPE_MAX, I40E_PHY_TYPE_NOT_SUPPORTED_HIGH_TEMP = 0xFD, I40E_PHY_TYPE_EMPTY = 0xFE, I40E_PHY_TYPE_DEFAULT = 0xFF, }; -#ifdef CARLSVILLE_HW #define I40E_PHY_TYPES_BITMASK (BIT_ULL(I40E_PHY_TYPE_SGMII) | \ BIT_ULL(I40E_PHY_TYPE_1000BASE_KX) | \ BIT_ULL(I40E_PHY_TYPE_10GBASE_KX4) | \ @@ -1984,66 +1983,22 @@ enum i40e_aq_phy_type { BIT_ULL(I40E_PHY_TYPE_25GBASE_ACC) | \ BIT_ULL(I40E_PHY_TYPE_2_5GBASE_T) | \ BIT_ULL(I40E_PHY_TYPE_5GBASE_T)) -#else -#define I40E_PHY_TYPES_BITMASK (BIT_ULL(I40E_PHY_TYPE_SGMII) | \ - BIT_ULL(I40E_PHY_TYPE_1000BASE_KX) | \ - BIT_ULL(I40E_PHY_TYPE_10GBASE_KX4) | \ - BIT_ULL(I40E_PHY_TYPE_10GBASE_KR) | \ - BIT_ULL(I40E_PHY_TYPE_40GBASE_KR4) | \ - BIT_ULL(I40E_PHY_TYPE_XAUI) | \ - BIT_ULL(I40E_PHY_TYPE_XFI) | \ - BIT_ULL(I40E_PHY_TYPE_SFI) | \ - BIT_ULL(I40E_PHY_TYPE_XLAUI) | \ - BIT_ULL(I40E_PHY_TYPE_XLPPI) | \ - BIT_ULL(I40E_PHY_TYPE_40GBASE_CR4_CU) | \ - BIT_ULL(I40E_PHY_TYPE_10GBASE_CR1_CU) | \ - BIT_ULL(I40E_PHY_TYPE_10GBASE_AOC) | \ - BIT_ULL(I40E_PHY_TYPE_40GBASE_AOC) | \ - BIT_ULL(I40E_PHY_TYPE_UNRECOGNIZED) | \ - BIT_ULL(I40E_PHY_TYPE_UNSUPPORTED) | \ - BIT_ULL(I40E_PHY_TYPE_100BASE_TX) | \ - BIT_ULL(I40E_PHY_TYPE_1000BASE_T) | \ - BIT_ULL(I40E_PHY_TYPE_10GBASE_T) | \ - BIT_ULL(I40E_PHY_TYPE_10GBASE_SR) | \ - BIT_ULL(I40E_PHY_TYPE_10GBASE_LR) | \ - BIT_ULL(I40E_PHY_TYPE_10GBASE_SFPP_CU) | \ - BIT_ULL(I40E_PHY_TYPE_10GBASE_CR1) | \ - BIT_ULL(I40E_PHY_TYPE_40GBASE_CR4) | \ - BIT_ULL(I40E_PHY_TYPE_40GBASE_SR4) | \ - BIT_ULL(I40E_PHY_TYPE_40GBASE_LR4) | \ - BIT_ULL(I40E_PHY_TYPE_1000BASE_SX) | \ - BIT_ULL(I40E_PHY_TYPE_1000BASE_LX) | \ - BIT_ULL(I40E_PHY_TYPE_1000BASE_T_OPTICAL) | \ - BIT_ULL(I40E_PHY_TYPE_20GBASE_KR2) | \ - BIT_ULL(I40E_PHY_TYPE_25GBASE_KR) | \ - BIT_ULL(I40E_PHY_TYPE_25GBASE_CR) | \ - BIT_ULL(I40E_PHY_TYPE_25GBASE_SR) | \ - BIT_ULL(I40E_PHY_TYPE_25GBASE_LR) | \ - BIT_ULL(I40E_PHY_TYPE_25GBASE_AOC) | \ - BIT_ULL(I40E_PHY_TYPE_25GBASE_ACC)) -#endif -#ifdef CARLSVILLE_HW #define I40E_LINK_SPEED_2_5GB_SHIFT 0x0 -#endif #define I40E_LINK_SPEED_100MB_SHIFT 0x1 #define I40E_LINK_SPEED_1000MB_SHIFT 0x2 #define I40E_LINK_SPEED_10GB_SHIFT 0x3 #define I40E_LINK_SPEED_40GB_SHIFT 0x4 #define I40E_LINK_SPEED_20GB_SHIFT 0x5 #define I40E_LINK_SPEED_25GB_SHIFT 0x6 -#ifdef CARLSVILLE_HW #define I40E_LINK_SPEED_5GB_SHIFT 0x7 -#endif enum i40e_aq_link_speed { I40E_LINK_SPEED_UNKNOWN = 0, I40E_LINK_SPEED_100MB = (1 << I40E_LINK_SPEED_100MB_SHIFT), I40E_LINK_SPEED_1GB = (1 << I40E_LINK_SPEED_1000MB_SHIFT), -#ifdef CARLSVILLE_HW I40E_LINK_SPEED_2_5GB = (1 << I40E_LINK_SPEED_2_5GB_SHIFT), I40E_LINK_SPEED_5GB = (1 << I40E_LINK_SPEED_5GB_SHIFT), -#endif I40E_LINK_SPEED_10GB = (1 << I40E_LINK_SPEED_10GB_SHIFT), I40E_LINK_SPEED_40GB = (1 << I40E_LINK_SPEED_40GB_SHIFT), I40E_LINK_SPEED_20GB = (1 << I40E_LINK_SPEED_20GB_SHIFT), @@ -2089,10 +2044,8 @@ struct i40e_aq_get_phy_abilities_resp { #define I40E_AQ_PHY_TYPE_EXT_25G_LR 0x08 #define I40E_AQ_PHY_TYPE_EXT_25G_AOC 0x10 #define I40E_AQ_PHY_TYPE_EXT_25G_ACC 0x20 -#ifdef CARLSVILLE_HW #define I40E_AQ_PHY_TYPE_EXT_2_5GBASE_T 0x40 #define I40E_AQ_PHY_TYPE_EXT_5GBASE_T 0x80 -#endif u8 fec_cfg_curr_mod_ext_info; #define I40E_AQ_ENABLE_FEC_KR 0x01 #define I40E_AQ_ENABLE_FEC_RS 0x02 diff --git a/drivers/net/i40e/base/i40e_common.c b/drivers/net/i40e/base/i40e_common.c index 8a98afff1..37911a99e 100644 --- a/drivers/net/i40e/base/i40e_common.c +++ b/drivers/net/i40e/base/i40e_common.c @@ -35,13 +35,13 @@ STATIC enum i40e_status_code i40e_set_mac_type(struct i40e_hw *hw) case I40E_DEV_ID_QSFP_C: case I40E_DEV_ID_10G_BASE_T: case I40E_DEV_ID_10G_BASE_T4: -#ifdef CARLSVILLE_HW case I40E_DEV_ID_10G_BASE_T_BC: -#endif case I40E_DEV_ID_20G_KR2: case I40E_DEV_ID_20G_KR2_A: case I40E_DEV_ID_25G_B: case I40E_DEV_ID_25G_SFP28: + case I40E_DEV_ID_X710_N3000: + case I40E_DEV_ID_XXV710_N3000: hw->mac.type = I40E_MAC_XL710; break; #ifdef X722_A0_SUPPORT @@ -1263,10 +1263,8 @@ STATIC enum i40e_media_type i40e_get_media_type(struct i40e_hw *hw) break; case I40E_PHY_TYPE_100BASE_TX: case I40E_PHY_TYPE_1000BASE_T: -#ifdef CARLSVILLE_HW case I40E_PHY_TYPE_2_5GBASE_T: case I40E_PHY_TYPE_5GBASE_T: -#endif case I40E_PHY_TYPE_10GBASE_T: media = I40E_MEDIA_TYPE_BASET; break; @@ -6701,9 +6699,7 @@ enum i40e_status_code i40e_write_phy_register(struct i40e_hw *hw, break; case I40E_DEV_ID_10G_BASE_T: case I40E_DEV_ID_10G_BASE_T4: -#ifdef CARLSVILLE_HW case I40E_DEV_ID_10G_BASE_T_BC: -#endif case I40E_DEV_ID_10G_BASE_T_X722: case I40E_DEV_ID_25G_B: case I40E_DEV_ID_25G_SFP28: diff --git a/drivers/net/i40e/base/i40e_devids.h b/drivers/net/i40e/base/i40e_devids.h index 8b667c2af..f3c59bdea 100644 --- a/drivers/net/i40e/base/i40e_devids.h +++ b/drivers/net/i40e/base/i40e_devids.h @@ -22,9 +22,9 @@ #define I40E_DEV_ID_10G_BASE_T4 0x1589 #define I40E_DEV_ID_25G_B 0x158A #define I40E_DEV_ID_25G_SFP28 0x158B -#ifdef CARLSVILLE_HW +#define I40E_DEV_ID_X710_N3000 0x0CF8 +#define I40E_DEV_ID_XXV710_N3000 0x0D58 #define I40E_DEV_ID_10G_BASE_T_BC 0x15FF -#endif #if defined(INTEGRATED_VF) || defined(VF_DRIVER) || defined(I40E_NDIS_SUPPORT) #define I40E_DEV_ID_VF 0x154C #define I40E_DEV_ID_VF_HV 0x1571 diff --git a/drivers/net/i40e/base/i40e_type.h b/drivers/net/i40e/base/i40e_type.h index 7ba62cc12..5988003df 100644 --- a/drivers/net/i40e/base/i40e_type.h +++ b/drivers/net/i40e/base/i40e_type.h @@ -329,14 +329,12 @@ struct i40e_phy_info { I40E_PHY_TYPE_OFFSET) #define I40E_CAP_PHY_TYPE_25GBASE_ACC BIT_ULL(I40E_PHY_TYPE_25GBASE_ACC + \ I40E_PHY_TYPE_OFFSET) -#ifdef CARLSVILLE_HW /* Offset for 2.5G/5G PHY Types value to bit number conversion */ #define I40E_PHY_TYPE_OFFSET2 (-10) #define I40E_CAP_PHY_TYPE_2_5GBASE_T BIT_ULL(I40E_PHY_TYPE_2_5GBASE_T + \ I40E_PHY_TYPE_OFFSET2) #define I40E_CAP_PHY_TYPE_5GBASE_T BIT_ULL(I40E_PHY_TYPE_5GBASE_T + \ I40E_PHY_TYPE_OFFSET2) -#endif #define I40E_HW_CAP_MAX_GPIO 30 #define I40E_HW_CAP_MDIO_PORT_MODE_MDIO 0 #define I40E_HW_CAP_MDIO_PORT_MODE_I2C 1 @@ -662,6 +660,9 @@ struct i40e_hw { struct i40e_nvm_info nvm; struct i40e_fc_info fc; + /* switch device is used to get link status when i40e is in ipn3ke */ + struct rte_eth_dev *switch_dev; + /* pci info */ u16 device_id; u16 vendor_id; @@ -722,6 +723,9 @@ struct i40e_hw { #define I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE BIT_ULL(2) #define I40E_HW_FLAG_NVM_READ_REQUIRES_LOCK BIT_ULL(3) #define I40E_HW_FLAG_FW_LLDP_STOPPABLE BIT_ULL(4) +#define I40E_HW_FLAG_FW_LLDP_PERSISTENT BIT_ULL(5) +#define I40E_HW_FLAG_AQ_PHY_ACCESS_EXTENDED BIT_ULL(6) +#define I40E_HW_FLAG_DROP_MODE BIT_ULL(7) u64 flags; /* Used in set switch config AQ command */ diff --git a/drivers/net/i40e/base/meson.build b/drivers/net/i40e/base/meson.build index d4c8f872d..3dee8c975 100644 --- a/drivers/net/i40e/base/meson.build +++ b/drivers/net/i40e/base/meson.build @@ -12,8 +12,10 @@ sources = [ ] error_cflags = ['-Wno-sign-compare', '-Wno-unused-value', - '-Wno-format', '-Wno-error=format-security', - '-Wno-strict-aliasing', '-Wno-unused-but-set-variable' + '-Wno-format', '-Wno-format-security', + '-Wno-format-nonliteral', + '-Wno-strict-aliasing', '-Wno-unused-but-set-variable', + '-Wno-unused-parameter', ] c_args = cflags if allow_experimental_apis diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c index b1b145f32..0cad6ffad 100644 --- a/drivers/net/i40e/i40e_ethdev.c +++ b/drivers/net/i40e/i40e_ethdev.c @@ -430,6 +430,9 @@ static const struct rte_pci_id pci_id_i40e_map[] = { { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_1G_BASE_T_X722) }, { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_10G_BASE_T_X722) }, { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_SFP_I_X722) }, + { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_X710_N3000) }, + { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_XXV710_N3000) }, + { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_10G_BASE_T_BC) }, { .vendor_id = 0, /* sentinel */ }, }; -- 2.17.1