From: Ting Xu <ting.xu@intel.com> To: dev@dpdk.org Cc: cristian.dumitrescu@intel.com, Ting Xu <ting.xu@intel.com>, stable@dpdk.org Subject: [dpdk-stable] [PATCH v1] lib/table: fix cache alignment issue Date: Thu, 9 Jul 2020 09:43:34 +0800 Message-ID: <20200709014334.13543-1-ting.xu@intel.com> (raw) When create softnic hash table with 16 keys, it failed on 32bit environment because of the structure rte_bucket_4_16 alignment issue. Add __rte_cache_aligned to ensure correct cache align. Fixes: 8aa327214c ("table: hash") Cc: stable@dpdk.org Signed-off-by: Ting Xu <ting.xu@intel.com> --- lib/librte_table/rte_table_hash_key16.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/librte_table/rte_table_hash_key16.c b/lib/librte_table/rte_table_hash_key16.c index 2cca1c924..5e1665c15 100644 --- a/lib/librte_table/rte_table_hash_key16.c +++ b/lib/librte_table/rte_table_hash_key16.c @@ -44,7 +44,7 @@ struct rte_bucket_4_16 { uint64_t key[4][2]; /* Cache line 2 */ - uint8_t data[0]; + uint8_t data[0] __rte_cache_aligned; }; struct rte_table_hash { -- 2.17.1
next reply other threads:[~2020-07-09 1:39 UTC|newest] Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-07-09 1:43 Ting Xu [this message] -- strict thread matches above, loose matches on Subject: below -- 2020-06-16 16:27 Ting Xu
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