[dpdk-stable] patch 'net/mlx5: fix UAR lock sharing for multiport devices' has been queued to stable release 19.11.4

[luca.boccassi@gmail.com]

Hi,

FYI, your patch has been queued to stable release 19.11.4

Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 07/26/20. So please
shout if anyone has objections.

Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.

Thanks.

Luca Boccassi

---
From cb42557252097729c0631a76c99343c752ebfb93 Mon Sep 17 00:00:00 2001
From: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Date: Thu, 16 Jul 2020 08:23:06 +0000
Subject: [PATCH] net/mlx5: fix UAR lock sharing for multiport devices

[ upstream commit 24feb04596af9ca1893fb589d6a0404ebe088771 ]

The master and representors might be created over the multiport
Infiniband devices and the UAR resource allocated for sibling
ports might belong to the same underlying Infiniband device.
Hardware requires the write access to the UAR must be performed
as atomic 64-bit write, on 32-bit systems this is two sequential
writes, protected by lock. Due to possibility to share the same
UAR between sibling devices the locks must be moved to shared
context.

Fixes: f048f3d479a6 ("net/mlx5: switch to the shared IB device context")

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
---
 drivers/net/mlx5/mlx5.c     | 12 ++++++------
 drivers/net/mlx5/mlx5.h     | 10 +++++-----
 drivers/net/mlx5/mlx5_rxq.c |  2 +-
 drivers/net/mlx5/mlx5_txq.c |  2 +-
 4 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c
index ce76c96db..c97e54251 100644
--- a/drivers/net/mlx5/mlx5.c
+++ b/drivers/net/mlx5/mlx5.c
@@ -687,6 +687,12 @@ mlx5_alloc_shared_ibctx(const struct mlx5_dev_spawn_data *spawn,
 		goto error;
 	}
 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
+#ifndef RTE_ARCH_64
+	/* Initialize UAR access locks for 32bit implementations. */
+	rte_spinlock_init(&sh->uar_lock_cq);
+	for (i = 0; i < MLX5_UAR_PAGE_NUM_MAX; i++)
+		rte_spinlock_init(&sh->uar_lock[i]);
+#endif
 	/*
 	 * Once the device is added to the list of memory event
 	 * callback, its global MR cache table cannot be expanded
@@ -2399,12 +2405,6 @@ err_secondary:
 	priv->ibv_port = spawn->ibv_port;
 	priv->pci_dev = spawn->pci_dev;
 	priv->mtu = RTE_ETHER_MTU;
-#ifndef RTE_ARCH_64
-	/* Initialize UAR access locks for 32bit implementations. */
-	rte_spinlock_init(&priv->uar_lock_cq);
-	for (i = 0; i < MLX5_UAR_PAGE_NUM_MAX; i++)
-		rte_spinlock_init(&priv->uar_lock[i]);
-#endif
 	/* Some internal functions rely on Netlink sockets, open them now. */
 	priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
 	priv->nl_socket_route =	mlx5_nl_init(NETLINK_ROUTE);
diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h
index e53934d45..130aed0e5 100644
--- a/drivers/net/mlx5/mlx5.h
+++ b/drivers/net/mlx5/mlx5.h
@@ -669,6 +669,11 @@ struct mlx5_ibv_shared {
 	void *fdb_domain; /* FDB Direct Rules name space handle. */
 	void *rx_domain; /* RX Direct Rules name space handle. */
 	void *tx_domain; /* TX Direct Rules name space handle. */
+#ifndef RTE_ARCH_64
+	rte_spinlock_t uar_lock_cq; /* CQs share a common distinct UAR */
+	rte_spinlock_t uar_lock[MLX5_UAR_PAGE_NUM_MAX];
+	/* UAR same-page access control required in 32bit implementations. */
+#endif
 	struct mlx5_hlist *flow_tbls;
 	/* Direct Rules tables for FDB, NIC TX+RX */
 	void *esw_drop_action; /* Pointer to DR E-Switch drop action. */
@@ -777,11 +782,6 @@ struct mlx5_priv {
 	uint8_t mtr_color_reg; /* Meter color match REG_C. */
 	struct mlx5_mtr_profiles flow_meter_profiles; /* MTR profile list. */
 	struct mlx5_flow_meters flow_meters; /* MTR list. */
-#ifndef RTE_ARCH_64
-	rte_spinlock_t uar_lock_cq; /* CQs share a common distinct UAR */
-	rte_spinlock_t uar_lock[MLX5_UAR_PAGE_NUM_MAX];
-	/* UAR same-page access control required in 32bit implementations. */
-#endif
 	uint8_t skip_default_rss_reta; /* Skip configuration of default reta. */
 	uint8_t fdb_def_rule; /* Whether fdb jump to table 1 is configured. */
 };
diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c
index e9e8f1278..970ce5cd0 100644
--- a/drivers/net/mlx5/mlx5_rxq.c
+++ b/drivers/net/mlx5/mlx5_rxq.c
@@ -1975,7 +1975,7 @@ mlx5_rxq_new(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
 	tmpl->rxq.elts =
 		(struct rte_mbuf *(*)[1 << tmpl->rxq.elts_n])(tmpl + 1);
 #ifndef RTE_ARCH_64
-	tmpl->rxq.uar_lock_cq = &priv->uar_lock_cq;
+	tmpl->rxq.uar_lock_cq = &priv->sh->uar_lock_cq;
 #endif
 	tmpl->rxq.idx = idx;
 	rte_atomic32_inc(&tmpl->refcnt);
diff --git a/drivers/net/mlx5/mlx5_txq.c b/drivers/net/mlx5/mlx5_txq.c
index ff1e4fc85..0b092c4a9 100644
--- a/drivers/net/mlx5/mlx5_txq.c
+++ b/drivers/net/mlx5/mlx5_txq.c
@@ -352,7 +352,7 @@ txq_uar_init(struct mlx5_txq_ctrl *txq_ctrl)
 	/* Assign an UAR lock according to UAR page number */
 	lock_idx = (txq_ctrl->uar_mmap_offset / page_size) &
 		   MLX5_UAR_PAGE_NUM_MASK;
-	txq_ctrl->txq.uar_lock = &priv->uar_lock[lock_idx];
+	txq_ctrl->txq.uar_lock = &priv->sh->uar_lock[lock_idx];
 #endif
 }
 
-- 
2.20.1

---
  Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- -	2020-07-24 12:53:55.146347382 +0100
+++ 0171-net-mlx5-fix-UAR-lock-sharing-for-multiport-devices.patch	2020-07-24 12:53:48.575011825 +0100
@@ -1,8 +1,10 @@
-From 24feb04596af9ca1893fb589d6a0404ebe088771 Mon Sep 17 00:00:00 2001
+From cb42557252097729c0631a76c99343c752ebfb93 Mon Sep 17 00:00:00 2001
 From: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
 Date: Thu, 16 Jul 2020 08:23:06 +0000
 Subject: [PATCH] net/mlx5: fix UAR lock sharing for multiport devices
 
+[ upstream commit 24feb04596af9ca1893fb589d6a0404ebe088771 ]
+
 The master and representors might be created over the multiport
 Infiniband devices and the UAR resource allocated for sibling
 ports might belong to the same underlying Infiniband device.
@@ -13,43 +15,24 @@
 context.
 
 Fixes: f048f3d479a6 ("net/mlx5: switch to the shared IB device context")
-Cc: stable@dpdk.org
 
 Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
 Acked-by: Matan Azrad <matan@mellanox.com>
 ---
- drivers/net/mlx5/linux/mlx5_os.c |  6 ------
- drivers/net/mlx5/mlx5.c          |  6 ++++++
- drivers/net/mlx5/mlx5.h          | 10 +++++-----
- drivers/net/mlx5/mlx5_rxq.c      |  2 +-
- drivers/net/mlx5/mlx5_txq.c      |  2 +-
- 5 files changed, 13 insertions(+), 13 deletions(-)
+ drivers/net/mlx5/mlx5.c     | 12 ++++++------
+ drivers/net/mlx5/mlx5.h     | 10 +++++-----
+ drivers/net/mlx5/mlx5_rxq.c |  2 +-
+ drivers/net/mlx5/mlx5_txq.c |  2 +-
+ 4 files changed, 13 insertions(+), 13 deletions(-)
 
-diff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c
-index 14af468d6..63e9350a0 100644
---- a/drivers/net/mlx5/linux/mlx5_os.c
-+++ b/drivers/net/mlx5/linux/mlx5_os.c
-@@ -630,12 +630,6 @@ err_secondary:
- 	priv->mtu = RTE_ETHER_MTU;
- 	priv->mp_id.port_id = port_id;
- 	strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
--#ifndef RTE_ARCH_64
--	/* Initialize UAR access locks for 32bit implementations. */
--	rte_spinlock_init(&priv->uar_lock_cq);
--	for (i = 0; i < MLX5_UAR_PAGE_NUM_MAX; i++)
--		rte_spinlock_init(&priv->uar_lock[i]);
--#endif
- 	/* Some internal functions rely on Netlink sockets, open them now. */
- 	priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
- 	priv->nl_socket_route =	mlx5_nl_init(NETLINK_ROUTE);
 diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c
-index 72e0870eb..0786945ce 100644
+index ce76c96db..c97e54251 100644
 --- a/drivers/net/mlx5/mlx5.c
 +++ b/drivers/net/mlx5/mlx5.c
-@@ -717,6 +717,12 @@ mlx5_alloc_shared_dev_ctx(const struct mlx5_dev_spawn_data *spawn,
- 		err = ENOMEM;
+@@ -687,6 +687,12 @@ mlx5_alloc_shared_ibctx(const struct mlx5_dev_spawn_data *spawn,
  		goto error;
  	}
+ #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
 +#ifndef RTE_ARCH_64
 +	/* Initialize UAR access locks for 32bit implementations. */
 +	rte_spinlock_init(&sh->uar_lock_cq);
@@ -59,11 +42,24 @@
  	/*
  	 * Once the device is added to the list of memory event
  	 * callback, its global MR cache table cannot be expanded
+@@ -2399,12 +2405,6 @@ err_secondary:
+ 	priv->ibv_port = spawn->ibv_port;
+ 	priv->pci_dev = spawn->pci_dev;
+ 	priv->mtu = RTE_ETHER_MTU;
+-#ifndef RTE_ARCH_64
+-	/* Initialize UAR access locks for 32bit implementations. */
+-	rte_spinlock_init(&priv->uar_lock_cq);
+-	for (i = 0; i < MLX5_UAR_PAGE_NUM_MAX; i++)
+-		rte_spinlock_init(&priv->uar_lock[i]);
+-#endif
+ 	/* Some internal functions rely on Netlink sockets, open them now. */
+ 	priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
+ 	priv->nl_socket_route =	mlx5_nl_init(NETLINK_ROUTE);
 diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h
-index 84cd3e125..d01d7f3c5 100644
+index e53934d45..130aed0e5 100644
 --- a/drivers/net/mlx5/mlx5.h
 +++ b/drivers/net/mlx5/mlx5.h
-@@ -559,6 +559,11 @@ struct mlx5_dev_ctx_shared {
+@@ -669,6 +669,11 @@ struct mlx5_ibv_shared {
  	void *fdb_domain; /* FDB Direct Rules name space handle. */
  	void *rx_domain; /* RX Direct Rules name space handle. */
  	void *tx_domain; /* TX Direct Rules name space handle. */
@@ -75,7 +71,7 @@
  	struct mlx5_hlist *flow_tbls;
  	/* Direct Rules tables for FDB, NIC TX+RX */
  	void *esw_drop_action; /* Pointer to DR E-Switch drop action. */
-@@ -673,11 +678,6 @@ struct mlx5_priv {
+@@ -777,11 +782,6 @@ struct mlx5_priv {
  	uint8_t mtr_color_reg; /* Meter color match REG_C. */
  	struct mlx5_mtr_profiles flow_meter_profiles; /* MTR profile list. */
  	struct mlx5_flow_meters flow_meters; /* MTR list. */
@@ -86,12 +82,12 @@
 -#endif
  	uint8_t skip_default_rss_reta; /* Skip configuration of default reta. */
  	uint8_t fdb_def_rule; /* Whether fdb jump to table 1 is configured. */
- 	struct mlx5_mp_id mp_id; /* ID of a multi-process process */
+ };
 diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c
-index b436f0610..26813225b 100644
+index e9e8f1278..970ce5cd0 100644
 --- a/drivers/net/mlx5/mlx5_rxq.c
 +++ b/drivers/net/mlx5/mlx5_rxq.c
-@@ -1997,7 +1997,7 @@ mlx5_rxq_new(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
+@@ -1975,7 +1975,7 @@ mlx5_rxq_new(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
  	tmpl->rxq.elts =
  		(struct rte_mbuf *(*)[1 << tmpl->rxq.elts_n])(tmpl + 1);
  #ifndef RTE_ARCH_64
@@ -101,10 +97,10 @@
  	tmpl->rxq.idx = idx;
  	rte_atomic32_inc(&tmpl->refcnt);
 diff --git a/drivers/net/mlx5/mlx5_txq.c b/drivers/net/mlx5/mlx5_txq.c
-index 35b3ade86..e1fa24e40 100644
+index ff1e4fc85..0b092c4a9 100644
 --- a/drivers/net/mlx5/mlx5_txq.c
 +++ b/drivers/net/mlx5/mlx5_txq.c
-@@ -355,7 +355,7 @@ txq_uar_init(struct mlx5_txq_ctrl *txq_ctrl)
+@@ -352,7 +352,7 @@ txq_uar_init(struct mlx5_txq_ctrl *txq_ctrl)
  	/* Assign an UAR lock according to UAR page number */
  	lock_idx = (txq_ctrl->uar_mmap_offset / page_size) &
  		   MLX5_UAR_PAGE_NUM_MASK;