From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 223D9A0351 for ; Thu, 6 Aug 2020 11:58:17 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 1AE361C0AE; Thu, 6 Aug 2020 11:58:17 +0200 (CEST) Received: from mail-wr1-f46.google.com (mail-wr1-f46.google.com [209.85.221.46]) by dpdk.org (Postfix) with ESMTP id 27A8D1C0D0 for ; Thu, 6 Aug 2020 11:58:15 +0200 (CEST) Received: by mail-wr1-f46.google.com with SMTP id a15so43376392wrh.10 for ; Thu, 06 Aug 2020 02:58:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ZeRrTwBLcnrqBq+dE2AEWWTneBS7HgVF/KrPScbca9Y=; b=LSQzxuRVJfGC6Kp0lM5Izjh2W8+TjfCQfhKtJziMk05Rkp3e+1NwvBPhjiSAljbeSL HrzLEnv0QAhPL00r+UkCuwgRAv5xVRSVbJ94v4KmiwHyu3DXNpcx39WGzfeNMtW51cyI 9MqlTQ3I8LsREbDskGzwMT9ucywrjd5s3hgZnl7DgBO8iFKPrvVCZRfGd1W8st+kgNBZ 7497CvuJKEOsAJkZrDFpdf82QWvWqsAiTemWSDfGYp+4KfYWNuxpPIzjjKXKPr+JYTIL Iacoz6y0+kKXoDjwDyg7pzmvydzI+PowmjMk19qbfYITSTC+h3rXvzQlj7iJSkH4Q7QI Jp7g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ZeRrTwBLcnrqBq+dE2AEWWTneBS7HgVF/KrPScbca9Y=; b=aGD9e77GTq7WEUe5HPWsfeFh3qbuyFL6Nj4fILtmfw7cSYmWmzm2FBw8Xame9livy3 U9ve3Jmy73yA3K9z4SKMvyWnte67zU+SKxYED/utd+z9Q801N6XR+noWKTttAx0cmOz6 ZcktzTxPCLcM9rPUWuX6efOR4smbKZyC5DqVxvqUNGsna7cQ9rDlqIRzm3qEdZlwMxTD I3G4w/zZE+AIAdme3MpEzJwavo2HivpgFFVEZlMSBZFRlPtWYtddgP/YMiD6lm6lGeiR I6of1Gjupu72FsNHtLKUJiLBcFB1q5z5VSF6MX0GV5eEX3mpixb/YwZaMckCZqxNfpos NGtQ== X-Gm-Message-State: AOAM533nrI1aOT1VrXUcRl2F1bRgVMF+iu9uglScNh8VH6wF+5ux2AbF UA9fAE8qTEEKvqgQn4WlrtDETeth04g= X-Google-Smtp-Source: ABdhPJzU+DoPY27bu8h0L+zCLeJ1Idid0qbzhA5/S19/f2SNSV8ZHsl7wiMc7EgSjDHkgcall0N6QQ== X-Received: by 2002:a5d:548f:: with SMTP id h15mr6756065wrv.331.1596707894865; Thu, 06 Aug 2020 02:58:14 -0700 (PDT) Received: from localhost ([88.98.246.218]) by smtp.gmail.com with ESMTPSA id h14sm5715367wml.30.2020.08.06.02.58.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 06 Aug 2020 02:58:14 -0700 (PDT) From: luca.boccassi@gmail.com To: Viacheslav Ovsiienko Cc: Matan Azrad , dpdk stable Date: Thu, 6 Aug 2020 10:53:40 +0100 Message-Id: <20200806095411.774624-12-luca.boccassi@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200806095411.774624-1-luca.boccassi@gmail.com> References: <20200724120030.1863487-1-luca.boccassi@gmail.com> <20200806095411.774624-1-luca.boccassi@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [dpdk-stable] patch 'common/mlx5: fix queue doorbell record size' has been queued to stable release 19.11.4 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Sender: "stable" Hi, FYI, your patch has been queued to stable release 19.11.4 Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet. It will be pushed if I get no objections before 08/08/20. So please shout if anyone has objections. Also note that after the patch there's a diff of the upstream commit vs the patch applied to the branch. This will indicate if there was any rebasing needed to apply to the stable branch. If there were code changes for rebasing (ie: not only metadata diffs), please double check that the rebase was correctly done. Thanks. Luca Boccassi --- >From 313e372f7d6892795cb3ee6db9d114f76c3e8ddd Mon Sep 17 00:00:00 2001 From: Viacheslav Ovsiienko Date: Tue, 21 Jul 2020 11:11:29 +0000 Subject: [PATCH] common/mlx5: fix queue doorbell record size [ upstream commit 44c1b52bc6a659e01e8038e1f5c42d9fa98b728f ] When Rx/Tx queue was being created with DevX the allocated doorbell record size was only uint64_t. That was definitely less than size of CPU cacheline and it might have happened the doorbell records attached to different queues handled by different cores were allocated within same cacheline. It might have caused the contention on doorbell record writing. This patch extends the allocated memory size for doorbell record to cacheline size. Fixes: 21cae8580fd0 ("net/mlx5: allocate door-bells via DevX") Signed-off-by: Viacheslav Ovsiienko Acked-by: Matan Azrad --- drivers/net/mlx5/mlx5.c | 2 +- drivers/net/mlx5/mlx5.h | 10 ++++++---- 2 files changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c index c97e54251..ad1ff8dba 100644 --- a/drivers/net/mlx5/mlx5.c +++ b/drivers/net/mlx5/mlx5.c @@ -2033,7 +2033,7 @@ mlx5_get_dbr(struct rte_eth_dev *dev, struct mlx5_devx_dbr_page **dbr_page) page->dbr_bitmap[i] |= (UINT64_C(1) << j); page->dbr_count++; *dbr_page = page; - return (((i * 64) + j) * sizeof(uint64_t)); + return (i * CHAR_BIT * sizeof(uint64_t) + j) * MLX5_DBR_SIZE; } /** diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h index 130aed0e5..51f067b4b 100644 --- a/drivers/net/mlx5/mlx5.h +++ b/drivers/net/mlx5/mlx5.h @@ -610,10 +610,12 @@ struct mlx5_flow_tbl_resource { #define MLX5_MAX_TABLES_EXTERNAL (MLX5_MAX_TABLES - 3) #define MLX5_MAX_TABLES_FDB UINT16_MAX -#define MLX5_DBR_PAGE_SIZE 4096 /* Must be >= 512. */ -#define MLX5_DBR_SIZE 8 -#define MLX5_DBR_PER_PAGE (MLX5_DBR_PAGE_SIZE / MLX5_DBR_SIZE) -#define MLX5_DBR_BITMAP_SIZE (MLX5_DBR_PER_PAGE / 64) +#define MLX5_DBR_SIZE RTE_CACHE_LINE_SIZE +#define MLX5_DBR_PER_PAGE 64 +/* Must be >= CHAR_BIT * sizeof(uint64_t) */ +#define MLX5_DBR_PAGE_SIZE (MLX5_DBR_PER_PAGE * MLX5_DBR_SIZE) +/* Page size must be >= 512. */ +#define MLX5_DBR_BITMAP_SIZE (MLX5_DBR_PER_PAGE / (CHAR_BIT * sizeof(uint64_t))) struct mlx5_devx_dbr_page { /* Door-bell records, must be first member in structure. */ -- 2.20.1 --- Diff of the applied patch vs upstream commit (please double-check if non-empty: --- --- - 2020-08-06 10:53:16.258847393 +0100 +++ 0012-common-mlx5-fix-queue-doorbell-record-size.patch 2020-08-06 10:53:15.732596055 +0100 @@ -1,8 +1,10 @@ -From 44c1b52bc6a659e01e8038e1f5c42d9fa98b728f Mon Sep 17 00:00:00 2001 +From 313e372f7d6892795cb3ee6db9d114f76c3e8ddd Mon Sep 17 00:00:00 2001 From: Viacheslav Ovsiienko Date: Tue, 21 Jul 2020 11:11:29 +0000 Subject: [PATCH] common/mlx5: fix queue doorbell record size +[ upstream commit 44c1b52bc6a659e01e8038e1f5c42d9fa98b728f ] + When Rx/Tx queue was being created with DevX the allocated doorbell record size was only uint64_t. That was definitely less than size of CPU cacheline and it might have happened the @@ -14,20 +16,19 @@ record to cacheline size. Fixes: 21cae8580fd0 ("net/mlx5: allocate door-bells via DevX") -Cc: stable@dpdk.org Signed-off-by: Viacheslav Ovsiienko Acked-by: Matan Azrad --- - drivers/common/mlx5/mlx5_common.c | 2 +- - drivers/common/mlx5/mlx5_common.h | 10 ++++++---- + drivers/net/mlx5/mlx5.c | 2 +- + drivers/net/mlx5/mlx5.h | 10 ++++++---- 2 files changed, 7 insertions(+), 5 deletions(-) -diff --git a/drivers/common/mlx5/mlx5_common.c b/drivers/common/mlx5/mlx5_common.c -index 79357e2e2..06f0a6400 100644 ---- a/drivers/common/mlx5/mlx5_common.c -+++ b/drivers/common/mlx5/mlx5_common.c -@@ -198,7 +198,7 @@ mlx5_get_dbr(void *ctx, struct mlx5_dbr_page_list *head, +diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c +index c97e54251..ad1ff8dba 100644 +--- a/drivers/net/mlx5/mlx5.c ++++ b/drivers/net/mlx5/mlx5.c +@@ -2033,7 +2033,7 @@ mlx5_get_dbr(struct rte_eth_dev *dev, struct mlx5_devx_dbr_page **dbr_page) page->dbr_bitmap[i] |= (UINT64_C(1) << j); page->dbr_count++; *dbr_page = page; @@ -36,13 +37,13 @@ } /** -diff --git a/drivers/common/mlx5/mlx5_common.h b/drivers/common/mlx5/mlx5_common.h -index 9154cbc6b..2cdb226f3 100644 ---- a/drivers/common/mlx5/mlx5_common.h -+++ b/drivers/common/mlx5/mlx5_common.h -@@ -215,10 +215,12 @@ enum mlx5_class { - MLX5_CLASS_REGEX = RTE_BIT64(2), - }; +diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h +index 130aed0e5..51f067b4b 100644 +--- a/drivers/net/mlx5/mlx5.h ++++ b/drivers/net/mlx5/mlx5.h +@@ -610,10 +610,12 @@ struct mlx5_flow_tbl_resource { + #define MLX5_MAX_TABLES_EXTERNAL (MLX5_MAX_TABLES - 3) + #define MLX5_MAX_TABLES_FDB UINT16_MAX -#define MLX5_DBR_PAGE_SIZE 4096 /* Must be >= 512. */ -#define MLX5_DBR_SIZE 8