patches for DPDK stable branches
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* [dpdk-stable] [PATCH 20.11 1/7] acl: fix x86 build when compiler doesn't support AVX2
       [not found] <20200807162829.11690-1-konstantin.ananyev@intel.com>
@ 2020-08-07 16:28 ` Konstantin Ananyev
       [not found] ` <20200915165025.543-1-konstantin.ananyev@intel.com>
  1 sibling, 0 replies; 3+ messages in thread
From: Konstantin Ananyev @ 2020-08-07 16:28 UTC (permalink / raw)
  To: dev; +Cc: jerinj, ruifeng.wang, vladimir.medvedkin, Konstantin Ananyev, stable

Right now we define dummy version of rte_acl_classify_avx2()
when both X86 and AVX2 are not detected, though it should be
for non-AVX2 case only.

Fixes: e53ce4e41379 ("acl: remove use of weak functions")
Cc: stable@dpdk.org

Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
---
 lib/librte_acl/rte_acl.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/librte_acl/rte_acl.c b/lib/librte_acl/rte_acl.c
index 777ec4d34..715b02359 100644
--- a/lib/librte_acl/rte_acl.c
+++ b/lib/librte_acl/rte_acl.c
@@ -16,7 +16,6 @@ static struct rte_tailq_elem rte_acl_tailq = {
 };
 EAL_REGISTER_TAILQ(rte_acl_tailq)
 
-#ifndef RTE_ARCH_X86
 #ifndef CC_AVX2_SUPPORT
 /*
  * If the compiler doesn't support AVX2 instructions,
@@ -33,6 +32,7 @@ rte_acl_classify_avx2(__rte_unused const struct rte_acl_ctx *ctx,
 }
 #endif
 
+#ifndef RTE_ARCH_X86
 int
 rte_acl_classify_sse(__rte_unused const struct rte_acl_ctx *ctx,
 	__rte_unused const uint8_t **data,
-- 
2.17.1


^ permalink raw reply	[flat|nested] 3+ messages in thread

* [dpdk-stable] [PATCH v2 01/12] acl: fix x86 build when compiler doesn't support AVX2
       [not found] ` <20200915165025.543-1-konstantin.ananyev@intel.com>
@ 2020-09-15 16:50   ` " Konstantin Ananyev
  2020-09-15 16:50   ` [dpdk-stable] [PATCH v2 02/12] doc: fix mixing classify methods in ACL guide Konstantin Ananyev
  1 sibling, 0 replies; 3+ messages in thread
From: Konstantin Ananyev @ 2020-09-15 16:50 UTC (permalink / raw)
  To: dev; +Cc: jerinj, ruifeng.wang, vladimir.medvedkin, Konstantin Ananyev, stable

Right now we define dummy version of rte_acl_classify_avx2()
when both X86 and AVX2 are not detected, though it should be
for non-AVX2 case only.

Fixes: e53ce4e41379 ("acl: remove use of weak functions")
Cc: stable@dpdk.org

Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
---
 lib/librte_acl/rte_acl.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/librte_acl/rte_acl.c b/lib/librte_acl/rte_acl.c
index 777ec4d34..715b02359 100644
--- a/lib/librte_acl/rte_acl.c
+++ b/lib/librte_acl/rte_acl.c
@@ -16,7 +16,6 @@ static struct rte_tailq_elem rte_acl_tailq = {
 };
 EAL_REGISTER_TAILQ(rte_acl_tailq)
 
-#ifndef RTE_ARCH_X86
 #ifndef CC_AVX2_SUPPORT
 /*
  * If the compiler doesn't support AVX2 instructions,
@@ -33,6 +32,7 @@ rte_acl_classify_avx2(__rte_unused const struct rte_acl_ctx *ctx,
 }
 #endif
 
+#ifndef RTE_ARCH_X86
 int
 rte_acl_classify_sse(__rte_unused const struct rte_acl_ctx *ctx,
 	__rte_unused const uint8_t **data,
-- 
2.17.1


^ permalink raw reply	[flat|nested] 3+ messages in thread

* [dpdk-stable] [PATCH v2 02/12] doc: fix mixing classify methods in ACL guide
       [not found] ` <20200915165025.543-1-konstantin.ananyev@intel.com>
  2020-09-15 16:50   ` [dpdk-stable] [PATCH v2 01/12] " Konstantin Ananyev
@ 2020-09-15 16:50   ` Konstantin Ananyev
  1 sibling, 0 replies; 3+ messages in thread
From: Konstantin Ananyev @ 2020-09-15 16:50 UTC (permalink / raw)
  To: dev; +Cc: jerinj, ruifeng.wang, vladimir.medvedkin, Konstantin Ananyev, stable

Add brief description for missing ACL classify algorithms:
RTE_ACL_CLASSIFY_NEON and RTE_ACL_CLASSIFY_ALTIVEC.

Fixes: 34fa6c27c156 ("acl: add NEON optimization for ARMv8")
Fixes: 1d73135f9f1c ("acl: add AltiVec for ppc64")
Cc: stable@dpdk.org

Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
---
 doc/guides/prog_guide/packet_classif_access_ctrl.rst | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/doc/guides/prog_guide/packet_classif_access_ctrl.rst b/doc/guides/prog_guide/packet_classif_access_ctrl.rst
index 0345512b9..daf03e6d7 100644
--- a/doc/guides/prog_guide/packet_classif_access_ctrl.rst
+++ b/doc/guides/prog_guide/packet_classif_access_ctrl.rst
@@ -373,6 +373,12 @@ There are several implementations of classify algorithm:
 
 *   **RTE_ACL_CLASSIFY_AVX2**: vector implementation, can process up to 16 flows in parallel. Requires AVX2 support.
 
+*   **RTE_ACL_CLASSIFY_NEON**: vector implementation, can process up to 8 flows
+    in parallel. Requires NEON support.
+
+*   **RTE_ACL_CLASSIFY_ALTIVEC**: vector implementation, can process up to 8
+    flows in parallel. Requires ALTIVEC support.
+
 It is purely a runtime decision which method to choose, there is no build-time difference.
 All implementations operates over the same internal RT structures and use similar principles. The main difference is that vector implementations can manually exploit IA SIMD instructions and process several input data flows in parallel.
 At startup ACL library determines the highest available classify method for the given platform and sets it as default one. Though the user has an ability to override the default classifier function for a given ACL context or perform particular search using non-default classify method. In that case it is user responsibility to make sure that given platform supports selected classify implementation.
-- 
2.17.1


^ permalink raw reply	[flat|nested] 3+ messages in thread

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Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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     [not found] <20200807162829.11690-1-konstantin.ananyev@intel.com>
2020-08-07 16:28 ` [dpdk-stable] [PATCH 20.11 1/7] acl: fix x86 build when compiler doesn't support AVX2 Konstantin Ananyev
     [not found] ` <20200915165025.543-1-konstantin.ananyev@intel.com>
2020-09-15 16:50   ` [dpdk-stable] [PATCH v2 01/12] " Konstantin Ananyev
2020-09-15 16:50   ` [dpdk-stable] [PATCH v2 02/12] doc: fix mixing classify methods in ACL guide Konstantin Ananyev

patches for DPDK stable branches

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