From: Alexander Kozyrev <akozyrev@nvidia.com> To: dev@dpdk.org Cc: stable@dpdk.org, rasland@nvidia.com, viacheslavo@nvidia.com, matan@nvidia.com Subject: [dpdk-stable] [PATCH] net/mlx5: fix WQE counter assert in free completion queue Date: Mon, 16 Nov 2020 19:48:15 +0000 Message-ID: <20201116194815.29712-1-akozyrev@nvidia.com> (raw) The following assertion fails in case RTE_ENABLE_ASSERT is enabled: PANIC in mlx5_tx_handle_completion(): assert "(txq->fcqs[txq->cq_ci & txq->cqe_m] >> 16) == cqe->wqe_counter" failed The free completion queue only contains an expected WQE counter if RTE_LIBRTE_MLX5_DEBUG is enabled as well. Thus enabling RTE_ENABLE_ASSERT alone causes the assert to fail. Compile the assert conditionally only if RTE_ENABLE_ASSERT is enabled. Fixes: 0afacb04f5 ("common/mlx5: remove NDEBUG") Cc: stable@dpdk.org Signed-off-by: Alexander Kozyrev <akozyrev@nvidia.com> Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com> --- drivers/net/mlx5/mlx5_rxtx.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/net/mlx5/mlx5_rxtx.c b/drivers/net/mlx5/mlx5_rxtx.c index 844a1c633d..c185c40666 100644 --- a/drivers/net/mlx5/mlx5_rxtx.c +++ b/drivers/net/mlx5/mlx5_rxtx.c @@ -2106,8 +2106,10 @@ mlx5_tx_handle_completion(struct mlx5_txq_data *__rte_restrict txq, } /* Normal transmit completion. */ MLX5_ASSERT(txq->cq_ci != txq->cq_pi); +#ifdef RTE_LIBRTE_MLX5_DEBUG MLX5_ASSERT((txq->fcqs[txq->cq_ci & txq->cqe_m] >> 16) == cqe->wqe_counter); +#endif ring_doorbell = true; ++txq->cq_ci; last_cqe = cqe; -- 2.24.1
next reply other threads:[~2020-11-16 19:48 UTC|newest] Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-11-16 19:48 Alexander Kozyrev [this message] 2020-11-17 16:19 ` Raslan Darawsheh
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