From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 7FEBCA04DD for ; Wed, 18 Nov 2020 17:36:59 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 777A94C90; Wed, 18 Nov 2020 17:36:58 +0100 (CET) Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [216.205.24.124]) by dpdk.org (Postfix) with ESMTP id 383594C90 for ; Wed, 18 Nov 2020 17:36:56 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1605717414; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=9ycU786NbSRMQQ4ZCcu3aMbZioUGNAeiElfoQjPo3qU=; b=AAnLdRdim2YHWp7SVJx8AHptldGXfGuEfJ/g8B1QP2ASzWUT0NR5aEBYoCWgp/3/R2AQ/1 GqmWHY0OfSjA2/dMSh1okwVpUdqjV+WqfMaAfwI43apL2pp/XUQJ56Ktze0UpHMwd/13Mz 6bBFPMmj1H6kKLO/va4b2Zh3ROWs44I= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-255-FQ9MbvxFNESE7wyUTgwXRA-1; Wed, 18 Nov 2020 11:36:51 -0500 X-MC-Unique: FQ9MbvxFNESE7wyUTgwXRA-1 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 4868E81E24C; Wed, 18 Nov 2020 16:36:30 +0000 (UTC) Received: from rh.redhat.com (ovpn-113-249.ams2.redhat.com [10.36.113.249]) by smtp.corp.redhat.com (Postfix) with ESMTP id 28F315C888; Wed, 18 Nov 2020 16:36:28 +0000 (UTC) From: Kevin Traynor To: Bruce Richardson Cc: Yingya Han , dpdk stable Date: Wed, 18 Nov 2020 16:34:53 +0000 Message-Id: <20201118163558.1101823-7-ktraynor@redhat.com> In-Reply-To: <20201118163558.1101823-1-ktraynor@redhat.com> References: <20201118163558.1101823-1-ktraynor@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=ktraynor@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset="US-ASCII" Subject: [dpdk-stable] patch 'eal/x86: fix memcpy AVX-512 enablement' has been queued to LTS release 18.11.11 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Sender: "stable" Hi, FYI, your patch has been queued to LTS release 18.11.11 Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet. It will be pushed if I get no objections before 11/24/20. So please shout if anyone has objections. Also note that after the patch there's a diff of the upstream commit vs the patch applied to the branch. This will indicate if there was any rebasing needed to apply to the stable branch. If there were code changes for rebasing (ie: not only metadata diffs), please double check that the rebase was correctly done. Queued patches are on a temporary branch at: https://github.com/kevintraynor/dpdk-stable-queue This queued commit can be viewed at: https://github.com/kevintraynor/dpdk-stable-queue/commit/e4a8858adfb35ebaa9b31242a88a7ce0dd6635ea Thanks. Kevin. --- >From e4a8858adfb35ebaa9b31242a88a7ce0dd6635ea Mon Sep 17 00:00:00 2001 From: Bruce Richardson Date: Mon, 12 Oct 2020 15:51:48 +0100 Subject: [PATCH] eal/x86: fix memcpy AVX-512 enablement [ upstream commit e8a83681f458d95d197bd37208fed3c3900def03 ] When testing on some x86 platforms, code compiled with meson was observed running at a different power-license level to that compiled with make. This is due to the fact that meson auto-detects the instruction sets available on the system and enabled AVX512 rte_memcpy when AVX512 was available, while on make, a build time AVX-512 flag needed to be explicitly set to enable that AVX512 rte_memcpy code path. In the absence of runtime path selection for rte_memcpy - which is complicated by it being a static inline function in a header file - we can fix this behaviour regression by similarly having a build-time option which must be set to enable the AVX-512 memcpy path. Fixes: a25a650be5f0 ("build: add infrastructure for meson and ninja builds") Fixes: 3e1bb55fd6ef ("build/x86: add SSE flags") Signed-off-by: Bruce Richardson Tested-by: Yingya Han --- lib/librte_eal/common/include/arch/x86/rte_memcpy.h | 2 +- lib/librte_eal/common/include/generic/rte_memcpy.h | 4 ++++ 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/lib/librte_eal/common/include/arch/x86/rte_memcpy.h b/lib/librte_eal/common/include/arch/x86/rte_memcpy.h index 9c67232df9..d01832fa15 100644 --- a/lib/librte_eal/common/include/arch/x86/rte_memcpy.h +++ b/lib/librte_eal/common/include/arch/x86/rte_memcpy.h @@ -46,5 +46,5 @@ static __rte_always_inline void * rte_memcpy(void *dst, const void *src, size_t n); -#ifdef RTE_MACHINE_CPUFLAG_AVX512F +#if defined RTE_MACHINE_CPUFLAG_AVX512F && defined RTE_MEMCPY_AVX512 #define ALIGNMENT_MASK 0x3F diff --git a/lib/librte_eal/common/include/generic/rte_memcpy.h b/lib/librte_eal/common/include/generic/rte_memcpy.h index 701e550c31..e7f0f8eaa9 100644 --- a/lib/librte_eal/common/include/generic/rte_memcpy.h +++ b/lib/librte_eal/common/include/generic/rte_memcpy.h @@ -96,4 +96,8 @@ rte_mov256(uint8_t *dst, const uint8_t *src); * and care is needed as parameter expressions may be evaluated multiple times. * + * @note For x86 platforms to enable the AVX-512 memcpy implementation, set + * -DRTE_MEMCPY_AVX512 macro in CFLAGS, or define the RTE_MEMCPY_AVX512 macro + * explicitly in the source file before including the rte_memcpy header file. + * * @param dst * Pointer to the destination of the data. -- 2.26.2 --- Diff of the applied patch vs upstream commit (please double-check if non-empty: --- --- - 2020-11-18 16:33:38.122554681 +0000 +++ 0007-eal-x86-fix-memcpy-AVX-512-enablement.patch 2020-11-18 16:33:37.903215045 +0000 @@ -1 +1 @@ -From e8a83681f458d95d197bd37208fed3c3900def03 Mon Sep 17 00:00:00 2001 +From e4a8858adfb35ebaa9b31242a88a7ce0dd6635ea Mon Sep 17 00:00:00 2001 @@ -5,0 +6,2 @@ +[ upstream commit e8a83681f458d95d197bd37208fed3c3900def03 ] + @@ -20 +21,0 @@ -Cc: stable@dpdk.org @@ -25,2 +26,2 @@ - lib/librte_eal/include/generic/rte_memcpy.h | 4 ++++ - lib/librte_eal/x86/include/rte_memcpy.h | 2 +- + lib/librte_eal/common/include/arch/x86/rte_memcpy.h | 2 +- + lib/librte_eal/common/include/generic/rte_memcpy.h | 4 ++++ @@ -29 +30,12 @@ -diff --git a/lib/librte_eal/include/generic/rte_memcpy.h b/lib/librte_eal/include/generic/rte_memcpy.h +diff --git a/lib/librte_eal/common/include/arch/x86/rte_memcpy.h b/lib/librte_eal/common/include/arch/x86/rte_memcpy.h +index 9c67232df9..d01832fa15 100644 +--- a/lib/librte_eal/common/include/arch/x86/rte_memcpy.h ++++ b/lib/librte_eal/common/include/arch/x86/rte_memcpy.h +@@ -46,5 +46,5 @@ static __rte_always_inline void * + rte_memcpy(void *dst, const void *src, size_t n); + +-#ifdef RTE_MACHINE_CPUFLAG_AVX512F ++#if defined RTE_MACHINE_CPUFLAG_AVX512F && defined RTE_MEMCPY_AVX512 + + #define ALIGNMENT_MASK 0x3F +diff --git a/lib/librte_eal/common/include/generic/rte_memcpy.h b/lib/librte_eal/common/include/generic/rte_memcpy.h @@ -31,2 +43,2 @@ ---- a/lib/librte_eal/include/generic/rte_memcpy.h -+++ b/lib/librte_eal/include/generic/rte_memcpy.h +--- a/lib/librte_eal/common/include/generic/rte_memcpy.h ++++ b/lib/librte_eal/common/include/generic/rte_memcpy.h @@ -42,11 +53,0 @@ -diff --git a/lib/librte_eal/x86/include/rte_memcpy.h b/lib/librte_eal/x86/include/rte_memcpy.h -index 008a3de67f..79f381dd9b 100644 ---- a/lib/librte_eal/x86/include/rte_memcpy.h -+++ b/lib/librte_eal/x86/include/rte_memcpy.h -@@ -46,5 +46,5 @@ static __rte_always_inline void * - rte_memcpy(void *dst, const void *src, size_t n); - --#ifdef __AVX512F__ -+#if defined __AVX512F__ && defined RTE_MEMCPY_AVX512 - - #define ALIGNMENT_MASK 0x3F