From: Ori Kam <orika@nvidia.com>
To: thomas@monjalon.net
Cc: orika@mellanox.com, dev@dpdk.org, stable@dpdk.org
Subject: [dpdk-stable] [PATCH 3/4] regex/mlx5: fix support for group id
Date: Thu, 17 Dec 2020 10:51:57 +0200 [thread overview]
Message-ID: <20201217085158.28367-4-orika@nvidia.com> (raw)
In-Reply-To: <20201217085158.28367-1-orika@nvidia.com>
In order to know which groups in the RegEx engine
should be used there is a need to check the req_flags.
This commit adds the missing check.
Cc: stable@dpdk.org
Fixes: 4d4e245ad637 ("regex/mlx5: support enqueue")
Signed-off-by: Ori Kam <orika@nvidia.com>
---
drivers/regex/mlx5/mlx5_regex_fastpath.c | 21 +++++++++++++++++----
1 file changed, 17 insertions(+), 4 deletions(-)
diff --git a/drivers/regex/mlx5/mlx5_regex_fastpath.c b/drivers/regex/mlx5/mlx5_regex_fastpath.c
index 5857617282..8d134ac98e 100644
--- a/drivers/regex/mlx5/mlx5_regex_fastpath.c
+++ b/drivers/regex/mlx5/mlx5_regex_fastpath.c
@@ -105,7 +105,21 @@ prep_one(struct mlx5_regex_priv *priv, struct mlx5_regex_qp *qp,
{
size_t wqe_offset = (sq->pi & (sq_size_get(sq) - 1)) * MLX5_SEND_WQE_BB;
uint32_t lkey;
-
+ uint16_t group0 = op->req_flags & RTE_REGEX_OPS_REQ_GROUP_ID0_VALID_F ?
+ op->group_id0 : 0;
+ uint16_t group1 = op->req_flags & RTE_REGEX_OPS_REQ_GROUP_ID1_VALID_F ?
+ op->group_id1 : 0;
+ uint16_t group2 = op->req_flags & RTE_REGEX_OPS_REQ_GROUP_ID2_VALID_F ?
+ op->group_id2 : 0;
+ uint16_t group3 = op->req_flags & RTE_REGEX_OPS_REQ_GROUP_ID3_VALID_F ?
+ op->group_id3 : 0;
+
+ /* For backward compatibility. */
+ if (!(op->req_flags & (RTE_REGEX_OPS_REQ_GROUP_ID0_VALID_F |
+ RTE_REGEX_OPS_REQ_GROUP_ID1_VALID_F |
+ RTE_REGEX_OPS_REQ_GROUP_ID2_VALID_F |
+ RTE_REGEX_OPS_REQ_GROUP_ID3_VALID_F)))
+ group0 = op->group_id0;
lkey = mlx5_mr_addr2mr_bh(priv->pd, 0,
&priv->mr_scache, &qp->mr_ctrl,
rte_pktmbuf_mtod(op->mbuf, uintptr_t),
@@ -116,9 +130,8 @@ prep_one(struct mlx5_regex_priv *priv, struct mlx5_regex_qp *qp,
set_wqe_ctrl_seg((struct mlx5_wqe_ctrl_seg *)wqe, sq->pi,
MLX5_OPCODE_MMO, MLX5_OPC_MOD_MMO_REGEX, sq->obj->id,
0, ds, 0, 0);
- set_regex_ctrl_seg(wqe + 12, 0, op->group_id0, op->group_id1,
- op->group_id2,
- op->group_id3, 0);
+ set_regex_ctrl_seg(wqe + 12, 0, group0, group1, group2, group3,
+ 0);
struct mlx5_wqe_data_seg *input_seg =
(struct mlx5_wqe_data_seg *)(wqe +
MLX5_REGEX_WQE_GATHER_OFFSET);
--
2.25.1
next prev parent reply other threads:[~2020-12-17 8:52 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20201217085158.28367-1-orika@nvidia.com>
2020-12-17 8:51 ` [dpdk-stable] [PATCH 1/4] regex/mlx5: fix memory rule alignment Ori Kam
2020-12-17 8:51 ` Ori Kam [this message]
[not found] ` <20210107165711.1782-1-orika@nvidia.com>
2021-01-07 16:57 ` [dpdk-stable] [PATCH v2 1/5] " Ori Kam
2021-01-07 16:57 ` [dpdk-stable] [PATCH v2 3/5] regex/mlx5: fix support for group id Ori Kam
2021-01-07 16:57 ` [dpdk-stable] [PATCH v2 5/5] regex/mlx5: fix num of supported queues Ori Kam
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