From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 66666A0524 for ; Fri, 5 Feb 2021 12:31:05 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 5D9A3188946; Fri, 5 Feb 2021 12:31:05 +0100 (CET) Received: from mail-wm1-f43.google.com (mail-wm1-f43.google.com [209.85.128.43]) by mails.dpdk.org (Postfix) with ESMTP id D50934067B for ; Fri, 5 Feb 2021 12:31:03 +0100 (CET) Received: by mail-wm1-f43.google.com with SMTP id j21so2932094wmj.0 for ; Fri, 05 Feb 2021 03:31:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=eDRjCm8PFbX9sOyQGVPXO3VPQKa5ZSzxUYyE/wJR8i8=; b=gh6zJGLqCR6oY4J3Wu/R66gR2A+ib6ElcUEdbdADK/zw2aDwA/f4NgXDDgrjyowBMz OBcPZpIIljZEI90e+njGjOWn81ruDc36ZKYS24NXgosaRZeJ5YTLL8xLR0A3JVlY0ZAd cmuvMA+grHQJmGKxiJPK4eWVYV5X/KWAonQXSoBavk3X2AVn2HZhhWctwczUXx0TqPpb NB28tK1h7wRuJtLgeG3sQZlZ/zRDIB4sPH6HDPZilEgrpKOMDDhA2quouiAjnLSC6MSA XTrdRqmxjjKka1PcN3Zc1KqEVrVxGVfBP3+qsSKWculmiH3oryPfV3XJNHjZZ3DJ6bxn 7Pow== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=eDRjCm8PFbX9sOyQGVPXO3VPQKa5ZSzxUYyE/wJR8i8=; b=NhDOstiwEV03wj0WrpAKL/UWpBivM3CHAGArizLZ5Lvaic2je6juydXANa3uxpnH/4 VpZRSpr9XcLerQxsl9imOpqWR55Bi1/TDsabQYK6VOPUAgf1Cmz9x6TifJNasP/Rpx4B L6R9axeMuR553erVE9UOEJ9wAyF2I+9H1EYVodv5qSvuVRUUtpsAcQywgGShTKcaFcUt Vl8DEbUN247YkJHVY+uxOoT8OA0TEKqjfN2aINtASJzzBe0yLulvIaP/mNHLYbVVbYnN rpUKnSrrY/MDxFasGLY1H1glF0POuOd6EZE7yDud2hE5/agC7hOD46LuzF+xA63727RG hY2A== X-Gm-Message-State: AOAM530Qy+UguQXjUiKtk0jKC48kVW+NfCED2sDkP58iMyB/WbSd81x0 v5ns2LN9Ior3a3L7y/cu0VM= X-Google-Smtp-Source: ABdhPJwZNP9jAPYBfOakST+EF0EIqL4KlNZAwOPzfEk/aZ8uYIDNuO1lXBMldF1xlyNIuRFzm8PirQ== X-Received: by 2002:a7b:c5cc:: with SMTP id n12mr3180864wmk.123.1612524663611; Fri, 05 Feb 2021 03:31:03 -0800 (PST) Received: from localhost ([88.98.246.218]) by smtp.gmail.com with ESMTPSA id r11sm8918779wmh.9.2021.02.05.03.31.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 05 Feb 2021 03:31:02 -0800 (PST) From: luca.boccassi@gmail.com To: Michael Baum Cc: Matan Azrad , dpdk stable Date: Fri, 5 Feb 2021 11:16:38 +0000 Message-Id: <20210205111920.1272063-112-luca.boccassi@gmail.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210205111920.1272063-1-luca.boccassi@gmail.com> References: <20210205111920.1272063-1-luca.boccassi@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [dpdk-stable] patch 'net/mlx5: remove CQE padding device argument' has been queued to stable release 20.11.1 X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Sender: "stable" Hi, FYI, your patch has been queued to stable release 20.11.1 Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet. It will be pushed if I get no objections before 02/07/21. So please shout if anyone has objections. Also note that after the patch there's a diff of the upstream commit vs the patch applied to the branch. This will indicate if there was any rebasing needed to apply to the stable branch. If there were code changes for rebasing (ie: not only metadata diffs), please double check that the rebase was correctly done. Queued patches are on a temporary branch at: https://github.com/bluca/dpdk-stable This queued commit can be viewed at: https://github.com/bluca/dpdk-stable/commit/5b16f4717a145acd8e87c2e23afda55ddbe5dd8f Thanks. Luca Boccassi --- >From 5b16f4717a145acd8e87c2e23afda55ddbe5dd8f Mon Sep 17 00:00:00 2001 From: Michael Baum Date: Wed, 6 Jan 2021 08:19:24 +0000 Subject: [PATCH] net/mlx5: remove CQE padding device argument [ upstream commit 4a7f979af28ee94080a5cb02dd21493aa4363777 ] The data-path code doesn't take care on 'rxq_cqe_pad_en' and use padded CQE for any case when the system cache-line size is 128B. This makes the argument redundant. Remove it. Fixes: bc91e8db12cd ("net/mlx5: add 128B padding of Rx completion entry") Signed-off-by: Michael Baum Acked-by: Matan Azrad --- doc/guides/nics/mlx5.rst | 18 ------------------ drivers/net/mlx5/linux/mlx5_os.c | 12 ------------ drivers/net/mlx5/linux/mlx5_verbs.c | 2 +- drivers/net/mlx5/mlx5.c | 6 ------ drivers/net/mlx5/mlx5.h | 1 - 5 files changed, 1 insertion(+), 38 deletions(-) diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst index 3bda0f8417..6950cc1188 100644 --- a/doc/guides/nics/mlx5.rst +++ b/doc/guides/nics/mlx5.rst @@ -448,24 +448,6 @@ Driver options - POWER9 and ARMv8 with ConnectX-4 Lx, ConnectX-5, ConnectX-6, ConnectX-6 Dx, ConnectX-6 Lx, BlueField and BlueField-2. -- ``rxq_cqe_pad_en`` parameter [int] - - A nonzero value enables 128B padding of CQE on RX side. The size of CQE - is aligned with the size of a cacheline of the core. If cacheline size is - 128B, the CQE size is configured to be 128B even though the device writes - only 64B data on the cacheline. This is to avoid unnecessary cache - invalidation by device's two consecutive writes on to one cacheline. - However in some architecture, it is more beneficial to update entire - cacheline with padding the rest 64B rather than striding because - read-modify-write could drop performance a lot. On the other hand, - writing extra data will consume more PCIe bandwidth and could also drop - the maximum throughput. It is recommended to empirically set this - parameter. Disabled by default. - - Supported on: - - - CPU having 128B cacheline with ConnectX-5 and BlueField. - - ``rxq_pkt_pad_en`` parameter [int] A nonzero value enables padding Rx packet to the size of cacheline on PCI diff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c index a77793890a..01bbc14ea5 100644 --- a/drivers/net/mlx5/linux/mlx5_os.c +++ b/drivers/net/mlx5/linux/mlx5_os.c @@ -671,7 +671,6 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev, unsigned int hw_padding = 0; unsigned int mps; unsigned int cqe_comp; - unsigned int cqe_pad = 0; unsigned int tunnel_en = 0; unsigned int mpls_en = 0; unsigned int swp = 0; @@ -869,11 +868,6 @@ err_secondary: else cqe_comp = 1; config->cqe_comp = cqe_comp; -#ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD - /* Whether device supports 128B Rx CQE padding. */ - cqe_pad = RTE_CACHE_LINE_SIZE == 128 && - (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD); -#endif #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) { tunnel_en = ((dv_attr.tunnel_offloads_caps & @@ -1110,12 +1104,6 @@ err_secondary: DRV_LOG(WARNING, "Rx CQE compression isn't supported"); config->cqe_comp = 0; } - if (config->cqe_pad && !cqe_pad) { - DRV_LOG(WARNING, "Rx CQE padding isn't supported"); - config->cqe_pad = 0; - } else if (config->cqe_pad) { - DRV_LOG(INFO, "Rx CQE padding is enabled"); - } if (config->devx) { err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config->hca_attr); if (err) { diff --git a/drivers/net/mlx5/linux/mlx5_verbs.c b/drivers/net/mlx5/linux/mlx5_verbs.c index 9161fa3b7d..abd167ef14 100644 --- a/drivers/net/mlx5/linux/mlx5_verbs.c +++ b/drivers/net/mlx5/linux/mlx5_verbs.c @@ -234,7 +234,7 @@ mlx5_rxq_ibv_cq_create(struct rte_eth_dev *dev, uint16_t idx) dev->data->port_id); } #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD - if (priv->config.cqe_pad) { + if (RTE_CACHE_LINE_SIZE == 128) { cq_attr.mlx5.comp_mask |= MLX5DV_CQ_INIT_ATTR_MASK_FLAGS; cq_attr.mlx5.flags |= MLX5DV_CQ_INIT_ATTR_FLAGS_CQE_PAD; } diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c index ebad6a0709..53ccd1656d 100644 --- a/drivers/net/mlx5/mlx5.c +++ b/drivers/net/mlx5/mlx5.c @@ -43,9 +43,6 @@ /* Device parameter to enable RX completion queue compression. */ #define MLX5_RXQ_CQE_COMP_EN "rxq_cqe_comp_en" -/* Device parameter to enable RX completion entry padding to 128B. */ -#define MLX5_RXQ_CQE_PAD_EN "rxq_cqe_pad_en" - /* Device parameter to enable padding Rx packet to cacheline size. */ #define MLX5_RXQ_PKT_PAD_EN "rxq_pkt_pad_en" @@ -1623,8 +1620,6 @@ mlx5_args_check(const char *key, const char *val, void *opaque) } config->cqe_comp = !!tmp; config->cqe_comp_fmt = tmp; - } else if (strcmp(MLX5_RXQ_CQE_PAD_EN, key) == 0) { - config->cqe_pad = !!tmp; } else if (strcmp(MLX5_RXQ_PKT_PAD_EN, key) == 0) { config->hw_padding = !!tmp; } else if (strcmp(MLX5_RX_MPRQ_EN, key) == 0) { @@ -1753,7 +1748,6 @@ mlx5_args(struct mlx5_dev_config *config, struct rte_devargs *devargs) { const char **params = (const char *[]){ MLX5_RXQ_CQE_COMP_EN, - MLX5_RXQ_CQE_PAD_EN, MLX5_RXQ_PKT_PAD_EN, MLX5_RX_MPRQ_EN, MLX5_RX_MPRQ_LOG_STRIDE_NUM, diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h index fff2422ea6..4902960052 100644 --- a/drivers/net/mlx5/mlx5.h +++ b/drivers/net/mlx5/mlx5.h @@ -207,7 +207,6 @@ struct mlx5_dev_config { unsigned int mpls_en:1; /* MPLS over GRE/UDP is enabled. */ unsigned int cqe_comp:1; /* CQE compression is enabled. */ unsigned int cqe_comp_fmt:3; /* CQE compression format. */ - unsigned int cqe_pad:1; /* CQE padding is enabled. */ unsigned int tso:1; /* Whether TSO is supported. */ unsigned int rx_vec_en:1; /* Rx vector is enabled. */ unsigned int mr_ext_memseg_en:1; -- 2.29.2 --- Diff of the applied patch vs upstream commit (please double-check if non-empty: --- --- - 2021-02-05 11:18:34.248915852 +0000 +++ 0112-net-mlx5-remove-CQE-padding-device-argument.patch 2021-02-05 11:18:28.986694539 +0000 @@ -1 +1 @@ -From 4a7f979af28ee94080a5cb02dd21493aa4363777 Mon Sep 17 00:00:00 2001 +From 5b16f4717a145acd8e87c2e23afda55ddbe5dd8f Mon Sep 17 00:00:00 2001 @@ -5,0 +6,2 @@ +[ upstream commit 4a7f979af28ee94080a5cb02dd21493aa4363777 ] + @@ -14 +15,0 @@ -Cc: stable@dpdk.org @@ -24,2 +25 @@ - drivers/net/mlx5/windows/mlx5_os.c | 7 ------- - 6 files changed, 1 insertion(+), 45 deletions(-) + 5 files changed, 1 insertion(+), 38 deletions(-) @@ -57 +57 @@ -index 6812a1f215..9ac1d46b1b 100644 +index a77793890a..01bbc14ea5 100644 @@ -60 +60 @@ -@@ -677,7 +677,6 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev, +@@ -671,7 +671,6 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev, @@ -68 +68 @@ -@@ -875,11 +874,6 @@ err_secondary: +@@ -869,11 +868,6 @@ err_secondary: @@ -80 +80 @@ -@@ -1116,12 +1110,6 @@ err_secondary: +@@ -1110,12 +1104,6 @@ err_secondary: @@ -94 +94 @@ -index b52ae2e6c1..318e39b1df 100644 +index 9161fa3b7d..abd167ef14 100644 @@ -107 +107 @@ -index e47ad6bd42..1afad046b5 100644 +index ebad6a0709..53ccd1656d 100644 @@ -110 +110 @@ -@@ -44,9 +44,6 @@ +@@ -43,9 +43,6 @@ @@ -120 +120 @@ -@@ -1633,8 +1630,6 @@ mlx5_args_check(const char *key, const char *val, void *opaque) +@@ -1623,8 +1620,6 @@ mlx5_args_check(const char *key, const char *val, void *opaque) @@ -129 +129 @@ -@@ -1763,7 +1758,6 @@ mlx5_args(struct mlx5_dev_config *config, struct rte_devargs *devargs) +@@ -1753,7 +1748,6 @@ mlx5_args(struct mlx5_dev_config *config, struct rte_devargs *devargs) @@ -138 +138 @@ -index 41034f5d19..92a5d04225 100644 +index fff2422ea6..4902960052 100644 @@ -141 +141 @@ -@@ -212,7 +212,6 @@ struct mlx5_dev_config { +@@ -207,7 +207,6 @@ struct mlx5_dev_config { @@ -149,25 +148,0 @@ -diff --git a/drivers/net/mlx5/windows/mlx5_os.c b/drivers/net/mlx5/windows/mlx5_os.c -index fdd69fd3c1..b036432937 100644 ---- a/drivers/net/mlx5/windows/mlx5_os.c -+++ b/drivers/net/mlx5/windows/mlx5_os.c -@@ -313,7 +313,6 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev, - struct mlx5_priv *priv = NULL; - int err = 0; - unsigned int cqe_comp; -- unsigned int cqe_pad = 0; - struct rte_ether_addr mac; - char name[RTE_ETH_NAME_MAX_LEN]; - int own_domain_id = 0; -@@ -461,12 +460,6 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev, - DRV_LOG(WARNING, "Rx CQE compression isn't supported."); - config->cqe_comp = 0; - } -- if (config->cqe_pad && !cqe_pad) { -- DRV_LOG(WARNING, "Rx CQE padding isn't supported."); -- config->cqe_pad = 0; -- } else if (config->cqe_pad) { -- DRV_LOG(INFO, "Rx CQE padding is enabled."); -- } - if (config->devx) { - err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config->hca_attr); - if (err) {