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canonical.com; dkim=none (message not signed) header.d=none;canonical.com; dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.112.36 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.112.36; helo=mail.nvidia.com; Received: from mail.nvidia.com (216.228.112.36) by CO1NAM11FT059.mail.protection.outlook.com (10.13.174.160) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.4415.14 via Frontend Transport; Mon, 16 Aug 2021 16:31:12 +0000 Received: from DRHQMAIL107.nvidia.com (10.27.9.16) by HQMAIL101.nvidia.com (172.20.187.10) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 16 Aug 2021 16:30:16 +0000 Received: from nvidia.com (172.20.187.6) by DRHQMAIL107.nvidia.com (10.27.9.16) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 16 Aug 2021 16:30:15 +0000 From: Bing Zhao To: , CC: , Date: Mon, 16 Aug 2021 19:29:50 +0300 Message-ID: <20210816162952.1931473-5-bingz@nvidia.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210816162952.1931473-1-bingz@nvidia.com> References: <20210816162952.1931473-1-bingz@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [172.20.187.6] X-ClientProxiedBy: HQMAIL101.nvidia.com (172.20.187.10) To DRHQMAIL107.nvidia.com (10.27.9.16) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: ef3bf9b5-f112-4a4c-0f2e-08d960d342cf X-MS-TrafficTypeDiagnostic: SN6PR12MB2720: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:2657; 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CAT:NONE; SFS:(4636009)(396003)(346002)(376002)(136003)(39860400002)(46966006)(36840700001)(186003)(6286002)(426003)(36756003)(107886003)(1076003)(16526019)(6666004)(4326008)(82310400003)(8936002)(8676002)(336012)(47076005)(83380400001)(86362001)(356005)(55016002)(7696005)(82740400003)(54906003)(2616005)(7636003)(70206006)(478600001)(70586007)(316002)(2906002)(110136005)(26005)(5660300002)(36860700001); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Aug 2021 16:31:12.3008 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ef3bf9b5-f112-4a4c-0f2e-08d960d342cf X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.36]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT059.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN6PR12MB2720 Subject: [dpdk-stable] [PATCH 19.11 4/6] net/mlx5: fix RoCE LAG bond device probing X-BeenThere: stable@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: patches for DPDK stable branches List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: stable-bounces@dpdk.org Sender: "stable" From: Viacheslav Ovsiienko [ upstream commit 9f430dd75107d47fb9b67ab756503397b59b8955 ] The RoCE LAG bond device requires neither E-Switch nor SR-IOV configurations. It means the RoCE LAG bond device might be presented as a single port Infiniband device. The mlx5 PMD wrongly recognized standalone RoCE LAG bond device as E-Switch configuration, this triggered the calls of E-Switch ports related API and the latter failed (over the new OFED kernel driver, starting since 5.4.1), causing the overall device probe failure. If there is a single port Infiniband bond device found the E-Switch related flags must be cleared indicating standalone configuration. Also, it is not true anymore the bond device can exist over E-Switch configurations only (as it was claimed for VF LAG bond devices). The related checks are not relevant anymore and removed. Fixes: 790164ce1d2d ("net/mlx5: check kernel support for VF LAG bonding") Cc: stable@dpdk.org Signed-off-by: Viacheslav Ovsiienko Acked-by: Matan Azrad Signed-off-by: Bing Zhao --- drivers/net/mlx5/mlx5.c | 22 +++++++++------------- 1 file changed, 9 insertions(+), 13 deletions(-) diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c index 3f14bd5419..4696a1f2d1 100644 --- a/drivers/net/mlx5/mlx5.c +++ b/drivers/net/mlx5/mlx5.c @@ -3154,19 +3154,6 @@ mlx5_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, goto exit; } } -#ifndef HAVE_MLX5DV_DR_DEVX_PORT - if (bd >= 0) { - /* - * This may happen if there is VF LAG kernel support and - * application is compiled with older rdma_core library. - */ - DRV_LOG(ERR, - "No kernel/verbs support for VF LAG bonding found."); - rte_errno = ENOTSUP; - ret = -rte_errno; - goto exit; - } -#endif /* * Now we can determine the maximal * amount of devices to be spawned. @@ -3230,6 +3217,15 @@ mlx5_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, if (!ret && bd >= 0) { switch (list[ns].info.name_type) { case MLX5_PHYS_PORT_NAME_TYPE_UPLINK: + if (np == 1) { + /* + * Force standalone bonding + * device for ROCE LAG + * confgiurations. + */ + list[ns].info.master = 0; + list[ns].info.representor = 0; + } if (list[ns].info.port_name == bd) ns++; break; -- 2.21.0